[linux-sunxi] Re: [PATCH v4 04/18] dt-bindings: syscon: Add DT bindings documentation for Allwinner syscon

[André Przywara]

On 12/04/17 12:13, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> syscon present in allwinner devices.
> 
> Signed-off-by: Corentin Labbe 
> ---
>  .../devicetree/bindings/misc/allwinner,syscon.txt | 19 
> +++
>  1 file changed, 19 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/misc/allwinner,syscon.txt
> 
> diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt 
> b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt
> new file mode 100644
> index 000..c056c5b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt
> @@ -0,0 +1,19 @@
> +* Allwinner sun8i system controller
> +
> +This file describes the bindings for the system controller present in
> +Allwinner SoC H3, A83T and A64.
> +The principal function of this syscon is to control EMAC PHY choice and
> +config.
> +
> +Required properties for the system controller:
> +- reg: address and length of the register for the device.
> +- compatible: should be "syscon" and one of the following string:
> + "allwinner,sun8i-h3-system-controller"
> + "allwinner,sun8i-a64-system-controller"

While sun8i might make some sense technically, all 64-bit sunxi
compatible strings use the sun50i prefix to follow the Allwinner naming.
So this should read:
"allwinner,sun50i-a64-system-controller"

Also I am wondering if we should add a compatible string for the H5
(support for that SoC is in -next already):
"allwinner,sun50i-h5-system-controller"

Cheers,
Andre.

> + "allwinner,sun8i-a83t-system-controller"
> +
> +Example:
> +syscon: syscon@01c0 {
> + compatible = "allwinner,sun8i-h3-system-controller", "syscon";
> + reg = <0x01c0 0x1000>;
> +};
> 

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

[linux-sunxi] Re: [PATCH] rtc-sunxi: Allow to select RTC clock source

[mahesh . sawant]

Hello Kortmann

I am trying to use internal RTC of with Allwinner H3 for Orangepi board. 
I need to know how to change the clock source of the intrnal RTC at boot 
time (using armbian with 3.4.113) and the code you mentioned below how to 
use in the driver part.
Thanks.
Mahesh 



On Wednesday, July 27, 2016 at 8:45:12 PM UTC+5:30, Onno Kortmann wrote:
>
> This adds a sysfs 'clock_source' attribute which can be used to query 
> and set the clock source of the RTC, either 'internal' or 'external'. 
>
> Important note: Probing the pins of the 32kHz crystal with a scope will 
> not reliably tell you whether the (usually) more accurate external is 
> selected! On a 'Cubietech Cubietruck' board, the author saw a stable 
> 32768Hz signal on the crystal, even though the internal oscillator was 
> selected and the clock wildly drifting. 
>
> Using adjtimex might help to figure out which oscillator is selected: 
>
> ~# echo internal > /sys/devices/.../1c20d00.rtc/clock_source 
> ~# adjtimex -n -c=3 
>   --- current ---   -- suggested -- 
> cmos time system-cmos  error_ppm   tick  freqtick  freq 
> 1469627826  31.224561 
> 1469627835  31.85809863353.6  1 0 
> 1469627844  32.49078263268.4  1 09367   2069425 
> ~# echo external > /sys/devices/.../1c20d00.rtc/clock_source 
> ~# adjtimex -n -c=3 
>   --- current ---   -- suggested -- 
> cmos time system-cmos  error_ppm   tick  freqtick  freq 
> 1469627851  32.883407 
> 1469627861  32.883380   -2.7  1 0 
> 1469627871  32.883352   -2.8  1 0   1185937 
>
> Signed-off-by: Onno Kortmann  
> --- 
>  drivers/rtc/rtc-sunxi.c | 54 
> + 
>  1 file changed, 54 insertions(+) 
>
> diff --git a/drivers/rtc/rtc-sunxi.c b/drivers/rtc/rtc-sunxi.c 
> index abada60..3fcf571 100644 
> --- a/drivers/rtc/rtc-sunxi.c 
> +++ b/drivers/rtc/rtc-sunxi.c 
> @@ -36,6 +36,8 @@ 
>  #define SUNXI_LOSC_CTRL0x 
>  #define SUNXI_LOSC_CTRL_RTC_HMS_ACCBIT(8) 
>  #define SUNXI_LOSC_CTRL_RTC_YMD_ACCBIT(7) 
> +#define SUNXI_LOSC_OSC32K_SRC_SEL BIT(0) 
> +#define SUNXI_LOSC_KEY_VALUE0x16aa 
>   
>  #define SUNXI_RTC_YMD0x0004 
>   
> @@ -432,6 +434,50 @@ static const struct of_device_id sunxi_rtc_dt_ids[] = 
> { 
>  }; 
>  MODULE_DEVICE_TABLE(of, sunxi_rtc_dt_ids); 
>   
> +/* As per page 126 of the A20 manual, the lowest bit in LOSC_CTRL_REG 
> controls 
> + * the 32.768KHz clock source to use for the RTC. Using the clock_source 
> sysfs 
> + * attribute, the clock can be selected between external (accurate 32kHz 
> + * crystal) and internal (seems to be an inaccurate RC oscillator) mode. 
>  It 
> + * appears that this bit is non-volatile and will be kept in the RTC when 
> the 
> + * system is powered off. 
> + */ 
> +static ssize_t sunxi_rtc_show_clock_source(struct device *dev, 
> +struct device_attribute *attr, 
> +char *buf) 
> +{ 
> +struct sunxi_rtc_dev *chip = dev_get_drvdata(dev); 
> +u32 val = readl(chip->base + SUNXI_LOSC_CTRL); 
> +if (val & SUNXI_LOSC_OSC32K_SRC_SEL) 
> +return sprintf(buf, "external\n"); 
> +else 
> +return sprintf(buf, "internal\n"); 
> +} 
> + 
> +static ssize_t sunxi_rtc_store_clock_source(struct device *dev, 
> +struct device_attribute *attr, 
> +const char *buf, size_t count) { 
> +struct sunxi_rtc_dev *chip = dev_get_drvdata(dev); 
> +u32 val = readl(chip->base + SUNXI_LOSC_CTRL); 
> + 
> +if (strncmp(buf, "external", 8) == 0) 
> +val|=SUNXI_LOSC_OSC32K_SRC_SEL; 
> +else if (strncmp(buf, "internal", 8) == 0) 
> +val&=~SUNXI_LOSC_OSC32K_SRC_SEL; 
> +else 
> +return -EINVAL; 
> + 
> +/* Writing this bit requires setting the upper 16 bit to 0x16aa 
> (key 
> + * value). */ 
> +val |= SUNXI_LOSC_KEY_VALUE; 
> + 
> +writel(val, chip->base + SUNXI_LOSC_CTRL); 
> +return count; 
> +} 
> + 
> +static DEVICE_ATTR(clock_source, S_IRUGO | S_IWUSR, 
> +sunxi_rtc_show_clock_source, 
> +sunxi_rtc_store_clock_source); 
> + 
>  static int sunxi_rtc_probe(struct platform_device *pdev) 
>  { 
>  struct sunxi_rtc_dev *chip; 
> @@ -490,6 +536,13 @@ static int sunxi_rtc_probe(struct platform_device 
> *pdev) 
>   
>  dev_info(>dev, "RTC enabled\n"); 
>   
> +ret = device_create_file(>dev, _attr_clock_source); 
> +if (ret) { 
> +dev_err(>dev, "Unable to create 

[linux-sunxi] Re: [PATCH v4 04/18] dt-bindings: syscon: Add DT bindings documentation for Allwinner syscon

[Rob Herring]

On Wed, Apr 12, 2017 at 01:13:46PM +0200, Corentin Labbe wrote:
> This patch adds documentation for Device-Tree bindings for the
> syscon present in allwinner devices.
> 
> Signed-off-by: Corentin Labbe 
> ---
>  .../devicetree/bindings/misc/allwinner,syscon.txt | 19 
> +++
>  1 file changed, 19 insertions(+)
>  create mode 100644 
> Documentation/devicetree/bindings/misc/allwinner,syscon.txt

Acked-by: Rob Herring 

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

Re: [linux-sunxi] Re: [PATCH 2/4] ARM: sunxi: Drop mmc0_cd_pin_reference_design pinmux setting

[Chen-Yu Tsai]

On Wed, Apr 19, 2017 at 11:36 PM,   wrote:
> 在 2017-04-19 13:09，Chen-Yu Tsai 写道：
>>
>> As part of our effort to move pinctrl/GPIO interlocking into the
>> driver where it belongs, this patch drops the definition and usage
>> of the mmc0_cd_pin_reference_design pinmux setting for the default
>> mmc0 card detect GPIO pin.
>>
>> Signed-off-by: Chen-Yu Tsai 

[...]

>> diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi
>> b/arch/arm/boot/dts/sun7i-a20.dtsi
>> index 93aa55970bd7..c03b59aaec82 100644
>> --- a/arch/arm/boot/dts/sun7i-a20.dtsi
>> +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
>> @@ -1190,12 +1190,6 @@
>> bias-pull-up;
>> };
>>
>> -   mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
>> -   pins = "PH1";
>> -   function = "gpio_in";
>> -   bias-pull-up;
>
>
> It needs pull up, so shouldn't be dropped.
>
> (Although there may be external pull-up resistors on the board;
> however last time we removed the pull-up on MMC node many boards
> failed, so we cannot rely on external pull-up resistors)

I checked the boards that I have schematics, and the reference design.
All have proper external pull-up resistors for this pin, unlike the
other mmc pins.

If some board doesn't, it really needs to be singled out and handled
separately. Have you encountered any issues?

Regards
ChenYu

>
>> -   };
>> -
>> mmc2_pins_a: mmc2@0 {
>> pins = "PC6", "PC7", "PC8",
>>"PC9", "PC10", "PC11";
>
>
> --
> You received this message because you are subscribed to the Google Groups
> "linux-sunxi" group.
> To unsubscribe from this group and stop receiving emails from it, send an
> email to linux-sunxi+unsubscr...@googlegroups.com.
> For more options, visit https://groups.google.com/d/optout.

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.

[linux-sunxi] Re: [PATCH 2/4] ARM: sunxi: Drop mmc0_cd_pin_reference_design pinmux setting

[icenowy]

在 2017-04-19 13:09，Chen-Yu Tsai 写道：

As part of our effort to move pinctrl/GPIO interlocking into the
driver where it belongs, this patch drops the definition and usage
of the mmc0_cd_pin_reference_design pinmux setting for the default
mmc0 card detect GPIO pin.

Signed-off-by: Chen-Yu Tsai 
---
 arch/arm/boot/dts/sun4i-a10-a1000.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts   | 2 +-
 arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts  | 2 +-
 arch/arm/boot/dts/sun4i-a10-cubieboard.dts   | 2 +-
 arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10-gemei-g9.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10-hackberry.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-hyundai-a7hd.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10-inet1.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-inet97fv2.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10-itead-iteaduino-plus.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts   | 2 +-
 arch/arm/boot/dts/sun4i-a10-marsboard.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-mini-xplus.dts   | 2 +-
 arch/arm/boot/dts/sun4i-a10-mk802.dts| 2 +-
 arch/arm/boot/dts/sun4i-a10-mk802ii.dts  | 2 +-
 arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts   | 2 +-
 arch/arm/boot/dts/sun4i-a10-pcduino.dts  | 2 +-
 arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts | 2 +-
 arch/arm/boot/dts/sun4i-a10.dtsi | 6 --
 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts  | 2 +-
 arch/arm/boot/dts/sun7i-a20-cubietruck.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-hummingbird.dts  | 2 +-
 arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts| 2 +-
 arch/arm/boot/dts/sun7i-a20-icnova-swac.dts  | 2 +-
 arch/arm/boot/dts/sun7i-a20-itead-ibox.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-m3.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-mk808c.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts  | 2 +-
 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts  | 2 +-
 arch/arm/boot/dts/sun7i-a20-pcduino3-nano.dts| 2 +-
 arch/arm/boot/dts/sun7i-a20-pcduino3.dts | 2 +-
 arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts   | 2 +-
 arch/arm/boot/dts/sun7i-a20-wits-pro-a20-dkt.dts | 2 +-
 arch/arm/boot/dts/sun7i-a20.dtsi | 6 --
 38 files changed, 36 insertions(+), 48 deletions(-)

diff --git a/arch/arm/boot/dts/sun4i-a10-a1000.dts
b/arch/arm/boot/dts/sun4i-a10-a1000.dts
index f2a01fe2bebc..f80d37ddc4c6 100644
--- a/arch/arm/boot/dts/sun4i-a10-a1000.dts
+++ b/arch/arm/boot/dts/sun4i-a10-a1000.dts
@@ -171,7 +171,7 @@

  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>, <_cd_pin_reference_design>;
+   pinctrl-0 = <_pins_a>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
diff --git a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
index 942d739a4384..6b02de592a02 100644
--- a/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
+++ b/arch/arm/boot/dts/sun4i-a10-ba10-tvbox.dts
@@ -109,7 +109,7 @@

  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>, <_cd_pin_reference_design>;
+   pinctrl-0 = <_pins_a>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
diff --git a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
index 17f8c5ec011c..a7d61994b8fd 100644
--- a/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
+++ b/arch/arm/boot/dts/sun4i-a10-chuwi-v7-cw0825.dts
@@ -128,7 +128,7 @@

  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>, <_cd_pin_reference_design>;
+   pinctrl-0 = <_pins_a>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index d844938e2aa7..a698a994e5ff 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -142,7 +142,7 @@

  {
pinctrl-names = "default";
-   pinctrl-0 = <_pins_a>, <_cd_pin_reference_design>;
+   pinctrl-0 = <_pins_a>;
vmmc-supply = <_vcc3v3>;
bus-width = <4>;
cd-gpios = < 7 1 GPIO_ACTIVE_HIGH>; /* PH1 */
diff --git a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
index aad3bec1cb39..e0777ae808c7 100644
--- a/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
+++ b/arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
@@ -163,7 +163,7 @@

  {

[linux-sunxi] Re: [PATCH 0/4] ARM: sunxi: device tree pinctrl clean up and H3 OTG

[Maxime Ripard]

On Wed, Apr 19, 2017 at 01:09:15PM +0800, Chen-Yu Tsai wrote:
> Hi Maxime,
> 
> This series has 2 parts. The parts are largely unrelated, though the
> second part should be applied after the first part, so we don't
> accidentally mux pins that we shouldn't. Hence I'm sending them
> together.
> 
> The first 2 patches clean up the sunxi device tree files, removing
> pinmux settings for common GPIO pins. These include the enable pins
> for the common regulators, and the mmc0 card detect pin from the
> reference designs.
> 
> The second part, the latter 2 patches, enable USB OTG on the Orangepi
> PC, PC Plus, Plus 2E, and the Bananapi M2+. The first 3 boards are
> bunched together, due to how the PC Plus and Plus 2E device trees include
> the device tree of the Opi PC.

Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.


signature.asc
Description: PGP signature

[linux-sunxi] Re: [PATCH 2/3] ARM: sun8i: a83t: Drop leading zeroes from device node addresses

[Maxime Ripard]

On Tue, Apr 18, 2017 at 05:22:02PM +0800, Chen-Yu Tsai wrote:
> On Tue, Apr 18, 2017 at 5:03 PM, Maxime Ripard
>  wrote:
> > On Tue, Apr 18, 2017 at 12:22:04PM +0800, Chen-Yu Tsai wrote:
> >> Kbuild now complains about leading zeroes in the address portion of
> >> device node names.
> >>
> >> Get rid of them.
> >>
> >> Signed-off-by: Chen-Yu Tsai 
> >> ---
> >>  arch/arm/boot/dts/sun8i-a83t.dtsi | 10 +-
> >>  1 file changed, 5 insertions(+), 5 deletions(-)
> >>
> >> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi 
> >> b/arch/arm/boot/dts/sun8i-a83t.dtsi
> >> index 913aacafe8d5..82cb87f21b96 100644
> >> --- a/arch/arm/boot/dts/sun8i-a83t.dtsi
> >> +++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
> >> @@ -162,7 +162,7 @@
> >>   #size-cells = <1>;
> >>   ranges;
> >>
> >> - pio: pinctrl@01c20800 {
> >> + pio: pinctrl@1c20800 {
> >
> > As far as I know this breaks Uboot's auto-addition of stdout-path
> 
> You're right. It breaks as Uboot has the path to the uarts hard-coded.
> That sucks. And from what I can tell, it's not easily solvable by just
> switching to serial alias based references. CONS_INDEX won't line up
> on the A23/A33 Q8 tablets.
> 
> Maybe we can just keep the uart device node the same for now, but fix
> all the other ones. We can come back and fix the uart later once we
> figure out how to fix Uboot.

Thinking more about this, I don't really know why we have that in
U-Boot actually. All our DTs for a very long time have had stdout-path
properly set (and if it's improperly set, this should be fixed). I'd
say we can simply remove that from U-Boot and be done with it.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.


signature.asc
Description: PGP signature

[linux-sunxi] Re: [PATCH 3/3] ARM: sun8i: a83t: Rename pinmux setting names

[Maxime Ripard]

On Tue, Apr 18, 2017 at 05:16:53PM +0800, Chen-Yu Tsai wrote:
> On Tue, Apr 18, 2017 at 5:04 PM, Maxime Ripard
>  wrote:
> > On Tue, Apr 18, 2017 at 12:22:05PM +0800, Chen-Yu Tsai wrote:
> >> The pinmux setting nodes all have an address element in their node
> >> names, however the pinctrl node does not have #address-cells.
> >>
> >> Rename the existing pinmux setting nodes and labels in sun8i-a83t.dtsi,
> >> dropping identifiers for functions that only have one possible setting,
> >> and using the pingroup name if the function is identically available on
> >> different pingroups.
> >>
> >> Signed-off-by: Chen-Yu Tsai 
> >
> > Applied, and I really like the new names.
> >
> > Would you make the same patch for everyone?
> 
> I can. No guarantees on the schedule though.

Sure, I know this isn't really the most entertaining and fulfilling
patch to make ;)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

-- 
You received this message because you are subscribed to the Google Groups 
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email 
to linux-sunxi+unsubscr...@googlegroups.com.
For more options, visit https://groups.google.com/d/optout.


signature.asc
Description: PGP signature