Re: [linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
On 19-12-13 10:58, Chen-Yu Tsai wrote:
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
Also, do we know how this clk struct looks? I would expect so, can we
use defines here?
oliver
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
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Re: [linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
On 19-12-13 10:58, Chen-Yu Tsai wrote:
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
While small, could we make that into a function called
sunxi_gmac_initialize(bis)?
Oliver
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
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[linux-sunxi] [PATCH u-boot-sunxi 03/11] ARM: sunxi: Add GMAC driver
From: Jens Kuske
The existing net/designware driver can be used for sunxi GMAC.
Signed-off-by: Jens Kuske
---
arch/arm/cpu/armv7/sunxi/board.c | 21 -
include/configs/sunxi-common.h | 9 +
2 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index 3e66225..8c43ab6 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -29,6 +29,7 @@
#include
#include
#include
+#include
#include
#ifdef CONFIG_SPL_BUILD
#include
@@ -134,14 +135,32 @@ void enable_caches(void)
}
#endif
-#if defined(CONFIG_SUNXI_EMAC)
+#if defined(CONFIG_SUNXI_EMAC) || defined(CONFIG_SUNXI_GMAC)
/*
* Initializes on-chip ethernet controllers.
* to override, implement board_eth_init()
*/
int cpu_eth_init(bd_t *bis)
{
+#ifdef CONFIG_SUNXI_EMAC
sunxi_emac_initialize(bis);
+#else
+ int pin;
+ struct sunxi_ccm_reg *const ccm =
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
+
+ /* Set up clock gating */
+ setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC);
+
+ /* Set MII clock */
+ setbits_le32(&ccm->gmac_clk_cfg, (0x1 << 2) | (0x2 << 0));
+
+ /* Configure pin mux settings for GMAC */
+ for (pin = SUNXI_GPA(0); pin <= SUNXI_GPA(17); pin++)
+ sunxi_gpio_set_cfgpin(pin, 5);
+
+ designware_initialize(0, SUNXI_GMAC_BASE, 0x1,
PHY_INTERFACE_MODE_RGMII);
+#endif
return 0;
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ee21761..165b2ee 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -430,6 +430,15 @@
#define CONFIG_CMD_NET
#endif
+#ifdef CONFIG_SUNXI_GMAC
+#define CONFIG_DESIGNWARE_ETH /* GMAC can use designware driver */
+#define CONFIG_DW_AUTONEG
+#define CONFIG_SYS_DCACHE_OFF /* dw driver doesn't support dcache */
+#define CONFIG_MII /* MII PHY management */
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#endif
+
#ifdef CONFIG_CMD_NET
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
--
1.8.5.1
--
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