[PATCH] usb: chipidea: core: Add missing module owner field

2014-04-20 Thread Alexander Shiyan
Signed-off-by: Alexander Shiyan shc_w...@mail.ru
---
 drivers/usb/chipidea/core.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index ca6831c..8c49220 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -680,6 +680,7 @@ static struct platform_driver ci_hdrc_driver = {
.remove = ci_hdrc_remove,
.driver = {
.name   = ci_hdrc,
+   .owner  = THIS_MODULE,
},
 };
 
-- 
1.8.3.2

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RE: USB OTG support on mx27pdk

2014-04-20 Thread Peter Chen
 
 
 Sun, 20 Apr 2014 00:48:28 + от Peter Chen peter.c...@freescale.com:
   -Original Message-
   From: Fabio Estevam [mailto:feste...@gmail.com]
   Sent: Sunday, April 20, 2014 1:10 AM
   To: Chen Peter-B29397
   Cc: Michael Grzeschik; Alexander Shiyan; linux-arm-
   ker...@lists.infradead.org; linux-usb@vger.kernel.org; Sascha Hauer;
   chris.ru...@gtsys.com.hk; Guo Shawn-R65073
   Subject: Re: USB OTG support on mx27pdk
  
   On Sat, Apr 19, 2014 at 4:32 AM, Peter Chen peter.c...@freescale.com
   wrote:
The below patch is intended to fix above issues for all platforms,
I have tested it at imx6 platform, if possible, have a test at
   imx25/imx27
please.
  
   I don't see any patch below, but anyway I have managed to fix the
   issue on mx27 at dts level.
  
 
  https://github.com/hzpeterchen/linux-
 usb/commit/c1f42ea27ed3f5d988c63da7849d2e6b445b4fbc
 
  Your problem is different with sasche's, which hang the system due to
  no phy clk. The chris's patch should not cause the oops.
 
 For me, nothing has changed.
 The driver works on i.MX27 PCM970 RDK with the patch as well as without
 it.
 

Thanks for testing. This patch does not change the flow for ulpi, it changes
pts at portsc first, and call ulpi_init if it exists, your results prove that
the patch works ok if the kernel does not touch ulpi.

Peter


 
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Re: [PATCH v2 0/3] Some update for USB OTG

2014-04-20 Thread Peter Chen
On Mon, Mar 31, 2014 at 11:44:13PM -0500, Felipe Balbi wrote:
 On Tue, Apr 01, 2014 at 08:36:58AM +0800, Peter Chen wrote:
  On Thu, Mar 13, 2014 at 03:25:19PM +0800, Li Jun wrote:
   From: Li Jun b47...@freescale.com
   
   Hi Felipe,
   
   Two for fsm, the other one is to delete CONFIG_USB_OTG_FSM
   since it is duplicated with CONFIG_USB_OTG, thanks.
   
   Change on v1:
   Remove {} for a single statement in patch:
   usb: phy-fsm: update OTG HNP state transition.
   
   Li Jun (1):
 usb: phy-fsm: update OTG HNP state transition
   
   Peter Chen (2):
 usb: phy: delete CONFIG_USB_OTG_FSM
 usb: phy-fsm: change | to || for condition OTG_STATE_A_WAIT_BCON
   at statemachine
   
drivers/usb/phy/Kconfig   |   11 +--
drivers/usb/phy/Makefile  |2 +-
drivers/usb/phy/phy-fsm-usb.c |9 +
3 files changed, 7 insertions(+), 15 deletions(-)
   
   -- 
   1.7.9.5
   
   
  
  Hi Felipe,
  
  Would you give some comments for this patchset please? For the
  patch usb: phy: delete CONFIG_USB_OTG_FSM, I sent it more
  than two months ago, I need to know your comments if it
  can be accepted or not, we are working on OTG FSM patchset
  for chipidea, and it is close to review process,
  we need to know if we can use CONFIG_USB_OTG_FSM to cover OTG
  (fsm) code, or just CONFIG_USB_OTG is ok, thanks.
 
 I know you've sent this a long time ago and I've been banging my head
 ever since trying to decide if we should delete OTG FSM or not. On the
 one hand the OTG is pretty generic and aparently everybody would benefit
 from it but on the other hand we might have HW which implements the
 state machine without much SW control - though I can't remind of any
 good examples.
 
 Also, I think most of that code should be agnostic of the PHY layer and
 sit in usb-common.c. Quite frankly, OTG shouldn't depend on the PHY at
 all, we could very well have implementations which need/have no SW
 control over the PHY and still be fully OTG compliant.
 
 cheers
 
 ps: I'll get back to this after merge window closes.
 

Hi Felipe, any further comments for this patchset? Thanks.

-- 

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Re: External hard drive connection issues with xHCI

2014-04-20 Thread Dainius (GreatEmerald)
On Sat, Apr 19, 2014 at 10:52 PM, Alan Stern st...@rowland.harvard.edu wrote:
 That's to be expected.  More to the point would be to test with a USB-2
 cable connected to a USB-3 port.

Yes, I tested both USB2 cable + USB2 port and USB2 cable + USB3 port.
In both cases it doesn't unmount the volume, just does such soft
resets. Though I didn't try it for the first issue. I'll give it a
try.

 You really should upgrade to 3.14.  I don't know whether all the
 changes to xhci-hcd have been back-ported to the stable kernels.

Good to know there were sizeable updates. I'll see if I can reproduce
this on a LiveCD with the latest kernel or not.

 Not much idea regarding the USB-3 problems.  Under USB-2, you can try
 to find out the reason for the resets by collecting a usbmon trace.
 (It's probably the same as the reason for the USB-3 resets.)  See the
 kernel source file Documentation/usb/usbmon.txt for instructions.

Is there any reason why USB3 wouldn't work with usbmon? Nothing is
mentioned in the documentation itself. But yes, I'll give it a try as
well.
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Re: External hard drive connection issues with xHCI

2014-04-20 Thread Alan Stern
On Sun, 20 Apr 2014, Dainius (GreatEmerald) wrote:

  Not much idea regarding the USB-3 problems.  Under USB-2, you can try
  to find out the reason for the resets by collecting a usbmon trace.
  (It's probably the same as the reason for the USB-3 resets.)  See the
  kernel source file Documentation/usb/usbmon.txt for instructions.
 
 Is there any reason why USB3 wouldn't work with usbmon? Nothing is
 mentioned in the documentation itself. But yes, I'll give it a try as
 well.

usbmon does work with USB-3.  I simply wanted to separate the resetting
issue from the unmounting issue.

Alan Stern

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[RFC PATCH 1/2] usb: gadget: fsl_udc: Add support for zynq usb device controller

2014-04-20 Thread Punnaiah Choudary Kalluri
Since zynq soc usb controller is a synopsys IP and there is a driver
available for this controller from freescale in opensource, reusing this
driver for zynq use.

Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
 drivers/usb/gadget/Kconfig|2 +-
 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/fsl_mxc_udc.c  |   21 +
 drivers/usb/gadget/fsl_udc_core.c |5 +
 drivers/usb/gadget/fsl_usb2_udc.h |2 +-
 drivers/usb/host/fsl-mph-dr-of.c  |9 +
 6 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 3557c7e..7f18ab47 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -186,7 +186,7 @@ config USB_BCM63XX_UDC
 
 config USB_FSL_USB2
tristate Freescale Highspeed USB DR Peripheral Controller
-   depends on FSL_SOC || ARCH_MXC
+   depends on FSL_SOC || ARCH_MXC || ARCH_ZYNQ
select USB_FSL_MPH_DR_OF if OF
help
   Some of Freescale PowerPC and i.MX processors have a High Speed
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 5f150bc..38b009f 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_USB_BCM63XX_UDC) += bcm63xx_udc.o
 obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o
 fsl_usb2_udc-y := fsl_udc_core.o
 fsl_usb2_udc-$(CONFIG_ARCH_MXC)+= fsl_mxc_udc.o
+fsl_usb2_udc-$(CONFIG_ARCH_ZYNQ) += fsl_mxc_udc.o
 obj-$(CONFIG_USB_M66592)   += m66592-udc.o
 obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
 obj-$(CONFIG_USB_FSL_QE)   += fsl_qe_udc.o
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c
index 9b140fc..181245c 100644
--- a/drivers/usb/gadget/fsl_mxc_udc.c
+++ b/drivers/usb/gadget/fsl_mxc_udc.c
@@ -19,8 +19,10 @@
 #include linux/io.h
 
 static struct clk *mxc_ahb_clk;
+#ifndef CONFIG_ARCH_ZYNQ
 static struct clk *mxc_per_clk;
 static struct clk *mxc_ipg_clk;
+#endif
 
 /* workaround ENGcm09152 for i.MX35 */
 #define MX35_USBPHYCTRL_OFFSET 0x600
@@ -30,6 +32,7 @@ static struct clk *mxc_ipg_clk;
 int fsl_udc_clk_init(struct platform_device *pdev)
 {
struct fsl_usb2_platform_data *pdata;
+#ifndef CONFIG_ARCH_ZYNQ
unsigned long freq;
int ret;
 
@@ -76,10 +79,21 @@ eclkrate:
clk_disable_unprepare(mxc_per_clk);
mxc_per_clk = NULL;
return ret;
+#else
+   pdata = dev_get_platdata(pdev-dev);
+   mxc_ahb_clk = devm_clk_get(pdev-dev.parent, NULL);
+   if (IS_ERR(mxc_ahb_clk))
+   return PTR_ERR(mxc_ahb_clk);
+
+   clk_prepare_enable(mxc_ahb_clk);
+
+   return 0;
+#endif
 }
 
 int fsl_udc_clk_finalize(struct platform_device *pdev)
 {
+#ifndef CONFIG_ARCH_ZYNQ
struct fsl_usb2_platform_data *pdata = dev_get_platdata(pdev-dev);
int ret = 0;
 
@@ -112,12 +126,19 @@ ioremap_err:
}
 
return ret;
+#else
+   return 0;
+#endif
 }
 
 void fsl_udc_clk_release(void)
 {
+#ifndef CONFIG_ARCH_ZYNQ
if (mxc_per_clk)
clk_disable_unprepare(mxc_per_clk);
clk_disable_unprepare(mxc_ahb_clk);
clk_disable_unprepare(mxc_ipg_clk);
+#else
+   clk_disable_unprepare(mxc_ahb_clk);
+#endif
 }
diff --git a/drivers/usb/gadget/fsl_udc_core.c 
b/drivers/usb/gadget/fsl_udc_core.c
index 15960af..c3ff3fb 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -2492,6 +2492,9 @@ static int __init fsl_udc_probe(struct platform_device 
*pdev)
goto err_free_irq;
}
 
+#ifdef CONFIG_ARCH_ZYNQ
+   udc_controller-vbus_active = 1;
+#endif
ret = usb_add_gadget_udc_release(pdev-dev, udc_controller-gadget,
fsl_udc_release);
if (ret)
@@ -2661,8 +2664,10 @@ static const struct platform_device_id fsl_udc_devtype[] 
= {
 MODULE_DEVICE_TABLE(platform, fsl_udc_devtype);
 static struct platform_driver udc_driver = {
.remove = __exit_p(fsl_udc_remove),
+#ifndef CONFIG_ARCH_ZYNQ
/* Just for FSL i.mx SoC currently */
.id_table   = fsl_udc_devtype,
+#endif
/* these suspend and resume are not usb suspend and resume */
.suspend= fsl_udc_suspend,
.resume = fsl_udc_resume,
diff --git a/drivers/usb/gadget/fsl_usb2_udc.h 
b/drivers/usb/gadget/fsl_usb2_udc.h
index c6703bb..6394138 100644
--- a/drivers/usb/gadget/fsl_usb2_udc.h
+++ b/drivers/usb/gadget/fsl_usb2_udc.h
@@ -590,7 +590,7 @@ static inline struct ep_queue_head *get_qh_by_ep(struct 
fsl_ep *ep)
 }
 
 struct platform_device;
-#ifdef CONFIG_ARCH_MXC
+#if defined CONFIG_ARCH_MXC || defined CONFIG_ARCH_ZYNQ
 int fsl_udc_clk_init(struct platform_device *pdev);
 int fsl_udc_clk_finalize(struct platform_device *pdev);
 void fsl_udc_clk_release(void);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 

[RFC PATCH 0/2] usb: Reuse fsl driver code for synopsys usb controller

2014-04-20 Thread Punnaiah Choudary Kalluri
Zynq soc contains a dual role usb controller and this IP is from synopsys. We
observed that there is driver available for this controller from freescale and
decided to reuse this driver for zynq use.

Here is the link for zynq soc TRM. Please refer chapter 15 for usb controller
related information.
http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

The following series of patches add initial support for zynq soc in fsl gadget 
controller
driver and fsl host controller driver.

Based on these patches, I have the following concerns and sugesstions

Since the freescale usb driver is for synopsys IP, Please consider rebranding
this driver name and config options to reflect that it is a sysnopsys IP. So
that other vendors who using this IP can reuse thie driver.

Also the ehci-fsl.c is for powerpc based soc's, and zynq is ARM based, i have
protected the code which is specifc to freescale with CONFIG_FSL_SOC. Please
suggest if there is a better way of doing this?

Punnaiah Choudary Kalluri (2):
  usb: gadget: fsl_udc: Add support for zynq usb device controller
  usb: ehci-fsl: Add support for zynq usb host controller

 drivers/usb/gadget/Kconfig|2 +-
 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/fsl_mxc_udc.c  |   21 
 drivers/usb/gadget/fsl_udc_core.c |5 +++
 drivers/usb/gadget/fsl_usb2_udc.h |2 +-
 drivers/usb/host/Kconfig  |2 +-
 drivers/usb/host/ehci-fsl.c   |   63 -
 drivers/usb/host/fsl-mph-dr-of.c  |9 +
 8 files changed, 101 insertions(+), 4 deletions(-)

-- 
1.7.4


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[RFC PATCH 2/2] usb: ehci-fsl: Add support for zynq usb host controller

2014-04-20 Thread Punnaiah Choudary Kalluri
Since zynq soc usb controller is a synopsys IP and there is a driver
available for this controller from freescale in opensource, reusing this
driver for zynq use.

Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
 drivers/usb/host/Kconfig|2 +-
 drivers/usb/host/ehci-fsl.c |   63 ++-
 2 files changed, 63 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 3d9e540..295274e 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -117,7 +117,7 @@ config XPS_USB_HCD_XILINX
 
 config USB_EHCI_FSL
bool Support for Freescale PPC on-chip EHCI USB controller
-   depends on FSL_SOC
+   depends on FSL_SOC || ARCH_ZYNQ
select USB_EHCI_ROOT_HUB_TT
select USB_FSL_MPH_DR_OF if OF
---help---
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 6f2c8d3..54db34f 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -23,11 +23,13 @@
  * Anton Vorontsov avoront...@ru.mvista.com.
  */
 
+#include linux/clk.h
 #include linux/kernel.h
 #include linux/types.h
 #include linux/delay.h
 #include linux/pm.h
 #include linux/err.h
+#include linux/of.h
 #include linux/platform_device.h
 #include linux/fsl_devices.h
 
@@ -86,6 +88,15 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
}
irq = res-start;
 
+#ifdef CONFIG_ARCH_ZYNQ
+   pdata-clk = devm_clk_get(pdev-dev.parent, NULL);
+   if (IS_ERR(pdata-clk))
+   return PTR_ERR(pdata-clk);
+
+   retval = clk_prepare_enable(pdata-clk);
+   if (retval)
+   return retval;
+#endif
hcd = usb_create_hcd(driver, pdev-dev, dev_name(pdev-dev));
if (!hcd) {
retval = -ENOMEM;
@@ -121,9 +132,11 @@ static int usb_hcd_fsl_probe(const struct hc_driver 
*driver,
goto err2;
}
 
+#ifdef CONFIG_FSL_SOC
/* Enable USB controller, 83xx or 8536 */
if (pdata-have_sysif_regs  pdata-controller_ver  FSL_USB_VER_1_6)
setbits32(hcd-regs + FSL_SOC_USB_CTRL, 0x4);
+#endif
 
/* Don't need to set host mode here. It will be done by tdi_reset() */
 
@@ -159,6 +172,9 @@ static int usb_hcd_fsl_probe(const struct hc_driver *driver,
   err2:
usb_put_hcd(hcd);
   err1:
+#ifdef CONFIG_ARCH_ZYNQ
+   clk_disable_unprepare(pdata-clk);
+#endif
dev_err(pdev-dev, init %s fail, %d\n, dev_name(pdev-dev), retval);
if (pdata-exit)
pdata-exit(pdev);
@@ -203,6 +219,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 {
u32 portsc;
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+#ifdef CONFIG_FSL_SOC
void __iomem *non_ehci = hcd-regs;
struct device *dev = hcd-self.controller;
struct fsl_usb2_platform_data *pdata = dev_get_platdata(dev);
@@ -211,18 +228,21 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
dev_warn(hcd-self.controller, Could not get controller 
version\n);
return -ENODEV;
}
+#endif
 
portsc = ehci_readl(ehci, ehci-regs-port_status[port_offset]);
portsc = ~(PORT_PTS_MSK | PORT_PTS_PTW);
 
switch (phy_mode) {
case FSL_USB2_PHY_ULPI:
+#ifdef CONFIG_FSL_SOC
if (pdata-have_sysif_regs  pdata-controller_ver) {
/* controller version 1.6 or above */
clrbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
setbits32(non_ehci + FSL_SOC_USB_CTRL,
ULPI_PHY_CLK_SEL | USB_CTRL_USB_EN);
}
+#endif
portsc |= PORT_PTS_ULPI;
break;
case FSL_USB2_PHY_SERIAL:
@@ -232,6 +252,7 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
portsc |= PORT_PTS_PTW;
/* fall through */
case FSL_USB2_PHY_UTMI:
+#ifdef CONFIG_FSL_SOC
if (pdata-have_sysif_regs  pdata-controller_ver) {
/* controller version 1.6 or above */
setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
@@ -242,12 +263,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
if (pdata-have_sysif_regs)
setbits32(non_ehci + FSL_SOC_USB_CTRL,
  CTRL_UTMI_PHY_EN);
+#endif
portsc |= PORT_PTS_UTMI;
break;
case FSL_USB2_PHY_NONE:
break;
}
 
+#ifdef CONFIG_FSL_SOC
if (pdata-have_sysif_regs  pdata-controller_ver 
(phy_mode == FSL_USB2_PHY_ULPI)) {
/* check PHY_CLK_VALID to get phy clk valid */
@@ -258,11 +281,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
return -EINVAL;
}
}
+#endif
 
ehci_writel(ehci, portsc, ehci-regs-port_status[port_offset]);
 
+#ifdef 

[RFC PATCH 1/2] usb: gadget: fsl_udc: Add support for zynq usb device controller

2014-04-20 Thread Punnaiah Choudary Kalluri
Since zynq soc usb controller is a synopsys IP and there is a driver
available for this controller from freescale in opensource, reusing this
driver for zynq use.

Signed-off-by: Punnaiah Choudary Kalluri punn...@xilinx.com
---
 drivers/usb/gadget/Kconfig|2 +-
 drivers/usb/gadget/Makefile   |1 +
 drivers/usb/gadget/fsl_mxc_udc.c  |   21 +
 drivers/usb/gadget/fsl_udc_core.c |5 +
 drivers/usb/gadget/fsl_usb2_udc.h |2 +-
 drivers/usb/host/fsl-mph-dr-of.c  |9 +
 6 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 3557c7e..7f18ab47 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -186,7 +186,7 @@ config USB_BCM63XX_UDC
 
 config USB_FSL_USB2
tristate Freescale Highspeed USB DR Peripheral Controller
-   depends on FSL_SOC || ARCH_MXC
+   depends on FSL_SOC || ARCH_MXC || ARCH_ZYNQ
select USB_FSL_MPH_DR_OF if OF
help
   Some of Freescale PowerPC and i.MX processors have a High Speed
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 5f150bc..38b009f 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_USB_BCM63XX_UDC) += bcm63xx_udc.o
 obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o
 fsl_usb2_udc-y := fsl_udc_core.o
 fsl_usb2_udc-$(CONFIG_ARCH_MXC)+= fsl_mxc_udc.o
+fsl_usb2_udc-$(CONFIG_ARCH_ZYNQ) += fsl_mxc_udc.o
 obj-$(CONFIG_USB_M66592)   += m66592-udc.o
 obj-$(CONFIG_USB_R8A66597) += r8a66597-udc.o
 obj-$(CONFIG_USB_FSL_QE)   += fsl_qe_udc.o
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c
index 9b140fc..181245c 100644
--- a/drivers/usb/gadget/fsl_mxc_udc.c
+++ b/drivers/usb/gadget/fsl_mxc_udc.c
@@ -19,8 +19,10 @@
 #include linux/io.h
 
 static struct clk *mxc_ahb_clk;
+#ifndef CONFIG_ARCH_ZYNQ
 static struct clk *mxc_per_clk;
 static struct clk *mxc_ipg_clk;
+#endif
 
 /* workaround ENGcm09152 for i.MX35 */
 #define MX35_USBPHYCTRL_OFFSET 0x600
@@ -30,6 +32,7 @@ static struct clk *mxc_ipg_clk;
 int fsl_udc_clk_init(struct platform_device *pdev)
 {
struct fsl_usb2_platform_data *pdata;
+#ifndef CONFIG_ARCH_ZYNQ
unsigned long freq;
int ret;
 
@@ -76,10 +79,21 @@ eclkrate:
clk_disable_unprepare(mxc_per_clk);
mxc_per_clk = NULL;
return ret;
+#else
+   pdata = dev_get_platdata(pdev-dev);
+   mxc_ahb_clk = devm_clk_get(pdev-dev.parent, NULL);
+   if (IS_ERR(mxc_ahb_clk))
+   return PTR_ERR(mxc_ahb_clk);
+
+   clk_prepare_enable(mxc_ahb_clk);
+
+   return 0;
+#endif
 }
 
 int fsl_udc_clk_finalize(struct platform_device *pdev)
 {
+#ifndef CONFIG_ARCH_ZYNQ
struct fsl_usb2_platform_data *pdata = dev_get_platdata(pdev-dev);
int ret = 0;
 
@@ -112,12 +126,19 @@ ioremap_err:
}
 
return ret;
+#else
+   return 0;
+#endif
 }
 
 void fsl_udc_clk_release(void)
 {
+#ifndef CONFIG_ARCH_ZYNQ
if (mxc_per_clk)
clk_disable_unprepare(mxc_per_clk);
clk_disable_unprepare(mxc_ahb_clk);
clk_disable_unprepare(mxc_ipg_clk);
+#else
+   clk_disable_unprepare(mxc_ahb_clk);
+#endif
 }
diff --git a/drivers/usb/gadget/fsl_udc_core.c 
b/drivers/usb/gadget/fsl_udc_core.c
index 15960af..c3ff3fb 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -2492,6 +2492,9 @@ static int __init fsl_udc_probe(struct platform_device 
*pdev)
goto err_free_irq;
}
 
+#ifdef CONFIG_ARCH_ZYNQ
+   udc_controller-vbus_active = 1;
+#endif
ret = usb_add_gadget_udc_release(pdev-dev, udc_controller-gadget,
fsl_udc_release);
if (ret)
@@ -2661,8 +2664,10 @@ static const struct platform_device_id fsl_udc_devtype[] 
= {
 MODULE_DEVICE_TABLE(platform, fsl_udc_devtype);
 static struct platform_driver udc_driver = {
.remove = __exit_p(fsl_udc_remove),
+#ifndef CONFIG_ARCH_ZYNQ
/* Just for FSL i.mx SoC currently */
.id_table   = fsl_udc_devtype,
+#endif
/* these suspend and resume are not usb suspend and resume */
.suspend= fsl_udc_suspend,
.resume = fsl_udc_resume,
diff --git a/drivers/usb/gadget/fsl_usb2_udc.h 
b/drivers/usb/gadget/fsl_usb2_udc.h
index c6703bb..6394138 100644
--- a/drivers/usb/gadget/fsl_usb2_udc.h
+++ b/drivers/usb/gadget/fsl_usb2_udc.h
@@ -590,7 +590,7 @@ static inline struct ep_queue_head *get_qh_by_ep(struct 
fsl_ep *ep)
 }
 
 struct platform_device;
-#ifdef CONFIG_ARCH_MXC
+#if defined CONFIG_ARCH_MXC || defined CONFIG_ARCH_ZYNQ
 int fsl_udc_clk_init(struct platform_device *pdev);
 int fsl_udc_clk_finalize(struct platform_device *pdev);
 void fsl_udc_clk_release(void);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 

Re: [RFC PATCH 0/2] usb: Reuse fsl driver code for synopsys usb controller

2014-04-20 Thread Greg KH
On Sun, Apr 20, 2014 at 09:57:03PM +0530, Punnaiah Choudary Kalluri wrote:
 Zynq soc contains a dual role usb controller and this IP is from synopsys. We
 observed that there is driver available for this controller from freescale and
 decided to reuse this driver for zynq use.
 
 Here is the link for zynq soc TRM. Please refer chapter 15 for usb controller
 related information.
 http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
 
 The following series of patches add initial support for zynq soc in fsl 
 gadget controller
 driver and fsl host controller driver.
 
 Based on these patches, I have the following concerns and sugesstions
 
 Since the freescale usb driver is for synopsys IP, Please consider rebranding
 this driver name and config options to reflect that it is a sysnopsys IP. So
 that other vendors who using this IP can reuse thie driver.

The config options can be edited to show the new hardware support, but
we don't usually rename kernel drivers, sorry.  That just gets messy in
the end, and the first one here gets to name it is usually enforced.
No users ever see a kernel driver name, especially for a gadget driver,
so it shouldn't ever really matter.

thanks,

greg k-h
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3.15-rc1 and gether bug

2014-04-20 Thread Robert Jarzmik
Hi,

I've tried the 3.15-rc1 recently. Upon USB gether gadget connexion, the kernel
panics. With 3.14, no issue is seen.

My backtrace is in [1]. This happens when my mioa701 is connected to a PC host
through my USB cable. The mioa701 is an ARM PXA270 platform, with pxa27x_udc +
gether running on it for the USB stack.

Felipe, am I the only one seeing this problem ? 

Cheers.

-- 
Robert

[1]
[   98.488015] pxa27x-udc pxa27x-udc: USB reset
[  101.386498] pxa27x-udc pxa27x-udc: USB reset
[  101.458683] pxa27x-udc pxa27x-udc: USB reset
[  101.554300] g_ether gadget: full-speed config #1: CDC Subset/SAFE
[  101.585186] [ cut here ]
[  101.600587] kernel BUG at include/linux/netdevice.h:495!
[  101.615850] Internal error: Oops - BUG: 0 [#1] PREEMPT ARM
[  101.645539] Modules linked in:
[  101.660483] CPU: 0 PID: 0 Comm: swapper Not tainted 3.15.0-rc1+ #104
[  101.690175] task: c05dc5c8 ti: c05d2000 task.ti: c05d2000
[  101.705579] PC is at eth_start+0x64/0x8c
[  101.720981] LR is at __netif_schedule+0x7c/0x90
[  101.736455] pc : [c0299174]lr : [c036a134]psr: 6093
[  101.736455] sp : c05d3d18  ip : c05d3cf8  fp : c05d3d2c
[  101.782340] r10:   r9 : c196c1f0  r8 : c196c1a0
[  101.797823] r7 :   r6 : 0002  r5 : c1976400  r4 : c1976400
[  101.828058] r3 :   r2 : c05d3ce8  r1 : 0001  r0 : 0002
[  101.858722] Flags: nZCv  IRQs off  FIQs on  Mode SVC_32  ISA ARM  Segment 
kernel
[  101.889523] Control: 397f  Table: a12c8000  DAC: 0017
[  101.920073] Process swapper (pid: 0, stack limit = 0xc05d21c8)
[  101.950685] Stack: (0xc05d3d18 to 0xc05d4000)
[  101.966208] 3d00:   
c196c1a0 c1976400
[  101.996761] 3d20: c05d3d4c c05d3d30 c029935c c029911c c196c1a0 c19dca60 
c0615720 c19b0b1c
[  102.027439] 3d40: c05d3d6c c05d3d50 c029a9e0 c02991a8 c0601bbc c19dca60 
7fff c19b0b1c
[  102.058283] 3d60: c05d3dd4 c05d3d70 c0291334 c029a918 c0541828  
c05d3dbc c05e7690
[  102.089508] 3d80: 7fff c0601158 c19dca00 01c2 01aa c0601bbc 
c0601158 
[  102.121067] 3da0: c003f7e4 c004570c 0001 c0601148 8000 8000 
0002 0001
[  102.152919] 3dc0: 0803 c0615348 c05d3e54 c05d3dd8 c02965a0 c029062c 
3fffb255 c061e920
[  102.185101] 3de0: c05d3e44 c05d3df0 c0027b74 c001e024 40001388 c05d3e78 
 062f2bf5
[  102.217437] 3e00: 062f2bf5   062f2bf5 3b274b40  
0001 c0601158
[  102.250002] 3e20: 00010900  0001 c19d8c00 c19d8c00 000b 
c05d3f4c c05d2000
[  102.282763] 3e40:   c05d3e94 c05d3e58 c0057894 c02963f4 
0064 c006bde0
[  102.315937] 3e60: c05d3e9c c1804580 c006bde0 c1804580 c19d8c00  
c05d3f4c c060f624
[  102.349472] 3e80: c060f0d0 c060f630 c05d3eac c05d3e98 c0057aac c00577e8 
c1804580 000b
[  102.383657] 3ea0: c05d3ec4 c05d3eb0 c005ab9c c0057a48 000b 000b 
c05d3edc c05d3ec8
[  102.417931] 3ec0: c0057738 c005aac8 c05f91f8 000b c05d3efc c05d3ee0 
c000a518 c0057708
[  102.452419] 3ee0: c05d3f18 6013  c05d3f4c c05d3f14 c05d3f00 
c000853c c000a4b4
[  102.487056] 3f00: c000ac4c 6013 c05d3f6c c05d3f18 c000df64 c0008510 
0001 11b8
[  102.521894] 3f20: 6093 6013 c05d2000 c061d5c0 c05da078 c060f624 
c060f624 c060f0d0
[  102.556750] 3f40: c060f630 c05d3f6c c05d3f60 c05d3f60 c000ac40 c000ac4c 
6013 
[  102.591997] 3f60: c05d3f9c c05d3f70 c004d35c c000ac18 c05da74c 0002 
c061d5c0 
[  102.627338] 3f80: c05bba90 c05da000 69054117 a05bab14 c05d3fb4 c05d3fa0 
c04300b4 c004d1c0
[  102.662908] 3fa0: c05daa44 c061d5c0 c05d3ff4 c05d3fb8 c0592bb8 c0430040 
 
[  102.698570] 3fc0: c05926d0   c05bba90  397d 
c05da018 c05bba8c
[  102.734153] 3fe0: c05dd3b8 a0004000  c05d3ff8 a0008040 c05928c8 
 
[  102.769692] Backtrace: 
[  102.787423] [c0299110] (eth_start) from [c029935c] 
(gether_connect+0x1c0/0x200)
[  102.822593]  r5:c1976400 r4:c196c1a0
[  102.840438] [c029919c] (gether_connect) from [c029a9e0] 
(geth_set_alt+0xd4/0xf0)
[  102.875744]  r7:c19b0b1c r6:c0615720 r5:c19dca60 r4:c196c1a0
[  102.911425] [c029a90c] (geth_set_alt) from [c0291334] 
(composite_setup+0xd14/0x1458)
[  102.946794]  r7:c19b0b1c r6:7fff r5:c19dca60 r4:c0601bbc
[  102.982305] [c0290620] (composite_setup) from [c02965a0] 
(pxa_udc_irq+0x1b8/0xce8)
[  103.017448]  r10:c0615348 r9:0803 r8:0001 r7:0002 r6:8000 
r5:8000
[  103.052993]  r4:c0601148
[  103.070447] [c02963e8] (pxa_udc_irq) from [c0057894] 
(handle_irq_event_percpu+0xb8/0x260)
[  103.105085]  r10: r9: r8:c05d2000 r7:c05d3f4c r6:000b 
r5:c19d8c00
[  103.140047]  r4:c19d8c00
[  103.157187] [c00577dc] (handle_irq_event_percpu) from [c0057aac] 
(handle_irq_event+0x70/0x90)
[  103.191192]  r10:c060f630 r9:c060f0d0 r8:c060f624 r7:c05d3f4c r6: 
r5:c19d8c00
[  103.225532]  r4:c1804580
[  

Re: [RFC PATCH 0/2] usb: Reuse fsl driver code for synopsys usb controller

2014-04-20 Thread Alan Stern
On Sun, 20 Apr 2014, Punnaiah Choudary Kalluri wrote:

 Zynq soc contains a dual role usb controller and this IP is from synopsys. We
 observed that there is driver available for this controller from freescale and
 decided to reuse this driver for zynq use.
 
 Here is the link for zynq soc TRM. Please refer chapter 15 for usb controller
 related information.
 http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
 
 The following series of patches add initial support for zynq soc in fsl 
 gadget controller
 driver and fsl host controller driver.
 
 Based on these patches, I have the following concerns and sugesstions
 
 Since the freescale usb driver is for synopsys IP, Please consider rebranding
 this driver name and config options to reflect that it is a sysnopsys IP. So
 that other vendors who using this IP can reuse thie driver.
 
 Also the ehci-fsl.c is for powerpc based soc's, and zynq is ARM based, i have
 protected the code which is specifc to freescale with CONFIG_FSL_SOC. Please
 suggest if there is a better way of doing this?

Filling the code with #ifdef lines is definitely not a good way to go.  
Ordinary if statements would be a lot better, if you can't figure out 
a reasonable way to encapsulate the differences.

Alan Stern

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Re: [RFC PATCH 0/2] usb: Reuse fsl driver code for synopsys usb controller

2014-04-20 Thread Marc Kleine-Budde
On 04/20/2014 06:27 PM, Punnaiah Choudary Kalluri wrote:
 Zynq soc contains a dual role usb controller and this IP is from synopsys. We
 observed that there is driver available for this controller from freescale and
 decided to reuse this driver for zynq use.

Have a look drivers/usb/chipidea. It's maintained by Peter Chen (Cc'ed)
and is in better shape than the freescale driver.

Marc

-- 
Pengutronix e.K.  | Marc Kleine-Budde   |
Industrial Linux Solutions| Phone: +49-231-2826-924 |
Vertretung West/Dortmund  | Fax:   +49-5121-206917- |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |



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Description: OpenPGP digital signature


[PATCH v11 01/11] usb: chipidea: usb OTG fsm initialization.

2014-04-20 Thread Li Jun
This patch adds OTG fsm related initialization when do otg init,
add a seperate file for OTG fsm related utilities.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/Makefile  |1 +
 drivers/usb/chipidea/ci.h  |   17 +++
 drivers/usb/chipidea/otg.c |4 +++
 drivers/usb/chipidea/otg_fsm.c |   63 
 drivers/usb/chipidea/otg_fsm.h |   29 ++
 5 files changed, 114 insertions(+)

diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 480bd4d..2f099c7 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -6,6 +6,7 @@ ci_hdrc-y   := core.o otg.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)+= host.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_DEBUG)   += debug.o
+ci_hdrc-$(CONFIG_USB_OTG_FSM)  += otg_fsm.o
 
 # Glue/Bridge layers go here
 
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 7ae8cb6..bd3529f 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -17,6 +17,7 @@
 #include linux/irqreturn.h
 #include linux/usb.h
 #include linux/usb/gadget.h
+#include linux/usb/otg-fsm.h
 
 /**
  * DEFINE
@@ -139,6 +140,7 @@ struct hw_bank {
  * @roles: array of supported roles for this controller
  * @role: current role
  * @is_otg: if the device is otg-capable
+ * @fsm: otg finite state machine
  * @work: work for role changing
  * @wq: workqueue thread
  * @qh_pool: allocation pool for queue heads
@@ -174,6 +176,7 @@ struct ci_hdrc {
struct ci_role_driver   *roles[CI_ROLE_END];
enum ci_rolerole;
boolis_otg;
+   struct otg_fsm  fsm;
struct work_struct  work;
struct workqueue_struct *wq;
 
@@ -319,6 +322,20 @@ static inline u32 hw_test_and_write(struct ci_hdrc *ci, 
enum ci_hw_regs reg,
return (val  mask)  __ffs(mask);
 }
 
+/**
+ * ci_otg_is_fsm_mode: runtime check if otg controller
+ * is in otg fsm mode.
+ */
+static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
+{
+#ifdef CONFIG_USB_OTG_FSM
+   return ci-is_otg  ci-roles[CI_ROLE_HOST] 
+   ci-roles[CI_ROLE_GADGET];
+#else
+   return false;
+#endif
+}
+
 u32 hw_read_intr_enable(struct ci_hdrc *ci);
 
 u32 hw_read_intr_status(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index c694340..d76db51 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -22,6 +22,7 @@
 #include ci.h
 #include bits.h
 #include otg.h
+#include otg_fsm.h
 
 /**
  * hw_read_otgsc returns otgsc register bits value.
@@ -116,6 +117,9 @@ int ci_hdrc_otg_init(struct ci_hdrc *ci)
return -ENODEV;
}
 
+   if (ci_otg_is_fsm_mode(ci))
+   return ci_hdrc_otg_fsm_init(ci);
+
return 0;
 }
 
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
new file mode 100644
index 000..d9dfaa3
--- /dev/null
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -0,0 +1,63 @@
+/*
+ * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
+ *
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * Author: Jun Li
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/*
+ * This file mainly handles OTG fsm, it includes OTG fsm operations
+ * for HNP and SRP.
+ */
+
+#include linux/usb/otg.h
+#include linux/usb/gadget.h
+#include linux/usb/hcd.h
+#include linux/usb/chipidea.h
+
+#include ci.h
+#include bits.h
+#include otg.h
+#include otg_fsm.h
+
+int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
+{
+   struct usb_otg *otg;
+
+   otg = devm_kzalloc(ci-dev,
+   sizeof(struct usb_otg), GFP_KERNEL);
+   if (!otg) {
+   dev_err(ci-dev,
+   Failed to allocate usb_otg structure for ci hdrc otg!\n);
+   return -ENOMEM;
+   }
+
+   otg-phy = ci-transceiver;
+   otg-gadget = ci-gadget;
+   ci-fsm.otg = otg;
+   ci-transceiver-otg = ci-fsm.otg;
+   ci-fsm.power_up = 1;
+   ci-fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
+   ci-transceiver-state = OTG_STATE_UNDEFINED;
+
+   mutex_init(ci-fsm.lock);
+
+   /* Enable A vbus valid irq */
+   hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
+
+   if (ci-fsm.id) {
+   ci-fsm.b_ssend_srp =
+   hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
+   ci-fsm.b_sess_vld =
+   hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
+   /* Enable BSV irq */
+   hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
+   }
+
+   return 0;
+}
diff --git 

[PATCH v11 04/11] usb: chipidea: udc: driver update for OTG HNP.

2014-04-20 Thread Li Jun
Add b_hnp_enable request handling and enable gadget-is_otg

Acked-by: Peter Chen peter.c...@freescale.com
Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/udc.c |   11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index f58857d..cba7fd6 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -20,6 +20,7 @@
 #include linux/pm_runtime.h
 #include linux/usb/ch9.h
 #include linux/usb/gadget.h
+#include linux/usb/otg-fsm.h
 #include linux/usb/chipidea.h
 
 #include ci.h
@@ -1052,6 +1053,14 @@ __acquires(ci-lock)
default:
break;
}
+   break;
+   case USB_DEVICE_B_HNP_ENABLE:
+   if (ci_otg_is_fsm_mode(ci)) {
+   ci-gadget.b_hnp_enable = 1;
+   err = isr_setup_status_phase(
+   ci);
+   }
+   break;
default:
goto delegate;
}
@@ -1759,7 +1768,7 @@ static int udc_start(struct ci_hdrc *ci)
ci-gadget.ops  = usb_gadget_ops;
ci-gadget.speed= USB_SPEED_UNKNOWN;
ci-gadget.max_speed= USB_SPEED_HIGH;
-   ci-gadget.is_otg   = 0;
+   ci-gadget.is_otg   = ci-is_otg ? 1 : 0;
ci-gadget.name = ci-platdata-name;
 
INIT_LIST_HEAD(ci-gadget.ep_list);
-- 
1.7.9.5

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[PATCH v11 09/11] usb: chipidea: debug: add debug file for OTG variables

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patch adds a debug file for OTG vairables show.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/debug.c |   84 ++
 1 file changed, 84 insertions(+)

diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
index 5b890c1..7cccab6 100644
--- a/drivers/usb/chipidea/debug.c
+++ b/drivers/usb/chipidea/debug.c
@@ -7,6 +7,9 @@
 #include linux/uaccess.h
 #include linux/usb/ch9.h
 #include linux/usb/gadget.h
+#include linux/usb/phy.h
+#include linux/usb/otg.h
+#include linux/usb/otg-fsm.h
 
 #include ci.h
 #include udc.h
@@ -205,6 +208,80 @@ static const struct file_operations ci_requests_fops = {
.release= single_release,
 };
 
+int ci_otg_show(struct seq_file *s, void *unused)
+{
+   struct ci_hdrc *ci = s-private;
+   struct otg_fsm *fsm;
+
+   if (!ci || !ci_otg_is_fsm_mode(ci))
+   return 0;
+
+   fsm = ci-fsm;
+
+   /* -- State - */
+   seq_printf(s, OTG state: %s\n\n,
+   usb_otg_state_string(ci-transceiver-state));
+
+   /* -- State Machine Variables - */
+   seq_printf(s, a_bus_drop: %d\n, fsm-a_bus_drop);
+
+   seq_printf(s, a_bus_req: %d\n, fsm-a_bus_req);
+
+   seq_printf(s, a_srp_det: %d\n, fsm-a_srp_det);
+
+   seq_printf(s, a_vbus_vld: %d\n, fsm-a_vbus_vld);
+
+   seq_printf(s, b_conn: %d\n, fsm-b_conn);
+
+   seq_printf(s, adp_change: %d\n, fsm-adp_change);
+
+   seq_printf(s, power_up: %d\n, fsm-power_up);
+
+   seq_printf(s, a_bus_resume: %d\n, fsm-a_bus_resume);
+
+   seq_printf(s, a_bus_suspend: %d\n, fsm-a_bus_suspend);
+
+   seq_printf(s, a_conn: %d\n, fsm-a_conn);
+
+   seq_printf(s, b_bus_req: %d\n, fsm-b_bus_req);
+
+   seq_printf(s, b_bus_suspend: %d\n, fsm-b_bus_suspend);
+
+   seq_printf(s, b_se0_srp: %d\n, fsm-b_se0_srp);
+
+   seq_printf(s, b_ssend_srp: %d\n, fsm-b_ssend_srp);
+
+   seq_printf(s, b_sess_vld: %d\n, fsm-b_sess_vld);
+
+   seq_printf(s, b_srp_done: %d\n, fsm-b_srp_done);
+
+   seq_printf(s, drv_vbus: %d\n, fsm-drv_vbus);
+
+   seq_printf(s, loc_conn: %d\n, fsm-loc_conn);
+
+   seq_printf(s, loc_sof: %d\n, fsm-loc_sof);
+
+   seq_printf(s, adp_prb: %d\n, fsm-adp_prb);
+
+   seq_printf(s, id: %d\n, fsm-id);
+
+   seq_printf(s, protocol: %d\n, fsm-protocol);
+
+   return 0;
+}
+
+static int ci_otg_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, ci_otg_show, inode-i_private);
+}
+
+static const struct file_operations ci_otg_fops = {
+   .open   = ci_otg_open,
+   .read   = seq_read,
+   .llseek = seq_lseek,
+   .release= single_release,
+};
+
 static int ci_role_show(struct seq_file *s, void *data)
 {
struct ci_hdrc *ci = s-private;
@@ -332,6 +409,13 @@ int dbg_create_files(struct ci_hdrc *ci)
if (!dent)
goto err;
 
+   if (ci_otg_is_fsm_mode(ci)) {
+   dent = debugfs_create_file(otg, S_IRUGO, ci-debugfs, ci,
+   ci_otg_fops);
+   if (!dent)
+   goto err;
+   }
+
dent = debugfs_create_file(role, S_IRUGO | S_IWUSR, ci-debugfs, ci,
   ci_role_fops);
if (!dent)
-- 
1.7.9.5

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[PATCH v11 00/11] Add USB OTG HNP and SRP support on Chipidea usb driver

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patchset adds USB OTG HNP and SRP support on chipidea usb driver,
existing OTG port role swtich function by ID pin status kept unchanged,
based on that, if select CONFIG_USB_OTG_FSM, OTG HNP and SRP will be
supported.

Reference to:
On-The-Go and Embedded Host Supplement to the USB Revision 2.0 Specification 
July 27, 2012
Revision 2.0 version 1.1a

Change since v10:
- Use queue work to start fsm instead of directly call to fsm work in
  ci_hdrc_otg_fsm_start() for patch 07/11.

Changes since v9:
- Move xxx_fsm_start to be after request irq since xxx_fsm_work need call to
  disable_irq_nosync(ci-irq).
- Add fsm handling in xxx_fsm_work for regsiter gadget driver with vbus on, 
instead
  of rely on B_SE0_SRP timer(which is not directly linked to this case and need 
wait
  1s).
- Add comments on a_idle to a_wait_vrise due to ID change, which is out of OTG 
spec
  but make sense for user experience.
- Remove blank line introduced in v9.
 
Changes since v8:
- fsm start is the only entry point to start fsm and cover all role start/stop,
  which only call to ci_otg_fsm_work(). Move otg fsm start before request_irq
  for fsm mode, ci_role_start only for non fsm mode.
- use queue work to handle further state changes in ci_otg_fsm_work().
- Let otg fsm handle all after ci-driver is set in ci_udc_start.
- Enable BSV irq when power up with ID is 1.

Changes since v7:
- move role start special handling in ci_hdrc_otg_fsm_start()
  this can make start host/gadget clean.
- move ci_hdrc_otg_fsm_init() into ci_hdrc_otg_init()
- Remain ci_role_start() in ci_hdrc_probe because host role start
  need be done before request_irq.
- Revert the otg-host set change since fsm init will be fixed before
  role start.
- Remove fsm-protocol init in ci_hdrc_otg_fsm_init().

Li Jun (11):
  usb: chipidea: usb OTG fsm initialization.
  usb: chipidea: host: vbus control change for OTG HNP.
  usb: chipidea: host: init otg port number.
  usb: chipidea: udc: driver update for OTG HNP.
  usb: chipidea: add OTG fsm operation functions implemenation.
  usb: chipidea: OTG fsm timers initialization.
  usb: chipidea: OTG HNP and SRP fsm implementation.
  usb: chipidea: add sys inputs for OTG fsm input.
  usb: chipidea: debug: add debug file for OTG variables
  Documentation: ABI: usb: sysfs Description for chipidea USB OTG HNP
and SRP
  Documentation: usb: add chipidea.txt for how to demo usb OTG HNP and
SRP

 .../ABI/testing/sysfs-platform-chipidea-usb-otg|   56 ++
 Documentation/usb/chipidea.txt |   71 ++
 drivers/usb/chipidea/Makefile  |1 +
 drivers/usb/chipidea/bits.h|   10 +
 drivers/usb/chipidea/ci.h  |   19 +
 drivers/usb/chipidea/core.c|   24 +-
 drivers/usb/chipidea/debug.c   |   84 ++
 drivers/usb/chipidea/host.c|   21 +-
 drivers/usb/chipidea/otg.c |   15 +-
 drivers/usb/chipidea/otg_fsm.c |  865 
 drivers/usb/chipidea/otg_fsm.h |  129 +++
 drivers/usb/chipidea/udc.c |   19 +-
 12 files changed, 1300 insertions(+), 14 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-platform-chipidea-usb-otg
 create mode 100644 Documentation/usb/chipidea.txt
 create mode 100644 drivers/usb/chipidea/otg_fsm.c
 create mode 100644 drivers/usb/chipidea/otg_fsm.h

-- 
1.7.9.5

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[PATCH v11 11/11] Documentation: usb: add chipidea.txt for how to demo usb OTG HNP and SRP

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patch adds a file chipidea.txt for how to demo chipidea usb OTG HNP and SRP
functions via sysfs input files, any other possible information should be
documented for chipidea usb driver in future can be added into this file.

Signed-off-by: Li Jun b47...@freescale.com
---
 Documentation/usb/chipidea.txt |   71 
 1 file changed, 71 insertions(+)

diff --git a/Documentation/usb/chipidea.txt b/Documentation/usb/chipidea.txt
new file mode 100644
index 000..4c0e2ea
--- /dev/null
+++ b/Documentation/usb/chipidea.txt
@@ -0,0 +1,71 @@
+1. How to test OTG FSM(HNP and SRP)
+---
+To show how to demo OTG HNP and SRP functions via sys input files
+with 2 Freescale i.MX6Q sabre SD boards.
+
+1.1 How to enable OTG FSM in menuconfig
+---
+Select CONFIG_USB_OTG_FSM.
+If you want to check some internal variables for otg fsm,
+select CONFIG_USB_CHIPIDEA_DEBUG, there are 2 files which
+can show otg fsm variables and some controller registers value:
+cat /sys/kernel/debug/ci_hdrc.0/otg
+cat /sys/kernel/debug/ci_hdrc.0/registers
+
+1.2 Test operations
+---
+1) Power up 2 Freescale i.MX6Q sabre SD boards with gadget class driver loaded
+   (e.g. g_mass_storage).
+
+2) Connect 2 boards with usb cable with one end is micro A plug, the other end
+   is micro B plug.
+
+   The A-device(with micro A plug inserted) should enumrate B-device.
+
+3) Role switch
+   On B-device:
+   echo 1  /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
+
+   if HNP polling is not supported, also need:
+   On A-device:
+   echo 0  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
+
+   B-device should take host role and enumrate A-device.
+
+4) A-device switch back to host.
+   On B-device:
+   echo 0  /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
+
+   A-device should switch back to host and enumrate B-device.
+
+5) Remove B-device(unplug micro B plug) and insert again in 10 seconds,
+   A-device should enumrate B-device again.
+
+6) Remove B-device(unplug micro B plug) and insert again after 10 seconds,
+   A-device should NOT enumrate B-device.
+
+   if A-device wants to use bus:
+   On A-device:
+   echo 0  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
+   echo 1  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
+
+   if B-device wants to use bus:
+   On B-device:
+   echo 1  /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
+
+7) A-device power down the bus.
+   On A-device:
+   echo 1  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
+
+   A-device should disconnect with B-device and power down the bus.
+
+8) B-device does data pulse for SRP.
+   On B-device:
+   echo 1  /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
+
+   A-device should resume usb bus and enumrate B-device.
+
+1.3 Reference document
+--
+On-The-Go and Embedded Host Supplement to the USB Revision 2.0 Specification
+July 27, 2012 Revision 2.0 version 1.1a
-- 
1.7.9.5

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[PATCH v11 05/11] usb: chipidea: add OTG fsm operation functions implemenation.

2014-04-20 Thread Li Jun
Add OTG HNP and SRP operation functions implementation:
- charge vbus
- drive vbus
- connection signaling
- drive sof
- start data pulse
- add fsm timer
- delete fsm timer
- start host
- start gadget

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/bits.h|9 ++
 drivers/usb/chipidea/ci.h  |2 +
 drivers/usb/chipidea/otg_fsm.c |  197 
 drivers/usb/chipidea/otg_fsm.h |   25 +
 4 files changed, 233 insertions(+)

diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
index 83d06c145..44882c8 100644
--- a/drivers/usb/chipidea/bits.h
+++ b/drivers/usb/chipidea/bits.h
@@ -44,9 +44,14 @@
 #define DEVICEADDR_USBADR (0x7FUL  25)
 
 /* PORTSC */
+#define PORTSC_CCSBIT(0)
+#define PORTSC_CSCBIT(1)
+#define PORTSC_PECBIT(3)
+#define PORTSC_OCCBIT(5)
 #define PORTSC_FPRBIT(6)
 #define PORTSC_SUSP   BIT(7)
 #define PORTSC_HSPBIT(9)
+#define PORTSC_PP BIT(12)
 #define PORTSC_PTC(0x0FUL  16)
 #define PORTSC_PHCD(d)   ((d) ? BIT(22) : BIT(23))
 /* PTS and PTW for non lpm version only */
@@ -56,6 +61,9 @@
 #define PORTSC_PTWBIT(28)
 #define PORTSC_STSBIT(29)
 
+#define PORTSC_W1C_BITS\
+   (PORTSC_CSC | PORTSC_PEC | PORTSC_OCC)
+
 /* DEVLC */
 #define DEVLC_PFSCBIT(23)
 #define DEVLC_PSPD(0x03UL  25)
@@ -72,6 +80,7 @@
 
 /* OTGSC */
 #define OTGSC_IDPU   BIT(5)
+#define OTGSC_HADP   BIT(6)
 #define OTGSC_ID BIT(8)
 #define OTGSC_AVVBIT(9)
 #define OTGSC_ASVBIT(10)
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index bd3529f..9563cb5 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -141,6 +141,7 @@ struct hw_bank {
  * @role: current role
  * @is_otg: if the device is otg-capable
  * @fsm: otg finite state machine
+ * @fsm_timer: pointer to timer list of otg fsm
  * @work: work for role changing
  * @wq: workqueue thread
  * @qh_pool: allocation pool for queue heads
@@ -177,6 +178,7 @@ struct ci_hdrc {
enum ci_rolerole;
boolis_otg;
struct otg_fsm  fsm;
+   struct ci_otg_fsm_timer_list*fsm_timer;
struct work_struct  work;
struct workqueue_struct *wq;
 
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index d9dfaa3..5afeb59 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -19,12 +19,208 @@
 #include linux/usb/gadget.h
 #include linux/usb/hcd.h
 #include linux/usb/chipidea.h
+#include linux/regulator/consumer.h
 
 #include ci.h
 #include bits.h
 #include otg.h
 #include otg_fsm.h
 
+/*
+ * Add timer to active timer list
+ */
+static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
+{
+   struct ci_otg_fsm_timer *tmp_timer;
+   struct ci_otg_fsm_timer *timer = ci-fsm_timer-timer_list[t];
+   struct list_head *active_timers = ci-fsm_timer-active_timers;
+
+   if (t = NUM_CI_OTG_FSM_TIMERS)
+   return;
+
+   /*
+* Check if the timer is already in the active list,
+* if so update timer count
+*/
+   list_for_each_entry(tmp_timer, active_timers, list)
+   if (tmp_timer == timer) {
+   timer-count = timer-expires;
+   return;
+   }
+
+   timer-count = timer-expires;
+   list_add_tail(timer-list, active_timers);
+
+   /* Enable 1ms irq */
+   if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
+   hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
+}
+
+/*
+ * Remove timer from active timer list
+ */
+static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
+{
+   struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
+   struct ci_otg_fsm_timer *timer = ci-fsm_timer-timer_list[t];
+   struct list_head *active_timers = ci-fsm_timer-active_timers;
+
+   if (t = NUM_CI_OTG_FSM_TIMERS)
+   return;
+
+   list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
+   if (tmp_timer == timer)
+   list_del(timer-list);
+
+   /* Disable 1ms irq if there is no any active timer */
+   if (list_empty(active_timers))
+   hw_write_otgsc(ci, OTGSC_1MSIE, 0);
+}
+
+/* -*/
+/* Operations that will be called from OTG Finite State Machine */
+/* -*/
+static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
+{
+   struct ci_hdrc  *ci = container_of(fsm, struct ci_hdrc, fsm);
+
+   if (t  NUM_OTG_FSM_TIMERS)
+   ci_otg_add_timer(ci, t);
+   return;

[PATCH v11 06/11] usb: chipidea: OTG fsm timers initialization.

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patch adds OTG fsm timers initialization, which use controller's 1ms
interrupt as timeout counter, also adds some local timers which are not
in otg_fsm_timer list.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/bits.h|1 +
 drivers/usb/chipidea/otg_fsm.c |  189 
 drivers/usb/chipidea/otg_fsm.h |   51 +++
 3 files changed, 241 insertions(+)

diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
index 44882c8..ca57e3d 100644
--- a/drivers/usb/chipidea/bits.h
+++ b/drivers/usb/chipidea/bits.h
@@ -81,6 +81,7 @@
 /* OTGSC */
 #define OTGSC_IDPU   BIT(5)
 #define OTGSC_HADP   BIT(6)
+#define OTGSC_HABA   BIT(7)
 #define OTGSC_ID BIT(8)
 #define OTGSC_AVVBIT(9)
 #define OTGSC_ASVBIT(10)
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index 5afeb59..bb64fb4 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -26,6 +26,22 @@
 #include otg.h
 #include otg_fsm.h
 
+static struct ci_otg_fsm_timer *otg_timer_initializer
+(struct ci_hdrc *ci, void (*function)(void *, unsigned long),
+   unsigned long expires, unsigned long data)
+{
+   struct ci_otg_fsm_timer *timer;
+
+   timer = devm_kzalloc(ci-dev, sizeof(struct ci_otg_fsm_timer),
+   GFP_KERNEL);
+   if (!timer)
+   return NULL;
+   timer-function = function;
+   timer-expires = expires;
+   timer-data = data;
+   return timer;
+}
+
 /*
  * Add timer to active timer list
  */
@@ -77,6 +93,163 @@ static void ci_otg_del_timer(struct ci_hdrc *ci, enum 
ci_otg_fsm_timer_index t)
hw_write_otgsc(ci, OTGSC_1MSIE, 0);
 }
 
+/* The timeout callback function to set time out bit */
+static void set_tmout(void *ptr, unsigned long indicator)
+{
+   *(int *)indicator = 1;
+}
+
+static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   set_tmout(ci, indicator);
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+}
+
+static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   set_tmout(ci, indicator);
+   /* Disable port power */
+   hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
+   /* Clear exsiting DP irq */
+   hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
+   /* Enable data pulse irq */
+   hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+}
+
+static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   set_tmout(ci, indicator);
+   if (!hw_read_otgsc(ci, OTGSC_BSV))
+   ci-fsm.b_sess_vld = 0;
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+}
+
+static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   set_tmout(ci, indicator);
+
+   /* only vbus fall below B_sess_vld in b_idle state */
+   if (ci-transceiver-state == OTG_STATE_B_IDLE) {
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+   }
+}
+
+static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   /* Check if A detached */
+   if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
+   ci-fsm.b_sess_vld = 0;
+   ci_otg_add_timer(ci, B_SSEND_SRP);
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+   }
+}
+
+static void b_data_pulse_end(void *ptr, unsigned long indicator)
+{
+   struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
+
+   ci-fsm.b_srp_done = 1;
+   ci-fsm.b_bus_req = 0;
+   if (ci-fsm.power_up)
+   ci-fsm.power_up = 0;
+
+   hw_write_otgsc(ci, OTGSC_HABA, 0);
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+}
+
+/* Initialize timers */
+static int ci_otg_init_timers(struct ci_hdrc *ci)
+{
+   struct otg_fsm *fsm = ci-fsm;
+
+   /* FSM used timers */
+   ci-fsm_timer-timer_list[A_WAIT_VRISE] =
+   otg_timer_initializer(ci, set_tmout_and_fsm, TA_WAIT_VRISE,
+   (unsigned long)fsm-a_wait_vrise_tmout);
+   if (ci-fsm_timer-timer_list[A_WAIT_VRISE] == NULL)
+   return -ENOMEM;
+
+   ci-fsm_timer-timer_list[A_WAIT_VFALL] =
+   otg_timer_initializer(ci, a_wait_vfall_tmout_func,
+   TA_WAIT_VFALL, (unsigned long)fsm-a_wait_vfall_tmout);
+   if (ci-fsm_timer-timer_list[A_WAIT_VFALL] == NULL)
+   return -ENOMEM;
+
+   

[PATCH v11 07/11] usb: chipidea: OTG HNP and SRP fsm implementation.

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

USB OTG interrupt handling and fsm transitions according to USB OTG
and EH 2.0.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/core.c|   24 +++-
 drivers/usb/chipidea/otg.c |9 +-
 drivers/usb/chipidea/otg_fsm.c |  243 
 drivers/usb/chipidea/otg_fsm.h |   18 +++
 drivers/usb/chipidea/udc.c |8 ++
 5 files changed, 294 insertions(+), 8 deletions(-)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 6a6379a..128b92b 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -42,7 +42,6 @@
  * - Not Supported: 15  16 (ISO)
  *
  * TODO List
- * - OTG
  * - Interrupt Traffic
  * - GET_STATUS(device) - always reports 0
  * - Gadget API (majority of optional features)
@@ -74,6 +73,7 @@
 #include host.h
 #include debug.h
 #include otg.h
+#include otg_fsm.h
 
 /* Controller register map */
 static const u8 ci_regs_nolpm[] = {
@@ -411,8 +411,14 @@ static irqreturn_t ci_irq(int irq, void *data)
irqreturn_t ret = IRQ_NONE;
u32 otgsc = 0;
 
-   if (ci-is_otg)
+   if (ci-is_otg) {
otgsc = hw_read_otgsc(ci, ~0);
+   if (ci_otg_is_fsm_mode(ci)) {
+   ret = ci_otg_fsm_irq(ci);
+   if (ret == IRQ_HANDLED)
+   return ret;
+   }
+   }
 
/*
 * Handle id change interrupt, it indicates device/host function
@@ -691,10 +697,13 @@ static int ci_hdrc_probe(struct platform_device *pdev)
if (ci-role == CI_ROLE_GADGET)
ci_handle_vbus_change(ci);
 
-   ret = ci_role_start(ci, ci-role);
-   if (ret) {
-   dev_err(dev, can't start %s role\n, ci_role(ci)-name);
-   goto stop;
+   if (!ci_otg_is_fsm_mode(ci)) {
+   ret = ci_role_start(ci, ci-role);
+   if (ret) {
+   dev_err(dev, can't start %s role\n,
+   ci_role(ci)-name);
+   goto stop;
+   }
}
 
platform_set_drvdata(pdev, ci);
@@ -703,6 +712,9 @@ static int ci_hdrc_probe(struct platform_device *pdev)
if (ret)
goto stop;
 
+   if (ci_otg_is_fsm_mode(ci))
+   ci_hdrc_otg_fsm_start(ci);
+
ret = dbg_create_files(ci);
if (!ret)
return 0;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index d76db51..38e340c 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -11,8 +11,8 @@
  */
 
 /*
- * This file mainly handles otgsc register, it may include OTG operation
- * in the future.
+ * This file mainly handles otgsc register, OTG fsm operations for HNP and SRP
+ * are also included.
  */
 
 #include linux/usb/otg.h
@@ -91,6 +91,11 @@ static void ci_otg_work(struct work_struct *work)
 {
struct ci_hdrc *ci = container_of(work, struct ci_hdrc, work);
 
+   if (ci_otg_is_fsm_mode(ci)  !ci_otg_fsm_work(ci)) {
+   enable_irq(ci-irq);
+   return;
+   }
+
if (ci-id_event) {
ci-id_event = false;
ci_handle_id_switch(ci);
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index bb64fb4..67902a1 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -13,6 +13,10 @@
 /*
  * This file mainly handles OTG fsm, it includes OTG fsm operations
  * for HNP and SRP.
+ *
+ * TODO List
+ * - ADP
+ * - OTG test device
  */
 
 #include linux/usb/otg.h
@@ -93,6 +97,33 @@ static void ci_otg_del_timer(struct ci_hdrc *ci, enum 
ci_otg_fsm_timer_index t)
hw_write_otgsc(ci, OTGSC_1MSIE, 0);
 }
 
+/*
+ * Reduce timer count by 1, and find timeout conditions.
+ * Called by otg 1ms timer interrupt
+ */
+static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
+{
+   struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
+   struct list_head *active_timers = ci-fsm_timer-active_timers;
+   int expired = 0;
+
+   list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
+   tmp_timer-count--;
+   /* check if timer expires */
+   if (!tmp_timer-count) {
+   list_del(tmp_timer-list);
+   tmp_timer-function(ci, tmp_timer-data);
+   expired = 1;
+   }
+   }
+
+   /* disable 1ms irq if there is no any timer active */
+   if ((expired == 1)  list_empty(active_timers))
+   hw_write_otgsc(ci, OTGSC_1MSIE, 0);
+
+   return expired;
+}
+
 /* The timeout callback function to set time out bit */
 static void set_tmout(void *ptr, unsigned long indicator)
 {
@@ -394,6 +425,218 @@ static struct otg_fsm_ops ci_otg_ops = {
.start_gadget = ci_otg_start_gadget,
 };
 
+int ci_otg_fsm_work(struct ci_hdrc *ci)
+{
+   /*
+* 

[PATCH v11 08/11] usb: chipidea: add sys inputs for OTG fsm input.

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patch adds sys input to control and show OTG fsm inputs by application,
user can do host and preipheral role switch by change these inputs.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/otg.c |2 +
 drivers/usb/chipidea/otg_fsm.c |  173 
 drivers/usb/chipidea/otg_fsm.h |6 ++
 3 files changed, 181 insertions(+)

diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 38e340c..a048b08 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -141,4 +141,6 @@ void ci_hdrc_otg_destroy(struct ci_hdrc *ci)
/* Disable all OTG irq and clear status */
hw_write_otgsc(ci, OTGSC_INT_EN_BITS | OTGSC_INT_STATUS_BITS,
OTGSC_INT_STATUS_BITS);
+   if (ci_otg_is_fsm_mode(ci))
+   ci_hdrc_otg_fsm_remove(ci);
 }
diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index 67902a1..8d4c33d 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -46,6 +46,167 @@ static struct ci_otg_fsm_timer *otg_timer_initializer
return timer;
 }
 
+/* Add for otg: interact with user space app */
+static ssize_t
+get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
+{
+   char*next;
+   unsignedsize, t;
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   next = buf;
+   size = PAGE_SIZE;
+   t = scnprintf(next, size, %d\n, ci-fsm.a_bus_req);
+   size -= t;
+   next += t;
+
+   return PAGE_SIZE - size;
+}
+
+static ssize_t
+set_a_bus_req(struct device *dev, struct device_attribute *attr,
+   const char *buf, size_t count)
+{
+   struct ci_hdrc *ci = dev_get_drvdata(dev);
+
+   if (count  2)
+   return -1;
+
+   mutex_lock(ci-fsm.lock);
+   if (buf[0] == '0') {
+   ci-fsm.a_bus_req = 0;
+   } else if (buf[0] == '1') {
+   /* If a_bus_drop is TRUE, a_bus_req can't be set */
+   if (ci-fsm.a_bus_drop) {
+   mutex_unlock(ci-fsm.lock);
+   return count;
+   }
+   ci-fsm.a_bus_req = 1;
+   }
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+   mutex_unlock(ci-fsm.lock);
+
+   return count;
+}
+static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
+
+static ssize_t
+get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
+{
+   char*next;
+   unsignedsize, t;
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   next = buf;
+   size = PAGE_SIZE;
+   t = scnprintf(next, size, %d\n, ci-fsm.a_bus_drop);
+   size -= t;
+   next += t;
+
+   return PAGE_SIZE - size;
+}
+
+static ssize_t
+set_a_bus_drop(struct device *dev, struct device_attribute *attr,
+   const char *buf, size_t count)
+{
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   if (count  2)
+   return -1;
+
+   mutex_lock(ci-fsm.lock);
+   if (buf[0] == '0') {
+   ci-fsm.a_bus_drop = 0;
+   } else if (buf[0] == '1') {
+   ci-fsm.a_bus_drop = 1;
+   ci-fsm.a_bus_req = 0;
+   }
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+   mutex_unlock(ci-fsm.lock);
+
+   return count;
+}
+static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop,
+   set_a_bus_drop);
+
+static ssize_t
+get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
+{
+   char*next;
+   unsignedsize, t;
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   next = buf;
+   size = PAGE_SIZE;
+   t = scnprintf(next, size, %d\n, ci-fsm.b_bus_req);
+   size -= t;
+   next += t;
+
+   return PAGE_SIZE - size;
+}
+
+static ssize_t
+set_b_bus_req(struct device *dev, struct device_attribute *attr,
+   const char *buf, size_t count)
+{
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   if (count  2)
+   return -1;
+
+   mutex_lock(ci-fsm.lock);
+   if (buf[0] == '0')
+   ci-fsm.b_bus_req = 0;
+   else if (buf[0] == '1')
+   ci-fsm.b_bus_req = 1;
+
+   disable_irq_nosync(ci-irq);
+   queue_work(ci-wq, ci-work);
+   mutex_unlock(ci-fsm.lock);
+
+   return count;
+}
+static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
+
+static ssize_t
+set_a_clr_err(struct device *dev, struct device_attribute *attr,
+   const char *buf, size_t count)
+{
+   struct ci_hdrc  *ci = dev_get_drvdata(dev);
+
+   if (count  2)
+   return 

[PATCH v11 10/11] Documentation: ABI: usb: sysfs Description for chipidea USB OTG HNP and SRP

2014-04-20 Thread Li Jun
From: Li Jun b47...@freescale.com

This patch adds sysfs interface description for chipidea USB OTG HNP and SRP.

Signed-off-by: Li Jun b47...@freescale.com
---
 .../ABI/testing/sysfs-platform-chipidea-usb-otg|   56 
 1 file changed, 56 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-platform-chipidea-usb-otg 
b/Documentation/ABI/testing/sysfs-platform-chipidea-usb-otg
new file mode 100644
index 000..151c595
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-platform-chipidea-usb-otg
@@ -0,0 +1,56 @@
+What:  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_req
+Date:  Feb 2014
+Contact:   Li Jun b47...@freescale.com
+Description:
+   Can be set and read.
+   Set a_bus_req(A-device bus request) input to be 1 if
+   the application running on the A-device wants to use the bus,
+   and to be 0 when the application no longer wants to use
+   the bus(or wants to work as peripheral). a_bus_req can also
+   be set to 1 by kernel in response to remote wakeup signaling
+   from the B-device, the A-device should decide to resume the bus.
+
+   Valid values are 1 and 0.
+
+   Reading: returns 1 if the application running on the A-device
+   is using the bus as host role, otherwise 0.
+
+What:  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_bus_drop
+Date:  Feb 2014
+Contact:   Li Jun b47...@freescale.com
+Description:
+   Can be set and read
+   The a_bus_drop(A-device bus drop) input is 1 when the
+   application running on the A-device wants to power down
+   the bus, and is 0 otherwise, When a_bus_drop is 1, then
+   the a_bus_req shall be 0.
+
+   Valid values are 1 and 0.
+
+   Reading: returns 1 if the bus is off(vbus is turned off) by
+A-device, otherwise 0.
+
+What:  /sys/bus/platform/devices/ci_hdrc.0/inputs/b_bus_req
+Date:  Feb 2014
+Contact:   Li Jun b47...@freescale.com
+Description:
+   Can be set and read.
+   The b_bus_req(B-device bus request) input is 1 during the time
+   that the application running on the B-device wants to use the
+   bus as host, and is 0 when the application no longer wants to
+   work as host and decides to switch back to be peripheral.
+
+   Valid values are 1 and 0.
+
+   Reading: returns if the application running on the B device
+   is using the bus as host role, otherwise 0.
+
+What:  /sys/bus/platform/devices/ci_hdrc.0/inputs/a_clr_err
+Date:  Feb 2014
+Contact:   Li Jun b47...@freescale.com
+Description:
+   Only can be set.
+   The a_clr_err(A-device Vbus error clear) input is used to clear
+   vbus error, then A-device will power down the bus.
+
+   Valid value is 1
-- 
1.7.9.5

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[PATCH v11 03/11] usb: chipidea: host: init otg port number.

2014-04-20 Thread Li Jun
Init otg_port number of otg capable host to be 1 at host start.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/host.c |   11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index ffb4168..a93d950 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -82,10 +82,17 @@ static int host_start(struct ci_hdrc *ci)
}
 
ret = usb_add_hcd(hcd, 0, 0);
-   if (ret)
+   if (ret) {
goto disable_reg;
-   else
+   } else {
+   struct usb_otg *otg = ci-transceiver-otg;
+
ci-hcd = hcd;
+   if (otg) {
+   otg-host = hcd-self;
+   hcd-self.otg_port = 1;
+   }
+   }
 
if (ci-platdata-flags  CI_HDRC_DISABLE_STREAMING)
hw_write(ci, OP_USBMODE, USBMODE_CI_SDIS, USBMODE_CI_SDIS);
-- 
1.7.9.5

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[PATCH v11 02/11] usb: chipidea: host: vbus control change for OTG HNP.

2014-04-20 Thread Li Jun
Leave vbus on/off hanlded by OTG fsm if in OTG mode.

Signed-off-by: Li Jun b47...@freescale.com
---
 drivers/usb/chipidea/host.c |   10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index a8ac6c1..ffb4168 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -67,7 +67,11 @@ static int host_start(struct ci_hdrc *ci)
ehci-has_tdi_phy_lpm = ci-hw_bank.lpm;
ehci-imx28_write_fix = ci-imx28_write_fix;
 
-   if (ci-platdata-reg_vbus) {
+   /*
+* vbus is always on if host is not in OTG FSM mode,
+* otherwise should be controlled by OTG FSM
+*/
+   if (ci-platdata-reg_vbus  !ci_otg_is_fsm_mode(ci)) {
ret = regulator_enable(ci-platdata-reg_vbus);
if (ret) {
dev_err(ci-dev,
@@ -89,7 +93,7 @@ static int host_start(struct ci_hdrc *ci)
return ret;
 
 disable_reg:
-   if (ci-platdata-reg_vbus)
+   if (ci-platdata-reg_vbus  !ci_otg_is_fsm_mode(ci))
regulator_disable(ci-platdata-reg_vbus);
 
 put_hcd:
@@ -105,7 +109,7 @@ static void host_stop(struct ci_hdrc *ci)
if (hcd) {
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
-   if (ci-platdata-reg_vbus)
+   if (ci-platdata-reg_vbus  !ci_otg_is_fsm_mode(ci))
regulator_disable(ci-platdata-reg_vbus);
}
 }
-- 
1.7.9.5

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Re: [PATCH RFC 3/4] xhci: Tune PHY for the DWC3-Exynos host controller

2014-04-20 Thread Vivek Gautam
Hi,


On Wed, Apr 16, 2014 at 7:42 PM, Heikki Krogerus
heikki.kroge...@linux.intel.com wrote:
 Hi,

 On Tue, Apr 15, 2014 at 06:24:11PM +0530, Vivek Gautam wrote:
 I had seen your patches in the mailing list, but i don't see any
 updated version of these patches.
 Are you planning to work on this above mentioned patch-series any time soon ?

 I'm sorry, I forgot this completely. I have not prepared new version
 of those patches as the drivers I need them for are not ready yet, but
 I guess I can also use this case as justification for them.

 Or, should i try to find a different approach for handling the phy
 from the host controller (child of DWC3 in this case, which has the
 phys).

 Well, there is now an issue with the lookup method I'm suggesting in
 this case. Since the device ID is now generated automatically for
 xhci-hcd in dwc3, we don't know the xhci-hcd device name before
 platform_device_add(), and that is too late.

True, the xhci-hcd are getting AUTO ID, so it might not be possible to
get their device
names in dwc3.

 I don't see why the
 device could not be named when platform_device_alloc() is called, so I
 think I'll suggest something like the attached patch to fix this
 issue

Ok, i had a look at the patch, and it looks promising.


 In any case, I'll send an updated version of the phy patches soon.

Thanks for your efforts.
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