Re: Question: Does usbip support USB 3.0?

[Greg KH]

A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing in e-mail?

A: No.
Q: Should I include quotations after my reply?

http://daringfireball.net/2007/07/on_top

On Thu, Feb 23, 2017 at 07:43:23AM +, Du, Yuyang wrote:
> Oh, then let me try to simplify it, what if it's an only USB 3.0 device?

I have a USB keyboard around here somewhere that is a "USB 3.0" device,
that is running at the USB "low speed" rate. :)

Again, USB 3.0 supports all speed devices, see the spec for all of the
details.

And again, what specifically are you referring to, and again, have you
tried the code out yourself?  What is preventing you from testing this
in your environment to determine if it works properly for you or not?

thanks,

greg k-h
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RE: Question: Does usbip support USB 3.0?

[Du, Yuyang]

Oh, then let me try to simplify it, what if it's an only USB 3.0 device?

Thanks,
Yuyang

-Original Message-
From: Greg KH [mailto:gre...@linuxfoundation.org] 
Sent: Thursday, February 23, 2017 3:20 PM
To: Du, Yuyang 
Cc: linux-usb@vger.kernel.org; valentina.mane...@gmail.com; sh...@kernel.org
Subject: Re: Question: Does usbip support USB 3.0?

On Thu, Feb 23, 2017 at 06:59:25AM +, Du, Yuyang wrote:
> Hi there,
> 
> I have this simple question. Thanks.

What exactly do you mean by "USB 3.0"?  Remember, USB 3.0 supports low-speed 
devices like keyboards :)

So this isn't really a "simple" question.  Also, have you tried it yourself to 
see what it can do?

thanks,

greg k-h
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Re: [PATCH 1/2] [TRIVIAL] usb: gadget: Remove duplicated function declaration in pxa27x_udc

[Robert Jarzmik]

Petr Cvek  writes:

> Remove duplicated function declaration for udc_enable() and udc_disable().

The patch title looks a bit tool long to me, and that also applied to your
second one.

Moreover the correct prefix for this driver (for the title) is :
 usb: gadget: pxa27x: MySuperSyntheticTitle

Cheers.

-- 
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Re: [PATCH 2/2] usb: gadget: Add test if argument pointer has a valid value in pxa27x_udc

[Robert Jarzmik]

Petr Cvek  writes:

> Move call usb_put_phy(udc->transceiver) inside a valid pointer test.
>
> Reported-by: robert.jarz...@free.fr
I'd rather have my normal signature here :
Reported-by: Robert Jarzmik 

> Signed-off-by: Petr Cvek 
Acked-by: Robert Jarzmik 

Cheers.

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Re: Question: Does usbip support USB 3.0?

[Greg KH]

On Thu, Feb 23, 2017 at 06:59:25AM +, Du, Yuyang wrote:
> Hi there, 
> 
> I have this simple question. Thanks.

What exactly do you mean by "USB 3.0"?  Remember, USB 3.0 supports
low-speed devices like keyboards :)

So this isn't really a "simple" question.  Also, have you tried it
yourself to see what it can do?

thanks,

greg k-h
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Question: Does usbip support USB 3.0?

[Du, Yuyang]

Hi there, 

I have this simple question. Thanks.

Yuyang
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Re: [PATCH 15/15] usb: dwc2: Replace msleep with mdelay in dwc2_clear_force_mode()

[Vardan Mikayelyan]

On 2/22/2017 10:59 PM, John Youn wrote:
> On 2/21/2017 5:16 AM, David Laight wrote:
>> From: Vardan Mikayelyan
>>> Sent: 20 February 2017 15:15
>>> dwc2_clear_force_mode() can be called in hibernation exit flow which
>>> can occur in interrupt context.
>>>
>>> Signed-off-by: Vardan Mikayelyan 
>>> ---
>>>  drivers/usb/dwc2/core.c | 2 +-
>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
>>> index 2c90d8e..c7c76e8 100644
>>> --- a/drivers/usb/dwc2/core.c
>>> +++ b/drivers/usb/dwc2/core.c
>>> @@ -634,7 +634,7 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
>>> dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
>>>
>>> if (dwc2_iddig_filter_enabled(hsotg))
>>> -   msleep(100);
>>> +   mdelay(100);
>>
>> Spinning for 100ms isn't good at all.
>>
>
> Agreed.
>
> Vardan, I thought you had a change that avoided this issue entirely?
>
> Thanks,
> John
>
John, David thank you for review.

Yeah actually that was fixed by "usb: dwc2: Force mode optimizations" 
which is now in the "next". So we can exclude last patch from this series.

Thanks,
Vardan.
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[PATCH 1/2] [TRIVIAL] usb: gadget: Remove duplicated function declaration in pxa27x_udc

[Petr Cvek]

Remove duplicated function declaration for udc_enable() and udc_disable().

Signed-off-by: Petr Cvek 
---
 drivers/usb/gadget/udc/pxa27x_udc.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c 
b/drivers/usb/gadget/udc/pxa27x_udc.c
index 7fa60f5b7ae4..6fa675bf2c6f 100644
--- a/drivers/usb/gadget/udc/pxa27x_udc.c
+++ b/drivers/usb/gadget/udc/pxa27x_udc.c
@@ -1608,9 +1608,6 @@ static int pxa_udc_pullup(struct usb_gadget *_gadget, int 
is_active)
return 0;
 }
 
-static void udc_enable(struct pxa_udc *udc);
-static void udc_disable(struct pxa_udc *udc);
-
 /**
  * pxa_udc_vbus_session - Called by external transceiver to enable/disable udc
  * @_gadget: usb gadget
-- 
2.11.0

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Re: [RFC] usb: gadget: scheduling while atomic in pxa27x_udc, IS_ERR_OR_NULL test, duplicated definition

[Petr Cvek]

Dne 22.2.2017 v 21:46 Robert Jarzmik napsal(a):
> Petr Cvek  writes:
> 
> Hi Petr,
> 
>> I found a few problems with the PXA27x UDC.
>>
>>  usb_function_activate() in drivers/usb/gadget/composite.c
>>
>> does spin_lock_irqsave() and then calls 
>>
>>  gadget->ops->pullup() in drivers/usb/gadget/udc/core.c
>>
>> which is set to pxa_udc_pullup(), which should be called not in interrupt
>>
>>  /**
>>   * pxa_udc_pullup - Offer manual D+ pullup control
>>   * @_gadget: usb gadget using the control
>>   * @is_active: 0 if disconnect, else connect D+ pullup resistor
>>   * Context: !in_interrupt()
>>   *
>>   * Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
>>   */
>>
>> This finally causes fail at
>>
>>  udc_enable() in drivers/usb/gadget/udc/pxa27x_udc.c
>>  
>> at code
>>
>>  /*
>>   * Caller must be able to sleep in order to cope with startup transients
>>   */
>>  msleep(100);
>>
>> with a following error (with CONFIG_DEBUG_PREEMPT on):
>>
>>  BUG: scheduling while atomic: v4l_id/360/0x0002
>>
>> With the msleep changed to mdelay, the code (specified as !in_interrupt()) 
>> seems to work fine
>> (after torture reloads). Can the caller (udc core) be changed to be able to
>> sleep?
> 
> This question is for Felipe. From the several years back when I wrote this 
> code
> I think it was granted that the pullup() callback was not in interrupt 
> context,
> but Felipe knows better.
> 

Well now it is definitely inside spin_lock_irqsave()

http://lxr.free-electrons.com/source/drivers/usb/gadget/composite.c#L374


>>  if (of_have_populated_dt()) {
>>  udc->transceiver =
>>  devm_usb_get_phy_by_phandle(udc->dev, "phys", 0);
>>
>>  if (IS_ERR(udc->transceiver))
>>  return PTR_ERR(udc->transceiver);
>>  } else {
>>  udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
>>  }
>>
>> One branch returns on error and second one is fine, udc->transceiver then 
>> can hold an error,
>> but this is fine for the rest of driver (tested). Question is does it have 
>> to return from a first
>> branch (e.g. my device does not have phy)?
> In the devicetree context (first branch), even if you don't have a phy, you'll
> instanciate a "nop" phy, ie. "usb-nop-xceiv". From a hardware perspective, you
> have a phy, it's just that you don't have to do anything from a software
> perspective to activate your phy.
> 
> In the platform_data context (second branch), an error is the common path, as
> there is no phy in many old platforms, and pxa27x are old ... hence no check 
> of
> error.
> 

OK so no problem there.

>> And finally it seems definitions from drivers/usb/gadget/udc/pxa27x_udc.c 
>> are duplicated:
>>
>>  static void udc_enable(struct pxa_udc *udc);
>>  static void udc_disable(struct pxa_udc *udc);
>>
>> I will send patch series as soon as we agree on solutions.
> Excellent.

OK mdelay/msleep problem will take longer, so I will send that two patches now.

Petr

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[PATCH 0/2] usb: gadget: Fixes for pxa27x_udc

[Petr Cvek]

Two simple fixes for pxa27x gadget UDC. First one remove function declaration
duplication, second one add test for a valid pointer before function call as
it can be called with an error value in the pointer.

Petr Cvek (2):
  [TRIVIAL] usb: gadget: Remove duplicated function declaration in
pxa27x_udc
  usb: gadget: Add test if argument pointer has a valid value in
pxa27x_udc

 drivers/usb/gadget/udc/pxa27x_udc.c | 8 +++-
 1 file changed, 3 insertions(+), 5 deletions(-)

-- 
2.11.0

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[PATCH 2/2] usb: gadget: Add test if argument pointer has a valid value in pxa27x_udc

[Petr Cvek]

Move call usb_put_phy(udc->transceiver) inside a valid pointer test.

Reported-by: robert.jarz...@free.fr
Signed-off-by: Petr Cvek 
---
 drivers/usb/gadget/udc/pxa27x_udc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/udc/pxa27x_udc.c 
b/drivers/usb/gadget/udc/pxa27x_udc.c
index 6fa675bf2c6f..9d2e1a8aa69d 100644
--- a/drivers/usb/gadget/udc/pxa27x_udc.c
+++ b/drivers/usb/gadget/udc/pxa27x_udc.c
@@ -2531,9 +2531,10 @@ static int pxa_udc_remove(struct platform_device *_dev)
usb_del_gadget_udc(>gadget);
pxa_cleanup_debugfs(udc);
 
-   if (!IS_ERR_OR_NULL(udc->transceiver))
+   if (!IS_ERR_OR_NULL(udc->transceiver)) {
usb_unregister_notifier(udc->transceiver, _udc_phy);
-   usb_put_phy(udc->transceiver);
+   usb_put_phy(udc->transceiver);
+   }
 
udc->transceiver = NULL;
the_controller = NULL;
-- 
2.11.0

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Re: [RFC] usb: gadget: scheduling while atomic in pxa27x_udc, IS_ERR_OR_NULL test, duplicated definition

[Robert Jarzmik]

Petr Cvek  writes:

Hi Petr,

> I found a few problems with the PXA27x UDC.
>
>   usb_function_activate() in drivers/usb/gadget/composite.c
>
> does spin_lock_irqsave() and then calls 
>
>   gadget->ops->pullup() in drivers/usb/gadget/udc/core.c
>
> which is set to pxa_udc_pullup(), which should be called not in interrupt
>
>   /**
>* pxa_udc_pullup - Offer manual D+ pullup control
>* @_gadget: usb gadget using the control
>* @is_active: 0 if disconnect, else connect D+ pullup resistor
>* Context: !in_interrupt()
>*
>* Returns 0 if OK, -EOPNOTSUPP if udc driver doesn't handle D+ pullup
>*/
>
> This finally causes fail at
>
>   udc_enable() in drivers/usb/gadget/udc/pxa27x_udc.c
>   
> at code
>
>   /*
>* Caller must be able to sleep in order to cope with startup transients
>*/
>   msleep(100);
>
> with a following error (with CONFIG_DEBUG_PREEMPT on):
>
>   BUG: scheduling while atomic: v4l_id/360/0x0002
>
> With the msleep changed to mdelay, the code (specified as !in_interrupt()) 
> seems to work fine
> (after torture reloads). Can the caller (udc core) be changed to be able to
> sleep?

This question is for Felipe. From the several years back when I wrote this code
I think it was granted that the pullup() callback was not in interrupt context,
but Felipe knows better.

> Second bug was discovered by Robert Jarzmik during discussion in
Please go ahead and submit a patch.

> And as we talking about it, is this return correct?
I think so.

>   if (of_have_populated_dt()) {
>   udc->transceiver =
>   devm_usb_get_phy_by_phandle(udc->dev, "phys", 0);
>
>   if (IS_ERR(udc->transceiver))
>   return PTR_ERR(udc->transceiver);
>   } else {
>   udc->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
>   }
>
> One branch returns on error and second one is fine, udc->transceiver then can 
> hold an error,
> but this is fine for the rest of driver (tested). Question is does it have to 
> return from a first
> branch (e.g. my device does not have phy)?
In the devicetree context (first branch), even if you don't have a phy, you'll
instanciate a "nop" phy, ie. "usb-nop-xceiv". From a hardware perspective, you
have a phy, it's just that you don't have to do anything from a software
perspective to activate your phy.

In the platform_data context (second branch), an error is the common path, as
there is no phy in many old platforms, and pxa27x are old ... hence no check of
error.

> And finally it seems definitions from drivers/usb/gadget/udc/pxa27x_udc.c are 
> duplicated:
>
>   static void udc_enable(struct pxa_udc *udc);
>   static void udc_disable(struct pxa_udc *udc);
>
> I will send patch series as soon as we agree on solutions.
Excellent.

Cheers.

-- 
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Re: [RESEND PATCH v2 0/2] add multiple clock handling for dwc2 driver

[John Youn]

On 2/21/2017 5:30 PM, Frank Wang wrote:
> Hi John and Greg,
>
> Friendly ping... :-)
>

Hi Frank,

We'll take a look at this and get back to you soon.

Regards,
John


> On 2017/2/10 11:06, Frank Wang wrote:
>> Resend this series to involve device tree maintainer and add 'Reviewed-by' 
>> tag for driver.
>>
>> The Current default dwc2 just handle one clock named otg, however, it may 
>> have
>> two or more clock need to manage for some new SoCs(such as RK3328), so this
>> adds change clk to clk's array of dwc2_hsotg to handle more clocks operation.
>>
>> Changes in v2:
>>   - amend dwc2 clocks property in DT.
>>   - change DWC2_MAX_CLKS to 5 and amend commit message.
>>
>> Frank Wang (2):
>>Documentation: dt: dwc2: amend clocks property
>>usb: dwc2: add multiple clocks handling
>>
>>   Documentation/devicetree/bindings/usb/dwc2.txt | 13 +++--
>>   drivers/usb/dwc2/core.h|  5 +++-
>>   drivers/usb/dwc2/platform.c| 39 
>> +-
>>   3 files changed, 40 insertions(+), 17 deletions(-)
>>
>
> BR.
> Frank
>
>

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Re: [PATCH 15/15] usb: dwc2: Replace msleep with mdelay in dwc2_clear_force_mode()

[John Youn]

On 2/21/2017 5:16 AM, David Laight wrote:
> From: Vardan Mikayelyan
>> Sent: 20 February 2017 15:15
>> dwc2_clear_force_mode() can be called in hibernation exit flow which
>> can occur in interrupt context.
>>
>> Signed-off-by: Vardan Mikayelyan 
>> ---
>>  drivers/usb/dwc2/core.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
>> index 2c90d8e..c7c76e8 100644
>> --- a/drivers/usb/dwc2/core.c
>> +++ b/drivers/usb/dwc2/core.c
>> @@ -634,7 +634,7 @@ void dwc2_clear_force_mode(struct dwc2_hsotg *hsotg)
>>  dwc2_writel(gusbcfg, hsotg->regs + GUSBCFG);
>>
>>  if (dwc2_iddig_filter_enabled(hsotg))
>> -msleep(100);
>> +mdelay(100);
>
> Spinning for 100ms isn't good at all.
>

Agreed.

Vardan, I thought you had a change that avoided this issue entirely?

Thanks,
John
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[PATCH] usb: phy: isp1301: Add OF device ID table

[Javier Martinez Canillas]

The driver doesn't have a struct of_device_id table but supported devices
are registered via Device Trees. This is working on the assumption that a
I2C device registered via OF will always match a legacy I2C device ID and
that the MODALIAS reported will always be of the form i2c:.

But this could change in the future so the correct approach is to have an
OF device ID table if the devices are registered via OF.

Signed-off-by: Javier Martinez Canillas 
---

 drivers/usb/phy/phy-isp1301.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/usb/phy/phy-isp1301.c b/drivers/usb/phy/phy-isp1301.c
index db68156568e6..b3b33cf7ddf6 100644
--- a/drivers/usb/phy/phy-isp1301.c
+++ b/drivers/usb/phy/phy-isp1301.c
@@ -33,6 +33,12 @@ static const struct i2c_device_id isp1301_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, isp1301_id);
 
+static const struct of_device_id isp1301_of_match[] = {
+   {.compatible = "nxp,isp1301" },
+   { },
+};
+MODULE_DEVICE_TABLE(of, isp1301_of_match);
+
 static struct i2c_client *isp1301_i2c_client;
 
 static int __isp1301_write(struct isp1301 *isp, u8 reg, u8 value, u8 clear)
@@ -130,6 +136,7 @@ static int isp1301_remove(struct i2c_client *client)
 static struct i2c_driver isp1301_driver = {
.driver = {
.name = DRV_NAME,
+   .of_match_table = of_match_ptr(isp1301_of_match),
},
.probe = isp1301_probe,
.remove = isp1301_remove,
-- 
2.9.3

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[PATCH v3 1/2] usbip: Fix-format-overflow

[Jonathan Dieter]

The usbip userspace tools call sprintf()/snprintf() and don't check for
the return value which can lead the paths to overflow, truncating the
final file in the path.

More urgently, GCC 7 now warns that these aren't checked with
-Wformat-overflow, and with -Werror enabled in configure.ac, that makes
these tools unbuildable.

This patch fixes these problems by replacing sprintf() with snprintf() in
one place and adding checks for the return value of snprintf().

Reviewed-by: Peter Senna Tschudin 
Signed-off-by: Jonathan Dieter 
---
Changes since v2
 * Converted size back to int because snprintf may return < 0 if there's an
   error
 * Expanded error messages to indicate failure may be because size < 0

 tools/usb/usbip/libsrc/usbip_common.c  |  8 +++-
 tools/usb/usbip/libsrc/usbip_host_common.c | 28 +++-
 2 files changed, 30 insertions(+), 6 deletions(-)

diff --git a/tools/usb/usbip/libsrc/usbip_common.c 
b/tools/usb/usbip/libsrc/usbip_common.c
index ac73710..66017d7 100644
--- a/tools/usb/usbip/libsrc/usbip_common.c
+++ b/tools/usb/usbip/libsrc/usbip_common.c
@@ -215,9 +215,15 @@ int read_usb_interface(struct usbip_usb_device *udev, int 
i,
   struct usbip_usb_interface *uinf)
 {
char busid[SYSFS_BUS_ID_SIZE];
+   int size;
struct udev_device *sif;
 
-   sprintf(busid, "%s:%d.%d", udev->busid, udev->bConfigurationValue, i);
+   size = snprintf(busid, sizeof(busid), "%s:%d.%d",
+   udev->busid, udev->bConfigurationValue, i);
+   if (size < 0 || (unsigned int)size >= sizeof(busid)) {
+   err("busid length %i >= %lu or < 0", size, sizeof(busid));
+   return -1;
+   }
 
sif = udev_device_new_from_subsystem_sysname(udev_context, "usb", 
busid);
if (!sif) {
diff --git a/tools/usb/usbip/libsrc/usbip_host_common.c 
b/tools/usb/usbip/libsrc/usbip_host_common.c
index 9d41522..6fb91d9 100644
--- a/tools/usb/usbip/libsrc/usbip_host_common.c
+++ b/tools/usb/usbip/libsrc/usbip_host_common.c
@@ -40,13 +40,20 @@ struct udev *udev_context;
 static int32_t read_attr_usbip_status(struct usbip_usb_device *udev)
 {
char status_attr_path[SYSFS_PATH_MAX];
+   int size;
int fd;
int length;
char status;
int value = 0;
 
-   snprintf(status_attr_path, SYSFS_PATH_MAX, "%s/usbip_status",
-udev->path);
+   size = snprintf(status_attr_path, sizeof(status_attr_path),
+   "%s/usbip_status", udev->path);
+   if (size < 0 || (unsigned int)size >= sizeof(status_attr_path)) {
+   err("usbip_status path length %i >= %lu or < 0", size,
+   sizeof(status_attr_path));
+   return -1;
+   }
+
 
fd = open(status_attr_path, O_RDONLY);
if (fd < 0) {
@@ -218,6 +225,7 @@ int usbip_export_device(struct usbip_exported_device *edev, 
int sockfd)
 {
char attr_name[] = "usbip_sockfd";
char sockfd_attr_path[SYSFS_PATH_MAX];
+   int size;
char sockfd_buff[30];
int ret;
 
@@ -237,10 +245,20 @@ int usbip_export_device(struct usbip_exported_device 
*edev, int sockfd)
}
 
/* only the first interface is true */
-   snprintf(sockfd_attr_path, sizeof(sockfd_attr_path), "%s/%s",
-edev->udev.path, attr_name);
+   size = snprintf(sockfd_attr_path, sizeof(sockfd_attr_path), "%s/%s",
+   edev->udev.path, attr_name);
+   if (size < 0 || (unsigned int)size >= sizeof(sockfd_attr_path)) {
+   err("exported device path length %i >= %lu or < 0", size,
+   sizeof(sockfd_attr_path));
+   return -1;
+   }
 
-   snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd);
+   size = snprintf(sockfd_buff, sizeof(sockfd_buff), "%d\n", sockfd);
+   if (size < 0 || (unsigned int)size >= sizeof(sockfd_buff)) {
+   err("socket length %i >= %lu or < 0", size,
+   sizeof(sockfd_buff));
+   return -1;
+   }
 
ret = write_sysfs_attribute(sockfd_attr_path, sockfd_buff,
strlen(sockfd_buff));
-- 
2.9.3

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[PATCH v3 2/2] usbip: Fix implicit fallthrough warning

[Jonathan Dieter]

GCC 7 now warns when switch statements fall through implicitly, and with
-Werror enabled in configure.ac, that makes these tools unbuildable.

We fix this by notifying the compiler that this particular case statement
is meant to fall through.

Reviewed-by: Peter Senna Tschudin 
Signed-off-by: Jonathan Dieter 
---
 tools/usb/usbip/src/usbip.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/usb/usbip/src/usbip.c b/tools/usb/usbip/src/usbip.c
index d7599d9..73d8eee 100644
--- a/tools/usb/usbip/src/usbip.c
+++ b/tools/usb/usbip/src/usbip.c
@@ -176,6 +176,8 @@ int main(int argc, char *argv[])
break;
case '?':
printf("usbip: invalid option\n");
+   /* Terminate after printing error */
+   /* FALLTHRU */
default:
usbip_usage();
goto out;
-- 
2.9.3

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Re: [PATCH v2 1/2] usbip: Fix-format-overflow

[Jonathan Dieter]

On Wed, 2017-02-22 at 06:49 +0100, Krzysztof Opasiak wrote:
> Hi,
> 
> W dniu 2017-02-21 o 18:57, Jonathan Dieter pisze:

> >     char busid[SYSFS_BUS_ID_SIZE];
> > +   unsigned int size;
> 
> I'm not really convinced to use unsigned here. snprintf() is declared
> to 
> return signed integer so we should assume that some of its 
> implementation may return negative error code. Any rationale to this 
> instead of just doing a cast for comparsion but signed value to print
> error?

No, you're absolutely right.  I've fixed this and am sending the next
revision now.

Jonathan
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[RFC PATCH] xhci: Use Cached ring during endpoint ring allocation

[Anurag Kumar Vulisha]

Currently during endpoint initialization, a new endpoint ring is alloacte
using xhci_ring_alloc(), if this function fails to allocate ring a cached
ring(if available) is assigned to endpoint ring.
This patch modifies the code that during endpoint initialization, if cached
ring is available it is assigned to the endpoint ring. If cached rings are
not available then xhci_ring_alloc() is called to allocate a new ring.
Doing so will avoid unncessary memory allocations if cached ring is already
available for use. This also fixes endpoint "Ring expansion failed" error
which occurs due to insufficient memory during ring expansion.

Signed-off-by: Anurag Kumar Vulisha 
---
 drivers/usb/host/xhci-mem.c | 13 -
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 8414ed2..587b6c6 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -1514,19 +1514,22 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
mult = 0;
 
/* Set up the endpoint ring */
-   virt_dev->eps[ep_index].new_ring =
-   xhci_ring_alloc(xhci, 2, 1, ring_type, max_packet, mem_flags);
-   if (!virt_dev->eps[ep_index].new_ring) {
+   if (virt_dev->num_rings_cached > 0) {
/* Attempt to use the ring cache */
-   if (virt_dev->num_rings_cached == 0)
-   return -ENOMEM;
virt_dev->num_rings_cached--;
virt_dev->eps[ep_index].new_ring =
virt_dev->ring_cache[virt_dev->num_rings_cached];
virt_dev->ring_cache[virt_dev->num_rings_cached] = NULL;
xhci_reinit_cached_ring(xhci, virt_dev->eps[ep_index].new_ring,
1, ring_type);
+   } else {
+   virt_dev->eps[ep_index].new_ring =
+   xhci_ring_alloc(xhci, 2, 1, ring_type, max_packet,
+   mem_flags);
+   if (!virt_dev->eps[ep_index].new_ring)
+   return -ENOMEM;
}
+
virt_dev->eps[ep_index].skip = false;
ep_ring = virt_dev->eps[ep_index].new_ring;
 
-- 
2.1.1

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Re: [RESEND PATCH v2 0/2] add multiple clock handling for dwc2 driver

[Greg KH]

On Wed, Feb 22, 2017 at 09:29:43AM +0800, Frank Wang wrote:
> Hi John and Greg,
> 
> Friendly ping... :-)

I'm not the one to take dwc2 patches, sorry, nothing I can do here,
especially in the middle of the merge window...

greg k-h
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[GIT PULL] USB/PHY driver patches for 4.11-rc1

[Greg KH]

The following changes since commit d5adbfcd5f7bcc6fa58a41c5c5ada0e5c826ce2c:

  Linux 4.10-rc7 (2017-02-05 15:10:58 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git/ 
tags/usb-4.11-rc1

for you to fetch changes up to 0df8a3dbacb585bb9c8b2e55de43c6aac9d86488:

  Merge tag 'usb-serial-4.11-rc1-2' of 
git://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial into usb-next 
(2017-02-16 08:38:01 -0800)


USB/PHY patches for 4.11-rc1

Here is the big USB and PHY driver updates for 4.11-rc1.

Nothing major, just the normal amount of churn in the usb gadget and dwc
and xhci controllers, new device ids, new phy drivers, a new usb-serial
driver, and a few other minor changes in different USB drivers.

All have been in linux-next for a long time with no reported issues.

Signed-off-by: Greg Kroah-Hartman 


Aaro Koskinen (1):
  USB: ohci-omap: defer probe if PHY is missing

Alexander Stein (1):
  xhci: Put warning message on a single line

Alexandre Bailon (10):
  usb: musb: da8xx: Remove CPPI 3.0 quirk and methods
  usb: musb: da8xx: Add support of suspend / resume
  usb: musb: Add a quirk to preserve the session during suspend
  usb: musb: da8xx: Fix host mode suspend
  usb: musb: dma: Add a DMA completion platform callback
  usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback()
  usb: musb: cppi_dma: Clean up cppi structure
  usb: musb: cppi_dma: Clean up cppi41_dma_controller structure
  usb: musb: tusb6010: Clean up tusb_omap_dma structure
  usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS

Arnd Bergmann (1):
  usb: phy: ab8500: remove unused ab8500_eyediagram_workaroud()

Augusto Mecking Caringi (1):
  usb: storage: sddr09: Remove a set-but-not-used variable

Baolin Wang (6):
  phy: rockchip-inno-usb2: Set EXTCON_USB when EXTCON_CHG_USB_SDP was set
  usb: dwc3: ep0: Fix the possible missed request for handling delay STATUS 
phase
  usb: phy: ab8500: Remove the set_power callback
  usb: phy: msm: Remove the set_power callback
  usb: phy: fsl: Remove the set_power callback
  usb: host: xhci: Remove unused 'addr_64' variable in xhci_hcd structure

Bhumika Goyal (8):
  drivers: phy: constify phy_ops structures
  usb: gadget: constify usb_gadget_ops structures
  usb: isp1760: constify usb_gadget_ops structures
  usb: host: constify dev_pm_ops structures
  usb: gadget: constify usb_gadget_ops structures
  usb: gadget: udc: constify usb_ep_ops structures
  usb: musb: constify musb_hdrc_config structures
  usb: musb: omap2430: constify dev_pm_ops structures

Bin Liu (6):
  usb: musb: remove musb_generic_disable function
  usb: musb: dsps: remove redundant code
  usb: musb: da8xx: remove redundant code
  usb: musb: am35x: remove redundant code
  usb: musb: davinci: remove redundant code
  usb: musb: dsps: switch to static id for musb-hdrc platform devices

Bjorn Andersson (4):
  phy: qcom-ufs: Don't kfree devres resource
  phy: qcom-ufs: Correct usage of regulator_get()
  phy: qcom-ufs: Remove -always-on property
  phy: qcom-ufs: Suppress extraneous logging

Chanwoo Choi (10):
  phy: rcar-gen3-usb2: Replace the deprecated extcon API
  phy: sun4i-usb: Replace the deprecated extcon API
  usb: chipdata: Replace the extcon API
  usb: phy: omap-otg: Replace the extcon API
  usb: phy: msm: Replace the extcon API
  usb: phy: qcom-8x16-usb: Replace the extcon API
  usb: renesas_usbhs: Replace the deprecated extcon API
  usb: dwc3: omap: Replace the extcon API
  usb: phy: tahvo: Replace the deprecated extcon API
  usb: musb: sunxi: Uses the resource-managed extcon API when registering 
extcon notifier

Chen Yu (2):
  usb: dwc2: Force port resume on switching to device mode
  usb: dwc2: Add a quirk to allow speed negotiation for Hisilicon Hi6220

Chunfeng Yun (8):
  usb: mtu3: get resources that cause deferred probe earlier
  usb: mtu3: add reference clock
  usb: xhci-mtk: add reference clock
  dt-bindings: mt8173-xhci: add reference clock
  dt-bindings: mt8173-mtu3: add reference clock
  arm64: dts: mt8173: add reference clock for usb
  usb: mtu3: make the reference clock optional
  usb: xhci-mtk: make the reference clock optional

Colin Ian King (4):
  usb: renesas_usbhs: mod_host: fix typo: "connecte" -> "connected"
  usb: renesas_usbhs: mod_host: fix typo: "connecte" -> "connected"
  usb: misc: adutux: remove redundant error check on copy_to_user return 
code
  usb: misc: usbtest: remove redundant check on retval < 0

Cristian Birsan (1):
  usb: gadget: udc: atmel: Update endpoint allocation scheme

Felipe Balbi (29):
  usb: dwc3: 

RE: Re: Subject: [PATCH v3] USB:Core: BugFix: Proper handling of Race Condition when two USB class drivers try to call init_usb_class simultaneously

[Ajay Kaher]

On Tue, 21 Feb 2017, Alan Stern wrote: 
 
> On Mon, 20 Feb 2017, Ajay Kaher wrote:
 
>> Alan, as per my understanding I have shifted the lock from
>> release_usb_class() to destroy_usb_class() in patch v3. 
>> If it is not right, please explain in detail which race condition
>> I have missed and also share your suggestions.
>> 
> 
> Have you considered what would happen if destroy_usb_class() ran, but 
> some other CPU was still holding a reference to usb_class?  And what if 
> the last reference gets dropped later on, while init_usb_class() is 
> running?

Access of usb_class->kref is only from either init_usb_class()
or destroy_usb_class(), and both these functions are now protected
with Mutex Locking in patch v3, so there is no chance of race condition
as per above scenarios.

> Maybe that's not possible here, but it is possible in general for 
> refcounted objects.  So yes, this code is probably okay, but it isn't 
> good form.
 
As per my understanding, I found to be one of the best possible solution
for this problem and this solutiuon don't have any side effect.

thanks,
ajay kaher
 
 
> Signed-off-by: Ajay Kaher
> 
> ---
> 
>  drivers/usb/core/file.c |6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/usb/core/file.c b/drivers/usb/core/file.c
> index 822ced9..a12d184 100644
> --- a/drivers/usb/core/file.c
> +++ b/drivers/usb/core/file.c
> @@ -27,6 +27,7 @@
>  #define MAX_USB_MINORS 256
>  static const struct file_operations *usb_minors[MAX_USB_MINORS];
>  static DECLARE_RWSEM(minor_rwsem);
> +static DEFINE_MUTEX(init_usb_class_mutex);
> 
>  static int usb_open(struct inode *inode, struct file *file)
>  {
> @@ -109,8 +110,10 @@ static void release_usb_class(struct kref *kref)
> 
>  static void destroy_usb_class(void)
>  {
> +   mutex_lock(_usb_class_mutex);
> if (usb_class)
> kref_put(_class->kref, release_usb_class);
> +   mutex_unlock(_usb_class_mutex);
>  }
> 
>  int usb_major_init(void)
> @@ -171,7 +174,10 @@ int usb_register_dev(struct usb_interface *intf,
> if (intf->minor >= 0)
> return -EADDRINUSE;
> 
> +   mutex_lock(_usb_class_mutex);
> retval = init_usb_class();
> +   mutex_unlock(_usb_class_mutex);
> +
> if (retval)
> return retval;
 
 
 
 
 
 
 

Re: [PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node into port nodes

[Chunfeng Yun]

Hi,
On Wed, 2017-02-22 at 12:36 +0300, Sergei Shtylyov wrote:
> On 2/22/2017 11:55 AM, Chunfeng Yun wrote:
> 
> > there is a reference clock for each port, HighSpeed port is 48M,
> > and SuperSpeed port is 26M which usually comes from 26M oscillator
> > directly, but some SoCs is not. it is flexible to move it into port
> 
> ... but on some SoCs does not?
I mean the reference clock of SuperSpeed port comes from PLL and need be
controlled by driver on some SoCs. When it comes from oscillator
directly, it is optional and is ok whether the driver controll it or not
> 
> > node.
> >
> > Signed-off-by: Chunfeng Yun 
> [...]
> 
> MBR, Sergei
> 


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[PATCH, RESEND] usb: gadget: udc: atmel: fix debug output

[Arnd Bergmann]

The debug output now contains the wrong variable, as seen from the compiler
warning:

drivers/usb/gadget/udc/atmel_usba_udc.c: In function 'usba_ep_enable':
drivers/usb/gadget/udc/atmel_usba_udc.c:632:550: error: 'ept_cfg' may be used 
uninitialized in this function [-Werror=maybe-uninitialized]
  DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",

This changes the debug output the same way as the other code.

Fixes: 741d2558bf0a ("usb: gadget: udc: atmel: Update endpoint allocation 
scheme")
Signed-off-by: Arnd Bergmann 
Acked-by: Alexandre Belloni 
Acked-by: Nicolas Ferre 
---
Originally sent on Feb 1, but this was never picked up. Resending it now,
as it is one of the few remaining build regressions in linux-next compared
to linux-4.10.

 drivers/usb/gadget/udc/atmel_usba_udc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/gadget/udc/atmel_usba_udc.c 
b/drivers/usb/gadget/udc/atmel_usba_udc.c
index 11bbce28bc23..2035906b8ced 100644
--- a/drivers/usb/gadget/udc/atmel_usba_udc.c
+++ b/drivers/usb/gadget/udc/atmel_usba_udc.c
@@ -610,7 +610,7 @@ usba_ep_enable(struct usb_ep *_ep, const struct 
usb_endpoint_descriptor *desc)
 {
struct usba_ep *ep = to_usba_ep(_ep);
struct usba_udc *udc = ep->udc;
-   unsigned long flags, ept_cfg, maxpacket;
+   unsigned long flags, maxpacket;
unsigned int nr_trans;
 
DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
@@ -630,7 +630,7 @@ usba_ep_enable(struct usb_ep *_ep, const struct 
usb_endpoint_descriptor *desc)
ep->is_in = 0;
 
DBG(DBG_ERR, "%s: EPT_CFG = 0x%lx (maxpacket = %lu)\n",
-   ep->ep.name, ept_cfg, maxpacket);
+   ep->ep.name, ep->ept_cfg, maxpacket);
 
if (usb_endpoint_dir_in(desc)) {
ep->is_in = 1;
-- 
2.9.0

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Re: [PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node into port nodes

[Sergei Shtylyov]

On 2/22/2017 11:55 AM, Chunfeng Yun wrote:


there is a reference clock for each port, HighSpeed port is 48M,
and SuperSpeed port is 26M which usually comes from 26M oscillator
directly, but some SoCs is not. it is flexible to move it into port


   ... but on some SoCs does not?


node.

Signed-off-by: Chunfeng Yun 

[...]

MBR, Sergei

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Re: [PATCH v3 4/8] phy: phy-mt65xx-usb3: move clock from phy node into port nodes

[Sergei Shtylyov]

Hello!

On 2/22/2017 11:55 AM, Chunfeng Yun wrote:


the reference clock of HighSpeed port is 48M which comes from PLL;
the reference clock of SuperSpeed port is 26M which usually comes
from 26M oscillator directly, but some SoCs are not, add it for


... but on some SoCs does not?


compatibility, and put them into port node for flexibility.

Signed-off-by: Chunfeng Yun 

[...]

MBR, Sergei

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Re: Choppy USB audio on i.MX53 chipidea with 4.4 kernel. Ok in 4.10

[Martin Fuzzey]

On 22/02/17 10:06, Oliver Neukum wrote:

Am Dienstag, den 21.02.2017, 17:06 +0100 schrieb Martin Fuzzey:
  
However the revert commit message doesn't really indicate that it is

a
bug fix.
The links in the revert commit are describing scenarios involving
multiple codecs, whereas I am only using one.

Hi,

if it fixes a bug, it is a bug fix. That does not mean that it
was known to fix a bug when it was written. Please send a
suggestion to sta...@vger.kernel.org


Did so yesterday following Fabio's reply.

Sorry forgot to cc -usb.

Martin

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Re: Choppy USB audio on i.MX53 chipidea with 4.4 kernel. Ok in 4.10

[Oliver Neukum]

Am Dienstag, den 21.02.2017, 17:06 +0100 schrieb Martin Fuzzey:
> 
> However the revert commit message doesn't really indicate that it is
> a 
> bug fix.
> The links in the revert commit are describing scenarios involving 
> multiple codecs, whereas I am only using one.

Hi,

if it fixes a bug, it is a bug fix. That does not mean that it
was known to fix a bug when it was written. Please send a
suggestion to sta...@vger.kernel.org

Regards
Oliver

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[PATCH v3 6/8] arm64: dts: mt8173: split usb SuperSpeed port into two ports

[Chunfeng Yun]

split the old SuperSpeed port node into a HighSpeed one and a new
SuperSpeed one.

Signed-off-by: Chunfeng Yun 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   19 +--
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12e7027..12c90e5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -724,8 +724,9 @@
  <0 0x11280700 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = ;
-   phys = <_port0 PHY_TYPE_USB3>,
-  <_port1 PHY_TYPE_USB2>;
+   phys = < PHY_TYPE_USB2>,
+  < PHY_TYPE_USB3>,
+  < PHY_TYPE_USB2>;
power-domains = < MT8173_POWER_DOMAIN_USB>;
clocks = < CLK_TOP_USB30_SEL>,
 < CLK_PERI_USB0>,
@@ -761,14 +762,20 @@
ranges;
status = "okay";
 
-   phy_port0: port@11290800 {
-   reg = <0 0x11290800 0 0x800>;
+   u2port0: usb-phy@11290800 {
+   reg = <0 0x11290800 0 0x100>;
#phy-cells = <1>;
status = "okay";
};
 
-   phy_port1: port@11291000 {
-   reg = <0 0x11291000 0 0x800>;
+   u3port0: usb-phy@11290900 {
+   reg = <0 0x11290900 0 0x700>;
+   #phy-cells = <1>;
+   status = "okay";
+   };
+
+   u2port1: usb-phy@11291000 {
+   reg = <0 0x11291000 0 0x100>;
#phy-cells = <1>;
status = "okay";
};
-- 
1.7.9.5

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[PATCH v3 1/8] phy: phy-mt65xx-usb3: improve RX detection stable time

[Chunfeng Yun]

The default value of RX detection stable time is 10us, and this
margin is too big for some critical cases which cause U3 link fail
and link to U2(probability is about 1%). So change it to 5us.

Signed-off-by: Chunfeng Yun 
---
 drivers/phy/phy-mt65xx-usb3.c |   18 ++
 1 file changed, 18 insertions(+)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index d972067..fe2392a 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -112,6 +112,14 @@
 #define P3D_RG_CDR_BIR_LTD0GENMASK(12, 8)
 #define P3D_RG_CDR_BIR_LTD0_VAL(x) ((0x1f & (x)) << 8)
 
+#define U3P_U3_PHYD_RXDET1 (SSUSB_SIFSLV_U3PHYD_BASE + 0x128)
+#define P3D_RG_RXDET_STB2_SET  GENMASK(17, 9)
+#define P3D_RG_RXDET_STB2_SET_VAL(x)   ((0x1ff & (x)) << 9)
+
+#define U3P_U3_PHYD_RXDET2 (SSUSB_SIFSLV_U3PHYD_BASE + 0x12c)
+#define P3D_RG_RXDET_STB2_SET_P3   GENMASK(8, 0)
+#define P3D_RG_RXDET_STB2_SET_P3_VAL(x)(0x1ff & (x))
+
 #define U3P_XTALCTL3   (SSUSB_SIFSLV_SPLLC + 0x0018)
 #define XC3_RG_U3_XTAL_RX_PWD  BIT(9)
 #define XC3_RG_U3_FRC_XTAL_RX_PWD  BIT(8)
@@ -295,6 +303,16 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
tmp |= P3D_RG_CDR_BIR_LTD0_VAL(0xc) | P3D_RG_CDR_BIR_LTD1_VAL(0x3);
writel(tmp, port_base + U3P_PHYD_CDR1);
 
+   tmp = readl(port_base + U3P_U3_PHYD_RXDET1);
+   tmp &= ~P3D_RG_RXDET_STB2_SET;
+   tmp |= P3D_RG_RXDET_STB2_SET_VAL(0x10);
+   writel(tmp, port_base + U3P_U3_PHYD_RXDET1);
+
+   tmp = readl(port_base + U3P_U3_PHYD_RXDET2);
+   tmp &= ~P3D_RG_RXDET_STB2_SET_P3;
+   tmp |= P3D_RG_RXDET_STB2_SET_P3_VAL(0x10);
+   writel(tmp, port_base + U3P_U3_PHYD_RXDET2);
+
dev_dbg(u3phy->dev, "%s(%d)\n", __func__, index);
 }
 
-- 
1.7.9.5

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[PATCH v3 7/8] arm64: dts: mt8173: move clock from phy node into port nodes

[Chunfeng Yun]

there is a reference clock for each port, HighSpeed port is 48M,
and SuperSpeed port is 26M which usually comes from 26M oscillator
directly, but some SoCs is not. it is flexible to move it into port
node.

Signed-off-by: Chunfeng Yun 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 12c90e5..750e427 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -755,8 +755,6 @@
u3phy: usb-phy@1129 {
compatible = "mediatek,mt8173-u3phy";
reg = <0 0x1129 0 0x800>;
-   clocks = < CLK_APMIXED_REF2USB_TX>;
-   clock-names = "u3phya_ref";
#address-cells = <2>;
#size-cells = <2>;
ranges;
@@ -764,18 +762,24 @@
 
u2port0: usb-phy@11290800 {
reg = <0 0x11290800 0 0x100>;
+   clocks = < CLK_APMIXED_REF2USB_TX>;
+   clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
 
u3port0: usb-phy@11290900 {
reg = <0 0x11290900 0 0x700>;
+   clocks = <>;
+   clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
 
u2port1: usb-phy@11291000 {
reg = <0 0x11291000 0 0x100>;
+   clocks = < CLK_APMIXED_REF2USB_TX>;
+   clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
-- 
1.7.9.5

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[PATCH v3 5/8] phy: phy-mt65xx-usb3: add support for new version phy

[Chunfeng Yun]

There are some variations from mt2701 to mt2712:
1. banks shared by multiple ports are put back into each port,
such as SPLLC and U2FREQ;
2. add a new bank MISC for u2port, and CHIP for u3port;
3. bank's offset in each port are also rearranged;

Signed-off-by: Chunfeng Yun 
---
 drivers/phy/phy-mt65xx-usb3.c |  344 ++---
 1 file changed, 217 insertions(+), 127 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index f4a3505..eb33499 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -23,46 +23,54 @@
 #include 
 #include 
 
-/*
- * for sifslv2 register, but exclude port's;
- * relative to USB3_SIF2_BASE base address
- */
-#define SSUSB_SIFSLV_SPLLC 0x
-#define SSUSB_SIFSLV_U2FREQ0x0100
-
-/* offsets of banks in each u2phy registers */
-#define SSUSB_SIFSLV_U2PHY_COM_BASE0x
-/* offsets of banks in each u3phy registers */
-#define SSUSB_SIFSLV_U3PHYD_BASE   0x
-#define SSUSB_SIFSLV_U3PHYA_BASE   0x0200
-
-#define U3P_USBPHYACR0 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x)
+/* version V1 sub-banks offset base address */
+/* banks shared by multiple phys */
+#define SSUSB_SIFSLV_V1_SPLLC  0x000   /* shared by u3 phys */
+#define SSUSB_SIFSLV_V1_U2FREQ 0x100   /* shared by u2 phys */
+/* u2 phy bank */
+#define SSUSB_SIFSLV_V1_U2PHY_COM  0x000
+/* u3 phy banks */
+#define SSUSB_SIFSLV_V1_U3PHYD 0x000
+#define SSUSB_SIFSLV_V1_U3PHYA 0x200
+
+/* version V2 sub-banks offset base address */
+/* u2 phy banks */
+#define SSUSB_SIFSLV_V2_MISC   0x000
+#define SSUSB_SIFSLV_V2_U2FREQ 0x100
+#define SSUSB_SIFSLV_V2_U2PHY_COM  0x300
+/* u3 phy banks */
+#define SSUSB_SIFSLV_V2_SPLLC  0x000
+#define SSUSB_SIFSLV_V2_CHIP   0x100
+#define SSUSB_SIFSLV_V2_U3PHYD 0x200
+#define SSUSB_SIFSLV_V2_U3PHYA 0x400
+
+#define U3P_USBPHYACR0 0x000
 #define PA0_RG_U2PLL_FORCE_ON  BIT(15)
 
-#define U3P_USBPHYACR2 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0008)
+#define U3P_USBPHYACR2 0x008
 #define PA2_RG_SIF_U2PLL_FORCE_EN  BIT(18)
 
-#define U3P_USBPHYACR5 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0014)
+#define U3P_USBPHYACR5 0x014
 #define PA5_RG_U2_HSTX_SRCAL_ENBIT(15)
 #define PA5_RG_U2_HSTX_SRCTRL  GENMASK(14, 12)
 #define PA5_RG_U2_HSTX_SRCTRL_VAL(x)   ((0x7 & (x)) << 12)
 #define PA5_RG_U2_HS_100U_U3_ENBIT(11)
 
-#define U3P_USBPHYACR6 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0018)
+#define U3P_USBPHYACR6 0x018
 #define PA6_RG_U2_BC11_SW_EN   BIT(23)
 #define PA6_RG_U2_OTG_VBUSCMP_EN   BIT(20)
 #define PA6_RG_U2_SQTH GENMASK(3, 0)
 #define PA6_RG_U2_SQTH_VAL(x)  (0xf & (x))
 
-#define U3P_U2PHYACR4  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0020)
+#define U3P_U2PHYACR4  0x020
 #define P2C_RG_USB20_GPIO_CTL  BIT(9)
 #define P2C_USB20_GPIO_MODEBIT(8)
 #define P2C_U2_GPIO_CTR_MSK(P2C_RG_USB20_GPIO_CTL | P2C_USB20_GPIO_MODE)
 
-#define U3D_U2PHYDCR0  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0060)
+#define U3D_U2PHYDCR0  0x060
 #define P2C_RG_SIF_U2PLL_FORCE_ON  BIT(24)
 
-#define U3P_U2PHYDTM0  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0068)
+#define U3P_U2PHYDTM0  0x068
 #define P2C_FORCE_UART_EN  BIT(26)
 #define P2C_FORCE_DATAIN   BIT(23)
 #define P2C_FORCE_DM_PULLDOWN  BIT(21)
@@ -84,59 +92,56 @@
P2C_FORCE_TERMSEL | P2C_RG_DMPULLDOWN | \
P2C_RG_DPPULLDOWN | P2C_RG_TERMSEL)
 
-#define U3P_U2PHYDTM1  (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x006C)
+#define U3P_U2PHYDTM1  0x06C
 #define P2C_RG_UART_EN BIT(16)
 #define P2C_RG_VBUSVALID   BIT(5)
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
 
-#define U3P_U3_PHYA_REG0   (SSUSB_SIFSLV_U3PHYA_BASE + 0x)
-#define P3A_RG_U3_VUSB10_ONBIT(5)
-
-#define U3P_U3_PHYA_REG6   (SSUSB_SIFSLV_U3PHYA_BASE + 0x0018)
+#define U3P_U3_PHYA_REG6   0x018
 #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28)
 #define P3A_RG_TX_EIDLE_CM_VAL(x)  ((0xf & (x)) << 28)
 
-#define U3P_U3_PHYA_REG9   (SSUSB_SIFSLV_U3PHYA_BASE + 0x0024)
+#define U3P_U3_PHYA_REG9   0x024
 #define P3A_RG_RX_DAC_MUX  GENMASK(5, 1)
 #define P3A_RG_RX_DAC_MUX_VAL(x)   ((0x1f & (x)) << 1)
 
-#define U3P_U3PHYA_DA_REG0 (SSUSB_SIFSLV_U3PHYA_BASE + 0x0100)
+#define U3P_U3_PHYA_DA_REG00x100
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
-#define U3P_U3_PHYD_LFPS1  (SSUSB_SIFSLV_U3PHYD_BASE + 0x000c)
+#define U3P_U3_PHYD_LFPS1  0x00c
 #define P3D_RG_FWAKE_THGENMASK(21, 16)
 #define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 

[PATCH v3 8/8] dt-bindings: phy-mt65xx-usb: add support for new version phy

[Chunfeng Yun]

add a new compatible string for "mt2712", and move reference clock
into each port node;

Signed-off-by: Chunfeng Yun 
---
 .../devicetree/bindings/phy/phy-mt65xx-usb.txt |   93 +---
 1 file changed, 80 insertions(+), 13 deletions(-)

diff --git a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt 
b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
index 33a2b1e..0acc5a9 100644
--- a/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
+++ b/Documentation/devicetree/bindings/phy/phy-mt65xx-usb.txt
@@ -6,12 +6,11 @@ This binding describes a usb3.0 phy for mt65xx platforms of 
Medaitek SoC.
 Required properties (controller (parent) node):
  - compatible  : should be one of
  "mediatek,mt2701-u3phy"
+ "mediatek,mt2712-u3phy"
  "mediatek,mt8173-u3phy"
- - reg : offset and length of register for phy, exclude port's
- register.
- - clocks  : a list of phandle + clock-specifier pairs, one for each
- entry in clock-names
- - clock-names : must contain
+ - clocks  : (deprecated, use port's clocks instead) a list of phandle +
+ clock-specifier pairs, one for each entry in clock-names
+ - clock-names : (deprecated, use port's one instead) must contain
  "u3phya_ref": for reference clock of usb3.0 analog phy.
 
 Required nodes : a sub-node is required for each port the controller
@@ -19,8 +18,19 @@ Required nodes   : a sub-node is required for each port 
the controller
  'reg' property is used inside these nodes to describe
  the controller's topology.
 
+Optional properties (controller (parent) node):
+ - reg : offset and length of register shared by multiple ports,
+ exclude port's private register. It is needed on mt2701
+ and mt8173, but not on mt2712.
+
 Required properties (port (child) node):
 - reg  : address and length of the register set for the port.
+- clocks   : a list of phandle + clock-specifier pairs, one for each
+ entry in clock-names
+- clock-names  : must contain
+ "ref": 48M reference clock for HighSpeed analog phy; and 26M
+   reference clock for SuperSpeed analog phy, sometimes is
+   24M, 25M or 27M, depended on platform.
 - #phy-cells   : should be 1 (See second example)
  cell after port phandle is phy type from:
- PHY_TYPE_USB2
@@ -31,21 +41,31 @@ Example:
 u3phy: usb-phy@1129 {
compatible = "mediatek,mt8173-u3phy";
reg = <0 0x1129 0 0x800>;
-   clocks = < CLK_APMIXED_REF2USB_TX>;
-   clock-names = "u3phya_ref";
#address-cells = <2>;
#size-cells = <2>;
ranges;
status = "okay";
 
-   phy_port0: port@11290800 {
-   reg = <0 0x11290800 0 0x800>;
+   u2port0: usb-phy@11290800 {
+   reg = <0 0x11290800 0 0x100>;
+   clocks = < CLK_APMIXED_REF2USB_TX>;
+   clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
 
-   phy_port1: port@11291000 {
-   reg = <0 0x11291000 0 0x800>;
+   u3port0: usb-phy@11290900 {
+   reg = <0 0x11290800 0 0x700>;
+   clocks = <>;
+   clock-names = "ref";
+   #phy-cells = <1>;
+   status = "okay";
+   };
+
+   u2port1: usb-phy@11291000 {
+   reg = <0 0x11291000 0 0x100>;
+   clocks = < CLK_APMIXED_REF2USB_TX>;
+   clock-names = "ref";
#phy-cells = <1>;
status = "okay";
};
@@ -64,7 +84,54 @@ Example:
 
 usb30: usb@1127 {
...
-   phys = <_port0 PHY_TYPE_USB3>;
-   phy-names = "usb3-0";
+   phys = < PHY_TYPE_USB2>, < PHY_TYPE_USB3>;
+   phy-names = "usb2-0", "usb3-0";
...
 };
+
+
+Layout differences of banks between mt8173/mt2701 and mt2712
+-
+mt8173 and mt2701:
+portoffsetbank
+shared  0xSPLLC
+0x0100FMREG
+u2 port00x0800U2PHY_COM
+u3 port00x0900U3PHYD
+0x0a00U3PHYD_BANK2
+0x0b00U3PHYA
+0x0c00U3PHYA_DA
+u2 port10x1000U2PHY_COM
+u3 port10x1100U3PHYD
+0x1200U3PHYD_BANK2
+0x1300U3PHYA
+0x1400U3PHYA_DA
+u2 port20x1800U2PHY_COM
+...
+
+mt2712:
+portoffsetbank
+u2 port00xMISC
+0x0100FMREG
+0x0300U2PHY_COM
+u3 port00x0700SPLLC
+0x0800CHIP
+0x0900U3PHYD
+0x0a00U3PHYD_BANK2
+0x0b00U3PHYA
+0x0c00U3PHYA_DA
+u2 port10x1000MISC
+0x1100

[PATCH v3 3/8] phy: phy-mt65xx-usb3: split SuperSpeed port into two ones

[Chunfeng Yun]

Currently usb3 port in fact includes two sub-ports, but it is not
flexible for some cases, such as following one:
usb3 port0 includes u2port0 and u3port0;
usb2 port0 includes u2port1;
If wants to support only HS, we can use u2port0 or u2port1, when
select u2port0, u3port0 is not needed;
If wants to support SS, we can compound u2port0 and u3port0,
or u2port1 and u3port0, if select latter one, u2port0 is not needed.

So it's more flexible to split usb3 port into two ones and also try
best to save power by disabling unnecessary ports.

Signed-off-by: Chunfeng Yun 
---
 drivers/phy/phy-mt65xx-usb3.c |  149 +
 1 file changed, 75 insertions(+), 74 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 4fd47d0..7fff482 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -30,11 +30,11 @@
 #define SSUSB_SIFSLV_SPLLC 0x
 #define SSUSB_SIFSLV_U2FREQ0x0100
 
-/* offsets of sub-segment in each port registers */
+/* offsets of banks in each u2phy registers */
 #define SSUSB_SIFSLV_U2PHY_COM_BASE0x
-#define SSUSB_SIFSLV_U3PHYD_BASE   0x0100
-#define SSUSB_USB30_PHYA_SIV_B_BASE0x0300
-#define SSUSB_SIFSLV_U3PHYA_DA_BASE0x0400
+/* offsets of banks in each u3phy registers */
+#define SSUSB_SIFSLV_U3PHYD_BASE   0x
+#define SSUSB_SIFSLV_U3PHYA_BASE   0x0200
 
 #define U3P_USBPHYACR0 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x)
 #define PA0_RG_U2PLL_FORCE_ON  BIT(15)
@@ -49,7 +49,6 @@
 #define PA5_RG_U2_HS_100U_U3_ENBIT(11)
 
 #define U3P_USBPHYACR6 (SSUSB_SIFSLV_U2PHY_COM_BASE + 0x0018)
-#define PA6_RG_U2_ISO_EN   BIT(31)
 #define PA6_RG_U2_BC11_SW_EN   BIT(23)
 #define PA6_RG_U2_OTG_VBUSCMP_EN   BIT(20)
 #define PA6_RG_U2_SQTH GENMASK(3, 0)
@@ -91,18 +90,18 @@
 #define P2C_RG_SESSEND BIT(4)
 #define P2C_RG_AVALID  BIT(2)
 
-#define U3P_U3_PHYA_REG0   (SSUSB_USB30_PHYA_SIV_B_BASE + 0x)
+#define U3P_U3_PHYA_REG0   (SSUSB_SIFSLV_U3PHYA_BASE + 0x)
 #define P3A_RG_U3_VUSB10_ONBIT(5)
 
-#define U3P_U3_PHYA_REG6   (SSUSB_USB30_PHYA_SIV_B_BASE + 0x0018)
+#define U3P_U3_PHYA_REG6   (SSUSB_SIFSLV_U3PHYA_BASE + 0x0018)
 #define P3A_RG_TX_EIDLE_CM GENMASK(31, 28)
 #define P3A_RG_TX_EIDLE_CM_VAL(x)  ((0xf & (x)) << 28)
 
-#define U3P_U3_PHYA_REG9   (SSUSB_USB30_PHYA_SIV_B_BASE + 0x0024)
+#define U3P_U3_PHYA_REG9   (SSUSB_SIFSLV_U3PHYA_BASE + 0x0024)
 #define P3A_RG_RX_DAC_MUX  GENMASK(5, 1)
 #define P3A_RG_RX_DAC_MUX_VAL(x)   ((0x1f & (x)) << 1)
 
-#define U3P_U3PHYA_DA_REG0 (SSUSB_SIFSLV_U3PHYA_DA_BASE + 0x)
+#define U3P_U3PHYA_DA_REG0 (SSUSB_SIFSLV_U3PHYA_BASE + 0x0100)
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
@@ -160,7 +159,7 @@ struct mt65xx_phy_instance {
 
 struct mt65xx_u3phy {
struct device *dev;
-   void __iomem *sif_base; /* include sif2, but exclude port's */
+   void __iomem *sif_base; /* only shared sif */
struct clk *u3phya_ref; /* reference clock of usb3 anolog phy */
const struct mt65xx_phy_pdata *pdata;
struct mt65xx_phy_instance **phys;
@@ -190,7 +189,7 @@ static void hs_slew_rate_calibrate(struct mt65xx_u3phy 
*u3phy,
tmp = readl(sif_base + U3P_U2FREQ_FMCR0);
tmp &= ~(P2F_RG_CYCLECNT | P2F_RG_MONCLK_SEL);
tmp |= P2F_RG_CYCLECNT_VAL(U3P_FM_DET_CYCLE_CNT);
-   tmp |= P2F_RG_MONCLK_SEL_VAL(instance->index);
+   tmp |= P2F_RG_MONCLK_SEL_VAL(instance->index >> 1);
writel(tmp, sif_base + U3P_U2FREQ_FMCR0);
 
/* enable frequency meter */
@@ -238,6 +237,56 @@ static void hs_slew_rate_calibrate(struct mt65xx_u3phy 
*u3phy,
writel(tmp, instance->port_base + U3P_USBPHYACR5);
 }
 
+static void u3_phy_instance_init(struct mt65xx_u3phy *u3phy,
+   struct mt65xx_phy_instance *instance)
+{
+   void __iomem *port_base = instance->port_base;
+   u32 tmp;
+
+   /* gating PCIe Analog XTAL clock */
+   tmp = readl(u3phy->sif_base + U3P_XTALCTL3);
+   tmp |= XC3_RG_U3_XTAL_RX_PWD | XC3_RG_U3_FRC_XTAL_RX_PWD;
+   writel(tmp, u3phy->sif_base + U3P_XTALCTL3);
+
+   /* gating XSQ */
+   tmp = readl(port_base + U3P_U3PHYA_DA_REG0);
+   tmp &= ~P3A_RG_XTAL_EXT_EN_U3;
+   tmp |= P3A_RG_XTAL_EXT_EN_U3_VAL(2);
+   writel(tmp, port_base + U3P_U3PHYA_DA_REG0);
+
+   tmp = readl(port_base + U3P_U3_PHYA_REG9);
+   tmp &= ~P3A_RG_RX_DAC_MUX;
+   tmp |= P3A_RG_RX_DAC_MUX_VAL(4);
+   writel(tmp, port_base + U3P_U3_PHYA_REG9);
+
+   tmp = readl(port_base + U3P_U3_PHYA_REG6);
+   tmp &= ~P3A_RG_TX_EIDLE_CM;
+   tmp |= P3A_RG_TX_EIDLE_CM_VAL(0xe);
+   writel(tmp, port_base + U3P_U3_PHYA_REG6);
+
+   tmp = readl(port_base + 

[PATCH v3 4/8] phy: phy-mt65xx-usb3: move clock from phy node into port nodes

[Chunfeng Yun]

the reference clock of HighSpeed port is 48M which comes from PLL;
the reference clock of SuperSpeed port is 26M which usually comes
from 26M oscillator directly, but some SoCs are not, add it for
compatibility, and put them into port node for flexibility.

Signed-off-by: Chunfeng Yun 
---
 drivers/phy/phy-mt65xx-usb3.c |   21 +++--
 1 file changed, 11 insertions(+), 10 deletions(-)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index 7fff482..f4a3505 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -153,6 +153,7 @@ struct mt65xx_phy_pdata {
 struct mt65xx_phy_instance {
struct phy *phy;
void __iomem *port_base;
+   struct clk *ref_clk;/* reference clock of anolog phy */
u32 index;
u8 type;
 };
@@ -160,7 +161,6 @@ struct mt65xx_phy_instance {
 struct mt65xx_u3phy {
struct device *dev;
void __iomem *sif_base; /* only shared sif */
-   struct clk *u3phya_ref; /* reference clock of usb3 anolog phy */
const struct mt65xx_phy_pdata *pdata;
struct mt65xx_phy_instance **phys;
int nphys;
@@ -449,9 +449,9 @@ static int mt65xx_phy_init(struct phy *phy)
struct mt65xx_u3phy *u3phy = dev_get_drvdata(phy->dev.parent);
int ret;
 
-   ret = clk_prepare_enable(u3phy->u3phya_ref);
+   ret = clk_prepare_enable(instance->ref_clk);
if (ret) {
-   dev_err(u3phy->dev, "failed to enable u3phya_ref\n");
+   dev_err(u3phy->dev, "failed to enable ref_clk\n");
return ret;
}
 
@@ -494,7 +494,7 @@ static int mt65xx_phy_exit(struct phy *phy)
if (instance->type == PHY_TYPE_USB2)
phy_instance_exit(u3phy, instance);
 
-   clk_disable_unprepare(u3phy->u3phya_ref);
+   clk_disable_unprepare(instance->ref_clk);
return 0;
 }
 
@@ -594,12 +594,6 @@ static int mt65xx_u3phy_probe(struct platform_device *pdev)
return PTR_ERR(u3phy->sif_base);
}
 
-   u3phy->u3phya_ref = devm_clk_get(dev, "u3phya_ref");
-   if (IS_ERR(u3phy->u3phya_ref)) {
-   dev_err(dev, "error to get u3phya_ref\n");
-   return PTR_ERR(u3phy->u3phya_ref);
-   }
-
port = 0;
for_each_child_of_node(np, child_np) {
struct mt65xx_phy_instance *instance;
@@ -634,6 +628,13 @@ static int mt65xx_u3phy_probe(struct platform_device *pdev)
goto put_child;
}
 
+   instance->ref_clk = devm_clk_get(>dev, "ref");
+   if (IS_ERR(instance->ref_clk)) {
+   dev_err(dev, "failed to get ref_clk(id-%d)\n", port);
+   retval = PTR_ERR(instance->ref_clk);
+   goto put_child;
+   }
+
instance->phy = phy;
instance->index = port;
phy_set_drvdata(phy, instance);
-- 
1.7.9.5

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[PATCH v3 2/8] phy: phy-mt65xx-usb3: increase LFPS filter threshold

[Chunfeng Yun]

Increase LFPS filter threshold to avoid some fake remote wakeup
signal which cause U3 link fail and link to U2 only at about
0.01% probability.

Signed-off-by: Chunfeng Yun 
---
 drivers/phy/phy-mt65xx-usb3.c |9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/phy/phy-mt65xx-usb3.c b/drivers/phy/phy-mt65xx-usb3.c
index fe2392a..4fd47d0 100644
--- a/drivers/phy/phy-mt65xx-usb3.c
+++ b/drivers/phy/phy-mt65xx-usb3.c
@@ -106,6 +106,10 @@
 #define P3A_RG_XTAL_EXT_EN_U3  GENMASK(11, 10)
 #define P3A_RG_XTAL_EXT_EN_U3_VAL(x)   ((0x3 & (x)) << 10)
 
+#define U3P_U3_PHYD_LFPS1  (SSUSB_SIFSLV_U3PHYD_BASE + 0x000c)
+#define P3D_RG_FWAKE_THGENMASK(21, 16)
+#define P3D_RG_FWAKE_TH_VAL(x) ((0x3f & (x)) << 16)
+
 #define U3P_PHYD_CDR1  (SSUSB_SIFSLV_U3PHYD_BASE + 0x005c)
 #define P3D_RG_CDR_BIR_LTD1GENMASK(28, 24)
 #define P3D_RG_CDR_BIR_LTD1_VAL(x) ((0x1f & (x)) << 24)
@@ -303,6 +307,11 @@ static void phy_instance_init(struct mt65xx_u3phy *u3phy,
tmp |= P3D_RG_CDR_BIR_LTD0_VAL(0xc) | P3D_RG_CDR_BIR_LTD1_VAL(0x3);
writel(tmp, port_base + U3P_PHYD_CDR1);
 
+   tmp = readl(port_base + U3P_U3_PHYD_LFPS1);
+   tmp &= ~P3D_RG_FWAKE_TH;
+   tmp |= P3D_RG_FWAKE_TH_VAL(0x34);
+   writel(tmp, port_base + U3P_U3_PHYD_LFPS1);
+
tmp = readl(port_base + U3P_U3_PHYD_RXDET1);
tmp &= ~P3D_RG_RXDET_STB2_SET;
tmp |= P3D_RG_RXDET_STB2_SET_VAL(0x10);
-- 
1.7.9.5

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