Re: [PATCH V2 1/2] pinctrl: exynos: Add BUS1 pin controller for exynos7
Hi Vivek,
On Mon, Nov 24, 2014 at 6:32 PM, Vivek Gautam wrote:
> USB and Power regulator on Exynos7 require gpios available
> in BUS1 pin controller block.
> So adding the BUS1 pinctrl support.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Vivek Gautam
> Cc: Linus Walleij
> ---
Looks good to me.
Thanks!
Reviewed-by: Alim Akhtar
>
> This patch was part of series:
> "[PATCH 00/11] Exynos7: Adding USB 3.0 support"
> https://lkml.org/lkml/2014/11/21/247
>
> Changes since V1:
> - Added support for all pin banks which are part of BUS1 pin controller.
>
> drivers/pinctrl/samsung/pinctrl-exynos.c | 19 +++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
> b/drivers/pinctrl/samsung/pinctrl-exynos.c
> index d5d4cfc..44e60dc 100644
> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c
> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
> @@ -1300,6 +1300,20 @@ static const struct samsung_pin_bank_data
> exynos7_pin_banks7[] __initconst = {
> EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
> };
>
> +/* pin banks of exynos7 pin-controller - BUS1 */
> +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst =
> {
> + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
> + EXYNOS_PIN_BANK_EINTG(8, 0x040, "gpf1", 0x04),
> + EXYNOS_PIN_BANK_EINTG(4, 0x060, "gpf2", 0x08),
> + EXYNOS_PIN_BANK_EINTG(5, 0x080, "gpf3", 0x0c),
> + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
> + EXYNOS_PIN_BANK_EINTG(8, 0x0c0, "gpf5", 0x14),
> + EXYNOS_PIN_BANK_EINTG(5, 0x0e0, "gpg1", 0x18),
> + EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpg2", 0x1c),
> + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
> + EXYNOS_PIN_BANK_EINTG(3, 0x140, "gpv6", 0x24),
> +};
> +
> const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
> {
> /* pin-controller instance 0 Alive data */
> @@ -1342,5 +1356,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[]
> __initconst = {
> .pin_banks = exynos7_pin_banks7,
> .nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
> .eint_gpio_init = exynos_eint_gpio_init,
> + }, {
> + /* pin-controller instance 8 BUS1 data */
> + .pin_banks = exynos7_pin_banks8,
> + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8),
> + .eint_gpio_init = exynos_eint_gpio_init,
> },
> };
> --
> 1.7.10.4
>
> --
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--
Regards,
Alim
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Re: [PATCH V2 2/2] arm64: exynos: Add bus1 pinctrl node on exynos7
Hi Vivek,
On Mon, Nov 24, 2014 at 6:36 PM, Vivek Gautam wrote:
> BUS1 pinctrl provides gpios for usb and power regulator
> available on exynos7-espresso board. So add relevant device
> node for pinctrl-bus1.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Vivek Gautam
> ---
>
Looks good to me.
Reviewed-by: Alim Akhtar
> This patch was part of series:
> "[PATCH 00/11] Exynos7: Adding USB 3.0 support"
> https://lkml.org/lkml/2014/11/21/247
>
> Changes since V1:
> - Added support for all pin banks which are part of BUS1 pin controller.
>
> arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 82
> +++
> arch/arm64/boot/dts/exynos/exynos7.dtsi |7 ++
> 2 files changed, 89 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> index 2eef4a2..c367f0a 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> @@ -335,6 +335,88 @@
> };
> };
>
> +&pinctrl_bus1 {
> + gpf0: gpf0 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf1: gpf1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf2: gpf2 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf3: gpf3 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf4: gpf4 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf5: gpf5 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg1: gpg1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpg2: gpg2 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph1: gph1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpv6: gpv6 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
> &pinctrl_nfc {
> gpj0: gpj0 {
> gpio-controller;
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 1d9e4c9..e633b02 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -26,6 +26,7 @@
> pinctrl5 = &pinctrl_ese;
> pinctrl6 = &pinctrl_fsys0;
> pinctrl7 = &pinctrl_fsys1;
> + pinctrl8 = &pinctrl_bus1;
> };
>
> cpus {
> @@ -242,6 +243,12 @@
> interrupts = <0 383 0>;
> };
>
> + pinctrl_bus1: pinctrl@1487 {
> + compatible = "samsung,exynos7-pinctrl";
> + reg = <0x1487 0x1000>;
> + interrupts = <0 384 0>;
> + };
> +
> pinctrl_nfc: pinctrl@14cd {
> compatible = "samsung,exynos7-pinctrl";
> reg = <0x14cd 0x1000>;
> --
> 1.7.10.4
>
> --
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--
Regards,
Alim
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Re: [PATCH 09/11] arm64: exynos: Add bus1 pinctrl node on exynos7
Hi Vivek,
On Fri, Nov 21, 2014 at 7:05 PM, Vivek Gautam wrote:
> BUS1 pinctrl provides gpios for usb and power regulator
> available on exynos7-espresso board. So add relevant device
> node for pinctrl-bus1.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Vivek Gautam
> ---
> arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi | 26
> +++
> arch/arm64/boot/dts/exynos/exynos7.dtsi |7 ++
> 2 files changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> index 2eef4a2..9648e03 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7-pinctrl.dtsi
> @@ -335,6 +335,32 @@
> };
> };
>
> +&pinctrl_bus1 {
> + gpf0: gpf0 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gpf4: gpf4 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +
> + gph1: gph1 {
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> +};
> +
See my comment on patch 01/11, accordingly you can modify this.
> &pinctrl_nfc {
> gpj0: gpj0 {
> gpio-controller;
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index d7a37c3..90048b2 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -26,6 +26,7 @@
> pinctrl5 = &pinctrl_ese;
> pinctrl6 = &pinctrl_fsys0;
> pinctrl7 = &pinctrl_fsys1;
> + pinctrl8 = &pinctrl_bus1;
> };
>
> cpus {
> @@ -242,6 +243,12 @@
> interrupts = <0 383 0>;
> };
>
> + pinctrl_bus1: pinctrl@1487 {
> + compatible = "samsung,exynos7-pinctrl";
> + reg = <0x1487 0x1000>;
> + interrupts = <0 384 0>;
> + };
> +
> pinctrl_nfc: pinctrl@14cd {
> compatible = "samsung,exynos7-pinctrl";
> reg = <0x14cd 0x1000>;
> --
> 1.7.10.4
>
> --
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--
Regards,
Alim
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Re: [PATCH 01/11] pinctrl: exynos: Add BUS1 pin controller for exynos7
Hi Vivek,
On Fri, Nov 21, 2014 at 7:05 PM, Vivek Gautam wrote:
> USB and Power regulator on Exynos7 require gpios available
> in BUS1 pin controller block.
> So adding the BUS1 pinctrl support.
>
> Signed-off-by: Naveen Krishna Ch
> Signed-off-by: Vivek Gautam
> Cc: Linus Walleij
> ---
> drivers/pinctrl/samsung/pinctrl-exynos.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c
> b/drivers/pinctrl/samsung/pinctrl-exynos.c
> index d5d4cfc..caca5b5 100644
> --- a/drivers/pinctrl/samsung/pinctrl-exynos.c
> +++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
> @@ -1300,6 +1300,13 @@ static const struct samsung_pin_bank_data
> exynos7_pin_banks7[] __initconst = {
> EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
> };
>
> +/* pin banks of exynos7 pin-controller - BUS1 */
> +static const struct samsung_pin_bank_data exynos7_pin_banks8[] __initconst =
> {
> + EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpf0", 0x00),
> + EXYNOS_PIN_BANK_EINTG(8, 0x0a0, "gpf4", 0x10),
> + EXYNOS_PIN_BANK_EINTG(6, 0x120, "gph1", 0x20),
> +};
> +
Looks like you are just trying to touch pin banks only related to USB
stuffs, but as this patch does not have any dependencies on other
patches in this series, will you consider adding other pin banks of
BUS1, just for completeness of BUS1 pin-controller.
> const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
> {
> /* pin-controller instance 0 Alive data */
> @@ -1342,5 +1349,10 @@ const struct samsung_pin_ctrl exynos7_pin_ctrl[]
> __initconst = {
> .pin_banks = exynos7_pin_banks7,
> .nr_banks = ARRAY_SIZE(exynos7_pin_banks7),
> .eint_gpio_init = exynos_eint_gpio_init,
> + }, {
> + /* pin-controller instance 8 BUS1 data */
> + .pin_banks = exynos7_pin_banks8,
> + .nr_banks = ARRAY_SIZE(exynos7_pin_banks8),
> + .eint_gpio_init = exynos_eint_gpio_init,
> },
> };
> --
> 1.7.10.4
>
> --
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--
Regards,
Alim
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