Re: [RFC][PATCH 1/2] ARM: OMAP4: clock: Add device tree support for AUXCLKs
Quoting Nishanth Menon (2013-04-09 13:49:00)
> On 10:43-20130409, Tony Lindgren wrote:
> > * Tony Lindgren [130409 09:54]:
> > > * Roger Quadros [130409 03:00]:
> > > > On 04/05/2013 06:58 PM, Tony Lindgren wrote:
> > > > >
> > > > > Can't you just use the clock name there to get it?
> > > >
> > > > In device tree we don't pass around clock names. You can either get
> > > > a phandle or an index to the clock.
> > > >
> > > > e.g. Documentation/devicetree/bindings/clock/imx31-clock.txt
> > >
> > > Yes I understand that. But the driver/clock/omap driver can just
> > > remap the DT device initially so the board specific clock is
> > > found from the clock alias table. Basically initially a passthrough
> > > driver that can be enhanced to parse DT clock bindings and load
> > > data from /lib/firmware.
> >
> > Actually probably the driver/clock/omap can even do even less
> > initially. There probably even no need to remap clocks there.
> >
> > As long as the DT clock driver understands that a board specific
> > auxclk is specified in the DT it can just call clk_add_alias() so
> > the driver will get the right auxclk from cclock44xx_data.c.
> >
> > Then other features can be added later on like to allocate a
> > clock entirely based on the binding etc.
> I did try to have an implementation for cpufreq using clock nodes.
> unfortunately, device tree wont let me have arguments of strings :(
> So, I am unable to do clock = <&clk mpu_dpll>;
> instead, I am forced to do clock = <&clk 249>;
>
See http://article.gmane.org/gmane.linux.ports.arm.kernel/229034
Regards,
Mike
> Here is an attempt on beagleXM - adds every clock node to the list.
> Tons of un-necessary prints added to give an idea - see log:
> http://pastebin.com/F9A2zSTr
>
> Would an cleaned up version be good enough as a step #1 of transition?
>
> From 7d373bdb9e9549c1b6ba1775a8dfd96ebe78abfb Mon Sep 17 00:00:00 2001
> From: Nishanth Menon
> Date: Tue, 26 Mar 2013 10:23:27 +
> Subject: [PATCH] OMAP: add devicetree support for clock nodes.
>
> Dummy patch based on Roger's original idea
>
> Nyet-Signed-off-by: Nishanth Menon
> ---
> arch/arm/boot/dts/omap3.dtsi |5 ++
> arch/arm/boot/dts/omap34xx.dtsi |2 +
> arch/arm/mach-omap2/cclock3xxx_data.c |3 +-
> arch/arm/mach-omap2/cclock44xx_data.c |3 +-
> arch/arm/mach-omap2/pm.c | 11 +++-
> drivers/clk/Kconfig |6 ++
> drivers/clk/Makefile |2 +
> drivers/clk/ti.c | 100
> +
> include/linux/clk/ti.h| 30 ++
> 9 files changed, 157 insertions(+), 5 deletions(-)
> create mode 100644 drivers/clk/ti.c
> create mode 100644 include/linux/clk/ti.h
>
> diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
> index 3344f05..a08990d 100644
> --- a/arch/arm/boot/dts/omap3.dtsi
> +++ b/arch/arm/boot/dts/omap3.dtsi
> @@ -73,6 +73,11 @@
> ti,hwmods = "counter_32k";
> };
>
> + clks: clocks {
> + compatible = "ti,clock";
> + #clock-cells = <1>;
> + };
> +
> intc: interrupt-controller@4820 {
> compatible = "ti,omap2-intc";
> interrupt-controller;
> diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
> index 75ed4ae..93c2621 100644
> --- a/arch/arm/boot/dts/omap34xx.dtsi
> +++ b/arch/arm/boot/dts/omap34xx.dtsi
> @@ -23,6 +23,8 @@
> 60 135
> >;
> clock-latency = <30>; /* From legacy driver */
> + clocks = <&clks 249>; /* index to cpufreq_ck */
> + clock-names = "cpu";
> };
> };
> };
> diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c
> b/arch/arm/mach-omap2/cclock3xxx_data.c
> index 4579c3c..d5d5ef5 100644
> --- a/arch/arm/mach-omap2/cclock3xxx_data.c
> +++ b/arch/arm/mach-omap2/cclock3xxx_data.c
> @@ -22,6 +22,7 @@
> #include
> #include
> #include
> +#include
>
> #include "soc.h"
> #include "iomap.h"
> @@ -3574,7 +3575,7 @@ int __init omap3xxx_clk_init(void)
> for (c = omap3xxx_clks; c < omap3xxx_clks + ARRAY_SIZE(omap3xxx_clks);
> c++)
> if (c->cpu & cpu_clkflg) {
> - clkdev_add(&c->lk);
> + ti_clk_node_add(&c->lk);
> if (!__clk_init(NULL, c->lk.clk))
> omap2_init_clk_hw_omap_clocks(c->lk.clk);
> }
> diff --git a/arch/arm/mach-omap2/cclock44xx_data.c
> b/arch/arm/mach-omap2/cclock44xx_data.c
> index 0c6834a..338ef64 100644
> --- a/arch/arm/mach-omap2/cclock44xx_data.c
> +++ b/arch/arm/mach-omap2/cclock44xx_data.c
> @@ -27,6 +27,7 @@
> #include
> #include
> #include
> +#include
>
>
Re: [RFC][PATCH 1/2] ARM: OMAP4: clock: Add device tree support for AUXCLKs
Quoting Nishanth Menon (2013-04-10 10:39:21) > diff --git a/drivers/clk/omap/clk.c b/drivers/clk/omap/clk.c > new file mode 100644 > index 000..63a4cce > --- /dev/null > +++ b/drivers/clk/omap/clk.c > @@ -0,0 +1,94 @@ > +/* > + * Texas Instruments OMAP Clock driver > + * > + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ > + * Nishanth Menon > + * Tony Lindgren > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed "as is" WITHOUT ANY WARRANTY of any > + * kind, whether express or implied; without even the implied warranty > + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include Please use clk-provider.h. Otherwise this looks like an OK transitional solution. Hopefully this will be replaced with a more legitimate clock driver for 3.11. Regards, Mike -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v4 00/17] ARM: at91: move to common clk framework
Quoting Nicolas Ferre (2013-10-18 01:18:04) > On 11/10/2013 09:37, Boris BREZILLON : > > Hello, > > > > This patch series is the 4th version of the new at91 clock implementation > > (using common clk framework). > > Mike, DT maintainers, > > Can you have a look at this series converting the AT91 family to common > clock framework and associated Device Tree description? > > Here is the thread on gmane: > http://thread.gmane.org/gmane.linux.ports.arm.kernel/272550 > > Mike, I think that you already reviewed a previous version of this > series and I guess that we have finalized it. > > So gentlemen, It can be good for us if you can give us your "review" or > "acknowledgement" tags... I guess you want to take this through your tree? If so please add: Acked-by: Mike Turquette Regards, Mike > > Thanks, best regards, > > > > Most of the clock provided by the PMC (Power Management Controller) are > > implemented : > > - main clock (main oscillator) > > - pll clocks > > - master clock > > - programmable clocks > > - utmi clock > > - peripheral clocks > > - system clocks > > > > This implementation is only compatible with device tree definition. > > The goal is to define the whole clock tree in the device tree. > > > > Could a dt maintainer take a look at these dt bindinds. > > > > This patch series is based on linus tree (but should apply correctly on > > linux-next) and has been tested on sama5d31ek. > > > > Best Regards, > > Boris > > > > Changes since v3: > > - simplify master clk implementation (drop set_rate/parent support) > > - fix bug in set_rate function of pll driver > > - fix coding style issues > > - define macros and constants where needed > > - remove peripheral id macro references > > - remove sam9g35 specific handling (sam9g35 = sam9x5) > > - rework main clk prepare function to handle automatic rate calculation > > > > Changes since v2: > > - fix several bugs in clk implementations > > - drop non-dt boards support > > - split the series to ease review and tests: > > * 1 patch series for new clk implementations (this series) > > * 1 patch series to move each at91 SoC to common clk framework (coming > > soon) > > - modify dt-bindings (add atmel,clk- prefix to atmel specific properties) > > - add clk macros for dt-bindings > > - add pmc framework (helper function to access pmc registers) > > - add interrupt support to enable passive wait in clk_prepare functions > > > > Changes since v1: > > - fix bugs in pll, programmable and system clock implementations > > (wrong bit position). > > - add usb clock configuration support (ohci and udc drivers + > > clk_lookup for non dt boards) > > - rework of the system clock interfaces (no need to define a parent clock, > > system clock is a gate with no rate info) > > - change system, peripheral and programmable clk dt bindings (1 master > > node > > and multiple child nodes each defining a system/peripheral or prog > > clock) > > - fix bugs in sama5 dt definition > > > > Boris BREZILLON (17): > >ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.h > >ARM: at91: add Kconfig options for common clk support > >clk: at91: add PMC base support > >clk: at91: add PMC macro file for dt definitions > >clk: at91: add PMC main clock > >clk: at91: add PMC pll clocks > >clk: at91: add PMC master clock > >clk: at91: add PMC system clocks > >clk: at91: add PMC peripheral clocks > >clk: at91: add peripheral clk macros for peripheral clk dt bindings > >clk: at91: add PMC programmable clocks > >clk: at91: add PMC utmi clock > >clk: at91: add PMC usb clock > >clk: at91: add PMC smd clock > >clk: at91: add PMC clk device tree binding doc. > >ARM: at91: move pit timer to common clk framework > >ARM: at91: add new compatible strings for pmc driver > > > > .../devicetree/bindings/clock/at91-clock.txt | 328 > > arch/arm/mach-at91/Kconfig | 44 ++ > > arch/arm/mach-at91/Kconfig.non_dt |6 + > > arch/arm/mach-at91/Makefile|2 +- > > arch/arm/mach-at91/at91rm9200.c|2 +- > > arch/arm/mach-at91/at91sam9260.c |2 +- > > arch/arm/mach-at91/at91sam9261.c |2 +- > > arch/arm/mach-at91/at91
Re: [PATCH v5 06/17] clk: at91: add PMC pll clocks
Quoting Boris BREZILLON (2013-11-12 13:57:19)
> +static const struct clk_ops pll_ops = {
> + .prepare = clk_pll_prepare,
> + .is_prepared = clk_pll_is_ready,
> + .disable = clk_pll_disable,
> + .is_enabled = clk_pll_is_ready,
> + .recalc_rate = clk_pll_recalc_rate,
> + .round_rate = clk_pll_round_rate,
> + .set_rate = clk_pll_set_rate,
> +};
Hi Boris,
It is a bit strange to see only a .prepare and .disable callback
populated. What happens if a driver calls clk_disable and then
clk_enable? You clock will still be disabled in hardware.
Regards,
Mike
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Re: [PATCH v5 08/17] clk: at91: add PMC system clocks
Quoting Boris BREZILLON (2013-11-12 14:05:35) > This patch adds new at91 system clock implementation using common clk > framework. > > Some peripherals need to enable a "system" clock in order to work properly. > Each system clock is given an id based on the bit position in SCER/SCDR > registers. > > Signed-off-by: Boris BREZILLON > Acked-by: Nicolas Ferre > --- > drivers/clk/at91/Makefile |1 + > drivers/clk/at91/clk-system.c | 137 > + > drivers/clk/at91/pmc.c|5 ++ > drivers/clk/at91/pmc.h|3 + > 4 files changed, 146 insertions(+) > create mode 100644 drivers/clk/at91/clk-system.c > > diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile > index e28fb2b..c2b7068 100644 > --- a/drivers/clk/at91/Makefile > +++ b/drivers/clk/at91/Makefile > @@ -4,3 +4,4 @@ > > obj-y += pmc.o > obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o > +obj-y += clk-system.o > diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c > new file mode 100644 > index 000..1c086f4 > --- /dev/null > +++ b/drivers/clk/at91/clk-system.c > @@ -0,0 +1,137 @@ > +/* > + * drivers/clk/at91/clk-system.c Nitpick: it's better to not put file paths in a comment block in case the file name or path is changed. Regards, Mike -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v5 00/17] ARM: at91: move to common clk framework
Quoting Boris BREZILLON (2013-11-12 12:51:52) > Hello, > > This patch series is the 5th version of the at91 clk implementations > using the Common Clk Framework. Thanks for sending this latest version. A couple recurring themes to be addressed: 1) Some clocks implement .prepare and .disable but not .unprepre nor .enable. Please only use .prepare and .unprepare in this case. 2) Remove the file names & paths from the comment block at the top of the files. These are minor issues. Are you taking these through your platform tree or the clk tree? If you want to take them through your platform tree then feel free to add my acked-by to the next version. Regards, Mike > > Most of the clock provided by the PMC (Power Management Controller) are > implemented : > - main clock (main oscillator) > - pll clocks > - master clock > - programmable clocks > - utmi clock > - peripheral clocks > - system clocks > > Actually some clk drivers are missing (slow clk, main clk and processor > clk), and some drivers only implement a subset of the hardware capabilities > (master clk rate change is missing). > But this series implements all the already available clks, and I will > hopefully > add missing features in a near future. > > This implementation is only compatible with device tree definition. > The goal is to define the whole clock tree using the device tree. > > BTW, could a dt maintainer take a look at these dt bindinds ? > > Just a note to let you know these bindings are currently unstable and might > change in the future. > > > Mike, I know you already acked the previous version, but I slighty changed > the dt bindings, according to some feedbacks I got during ELCE. > Could you take a look at this new version (at least the new dt bindings), > and add your acked-by if you agree with these changes ? > > Best Regards, > Boris > > Changes since v4: > - rework dt bindings: >* replace "atmel,clk-id" property by the standard "reg" property >* reference system, peripheral and programmable clks using the direct > clk node instead of the parent node plus a clk id > - provide a new helper function (of_at91_get_clk_range) to retrieve a clk >range from the device tree > > Changes since v3: > - simplify master clk implementation (drop set_rate/parent support) > - fix bug in set_rate function of pll driver > - fix coding style issues > - define macros and constants where needed > - remove peripheral id macro references > - remove sam9g35 specific handling (sam9g35 = sam9x5) > - rework main clk prepare function to handle automatic rate calculation > > Changes since v2: > - fix several bugs in clk implementations > - drop non-dt boards support > - split the series to ease review and tests: >* 1 patch series for new clk implementations (this series) >* 1 patch series to move each at91 SoC to common clk framework (coming > soon) > - modify dt-bindings (add atmel,clk- prefix to atmel specific properties) > - add clk macros for dt-bindings > - add pmc framework (helper function to access pmc registers) > - add interrupt support to enable passive wait in clk_prepare functions > > Changes since v1: > - fix bugs in pll, programmable and system clock implementations >(wrong bit position). > - add usb clock configuration support (ohci and udc drivers + >clk_lookup for non dt boards) > - rework of the system clock interfaces (no need to define a parent clock, >system clock is a gate with no rate info) > - change system, peripheral and programmable clk dt bindings (1 master node >and multiple child nodes each defining a system/peripheral or prog clock) > - fix bugs in sama5 dt definition > > Boris BREZILLON (17): > ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.h > ARM: at91: add Kconfig options for common clk support > clk: at91: add PMC base support > clk: at91: add PMC macro file for dt definitions > clk: at91: add PMC main clock > clk: at91: add PMC pll clocks > clk: at91: add PMC master clock > clk: at91: add PMC system clocks > clk: at91: add PMC peripheral clocks > clk: at91: add peripheral clk macros for peripheral clk dt bindings > clk: at91: add PMC programmable clocks > clk: at91: add PMC utmi clock > clk: at91: add PMC usb clock > clk: at91: add PMC smd clock > clk: at91: add PMC clk device tree binding doc. > ARM: at91: move pit timer to common clk framework > ARM: at91: add new compatible strings for pmc driver > > .../devicetree/bindings/clock/at91-clock.txt | 339 + > arch/arm/mach-at91/Kconfig | 44 ++ > arch/arm/mach-at91/Kconfig.non_dt |6 + > arch/arm/mach-at91/Makefile|2 +- > arch/arm/mach-at91/at91rm9200.c|2 +- > arch/arm/mach-at91/at91sam9260.c |2 +- > arch/arm/mach-at91/at91sam9261.c |2 +- > arch/arm/mach-at91/at91sam9263.c
Re: [PATCH v6 00/16] ARM: at91: move to common clk framework
Quoting Boris BREZILLON (2013-11-28 04:36:24) > Hello, > > This patch series is the 5th version of the at91 clk implementations > using the Common Clk Framework. Oops, I just replied to v5 of this series. Thanks for the fixes. Which tree do you want this to go through? Regards, Mike > > Most of the clock provided by the PMC (Power Management Controller) are > implemented : > - main clock (main oscillator) > - pll clocks > - master clock > - programmable clocks > - utmi clock > - peripheral clocks > - system clocks > > Actually some clk drivers are missing (slow clk, main clk and processor > clk), and some drivers only implement a subset of the hardware capabilities > (master clk rate change is missing). > But this series implements all the already available clks, and I will > hopefully > add missing features in a near future. > > This implementation is only compatible with device tree definition. > The goal is to define the whole clock tree using the device tree. > > Just a note to let you know these bindings are currently unstable and might > change in the future. > > > Best Regards, > Boris > > Changes since v5: > - remove peripheral divisors macros from dt binding include file > - remove file path from comment blocks > - replace pll and utmi disable function by unprepare function to >avoid issue when disabling and reenabling a clk > - fix programmable clk interrupt retrieval > - fix OF_CLK_DECLARE names (xxx_clk_main -> xxx_clk_pmc) > - add missing comma in at91rm9200 main clk dt declaration > - fix num_parents check in smd clk driver > > Changes since v4: > - rework dt bindings: >* replace "atmel,clk-id" property by the standard "reg" property >* reference system, peripheral and programmable clks using the direct > clk node instead of the parent node plus a clk id > - provide a new helper function (of_at91_get_clk_range) to retrieve a clk >range from the device tree > > Changes since v3: > - simplify master clk implementation (drop set_rate/parent support) > - fix bug in set_rate function of pll driver > - fix coding style issues > - define macros and constants where needed > - remove peripheral id macro references > - remove sam9g35 specific handling (sam9g35 = sam9x5) > - rework main clk prepare function to handle automatic rate calculation > > Changes since v2: > - fix several bugs in clk implementations > - drop non-dt boards support > - split the series to ease review and tests: >* 1 patch series for new clk implementations (this series) >* 1 patch series to move each at91 SoC to common clk framework (coming > soon) > - modify dt-bindings (add atmel,clk- prefix to atmel specific properties) > - add clk macros for dt-bindings > - add pmc framework (helper function to access pmc registers) > - add interrupt support to enable passive wait in clk_prepare functions > > Changes since v1: > - fix bugs in pll, programmable and system clock implementations >(wrong bit position). > - add usb clock configuration support (ohci and udc drivers + >clk_lookup for non dt boards) > - rework of the system clock interfaces (no need to define a parent clock, >system clock is a gate with no rate info) > - change system, peripheral and programmable clk dt bindings (1 master node >and multiple child nodes each defining a system/peripheral or prog clock) > - fix bugs in sama5 dt definition > > Boris BREZILLON (16): > ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.h > ARM: at91: add Kconfig options for common clk support > clk: at91: add PMC base support > clk: at91: add PMC macro file for dt definitions > clk: at91: add PMC main clock > clk: at91: add PMC pll clocks > clk: at91: add PMC master clock > clk: at91: add PMC system clocks > clk: at91: add PMC peripheral clocks > clk: at91: add PMC programmable clocks > clk: at91: add PMC utmi clock > clk: at91: add PMC usb clock > clk: at91: add PMC smd clock > dt: binding: add at91 clks dt bindings documentation > ARM: at91: move pit timer to common clk framework > ARM: at91: add new compatible strings for pmc driver > > .../devicetree/bindings/clock/at91-clock.txt | 339 + > arch/arm/mach-at91/Kconfig | 44 ++ > arch/arm/mach-at91/Kconfig.non_dt |6 + > arch/arm/mach-at91/Makefile|2 +- > arch/arm/mach-at91/at91rm9200.c|2 +- > arch/arm/mach-at91/at91sam9260.c |2 +- > arch/arm/mach-at91/at91sam9261.c |2 +- > arch/arm/mach-at91/at91sam9263.c |2 +- > arch/arm/mach-at91/at91sam926x_time.c | 14 +- > arch/arm/mach-at91/at91sam9g45.c |2 +- > arch/arm/mach-at91/at91sam9n12.c |2 +- > arch/arm/mach-at91/at91sam9rl.c|2 +- > arch/arm/mach-at91/at91sam9x5.c|2 +
Re: [PATCH v3 2/8] clk: samsung: pll: Add support for PLL6552 and PLL6553
Quoting Tomasz Figa (2013-07-28 05:38:25) > On Sunday 28 of July 2013 13:30:51 Mark Brown wrote: > > On Wed, Jul 24, 2013 at 01:52:19AM +0200, Tomasz Figa wrote: > > > Changes since v2: > > > - Reworked to use new PLL registration method introduced by Yadwinder > > > > > >Singh Brar's patch series: > > >( http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20041 ) > > > > I'm not able to test this series since that lot isn't in -next and I > > didn't get a copy. > > Hmm, I wonder what happened with that series, as Mike was supposed to > try applying it to clk tree [1]. > > Mike, could you shed some light on this? It's merged and available from my tree. Regards, Mike > > Best regards, > Tomasz > > [1] http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20041/focus=21003 -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2 0/8] Common Clock Framework support for Samsung S3C64xx
Quoting Kukjin Kim (2013-08-05 10:01:36) > On 07/23/13 08:49, Tomasz Figa wrote: > > This series is an attempt to move clock support on Samsung S3C64xx SoCs > > to Common Clock Framework. > > > > First, support for PLL types present on S3C64xx SoCs is added to Samsung > > Common Clock Framework driver. Then the main clock driver for mentioned > > SoCs is introduced. Further patches contain fixes for drivers to make them > > compliant with CCF semantics, migration of platform code to use the new > > clock driver and removal of old clock management code. > > > > Depends on: > > - [PATCH v4 00/20] Samsung PWM support cleanup > > http://thread.gmane.org/gmane.linux.kernel.samsung-soc/20856 > > > > On S3C6410-based Tiny6410 board (Mini6410-compatible): > > > > Tested-by: Tomasz Figa > > > > For v1: > > > > Acked-by: Mike Turquette > > > > Changes since v1: > > - added patch for read-only muxes, > > - exported configurable muxes and dividers, > > - defined mout_syncmux as read-only mux, > > - in DT-enabled case fixed-clock binding is used to define external > > clocks. > > > > Tomasz Figa (8): > >clk: mux: Add support for read-only muxes. > >clk: samsung: pll: Add support for PLL6552 and PLL6553 > >clk: samsung: Add clock driver for S3C64xx SoCs > >ARM: SAMSUNG: Add soc_is_s3c6400/s3c6410 macros > >ARM: s3c64xx: dma: Use clk_prepare_enable/clk_disable_unprepare > >usb: host: ohci-s3c2410 Use clk_prepare_enable/clk_disable_unprepare > >ARM: s3c64xx: Migrate clock handling to Common Clock Framework > >ARM: s3c64xx: Remove old clock management code > > > > .../bindings/clock/samsung,s3c64xx-clock.txt | 77 ++ > > arch/arm/Kconfig |2 +- > > arch/arm/mach-s3c64xx/Makefile |2 +- > > arch/arm/mach-s3c64xx/clock.c | 1007 > > > > arch/arm/mach-s3c64xx/common.c | 21 +- > > arch/arm/mach-s3c64xx/common.h | 12 +- > > arch/arm/mach-s3c64xx/dma.c|4 +- > > arch/arm/mach-s3c64xx/include/mach/regs-clock.h| 132 +-- > > arch/arm/mach-s3c64xx/mach-anw6410.c |2 +- > > arch/arm/mach-s3c64xx/mach-crag6410.c |2 +- > > arch/arm/mach-s3c64xx/mach-hmt.c |2 +- > > arch/arm/mach-s3c64xx/mach-mini6410.c |2 +- > > arch/arm/mach-s3c64xx/mach-ncp.c |2 +- > > arch/arm/mach-s3c64xx/mach-smartq.c| 11 +- > > arch/arm/mach-s3c64xx/mach-smdk6400.c |2 +- > > arch/arm/mach-s3c64xx/mach-smdk6410.c |2 +- > > arch/arm/mach-s3c64xx/pm.c | 21 - > > arch/arm/mach-s3c64xx/s3c6400.c|6 - > > arch/arm/mach-s3c64xx/s3c6410.c|7 - > > arch/arm/plat-samsung/include/plat/cpu.h |4 + > > drivers/clk/clk-mux.c | 10 +- > > drivers/clk/samsung/Makefile |1 + > > drivers/clk/samsung/clk-pll.c | 160 > > drivers/clk/samsung/clk-pll.h |4 + > > drivers/clk/samsung/clk-s3c64xx.c | 465 + > > drivers/usb/host/ohci-s3c2410.c|8 +- > > include/dt-bindings/clock/samsung,s3c64xx-clock.h | 178 > > include/linux/clk-provider.h |2 + > > 28 files changed, 943 insertions(+), 1205 deletions(-) > > create mode 100644 > > Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt > > delete mode 100644 arch/arm/mach-s3c64xx/clock.c > > create mode 100644 drivers/clk/samsung/clk-s3c64xx.c > > create mode 100644 include/dt-bindings/clock/samsung,s3c64xx-clock.h > > > Basically, this series looks good to me, but I'm not sure how this > should be handled because of dependency with PWM cleanup and clk stuff > in clk tree now... Patches 1-3 can go into the clk tree. 4-6 should go through their respective trees. If you want I can take 7 & 8 through the clk tree. Alternatively I can provide patches 1-3 in a separate stable topic branch for you to pull in as a dependency. We'll both merge that stable topic branch into our trees and you can make a note of it for the arm-soc folks. Regards, Mike > > - Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: RE: [PATCH v2 0/8] Common Clock Framework support for Samsung S3C64xx
Quoting Kukjin Kim (2013-08-17 03:30:11) > Tomasz Figa wrote: > > [...] > > > > > > > > > > > > > Basically, this series looks good to me, but I'm not sure how this > > > > > > should be handled because of dependency with PWM cleanup and clk > > > > > > stuff > > > > > > in clk tree now... > > > > > > > > > > Patches 1-3 can go into the clk tree. 4-6 should go through their > > > > > respective trees. > > > > > > > > It looks like version 2 of patch 2/8 has been applied by mistake, > > > > breaking compilation (and operation) of the clock driver added in > > > > patch 3/8. > > > Ugh. My mistake. > > > > Happens. Thanks for fast response. > > > Sorry for late ;-) > > > > > Could you please fix this up? Thanks in advance. > > > > > > This is a little tricky since I published the clk-next-s3c64xx branch as > > > a stable branch for Samsung which I think has been merged to the > > > Samsung tree already. > > > > Right, this somewhat limits our options. Although I'm not really sure > > whether Kukjin already has pushed it to his public tree. > > > Yeah, I already did sort out in my local but not public tree because of some > problem. > > > > So what are the options? > > > > > > One option is to create a fixup patch that just manages the delta > > > between V2 and V3. I can then add this to the top of clk-next-s3c64xx > > > and re-merge it into clk-next. Then the Samsung tree will need to > > > re-merge that dependency branch. > > > > Well, I can make a "convert PLL65xx to new registration method" patch, > > that would be basically the delta. If this could be merged before patch > > 7/8, no regression would be introduced. > > > > > Do you have a better idea? > > > > Not really. Maybe let's ask Kukjin whether he has already merged it to his > > tree. Kukjin, have you? > > > OK, if new branch is ready, I will replace with that or if re-merge is > required, I will. Either way, I'm fine and can handle. Mike, let me know > your choice :-) Since I have already published it let's just go with the delta patch. I can create another stable branch named clk-next-s3c64xx-delta that just has this patch on top of clk-next-s3c64xx OR I can apply it on top of the existing clk-next-s3c64xx and re-merge it. I'm trying to think on whether there are any weird git corner cases with re-merging clk-next-s3c64xx. Let me know if re-merging is somehow unsafe (makes history weird, or whatever). Let me know what option is better for you. I'll publish as soon as I get the delta patch. Apologies again for creating some extra work! Thanks, Mike > > Thanks, > Kukjin -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v9 20/20] mdf: omap-usb-host: get rid of build warning
Quoting Roger Quadros (2013-01-23 02:38:12)
> Fixes the below build warning when driver is built-in.
>
> drivers/mfd/omap-usb-host.c:750:12: warning:
> ‘usbhs_omap_remove’ defined but not used [-Wunused-function]
>
> Signed-off-by: Roger Quadros
> Reviewed-by: Felipe Balbi
Hi Roger,
I just noticed that $SUBJECT says "mdf" instead of "mfd" ;)
Regards,
Mike
> ---
> drivers/mfd/omap-usb-host.c |2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/mfd/omap-usb-host.c b/drivers/mfd/omap-usb-host.c
> index b21ca76..6b5edf6 100644
> --- a/drivers/mfd/omap-usb-host.c
> +++ b/drivers/mfd/omap-usb-host.c
> @@ -791,7 +791,7 @@ static struct platform_driver usbhs_omap_driver = {
> .owner = THIS_MODULE,
> .pm = &usbhsomap_dev_pm_ops,
> },
> - .remove = __exit_p(usbhs_omap_remove),
> + .remove = usbhs_omap_remove,
> };
>
> MODULE_AUTHOR("Keshava Munegowda ");
> --
> 1.7.4.1
>
>
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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Re: [PATCH 1/7] clk: samsung: pll: Add support for PLL6552 and PLL6553
Quoting Tomasz Figa (2013-06-05 16:57:25)
> This patch adds support for PLL6552 and PLL6553 PLLs present on Samsung
> S3C64xx SoCs.
>
> Signed-off-by: Tomasz Figa
Acked-by: Mike Turquette
or I can take it into clk-next.
> ---
> drivers/clk/samsung/clk-pll.c | 160
> ++
> drivers/clk/samsung/clk-pll.h | 4 ++
> 2 files changed, 164 insertions(+)
>
> diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c
> index 89135f6..cef0bb9 100644
> --- a/drivers/clk/samsung/clk-pll.c
> +++ b/drivers/clk/samsung/clk-pll.c
> @@ -336,6 +336,166 @@ struct clk * __init samsung_clk_register_pll46xx(const
> char *name,
> }
>
> /*
> + * PLL6552 Clock Type
> + */
> +
> +#define PLL6552_LOCK_REG 0x00
> +#define PLL6552_CON_REG0x0c
> +
> +#define PLL6552_MDIV_MASK 0x3ff
> +#define PLL6552_PDIV_MASK 0x3f
> +#define PLL6552_SDIV_MASK 0x7
> +#define PLL6552_MDIV_SHIFT 16
> +#define PLL6552_PDIV_SHIFT 8
> +#define PLL6552_SDIV_SHIFT 0
> +
> +struct samsung_clk_pll6552 {
> + struct clk_hw hw;
> + void __iomem *reg_base;
> +};
> +
> +#define to_clk_pll6552(_hw) container_of(_hw, struct samsung_clk_pll6552, hw)
> +
> +static unsigned long samsung_pll6552_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct samsung_clk_pll6552 *pll = to_clk_pll6552(hw);
> + u32 mdiv, pdiv, sdiv, pll_con;
> + u64 fvco = parent_rate;
> +
> + pll_con = __raw_readl(pll->reg_base + PLL6552_CON_REG);
> + mdiv = (pll_con >> PLL6552_MDIV_SHIFT) & PLL6552_MDIV_MASK;
> + pdiv = (pll_con >> PLL6552_PDIV_SHIFT) & PLL6552_PDIV_MASK;
> + sdiv = (pll_con >> PLL6552_SDIV_SHIFT) & PLL6552_SDIV_MASK;
> +
> + fvco *= mdiv;
> + do_div(fvco, (pdiv << sdiv));
> +
> + return (unsigned long)fvco;
> +}
> +
> +static const struct clk_ops samsung_pll6552_clk_ops = {
> + .recalc_rate = samsung_pll6552_recalc_rate,
> +};
> +
> +struct clk * __init samsung_clk_register_pll6552(const char *name,
> + const char *pname, void __iomem *base)
> +{
> + struct samsung_clk_pll6552 *pll;
> + struct clk *clk;
> + struct clk_init_data init;
> +
> + pll = kzalloc(sizeof(*pll), GFP_KERNEL);
> + if (!pll) {
> + pr_err("%s: could not allocate pll clk %s\n", __func__, name);
> + return NULL;
> + }
> +
> + init.name = name;
> + init.ops = &samsung_pll6552_clk_ops;
> + init.parent_names = &pname;
> + init.num_parents = 1;
> +
> + pll->hw.init = &init;
> + pll->reg_base = base;
> +
> + clk = clk_register(NULL, &pll->hw);
> + if (IS_ERR(clk)) {
> + pr_err("%s: failed to register pll clock %s\n", __func__,
> + name);
> + kfree(pll);
> + }
> +
> + if (clk_register_clkdev(clk, name, NULL))
> + pr_err("%s: failed to register lookup for %s", __func__,
> name);
> +
> + return clk;
> +}
> +
> +/*
> + * PLL6553 Clock Type
> + */
> +
> +#define PLL6553_LOCK_REG 0x00
> +#define PLL6553_CON0_REG 0x0c
> +#define PLL6553_CON1_REG 0x10
> +
> +#define PLL6553_MDIV_MASK 0xff
> +#define PLL6553_PDIV_MASK 0x3f
> +#define PLL6553_SDIV_MASK 0x7
> +#define PLL6553_KDIV_MASK 0x
> +#define PLL6553_MDIV_SHIFT 16
> +#define PLL6553_PDIV_SHIFT 8
> +#define PLL6553_SDIV_SHIFT 0
> +#define PLL6553_KDIV_SHIFT 0
> +
> +struct samsung_clk_pll6553 {
> + struct clk_hw hw;
> + void __iomem *reg_base;
> +};
> +
> +#define to_clk_pll6553(_hw) container_of(_hw, struct samsung_clk_pll6553, hw)
> +
> +static unsigned long samsung_pll6553_recalc_rate(struct clk_hw *hw,
> + unsigned long parent_rate)
> +{
> + struct samsung_clk_pll6553 *pll = to_clk_pll6553(hw);
> + u32 mdiv, pdiv, sdiv, kdiv, pll_con0, pll_con1;
> + u64 fvco = parent_rate;
> +
> + pll_con0 = __raw_readl(pll->reg_base + PLL6553_CON0_REG);
> + pll_con1 = __raw_readl(pll->reg_base + PLL6553_CON1_REG);
> + mdiv = (pll_con0 >> PLL6553_MDIV_SHIFT) & PLL6553_MDIV_MASK;
> + pdiv = (pll_con0 >> PLL6553_PDIV_SHIFT) & PLL6553_PDIV_MASK;
> + sdiv = (pll_con0 >> PLL6553_SDIV_SHIFT) & PLL6553_SDIV_MAS
Re: [PATCH 2/7] clk: samsung: Add clock driver for S3C64xx SoCs
Quoting Tomasz Figa (2013-06-05 16:57:26)
> This patch adds new, Common Clock Framework-based clock driver for Samsung
> S3C64xx SoCs. The driver is just added, without actually letting the
> platforms use it yet, since this requires more intermediate steps.
>
It seems like there is an awful lot of clock data here that exists
alongside the stuff in DT. Is this how you plan to keep things going
forward or is this conversion just an intermediate step?
Regards,
Mike
> Signed-off-by: Tomasz Figa
> ---
> .../bindings/clock/samsung,s3c64xx-clock.txt | 48 ++
> drivers/clk/samsung/Makefile | 3 +
> drivers/clk/samsung/clk-s3c64xx.c | 503
> +
> include/dt-bindings/clock/samsung,s3c64xx-clock.h | 144 ++
> 4 files changed, 698 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
> create mode 100644 drivers/clk/samsung/clk-s3c64xx.c
> create mode 100644 include/dt-bindings/clock/samsung,s3c64xx-clock.h
>
> diff --git
> a/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
> b/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
> new file mode 100644
> index 000..278ab6e
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/samsung,s3c64xx-clock.txt
> @@ -0,0 +1,48 @@
> +* Samsung S3C64xx Clock Controller
> +
> +The S3C64xx clock controller generates and supplies clock to various
> controllers
> +within the SoC. The clock binding described here is applicable to all SoCs in
> +the S3C64xx family.
> +
> +Required Properties:
> +
> +- comptible: should be one of the following.
> + - "samsung,s3c6400-clock" - controller compatible with S3C6400 SoC.
> + - "samsung,s3c6410-clock" - controller compatible with S3C6410 SoC.
> +
> +- reg: physical base address of the controller and length of memory mapped
> + region.
> +
> +- #clock-cells: should be 1.
> +
> +Each clock is assigned an identifier and client nodes can use this identifier
> +to specify the clock which they consume. Some of the clocks are available
> only
> +on a particular S3C64xx SoC and this is specified where applicable.
> +
> +All available clocks are defined as preprocessor macros in
> +dt-bindings/clock/samsung,s3c64xx-clock.h header and can be used in device
> +tree sources.
> +
> +Example: Clock controller node:
> +
> + clocks: clock-controller@7e00f000 {
> + compatible = "samsung,s3c6410-clock";
> + reg = <0x7e00f000 0x1000>;
> + #clock-cells = <1>;
> + };
> +
> +Example: UART controller node that consumes the clock generated by the clock
> + controller (refer to the standard clock bindings for information about
> + "clocks" and "clock-names" properties):
> +
> + uart0: serial@7f005000 {
> + compatible = "samsung,s3c6400-uart";
> + reg = <0x7f005000 0x100>;
> + interrupt-parent = <&vic1>;
> + interrupts = <5>;
> + clock-names = "uart", "clk_uart_baud2",
> + "clk_uart_baud3";
> + clocks = <&clocks PCLK_UART0>, <&clocks PCLK_UART0>,
> + <&clocks SCLK_UART>;
> + status = "disabled";
> + };
> diff --git a/drivers/clk/samsung/Makefile b/drivers/clk/samsung/Makefile
> index b7c232e..c023474 100644
> --- a/drivers/clk/samsung/Makefile
> +++ b/drivers/clk/samsung/Makefile
> @@ -6,3 +6,6 @@ obj-$(CONFIG_COMMON_CLK)+= clk.o clk-pll.o
> obj-$(CONFIG_ARCH_EXYNOS4) += clk-exynos4.o
> obj-$(CONFIG_SOC_EXYNOS5250) += clk-exynos5250.o
> obj-$(CONFIG_SOC_EXYNOS5440) += clk-exynos5440.o
> +ifdef CONFIG_COMMON_CLK
> +obj-$(CONFIG_ARCH_S3C64XX) += clk-s3c64xx.o
> +endif
> diff --git a/drivers/clk/samsung/clk-s3c64xx.c
> b/drivers/clk/samsung/clk-s3c64xx.c
> new file mode 100644
> index 000..253a972
> --- /dev/null
> +++ b/drivers/clk/samsung/clk-s3c64xx.c
> @@ -0,0 +1,503 @@
> +/*
> + * Copyright (c) 2013 Tomasz Figa
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + * Common Clock Framework support for all S3C64xx SoCs.
> +*/
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#include
> +
> +#include "clk.h"
> +#include "clk-pll.h"
> +
> +/* S3C64xx clock controller register offsets. */
> +#define APLL_LOCK 0x000
> +#define MPLL_LOCK 0x004
> +#define EPLL_LOCK 0x008
> +#define APLL_CON 0x00c
> +#define MPLL_CON 0x010
> +#define EPLL_CON0 0x014
> +#define EPLL_CON1 0x018
> +#define CLK_SRC0x01c
> +#define CLK_DIV0 0x020
> +#define CLK_DIV1
Re: [PATCH v8 06/14] CLK: TI: OMAP3: Get rid of unused USB Host dummy clocks
Quoting Roger Quadros (2014-02-25 01:32:19)
> Hi Mike,
>
> On 02/25/2014 10:43 AM, Mike Turquette wrote:
> > Quoting Roger Quadros (2014-02-20 03:40:01)
> >> The OMAP USB Host MFD driver no longer expects these non-existing
> >> clocks from the OMAP3 platform, so get rid of them.
> >
> > Looks good to me.
>
> Is it OK if I squash this patch with [1] and take it through the MFD tree?
> Keeping them separate could break functionality if both don't go in together.
Acked-by: Mike Turquette
>
> [1] - http://article.gmane.org/gmane.linux.ports.arm.kernel/303266
>
> cheers,
> -roger
>
> >
> >>
> >> CC: Tero Kristo
> >> CC: Mike Turquette
> >> Signed-off-by: Roger Quadros
> >> ---
> >> arch/arm/mach-omap2/cclock3xxx_data.c | 4
> >> drivers/clk/ti/clk-3xxx.c | 4
> >> 2 files changed, 8 deletions(-)
> >>
> >> diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c
> >> b/arch/arm/mach-omap2/cclock3xxx_data.c
> >> index 3b05aea..4299a55 100644
> >> --- a/arch/arm/mach-omap2/cclock3xxx_data.c
> >> +++ b/arch/arm/mach-omap2/cclock3xxx_data.c
> >> @@ -3495,10 +3495,6 @@ static struct omap_clk omap3xxx_clks[] = {
> >> CLK(NULL, "dss_tv_fck", &dss_tv_fck),
> >> CLK(NULL, "dss_96m_fck", &dss_96m_fck),
> >> CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
> >> - CLK(NULL, "utmi_p1_gfclk",&dummy_ck),
> >> - CLK(NULL, "utmi_p2_gfclk",&dummy_ck),
> >> - CLK(NULL, "xclk60mhsp1_ck", &dummy_ck),
> >> - CLK(NULL, "xclk60mhsp2_ck", &dummy_ck),
> >> CLK(NULL, "init_60m_fclk",&dummy_ck),
> >> CLK(NULL, "gpt1_fck", &gpt1_fck),
> >> CLK(NULL, "aes2_ick", &aes2_ick),
> >> diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
> >> index d323023..0d1750a 100644
> >> --- a/drivers/clk/ti/clk-3xxx.c
> >> +++ b/drivers/clk/ti/clk-3xxx.c
> >> @@ -130,10 +130,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
> >> DT_CLK(NULL, "dss_tv_fck", "dss_tv_fck"),
> >> DT_CLK(NULL, "dss_96m_fck", "dss_96m_fck"),
> >> DT_CLK(NULL, "dss2_alwon_fck", "dss2_alwon_fck"),
> >> - DT_CLK(NULL, "utmi_p1_gfclk", "dummy_ck"),
> >> - DT_CLK(NULL, "utmi_p2_gfclk", "dummy_ck"),
> >> - DT_CLK(NULL, "xclk60mhsp1_ck", "dummy_ck"),
> >> - DT_CLK(NULL, "xclk60mhsp2_ck", "dummy_ck"),
> >> DT_CLK(NULL, "init_60m_fclk", "dummy_ck"),
> >> DT_CLK(NULL, "gpt1_fck", "gpt1_fck"),
> >> DT_CLK(NULL, "aes2_ick", "aes2_ick"),
> >> --
> >> 1.8.3.2
> >>
>
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Re: [PATCH 00/10] Convert MSM to common clock framework
Quoting Stephen Boyd (2012-09-20 19:26:48)
> This patchset moves the existing MSM clock code and affected drivers to the
> common clock framework. A prerequisite of moving to the common clock
> framework is to use clk_prepare() and clk_enable() so the first
> few patches migrate drivers to that call (clk_prepare() is a no-op on MSM
> right now). It also removes some custom clock APIs that MSM provides
> and finally moves the proc_comm clock code to the common struct clock.
>
> This patch series will be used as the foundation of the MSM 8660/8960
> clock code that I plan to send out soon.
>
> These patches have one dependency on the devm_clk_register() function
> which I already posted to the list[1]. They're based on linux-next-20120917.
>
Hi Stephen,
Thanks for sending this! It is too much churn to take in for the 3.7
merge window. As such I'll put reviewing this on my TODO list, but it
might wait until after the merge window settles down.
Regards,
Mike
> Stephen Boyd (10):
> usb: otg: msm: Convert to clk_prepare/unprepare
> msm_sdcc: Convert to clk_prepare/unprepare
> msm: iommu: Convert to clk_prepare/unprepare
> msm: iommu: Use clk_set_rate() instead of clk_set_min_rate()
> ARM: msm: Remove custom clk_set_flags() API
> ARM: msm: Remove custom clk_set_{max,min}_rate() API
> ARM: msm: Remove clock-7x30.h include file
> ARM: msm: Prepare clk_get() users in mach-msm for clock-pcom driver
> ARM: msm: Make proc_comm clock control into a platform driver
> ARM: msm: Migrate to common clock framework
>
> arch/arm/Kconfig | 1 +
> arch/arm/mach-msm/Makefile | 10 +-
> arch/arm/mach-msm/board-halibut.c | 2 +-
> arch/arm/mach-msm/board-msm7x30.c | 2 +-
> arch/arm/mach-msm/board-qsd8x50.c | 2 +-
> arch/arm/mach-msm/board-trout-panel.c | 19 ++--
> arch/arm/mach-msm/board-trout.c| 3 +-
> arch/arm/mach-msm/clock-7x30.h | 155 --
> arch/arm/mach-msm/clock-debug.c| 130 --
> arch/arm/mach-msm/clock-pcom.c | 149 ++---
> arch/arm/mach-msm/clock-pcom.h | 31 +++---
> arch/arm/mach-msm/clock.c | 166
> +
> arch/arm/mach-msm/clock.h | 51 +++---
> arch/arm/mach-msm/devices-msm7x00.c| 12 ++-
> arch/arm/mach-msm/devices-msm7x30.c| 13 ++-
> arch/arm/mach-msm/devices-qsd8x50.c| 11 ++-
> arch/arm/mach-msm/devices.h| 15 +--
> arch/arm/mach-msm/dma.c| 5 +-
> arch/arm/mach-msm/include/mach/board.h | 5 -
> arch/arm/mach-msm/include/mach/clk.h | 9 --
> drivers/iommu/msm_iommu_dev.c | 20 ++--
> drivers/mmc/host/msm_sdcc.c| 14 ++-
> drivers/usb/otg/msm_otg.c | 38
> 23 files changed, 222 insertions(+), 641 deletions(-)
> delete mode 100644 arch/arm/mach-msm/clock-7x30.h
> delete mode 100644 arch/arm/mach-msm/clock-debug.c
>
> [1] https://lkml.org/lkml/2012/9/19/28
>
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>
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Re: [PATCH v8 06/14] CLK: TI: OMAP3: Get rid of unused USB Host dummy clocks
Quoting Roger Quadros (2014-02-20 03:40:01)
> The OMAP USB Host MFD driver no longer expects these non-existing
> clocks from the OMAP3 platform, so get rid of them.
Looks good to me.
Regards,
Mike
>
> CC: Tero Kristo
> CC: Mike Turquette
> Signed-off-by: Roger Quadros
> ---
> arch/arm/mach-omap2/cclock3xxx_data.c | 4
> drivers/clk/ti/clk-3xxx.c | 4
> 2 files changed, 8 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c
> b/arch/arm/mach-omap2/cclock3xxx_data.c
> index 3b05aea..4299a55 100644
> --- a/arch/arm/mach-omap2/cclock3xxx_data.c
> +++ b/arch/arm/mach-omap2/cclock3xxx_data.c
> @@ -3495,10 +3495,6 @@ static struct omap_clk omap3xxx_clks[] = {
> CLK(NULL, "dss_tv_fck", &dss_tv_fck),
> CLK(NULL, "dss_96m_fck", &dss_96m_fck),
> CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
> - CLK(NULL, "utmi_p1_gfclk",&dummy_ck),
> - CLK(NULL, "utmi_p2_gfclk",&dummy_ck),
> - CLK(NULL, "xclk60mhsp1_ck", &dummy_ck),
> - CLK(NULL, "xclk60mhsp2_ck", &dummy_ck),
> CLK(NULL, "init_60m_fclk",&dummy_ck),
> CLK(NULL, "gpt1_fck", &gpt1_fck),
> CLK(NULL, "aes2_ick", &aes2_ick),
> diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
> index d323023..0d1750a 100644
> --- a/drivers/clk/ti/clk-3xxx.c
> +++ b/drivers/clk/ti/clk-3xxx.c
> @@ -130,10 +130,6 @@ static struct ti_dt_clk omap3xxx_clks[] = {
> DT_CLK(NULL, "dss_tv_fck", "dss_tv_fck"),
> DT_CLK(NULL, "dss_96m_fck", "dss_96m_fck"),
> DT_CLK(NULL, "dss2_alwon_fck", "dss2_alwon_fck"),
> - DT_CLK(NULL, "utmi_p1_gfclk", "dummy_ck"),
> - DT_CLK(NULL, "utmi_p2_gfclk", "dummy_ck"),
> - DT_CLK(NULL, "xclk60mhsp1_ck", "dummy_ck"),
> - DT_CLK(NULL, "xclk60mhsp2_ck", "dummy_ck"),
> DT_CLK(NULL, "init_60m_fclk", "dummy_ck"),
> DT_CLK(NULL, "gpt1_fck", "gpt1_fck"),
> DT_CLK(NULL, "aes2_ick", "aes2_ick"),
> --
> 1.8.3.2
>
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Re: [PATCH v3 1/8] clk: sunxi: Implement A31 USB clock
Quoting Maxime Ripard (2014-05-12 12:34:27)
> The A31 USB clock slightly differ from its older counterparts, mostly because
> it has a different gate for each PHY, while the older one had a single gate
> for
> all the phy.
>
> Signed-off-by: Maxime Ripard
> Reviewed-by: Hans de Goede
Acked-by: Mike Turquette
> ---
> drivers/clk/sunxi/clk-sunxi.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
> index bd7dc733c1ca..d9bab75f128b 100644
> --- a/drivers/clk/sunxi/clk-sunxi.c
> +++ b/drivers/clk/sunxi/clk-sunxi.c
> @@ -972,6 +972,11 @@ static const struct gates_data sun5i_a13_usb_gates_data
> __initconst = {
> .reset_mask = 0x03,
> };
>
> +static const struct gates_data sun6i_a31_usb_gates_data __initconst = {
> + .mask = { BIT(18) | BIT(17) | BIT(16) | BIT(10) | BIT(9) | BIT(8) },
> + .reset_mask = BIT(2) | BIT(1) | BIT(0),
> +};
> +
> static void __init sunxi_gates_clk_setup(struct device_node *node,
> struct gates_data *data)
> {
> @@ -1267,6 +1272,7 @@ static const struct of_device_id clk_gates_match[]
> __initconst = {
> {.compatible = "allwinner,sun6i-a31-apb2-gates-clk", .data =
> &sun6i_a31_apb2_gates_data,},
> {.compatible = "allwinner,sun4i-a10-usb-clk", .data =
> &sun4i_a10_usb_gates_data,},
> {.compatible = "allwinner,sun5i-a13-usb-clk", .data =
> &sun5i_a13_usb_gates_data,},
> + {.compatible = "allwinner,sun6i-a31-usb-clk", .data =
> &sun6i_a31_usb_gates_data,},
> {}
> };
>
> --
> 1.9.3
>
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