[PATCH] usb: chipidea: Properly mark little endian descriptors

[Stephen Boyd]

The DMA descriptors are little endian, and we do a pretty good
job of handling them with the proper le32_to_cpu() markings, but
we don't actually mark them as __le32. This means checkers like
sparse can't easily find new bugs. Let's mark the members of
structures properly and fix the few places where we're missing
conversions.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/udc.c |  6 +++---
 drivers/usb/chipidea/udc.h | 12 ++--
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 6acf4dba395e..61a65d1d05f2 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -364,7 +364,7 @@ static int add_td_to_list(struct ci_hw_ep *hwep, struct 
ci_hw_req *hwreq,
if (hwreq->req.length == 0
|| hwreq->req.length % hwep->ep.maxpacket)
mul++;
-   node->ptr->token |= mul << __ffs(TD_MULTO);
+   node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
}
 
temp = (u32) (hwreq->req.dma + hwreq->req.actual);
@@ -503,7 +503,7 @@ static int _hardware_enqueue(struct ci_hw_ep *hwep, struct 
ci_hw_req *hwreq)
if (hwreq->req.length == 0
|| hwreq->req.length % hwep->ep.maxpacket)
mul++;
-   hwep->qh.ptr->cap |= mul << __ffs(QH_MULT);
+   hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
}
 
wmb();   /* synchronize before ep prime */
@@ -530,7 +530,7 @@ static void free_pending_td(struct ci_hw_ep *hwep)
 static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
   struct td_node *node)
 {
-   hwep->qh.ptr->td.next = node->dma;
+   hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
hwep->qh.ptr->td.token &=
cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
 
diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
index e66df0020bd4..2ecd1174d66c 100644
--- a/drivers/usb/chipidea/udc.h
+++ b/drivers/usb/chipidea/udc.h
@@ -22,11 +22,11 @@
 /* DMA layout of transfer descriptors */
 struct ci_hw_td {
/* 0 */
-   u32 next;
+   __le32 next;
 #define TD_TERMINATE  BIT(0)
 #define TD_ADDR_MASK  (0xFFEUL << 5)
/* 1 */
-   u32 token;
+   __le32 token;
 #define TD_STATUS (0x00FFUL <<  0)
 #define TD_STATUS_TR_ERR  BIT(3)
 #define TD_STATUS_DT_ERR  BIT(5)
@@ -36,7 +36,7 @@ struct ci_hw_td {
 #define TD_IOCBIT(15)
 #define TD_TOTAL_BYTES(0x7FFFUL << 16)
/* 2 */
-   u32 page[5];
+   __le32 page[5];
 #define TD_CURR_OFFSET(0x0FFFUL <<  0)
 #define TD_FRAME_NUM  (0x07FFUL <<  0)
 #define TD_RESERVED_MASK  (0x0FFFUL <<  0)
@@ -45,18 +45,18 @@ struct ci_hw_td {
 /* DMA layout of queue heads */
 struct ci_hw_qh {
/* 0 */
-   u32 cap;
+   __le32 cap;
 #define QH_IOSBIT(15)
 #define QH_MAX_PKT(0x07FFUL << 16)
 #define QH_ZLTBIT(29)
 #define QH_MULT   (0x0003UL << 30)
 #define QH_ISO_MULT(x) ((x >> 11) & 0x03)
/* 1 */
-   u32 curr;
+   __le32 curr;
/* 2 - 8 */
struct ci_hw_td td;
/* 9 */
-   u32 RESERVED;
+   __le32 RESERVED;
struct usb_ctrlrequest   setup;
 } __attribute__ ((packed, aligned(4)));
 
-- 
2.9.0.rc2.8.ga28705d

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Re: [PATCH v4 03/22] usb: ulpi: Support device discovery via DT

[Stephen Boyd]

Quoting Stephen Boyd (2016-09-07 14:35:00)
> @@ -174,6 +219,21 @@ static int ulpi_register(struct device *dev, struct ulpi 
> *ulpi)
> ulpi->id.product = ulpi_read(ulpi, ULPI_PRODUCT_ID_LOW);
> ulpi->id.product |= ulpi_read(ulpi, ULPI_PRODUCT_ID_HIGH) << 8;
>  
> +   /* Some ULPI devices don't have a vendor id so rely on OF match */
> +   if (ulpi->id.vendor == 0)
> +   goto err;
> +
> +   request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product);
> +
> +   return 0;
> +err:
> +   return of_device_request_module(>dev);

This can't return the value of of_device_request_module() because that
returns an error if the module is builtin or if module loading is
disabled. I'll have to ignore the error here and just return success all
the time.
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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

[Stephen Boyd]

On 09/07, Martin Blumenstingl wrote:
> On Wed, Sep 7, 2016 at 2:33 AM, Stephen Boyd <sb...@codeaurora.org> wrote:
> > On 09/04, Martin Blumenstingl wrote:
> >> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> >> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> >> Expose these clocks to DT and comment out in clk driver.
> >>
> >> Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
> >> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
> >
> > Is authorship correct on this patch? Did Jerome author it
> > instead?
> We (Jerome and I) have both worked on this patch, that's why you have
> two signed-off-by's.
> Or is this simply about the order (author = from address should be
> listed first)?

Yes. Typically author is listed first in the signed-off-by chain.

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[PATCH v4 04/22] usb: chipidea: Only read/write OTGSC from one place

[Stephen Boyd]

With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci.h   |  3 ---
 drivers/usb/chipidea/core.c | 32 
 drivers/usb/chipidea/otg.c  | 34 ++
 3 files changed, 30 insertions(+), 39 deletions(-)

diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..05bc4d631cb9 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -428,9 +428,6 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms);
-
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 69426e644d17..01390e02ee53 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -516,38 +516,6 @@ int hw_device_reset(struct ci_hdrc *ci)
return 0;
 }
 
-/**
- * hw_wait_reg: wait the register value
- *
- * Sometimes, it needs to wait register value before going on.
- * Eg, when switch to device mode, the vbus value should be lower
- * than OTGSC_BSV before connects to host.
- *
- * @ci: the controller
- * @reg: register index
- * @mask: mast bit
- * @value: the bit value to wait
- * @timeout_ms: timeout in millisecond
- *
- * This function returns an error code if timeout
- */
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms)
-{
-   unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
-
-   while (hw_read(ci, reg, mask) != value) {
-   if (time_after(jiffies, elapse)) {
-   dev_err(ci->dev, "timeout waiting for %08x in %d\n",
-   mask, reg);
-   return -ETIMEDOUT;
-   }
-   msleep(20);
-   }
-
-   return 0;
-}
-
 static irqreturn_t ci_irq(int irq, void *data)
 {
struct ci_hdrc *ci = data;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..a829607c3e4d 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -104,7 +104,31 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
usb_gadget_vbus_disconnect(>gadget);
 }
 
-#define CI_VBUS_STABLE_TIMEOUT_MS 5000
+/**
+ * When we switch to device mode, the vbus value should be lower
+ * than OTGSC_BSV before connecting to host.
+ *
+ * @ci: the controller
+ *
+ * This function returns an error code if timeout
+ */
+static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
+{
+   unsigned long elapse = jiffies + msecs_to_jiffies(5000);
+   u32 mask = OTGSC_BSV;
+
+   while (hw_read_otgsc(ci, mask)) {
+   if (time_after(jiffies, elapse)) {
+   dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
+   mask);
+   return -ETIMEDOUT;
+   }
+   msleep(20);
+   }
+
+   return 0;
+}
+
 static void ci_handle_id_switch(struct ci_hdrc *ci)
 {
enum ci_role role = ci_otg_role(ci);
@@ -116,9 +140,11 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
ci_role_stop(ci);
 
if (role == CI_ROLE_GADGET)
-   /* wait vbus lower than OTGSC_BSV */
-   hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
-   CI_VBUS_STABLE_TIMEOUT_MS);
+   /*
+* wait vbus lower than OTGSC_BSV before connecting
+* to host
+*/
+   hw_wait_vbus_lower_bsv(ci);
 
ci_role_start(ci, role);
}
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules

[Stephen Boyd]

The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index 8a22a253a830..6719ab35b62e 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -225,6 +225,7 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
 
return tsize;
 }
+EXPORT_SYMBOL_GPL(of_device_get_modalias);
 
 int of_device_request_module(struct device *dev)
 {
@@ -290,6 +291,7 @@ void of_device_uevent(struct device *dev, struct 
kobj_uevent_env *env)
}
mutex_unlock(_mutex);
 }
+EXPORT_SYMBOL_GPL(of_device_uevent_modalias);
 
 int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 05/22] usb: chipidea: Handle extcon events properly

[Stephen Boyd]

We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/otg.c   | 46 +++-
 include/linux/usb/chipidea.h |  2 ++
 2 files changed, 43 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index a829607c3e4d..0cf149e8 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
+
+   if (cable->enabled)
+   val |= OTGSC_BSVIE;
+   else
+   val &= ~OTGSC_BSVIE;
}
 
cable = >platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_ID;
else
val &= ~OTGSC_ID;
+
+   if (cable->enabled)
+   val |= OTGSC_IDIE;
+   else
+   val &= ~OTGSC_IDIE;
}
 
-   return val;
+   return val & mask;
 }
 
 /**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  */
 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
 {
+   struct ci_hdrc_cable *cable;
+
+   cable = >platdata->vbus_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_BSVIS)
+   cable->changed = false;
+
+   /* Don't enable vbus interrupt if using external notifier */
+   if (data & mask & OTGSC_BSVIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_BSVIE;
+   } else if (mask & OTGSC_BSVIE) {
+   cable->enabled = false;
+   }
+   }
+
+   cable = >platdata->id_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_IDIS)
+   cable->changed = false;
+
+   /* Don't enable id interrupt if using external notifier */
+   if (data & mask & OTGSC_IDIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_IDIE;
+   } else if (mask & OTGSC_IDIE) {
+   cable->enabled = false;
+   }
+   }
+
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
 }
 
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..f9be467d6695 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -14,6 +14,7 @@ struct ci_hdrc;
  * struct ci_hdrc_cable - structure for external connector cable state tracking
  * @state: current state of the line
  * @changed: set to true when extcon event happen
+ * @enabled: set to true if we've enabled the vbus or id interrupt
  * @edev: device which generate events
  * @ci: driver state of the chipidea device
  * @nb: hold event notification callback
@@ -22,6 +23,7 @@ struct ci_hdrc;
 struct ci_hdrc_cable {
boolstate;
boolchanged;
+   boolenabled;
struct extcon_dev   *edev;
struct ci_hdrc  *ci;
struct notifier_block   nb;
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 03/22] usb: ulpi: Support device discovery via DT

[Stephen Boyd]

The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT help alleviate this problem. In the DT case,
we'll look for a ULPI bus node underneath the device registering
the ULPI viewport (or the parent of that device to support
chipidea's device layout) and then match up the phy node
underneath that with the ULPI device that's created.

The side benefit of this is that we can use standard properties
in the phy node like clks, regulators, gpios, etc. because we
don't have firmware like ACPI to turn these things on for us. And
we can use the DT phy binding to point our phy consumer to the
phy provider.

The ULPI bus code supports native enumeration by reading the
vendor ID and product ID registers at device creation time, but
we can't be certain that those register reads will succeed if the
phy is not powered up. To avoid any problems with reading the ID
registers before the phy is powered we fallback to DT matching
when the ID reads fail.

If the ULPI spec had some generic power sequencing for these
registers we could put that into the ULPI bus layer and power up
the device before reading the ID registers. Unfortunately this
doesn't exist and the power sequence is usually device specific.
By having the device matched up with DT we can avoid this
problem.

Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Cc: <devicet...@vger.kernel.org>
Cc: Rob Herring <robh...@kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 Documentation/devicetree/bindings/usb/ulpi.txt | 20 +++
 drivers/usb/common/ulpi.c  | 77 --
 2 files changed, 92 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt

diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt 
b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index ..ca179dc4bd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,20 @@
+ULPI bus binding
+
+
+Phys that are behind a ULPI connection can be described with the following
+binding. The host controller shall have a "ulpi" named node as a child, and
+that node shall have one enabled node underneath it representing the ulpi
+device on the bus.
+
+EXAMPLE
+---
+
+usb {
+   compatible = "vendor,usb-controller";
+
+   ulpi {
+   phy {
+   compatible = "vendor,phy";
+   };
+   };
+};
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 01c0c0477a9e..24689e05a3df 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* -- 
*/
 
@@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
struct ulpi *ulpi = to_ulpi_dev(dev);
const struct ulpi_device_id *id;
 
+   /* Some ULPI devices don't have a vendor id so rely on OF match */
+   if (ulpi->id.vendor == 0)
+   return of_driver_match_device(dev, driver);
+
for (id = drv->id_table; id->vendor; id++)
if (id->vendor == ulpi->id.vendor &&
id->product == ulpi->id.product)
@@ -50,6 +57,11 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
 static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
 {
struct ulpi *ulpi = to_ulpi_dev(dev);
+   int ret;
+
+   ret = of_device_uevent_modalias(dev, env);
+   if (ret != -ENODEV)
+   return ret;
 
if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
   ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +72,11 @@ static int ulpi_uevent(struct device *dev, struct 
kobj_uevent_env *env)
 static int ulpi_probe(struct device *dev)
 {
struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
+   int ret;
+
+   ret = of_clk_set_defaults(dev->of_node, false);
+   if (ret < 0)
+   return ret;
 
return drv->probe(to_ulpi_dev(dev));
 }
@@ -87,8 +104,13 @@ static struct bus_type ulpi_bus = {
 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
 char *buf)
 {
+   int len;
struct ulpi *ulpi = to_ulpi_dev(dev);
 
+   len = of_device_get_modalias(dev, buf, PAGE_SIZE - 1);
+   if (len != -ENODEV)
+   return len;
+
return sprintf(buf, "ulpi:v%04xp%04x\n",
   ulpi->id.vendor, ulpi->id.product);
 }
@@ -152,21 +174,44 @@ EXPORT_S

[PATCH v4 10/22] usb: chipidea: Consolidate extcon notifiers

[Stephen Boyd]

The two extcon notifiers are almost the same except for the
variable name for the cable structure and the id notifier inverts
the cable->state logic. Make it the same and replace two
functions with one to save some lines. This also makes it so that
the id cable state is true when the id pin is pulled low, so we
change the name of ->state to ->connected to properly reflect
that we're interested in the cable being connected.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c  | 45 
 drivers/usb/chipidea/otg.c   |  8 
 include/linux/usb/chipidea.h |  4 ++--
 3 files changed, 18 insertions(+), 39 deletions(-)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index f144e1bbcc82..83bc2f2dd6a8 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -577,35 +577,14 @@ static irqreturn_t ci_irq(int irq, void *data)
return ret;
 }
 
-static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event,
-   void *ptr)
+static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
+void *ptr)
 {
-   struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
-   struct ci_hdrc *ci = vbus->ci;
+   struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
+   struct ci_hdrc *ci = cbl->ci;
 
-   if (event)
-   vbus->state = true;
-   else
-   vbus->state = false;
-
-   vbus->changed = true;
-
-   ci_irq(ci->irq, ci);
-   return NOTIFY_DONE;
-}
-
-static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
- void *ptr)
-{
-   struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb);
-   struct ci_hdrc *ci = id->ci;
-
-   if (event)
-   id->state = false;
-   else
-   id->state = true;
-
-   id->changed = true;
+   cbl->connected = event;
+   cbl->changed = true;
 
ci_irq(ci->irq, ci);
return NOTIFY_DONE;
@@ -714,27 +693,27 @@ static int ci_get_platdata(struct device *dev,
}
 
cable = >vbus_extcon;
-   cable->nb.notifier_call = ci_vbus_notifier;
+   cable->nb.notifier_call = ci_cable_notifier;
cable->edev = ext_vbus;
 
if (!IS_ERR(ext_vbus)) {
ret = extcon_get_cable_state_(cable->edev, EXTCON_USB);
if (ret)
-   cable->state = true;
+   cable->connected = true;
else
-   cable->state = false;
+   cable->connected = false;
}
 
cable = >id_extcon;
-   cable->nb.notifier_call = ci_id_notifier;
+   cable->nb.notifier_call = ci_cable_notifier;
cable->edev = ext_id;
 
if (!IS_ERR(ext_id)) {
ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST);
if (ret)
-   cable->state = false;
+   cable->connected = true;
else
-   cable->state = true;
+   cable->connected = false;
}
return 0;
 }
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 0cf149e8..695f3fe3ae21 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,7 +44,7 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
 
-   if (cable->state)
+   if (cable->connected)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
@@ -62,10 +62,10 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
 
-   if (cable->state)
-   val |= OTGSC_ID;
+   if (cable->connected)
+   val &= ~OTGSC_ID; /* host */
else
-   val &= ~OTGSC_ID;
+   val |= OTGSC_ID; /* device */
 
if (cable->enabled)
val |= OTGSC_IDIE;
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index d07b162073f7..7e3daa37cf60 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -12,7 +12,7 @@ struct ci_hdrc;
 
 /**
  * struct ci_hdrc_cable - structure for external connector cable state tracking
- * @state: current state of the line
+ * @connected: true if cable is connected, false otherwise
  * @changed: set to

[PATCH v4 09/22] usb: chipidea: Add support for ULPI PHY bus

[Stephen Boyd]

Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig  |   7 +++
 drivers/usb/chipidea/Makefile |   1 +
 drivers/usb/chipidea/ci.h |  21 
 drivers/usb/chipidea/core.c   |  31 +---
 drivers/usb/chipidea/ulpi.c   | 113 ++
 5 files changed, 167 insertions(+), 6 deletions(-)
 create mode 100644 drivers/usb/chipidea/ulpi.c

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 5e5b9eb7ebf6..19c20eaa23f2 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -38,4 +38,11 @@ config USB_CHIPIDEA_HOST
  Say Y here to enable host controller functionality of the
  ChipIdea driver.
 
+config USB_CHIPIDEA_ULPI
+   bool "ChipIdea ULPI PHY support"
+   depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
+   help
+ Say Y here if you have a ULPI PHY attached to your ChipIdea
+ controller.
+
 endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y   := core.o otg.o debug.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)+= host.o
 ci_hdrc-$(CONFIG_USB_OTG_FSM)  += otg_fsm.o
+ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI)+= ulpi.o
 
 # Glue/Bridge layers go here
 
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 05bc4d631cb9..59e22389c10b 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 /**
  * DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
OP_ENDPTLISTADDR,
OP_TTCTRL,
OP_BURSTSIZE,
+   OP_ULPI_VIEWPORT,
OP_PORTSC,
OP_DEVLC,
OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
  * @test_mode: the selected test mode
  * @platdata: platform specific information supplied by parent device
  * @vbus_active: is VBUS active
+ * @ulpi: pointer to ULPI device, if any
+ * @ulpi_ops: ULPI read/write ops for this device
  * @phy: pointer to PHY, if any
  * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
  * @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
 
struct ci_hdrc_platform_data*platdata;
int vbus_active;
+#ifdef CONFIG_USB_CHIPIDEA_ULPI
+   struct ulpi *ulpi;
+   struct ulpi_ops ulpi_ops;
+#endif
struct phy  *phy;
/* old usb_phy interface */
struct usb_phy  *usb_phy;
@@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
+int ci_ulpi_init(struct ci_hdrc *ci);
+void ci_ulpi_exit(struct ci_hdrc *ci);
+int ci_ulpi_resume(struct ci_hdrc *ci);
+#else
+static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
+static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
+static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
+#endif
+
 u32 hw_read_intr_enable(struct ci_hdrc *ci);
 
 u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,6 +447,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
+void hw_phymode_configure(struct ci_hdrc *ci);
+
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 532085a096d9..f144e1bbcc82 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0x64U,
@@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0xC4U,
@@ -285,7 +287,7 @@ static int hw_de

[PATCH v4 11/22] usb: chipidea: msm: Mark device as runtime pm active

[Stephen Boyd]

We're not properly marking the glue layer/wrapper device as
runtime active, so runtime PM believes that the hardware state is
inactive when we call pm_runtime_enable() in this driver. This
causes a problem when the glue layer has a power domain
associated with it, because runtime PM will go and disable the
power domain to match the 'inactive' state of the device. Let's
mark the device as active so that runtime PM doesn't improperly
power down this device when it's actually active.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 3889809fd0c4..89c1a02d69b5 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -80,6 +80,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, plat_ci);
 
+   pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
-- 
2.9.0.rc2.8.ga28705d

--
To unsubscribe from this list: send the line "unsubscribe linux-usb" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH v4 19/22] usb: chipidea: msm: Handle phy power states

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Hook
the phy initialization into the RESET event and the phy power off
into the STOPPED event.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 40 +++---
 drivers/usb/chipidea/core.c|  8 ++--
 drivers/usb/chipidea/host.c|  8 ++--
 include/linux/usb/chipidea.h   |  2 +-
 4 files changed, 33 insertions(+), 25 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index fe96df7b530c..316044dba0ac 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -80,20 +80,33 @@ static const struct reset_control_ops ci_hdrc_msm_reset_ops 
= {
.reset = ci_hdrc_msm_por_reset,
 };
 
-static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
+static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
+   int ret;
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+
+   hw_phymode_configure(ci);
if (msm_ci->secondary_phy) {
u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
val |= HS_PHY_DIG_CLAMP_N;
writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
}
 
+   ret = phy_init(ci->phy);
+   if (ret)
+   return ret;
+
+   ret = phy_power_on(ci->phy);
+   if (ret) {
+   phy_exit(ci->phy);
+   return ret;
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
 
@@ -113,21 +126,18 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 HSPHY_SESS_VLD_CTRL);
 
}
-
-   usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n");
-   /*
-* Put the phy in non-driving mode. Otherwise host
-* may not detect soft-disconnection.
-*/
-   usb_phy_notify_disconnect(ci->usb_phy, USB_SPEED_UNKNOWN);
+   phy_power_off(ci->phy);
+   phy_exit(ci->phy);
break;
default:
dev_dbg(dev, "unknown ci_hdrc event\n");
break;
}
+
+   return 0;
 }
 
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
@@ -167,7 +177,6 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
-   struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
struct resource *res;
@@ -181,21 +190,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
return -ENOMEM;
platform_set_drvdata(pdev, ci);
 
-   /*
-* OTG(PHY) driver takes care of PHY initialization, clock management,
-* powering up VBUS, mapping of registers address space and power
-* management.
-*/
-   phy = devm_usb_get_phy_by_phandle(>dev, "usb-phy", 0);
-   if (IS_ERR(phy))
-   return PTR_ERR(phy);
-
ci->pdata.name = "ci_hdrc_msm";
ci->pdata.capoffset = DEF_CAPOFFSET;
ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST;
+ CI_HDRC_OVERRIDE_AHB_BURST |
+ CI_HDRC_OVERRIDE_PHY_CONTROL;
ci->pdata.notify_event = ci_hdrc_msm_notify_event;
-   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 83bc2f2dd6a8..ba3a43bbe0ea 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -327,6 +327,7 @@ void hw_phymode_configure(struct ci_hdrc *ci)
hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
}
 }
+EXPORT_SYMBOL_GPL(hw_phymode_configure);
 
 /**
  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
@@ -503,9 +504,12 @@ int hw_device_reset(struct ci_hdrc *ci)
  

[PATCH v4 21/22] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 160 +
 4 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy" and more specifically one 
of the
+   following:
+
+   "qcom,usb-hsic-phy-mdm9615"
+   "qcom,usb-hsic-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy-msm8974",
+"qcom,usb-hsic-phy";
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 19bff3a10f69..830c443eeabf 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 90ae19879b0a..5422f543d17d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   0x33
+
+struct qcom_usb_hsic_phy {
+   struc

[PATCH v4 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

[Stephen Boyd]

The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig   |  1 +
 drivers/usb/chipidea/ci_hdrc_msm.c | 50 --
 2 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 19c20eaa23f2..fc96f5cdcb5c 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
tristate "ChipIdea Highspeed Dual Role Controller"
depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && 
!USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
select EXTCON
+   select RESET_CONTROLLER
help
  Say Y here if your system has a dual role high speed USB
  controller based on ChipIdea silicon IP. It supports:
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 2489a63d3e75..fe96df7b530c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -31,8 +32,10 @@
 #define HSPHY_SESS_VLD_CTRLBIT(25)
 
 /* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_CTRL0x0040
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
+#define HS_PHY_POR_ASSERT  BIT(0)
 
 struct ci_hdrc_msm {
struct platform_device *ci;
@@ -40,11 +43,43 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
struct ci_hdrc_platform_data pdata;
+   struct reset_controller_dev rcdev;
bool secondary_phy;
bool hsic;
void __iomem *base;
 };
 
+static int
+ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
+{
+   struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
+   void __iomem *addr = ci_msm->base;
+   u32 val;
+
+   if (id)
+   addr += HS_PHY_SEC_CTRL;
+   else
+   addr += HS_PHY_CTRL;
+
+   val = readl_relaxed(addr);
+   val |= HS_PHY_POR_ASSERT;
+   writel(val, addr);
+   /*
+* wait for minimum 10 microseconds as suggested by manual.
+* Use a slightly larger value since the exact value didn't
+* work 100% of the time.
+*/
+   udelay(12);
+   val &= ~HS_PHY_POR_ASSERT;
+   writel(val, addr);
+
+   return 0;
+}
+
+static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
+   .reset = ci_hdrc_msm_por_reset,
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
@@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (!ci->base)
return -ENOMEM;
 
-   ret = clk_prepare_enable(ci->fs_clk);
+   ci->rcdev.owner = THIS_MODULE;
+   ci->rcdev.ops = _hdrc_msm_reset_ops;
+   ci->rcdev.of_node = pdev->dev.of_node;
+   ci->rcdev.nr_resets = 2;
+   ret = reset_controller_register(>rcdev);
if (ret)
return ret;
 
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   goto err_fs;
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
@@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ret = clk_prepare_enable(ci->core_clk);
if (ret)
-   return ret;
+   goto err_fs;
 
ret = clk_prepare_enable(ci->iface_clk);
if (ret)
@@ -236,6 +279,8 @@ err_mux:
clk_disable_unprepare(ci->iface_clk);
 err_iface:
clk_disable_unprepare(ci->core_clk);
+err_fs:
+   reset_controller_unregister(>rcdev);
return ret;
 }
 
@@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
ci_hdrc_remove_device(ci->ci);
clk_disable_unprepare(ci->iface_clk);
clk_disable_unprepare(ci->core_clk);
+   reset_controller_unregister(>rcdev);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 12/22] usb: chipidea: msm: Rely on core to override AHBBURST

[Stephen Boyd]

The core framework already handles setting this parameter with a
platform quirk. Add the appropriate flag so that we always set
AHBBURST to 0. Technically DT should be doing this, but we always
do it for msm chipidea devices so setting the flag in the driver
works just as well. If the burst needs to be anything besides 0,
we expect the 'ahb-burst-config' dts property to be present.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 89c1a02d69b5..719b20caf88e 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
-   writel(0, USB_AHBBURST);
/* use AHB transactor, allow posted data writes */
writel(0x8, USB_AHBMODE);
usb_phy_init(ci->usb_phy);
@@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.name   = "ci_hdrc_msm",
.capoffset  = DEF_CAPOFFSET,
.flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING,
+ CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST,
 
.notify_event   = ci_hdrc_msm_notify_event,
 };
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 07/22] usb: chipidea: Notify events when switching host mode

[Stephen Boyd]

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.

The intent of the reset event is to allow the wrapper driver to
do any wrapper specific things after the reset bit has been set
in the usb command register. Therefore, add this event hook in
the host role after we toggle that bit.

Similarly, the intent of the stopped event is to allow the
wrapper driver to do any wrapper specific things after the device
is stopped. So when we stop the host role, send the stopped
event.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/host.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..a1d8551ca79d 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,6 +87,9 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
if (ret)
return ret;
 
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_RESET_EVENT);
+
ci_platform_configure(ci);
 
return ret;
@@ -184,6 +187,9 @@ static void host_stop(struct ci_hdrc *ci)
struct usb_hcd *hcd = ci->hcd;
 
if (hcd) {
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci,
+   CI_HDRC_CONTROLLER_STOPPED_EVENT);
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 06/22] usb: chipidea: Add platform flag for wrapper phy management

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly.
Therefore, add a flag to skip any phy power management in the
core layer, leaving it up to the glue driver to manage.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c  | 6 ++
 include/linux/usb/chipidea.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 01390e02ee53..532085a096d9 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -361,6 +361,9 @@ static int _ci_usb_phy_init(struct ci_hdrc *ci)
  */
 static void ci_usb_phy_exit(struct ci_hdrc *ci)
 {
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return;
+
if (ci->phy) {
phy_power_off(ci->phy);
phy_exit(ci->phy);
@@ -379,6 +382,9 @@ static int ci_usb_phy_init(struct ci_hdrc *ci)
 {
int ret;
 
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return 0;
+
switch (ci->platdata->phy_mode) {
case USBPHY_INTERFACE_MODE_UTMI:
case USBPHY_INTERFACE_MODE_UTMIW:
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index f9be467d6695..d07b162073f7 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -57,6 +57,7 @@ struct ci_hdrc_platform_data {
 #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
 #define CI_HDRC_OVERRIDE_TX_BURST  BIT(10)
 #define CI_HDRC_OVERRIDE_RX_BURST  BIT(11)
+#define CI_HDRC_OVERRIDE_PHY_CONTROL   BIT(12) /* Glue layer manages phy */
enum usb_dr_modedr_mode;
 #define CI_HDRC_CONTROLLER_RESET_EVENT 0
 #define CI_HDRC_CONTROLLER_STOPPED_EVENT   1
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 14/22] usb: chipidea: msm: Add proper clk and reset support

[Stephen Boyd]

The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.

Also add support for an optional third clk that we need to turn
on to reset the controller and wrapper logic and other
"housekeeping" things. This clk was removed in later revisions of
the hardware because the reset methodology no longer required
clks to be enabled to propagate resets.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 72 +++---
 1 file changed, 68 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index b282a717bf8c..7e870a253f55 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -10,11 +10,20 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+struct ci_hdrc_msm {
+   struct platform_device *ci;
+   struct clk *core_clk;
+   struct clk *iface_clk;
+   struct clk *fs_clk;
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->gadget.dev.parent;
@@ -52,11 +61,20 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
 
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
+   struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
struct usb_phy *phy;
+   struct clk *clk;
+   struct reset_control *reset;
+   int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
+   ci = devm_kzalloc(>dev, sizeof(*ci), GFP_KERNEL);
+   if (!ci)
+   return -ENOMEM;
+   platform_set_drvdata(pdev, ci);
+
/*
 * OTG(PHY) driver takes care of PHY initialization, clock management,
 * powering up VBUS, mapping of registers address space and power
@@ -68,29 +86,75 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ci_hdrc_msm_platdata.usb_phy = phy;
 
+   reset = devm_reset_control_get(>dev, "core");
+   if (IS_ERR(reset))
+   return PTR_ERR(reset);
+
+   ci->core_clk = clk = devm_clk_get(>dev, "core");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->iface_clk = clk = devm_clk_get(>dev, "iface");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->fs_clk = clk = devm_clk_get(>dev, "fs");
+   if (IS_ERR(clk)) {
+   if (PTR_ERR(clk) == -EPROBE_DEFER)
+   return -EPROBE_DEFER;
+   ci->fs_clk = NULL;
+   }
+
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   return ret;
+
+   reset_control_assert(reset);
+   usleep_range(1, 12000);
+   reset_control_deassert(reset);
+
+   clk_disable_unprepare(ci->fs_clk);
+
+   ret = clk_prepare_enable(ci->core_clk);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(ci->iface_clk);
+   if (ret)
+   goto err_iface;
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
-   return PTR_ERR(plat_ci);
+   ret = PTR_ERR(plat_ci);
+   goto err_mux;
}
 
-   platform_set_drvdata(pdev, plat_ci);
+   ci->ci = plat_ci;
 
pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
return 0;
+
+err_mux:
+   clk_disable_unprepare(ci->iface_clk);
+err_iface:
+   clk_disable_unprepare(ci->core_clk);
+   return ret;
 }
 
 static int ci_hdrc_msm_remove(struct platform_device *pdev)
 {
-   struct platform_device *plat_ci = platform_get_drvdata(pdev);
+   struct ci_hdrc_msm *ci = platform_get_drvdata(pdev);
 
pm_runtime_disable(>dev);
-   ci_hdrc_remove_device(plat_ci);
+   ci_hdrc_remove_device(ci->ci);
+   clk_disable_unprepare(ci->iface_clk);
+   clk_disable_unprepare(ci->core_clk);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 22/22] phy: Add support for Qualcomm's USB HS phy

[Stephen Boyd]

The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hs-phy.txt|  83 ++
 drivers/phy/Kconfig|   8 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hs.c  | 289 +
 4 files changed, 381 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hs.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
new file mode 100644
index ..d7eacd63d06b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
@@ -0,0 +1,83 @@
+Qualcomm's USB HS PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hs-phy" and more specifically one of 
the
+following:
+
+"qcom,usb-hs-phy-apq8064"
+"qcom,usb-hs-phy-msm8916"
+"qcom,usb-hs-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for the reference and sleep
+clocks
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "ref" and "sleep" for the reference and sleep
+clocks respectively
+
+- resets:
+Usage: required
+Value type: 
+Definition: Should contain the phy and POR resets
+
+- reset-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy" and "por" for the phy and POR resets
+respectively
+
+- v3p3-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 3.3V supply
+
+- v1p8-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 1.8V supply
+
+- extcon:
+Usage: optional
+Value type: 
+Definition: Should contain the vbus and ID extcons in the first and second
+cells respectively
+
+- qcom,init-seq:
+Usage: optional
+Value type: 
+Definition: Should contain a sequence of ULPI register and address pairs to
+program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
+to Device Mode Eye Diagram test.
+
+EXAMPLE
+
+otg: usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hs-phy-msm8974", 
"qcom,usb-hs-phy";
+   #phy-cells = <0>;
+   clocks = <_board>, < GCC_USB2A_PHY_SLEEP_CLK>;
+   clock-names = "ref", "sleep";
+   resets = < GCC_USB2A_PHY_BCR>, < 0>;
+   reset-names = "phy", "por";
+   v3p3-supply = <_l24>;
+   v1p8-supply = <_l6>;
+   extcon = <>, <_id>;
+   qcom,init-seq = /bits/ 8 <0x81 0x63>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 830c443eeabf..ee0ec021a98c 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,14 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HS
+   tristate "Qualcomm USB HS PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB high-speed ULPI compliant phy on Qualcomm
+ chipsets.
+
 config PHY_QCOM_USB_HSIC
tristate "Qualcomm USB HSIC ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 5422f543d17d..31c84faa07fa 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HS)  += phy-qcom-usb-hs.o
 obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
diff --git a/drivers/phy/phy-qcom-usb-hs.c b/drivers/phy/phy-qcom-usb-hs.c
new file mode 100644
index ..73fb4b49a8e1
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hs.c
@@ -0,0 +1,289 @@
+/**
+ * Copyright (

[PATCH v4 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel

[Stephen Boyd]

The MSM_USB_BASE macro trick is not very clear, and we're using
it for only one register write so let's just move to using
hw_write_id_reg() and passing the ci pointer instead. That
clearly shows what offset we're using and avoids needing to
include the msm_hsusb_hw.h file when we're going to delete that
file soon.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 719b20caf88e..b282a717bf8c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,14 +8,12 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
 #include "ci.h"
 
-#define MSM_USB_BASE   (ci->hw_bank.abs)
+#define HS_PHY_AHB_MODE0x0098
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
@@ -25,7 +23,7 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
/* use AHB transactor, allow posted data writes */
-   writel(0x8, USB_AHBMODE);
+   hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 16/22] usb: chipidea: msm: Restore wrapper settings after reset

[Stephen Boyd]

When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 4b0aadc2be2f..333817291798 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,11 +14,22 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+#define HS_PHY_GENCONFIG   0x009c
+#define HS_PHY_TXFIFO_IDLE_FORCE_DIS   BIT(4)
+
+#define HS_PHY_GENCONFIG_2 0x00a0
+#define HS_PHY_SESS_VLD_CTRL_ENBIT(7)
+#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX  BIT(19)
+
+#define HSPHY_SESS_VLD_CTRLBIT(25)
+
 /* Vendor base starts at 0x200 beyond CI base */
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
@@ -29,6 +40,7 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
bool secondary_phy;
+   bool hsic;
void __iomem *base;
 };
 
@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
+
+   /* workaround for rx buffer collision issue */
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG,
+   HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
+
+   if (!msm_ci->hsic)
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
+
+   if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_SESS_VLD_CTRL_EN,
+   HS_PHY_SESS_VLD_CTRL_EN);
+   hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
+HSPHY_SESS_VLD_CTRL);
+
+   }
+
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct reset_control *reset;
struct resource *res;
int ret;
+   struct device_node *ulpi_node, *phy_node;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_mux;
 
+   ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
+   if (ulpi_node) {
+   phy_node = of_get_next_available_child(ulpi_node, NULL);
+   ci->hsic = of_device_is_compatible(phy_node, 
"qcom,usb-hsic-phy");
+   of_node_put(phy_node);
+   }
+   of_node_put(ulpi_node);
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 20/22] usb: chipidea: msm: Be silent on probe defer errors

[Stephen Boyd]

If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 316044dba0ac..f1ede7909f54 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -262,8 +262,9 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
-   dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
+   if (ret != -EPROBE_DEFER)
+   dev_err(>dev, "ci_hdrc_add_device failed!\n");
goto err_mux;
}
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 17/22] usb: chipidea: msm: Make platform data driver local instead of global

[Stephen Boyd]

If two devices are probed with this same driver, they'll share
the same platform data structure, while the chipidea core layer
writes and modifies it. This can lead to interesting results
especially if one device is an OTG type chipidea controller and
another is a host. Let's create a copy of this structure per each
device instance so that odd things don't happen.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 23 +--
 1 file changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 333817291798..2489a63d3e75 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -39,6 +39,7 @@ struct ci_hdrc_msm {
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   struct ci_hdrc_platform_data pdata;
bool secondary_phy;
bool hsic;
void __iomem *base;
@@ -94,16 +95,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
}
 }
 
-static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
-   .name   = "ci_hdrc_msm",
-   .capoffset  = DEF_CAPOFFSET,
-   .flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST,
-
-   .notify_event   = ci_hdrc_msm_notify_event,
-};
-
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
   struct platform_device *pdev)
 {
@@ -164,7 +155,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (IS_ERR(phy))
return PTR_ERR(phy);
 
-   ci_hdrc_msm_platdata.usb_phy = phy;
+   ci->pdata.name = "ci_hdrc_msm";
+   ci->pdata.capoffset = DEF_CAPOFFSET;
+   ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST;
+   ci->pdata.notify_event = ci_hdrc_msm_notify_event;
+   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
@@ -220,9 +216,8 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
}
of_node_put(ulpi_node);
 
-   plat_ci = ci_hdrc_add_device(>dev,
-   pdev->resource, pdev->num_resources,
-   _hdrc_msm_platdata);
+   plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
+pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 15/22] usb: chipidea: msm: Mux over secondary phy at the right time

[Stephen Boyd]

We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary phy) after the
RESET bit is set in USBCMD.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 62 --
 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 7e870a253f55..4b0aadc2be2f 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,29 +8,44 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+/* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_SEC_CTRL0x0078
+#define HS_PHY_DIG_CLAMP_N BIT(16)
+
 struct ci_hdrc_msm {
struct platform_device *ci;
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   bool secondary_phy;
+   void __iomem *base;
 };
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
-   struct device *dev = ci->gadget.dev.parent;
+   struct device *dev = ci->dev->parent;
+   struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+   if (msm_ci->secondary_phy) {
+   u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
@@ -59,6 +74,39 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.notify_event   = ci_hdrc_msm_notify_event,
 };
 
+static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
+  struct platform_device *pdev)
+{
+   struct regmap *regmap;
+   struct device *dev = >dev;
+   struct of_phandle_args args;
+   u32 val;
+   int ret;
+
+   ret = of_parse_phandle_with_fixed_args(dev->of_node, "phy-select", 2, 0,
+  );
+   if (ret)
+   return 0;
+
+   regmap = syscon_node_to_regmap(args.np);
+   of_node_put(args.np);
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   ret = regmap_write(regmap, args.args[0], args.args[1]);
+   if (ret)
+   return ret;
+
+   ci->secondary_phy = !!args.args[1];
+   if (ci->secondary_phy) {
+   val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL);
+   }
+
+   return 0;
+}
+
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
@@ -66,6 +114,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
+   struct resource *res;
int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
@@ -105,6 +154,11 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
ci->fs_clk = NULL;
}
 
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+   ci->base = devm_ioremap_resource(>dev, res);
+   if (!ci->base)
+   return -ENOMEM;
+
ret = clk_prepare_enable(ci->fs_clk);
if (ret)
return ret;
@@ -123,6 +177,10 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_iface;
 
+   ret = ci_hdrc_msm_mux_phy(ci, pdev);
+   if (ret)
+   goto err_mux;
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 08/22] usb: chipidea: Remove locking in ci_udc_start()

[Stephen Boyd]

We don't call hw_device_reset() with the ci->lock held, so it
doesn't seem like this lock here is protecting anything. Let's
just remove it. This allows us to call sleeping functions like
phy_init() from within the CI_HDRC_CONTROLLER_RESET_EVENT hook.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/udc.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 065f5d97aa67..f16be4710cdb 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1719,7 +1719,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
 struct usb_gadget_driver *driver)
 {
struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
-   unsigned long flags;
int retval = -ENOMEM;
 
if (driver->disconnect == NULL)
@@ -1746,7 +1745,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
 
pm_runtime_get_sync(>gadget.dev);
if (ci->vbus_active) {
-   spin_lock_irqsave(>lock, flags);
hw_device_reset(ci);
} else {
usb_udc_vbus_handler(>gadget, false);
@@ -1755,7 +1753,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
}
 
retval = hw_device_state(ci, ci->ep0out->qh.dma);
-   spin_unlock_irqrestore(>lock, flags);
if (retval)
pm_runtime_put_sync(>gadget.dev);
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v4 00/22] Support qcom's HSIC USB and rewrite USB2 HS support

[Stephen Boyd]

The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
duplicates the OTG state machine and touches the ci controller wrapper
registers when it should really be focused on the phy and the ULPI accesses
needed to get the phy working. There's also a slimmed down phy driver for
the msm8916 platform, but really the phy hardware is the same as other MSMs,
so we have two drivers doing pretty much the same thing. This leads to a
situtaion where we have the chipidea core driver, the "phy" driver, and
sometimes the ehci-msm.c driver operating the same device all at the same
time with very little coordination. This just isn't very safe and is
confusing from a driver perspective when trying to figure out who does what.
Finally, there isn't any HSIC support on platforms like apq8074 so we
should add that.

This patch series updates the ChipIdea driver and the MSM wrapper
(ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
times in the right places. To get there, we update the ChipIdea core to
have support for the ULPI phy bus introduced by Heikki. Along the way
we fix bugs with the extcon handling for peripheral and OTG mode controllers
and move the parts of phy-usb-msm.c that are touching the CI controller
wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
(phy-usb-msm.c) as a standard ULPI phy driver.

Once this series is accepted, we should be able to delete the phy-usb-msm.c,
phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
and the chipidea host core instead.

I've also sent separate patches for other minor pieces to make this
all work. The full tree can be found here[3], hacks and all to get
things working. I've tested this on the db410c, apq8074 dragonboard,
and ifc6410 with configfs gadgets and otg cables.

Patches based on v4.8-rc1

Changes from v3:

 * Picked up Acks from Peter

 * Updated extcon consolidation patch per Peter's comments

 * Folded in simplification from Heikki for ULPI DT matching

Changes from v2:

 * Added SoC specific compatibles in phy bindings

 * Dropped AVVIS patch for OTG statemachine

 * New patch to consolidate extcon handlers

 * Picked up Acks from Peter

 * Rebased onto v4.8-rc1

 * Reworked ULPI OF code to look at vid == 0 instead of pid == 0
 
 * Dropped ULPI bindings for vid and pid overrides

Changes from v1:

 * Reworked ULPI device probing to keep using vendor/product ids that
   come from DT if needed and falls back to OF style match when product id
   is 0

 * PHY init later patch was rejected so that moved to a quirk flag and
   the msm wrapper started managing the phy on/off

 * Updated clk requirements for HSIC phy in binding doc

 * Added optional clk in wrapper for "housekeeping" found on older qcom
   platforms
 
 * Bug fix to OTGSC polling function

 * Changed runtime PM patch to set as active instead of get/put

TODO:
 * DMA fails on arm64 so we need something like [1] to make it work.

 * The db410c needs a driver to toggle the onboard switch to connect
   the usb hub instead of micro port when the usb cable is disconnected

 * apq8064 platforms need a vbus regulator to really use otg and I haven't
   tried out the RPM based regulators yet

 * The HSIC phy on the apq8074 dragonboard is connected to a usb4604
   device which requires the i2c driver to probe and send an i2c
   sequence before the HSIC controller enumerates or HSIC doesn't work.
   Right now I have a hack to force the controller to probe defer
   once so that usb4604 probes first. This needs a more proper solution
   like having the DT describe a linkage between the controller and
   the usb device so we can enforce probe ordering.
 
 * OTG support requires a working VBUS supply on apq8074 dragonboard
   and that requires changes to the smbb_charger driver to support
   the OTG OVP switch as a regulator[2]. This series needs revival
   on the list so that OTG works properly on that board.

[1] https://lkml.org/lkml/2016/2/22/7
[2] 
http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.b...@sonymobile.com
[3] 
https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074


Stephen Boyd (22):
  of: device: Support loading a module with OF based modalias
  of: device: Export of_device_{get_modalias,uvent_modalias} to modules
  usb: ulpi: Support device discovery via DT
  usb: chipidea: Only read/write OTGSC from one place
  usb: chipidea: Handle extcon events properly
  usb: chipidea: Add platform flag for wrapper phy management
  usb: chipidea: Notify events when switching host mode
 

[PATCH v4 01/22] of: device: Support loading a module with OF based modalias

[Stephen Boyd]

In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to request it with the
OF based modalias instead. Add a common function that allows
anyone to request a module with the OF based modalias.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c   | 23 +++
 include/linux/of_device.h |  6 ++
 2 files changed, 29 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index fd5cfad7c403..8a22a253a830 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -226,6 +226,29 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
return tsize;
 }
 
+int of_device_request_module(struct device *dev)
+{
+   char *str;
+   ssize_t size;
+   int ret;
+
+   size = of_device_get_modalias(dev, NULL, 0);
+   if (size < 0)
+   return size;
+
+   str = kmalloc(size + 1, GFP_KERNEL);
+   if (!str)
+   return -ENOMEM;
+
+   of_device_get_modalias(dev, str, size);
+   str[size] = '\0';
+   ret = request_module(str);
+   kfree(str);
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(of_device_request_module);
+
 /**
  * of_device_uevent - Display OF related uevent information
  */
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index cc7dd687a89d..e9afbcc8de12 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -37,6 +37,7 @@ extern const void *of_device_get_match_data(const struct 
device *dev);
 
 extern ssize_t of_device_get_modalias(struct device *dev,
char *str, ssize_t len);
+extern int of_device_request_module(struct device *dev);
 
 extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env);
 extern int of_device_uevent_modalias(struct device *dev, struct 
kobj_uevent_env *env);
@@ -78,6 +79,11 @@ static inline int of_device_get_modalias(struct device *dev,
return -ENODEV;
 }
 
+static inline int of_device_request_module(struct device *dev)
+{
+   return -ENODEV;
+}
+
 static inline int of_device_uevent_modalias(struct device *dev,
   struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

[Stephen Boyd]

On 09/04, Martin Blumenstingl wrote:
> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> Expose these clocks to DT and comment out in clk driver.
> 
> Signed-off-by: Jerome Brunet <jbru...@baylibre.com>
> Signed-off-by: Martin Blumenstingl <martin.blumensti...@googlemail.com>
> ---

Assuming authorship is resolved:

Acked-by: Stephen Boyd <sb...@codeaurora.org>

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Re: [PATCH 1/7] clk: gxbb: expose USB clocks

[Stephen Boyd]

On 09/04, Martin Blumenstingl wrote:
> USB0_DDR_BRIDGE and USB1_DDR_BRIDGE1 are needed for the related
> dwc2 usb controller. USB, USB0 and USB1 are needed for the PHYs.
> Expose these clocks to DT and comment out in clk driver.
> 
> Signed-off-by: Jerome Brunet 
> Signed-off-by: Martin Blumenstingl 

Is authorship correct on this patch? Did Jerome author it
instead?

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Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

[Stephen Boyd]

On Sun, Sep 4, 2016 at 7:39 PM, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Fri, Sep 02, 2016 at 06:03:06PM -0700, Stephen Boyd wrote:
>> On Thu, Sep 1, 2016 at 8:17 PM, Peter Chen <hzpeterc...@gmail.com> wrote:
>> > On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
>> >>
>> >>
>> >>   if (cable->state)
>> >> - val |= OTGSC_ID;
>> >> + val &= ~OTGSC_ID; /* A device */
>> >>   else
>> >> - val &= ~OTGSC_ID;
>> >> + val |= OTGSC_ID; /* B device */
>
> One more comment, would you change the comment to "host" and "device"?
> Unless we are supporting OTG-compliance device, otherwise, we should
> not mention "A" or "B" for USB device.
>

Done
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Re: [PATCH v3 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

On Fri, Sep 2, 2016 at 7:09 AM, Heikki Krogerus
<heikki.kroge...@linux.intel.com> wrote:
> Hi,
>
> On Wed, Aug 31, 2016 at 05:40:17PM -0700, Stephen Boyd wrote:
>> @@ -174,14 +219,37 @@ static int ulpi_register(struct device *dev, struct 
>> ulpi *ulpi)
>>   ulpi->id.product = ulpi_read(ulpi, ULPI_PRODUCT_ID_LOW);
>>   ulpi->id.product |= ulpi_read(ulpi, ULPI_PRODUCT_ID_HIGH) << 8;
>>
>> + return 0;
>> +}
>> +
>> +static int ulpi_register(struct device *dev, struct ulpi *ulpi)
>> +{
>> + int ret;
>> +
>>   ulpi->dev.parent = dev;
>>   ulpi->dev.bus = _bus;
>>   ulpi->dev.type = _dev_type;
>>   dev_set_name(>dev, "%s.ulpi", dev_name(dev));
>>
>> + if (IS_ENABLED(CONFIG_OF)) {
>
> I don't think you need to check that in this case.
>
>> + ret = ulpi_of_register(ulpi);
>> + if (ret)
>> + return ret;
>> + }
>> +
>>   ACPI_COMPANION_SET(>dev, ACPI_COMPANION(dev));
>
> ACPI_COMPANION_SET will overwrite the primary fwnode unconditionally,
> so just to play it safe, do this before you call ulpi_of_register().

Ok.

>
>> - request_module("ulpi:v%04xp%04x", ulpi->id.vendor, ulpi->id.product);
>> + ret = ulpi_read_id(ulpi);
>> + /*
>> +  * Ignore failure in case of DT node because the device may
>> +  * not be powered up yet but we can still match by compatible
>> +  */
>> + if (ret && !ulpi->dev.of_node)
>> + return ret;
>> +
>> + if (of_device_request_module(>dev))
>> + request_module("ulpi:v%04xp%04x", ulpi->id.vendor,
>> +ulpi->id.product);
>
> I don't think this works in all cases. If of_device_request_module()
> fails and we don't have the id.vendor/product set, we should not
> register the device. It also looks a bit messy.
>
> How about just using of_device_request_module() call as fallback in
> ulpi_read_id() and moving also request_module() call there:

Sure I'll fold it in and test. Should we "goto err" if we can't read
the scratch register though? I would think that's a "real" failure and
we shouldn't try to support DT in that case.
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Re: [PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

[Stephen Boyd]

On Thu, Sep 1, 2016 at 8:17 PM, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Wed, Aug 31, 2016 at 05:40:24PM -0700, Stephen Boyd wrote:
>>
>>
>>   if (cable->state)
>> - val |= OTGSC_ID;
>> + val &= ~OTGSC_ID; /* A device */
>>   else
>> - val &= ~OTGSC_ID;
>> + val |= OTGSC_ID; /* B device */
>>
>>   if (cable->enabled)
>>   val |= OTGSC_IDIE;
>
> /**
>  * struct ci_hdrc_cable - structure for external connector cable state 
> tracking
>  * @state: current state of the line
>
> You may change the name of variable "state" to "connected", per I
> understand, it has changed to the meaning of connected status for your patch.
>

Ok sure.
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[PATCH v3 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT help alleviate this problem. In the DT case,
we'll look for a ULPI bus node underneath the device registering
the ULPI viewport (or the parent of that device to support
chipidea's device layout) and then match up the phy node
underneath that with the ULPI device that's created.

The side benefit of this is that we can use standard properties
in the phy node like clks, regulators, gpios, etc. because we
don't have firmware like ACPI to turn these things on for us. And
we can use the DT phy binding to point our phy consumer to the
phy provider.

The ULPI bus code supports native enumeration by reading the
vendor ID and product ID registers at device creation time, but
we can't be certain that those register reads will succeed if the
phy is not powered up. To avoid any problems with reading the ID
registers before the phy is powered we fallback to DT matching
when the ID reads fail.

If the ULPI spec had some generic power sequencing for these
registers we could put that into the ULPI bus layer and power up
the device before reading the ID registers. Unfortunately this
doesn't exist and the power sequence is usually device specific.
By having the vendor and product ID properties in ACPI or DT, we
can match up devices with drivers without having to read the
hardware before it's powered up and avoid this problem.

Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Cc: <devicet...@vger.kernel.org>
Cc: Rob Herring <robh...@kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 Documentation/devicetree/bindings/usb/ulpi.txt | 20 +++
 drivers/usb/common/ulpi.c  | 73 +-
 2 files changed, 91 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt

diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt 
b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index ..ca179dc4bd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,20 @@
+ULPI bus binding
+
+
+Phys that are behind a ULPI connection can be described with the following
+binding. The host controller shall have a "ulpi" named node as a child, and
+that node shall have one enabled node underneath it representing the ulpi
+device on the bus.
+
+EXAMPLE
+---
+
+usb {
+   compatible = "vendor,usb-controller";
+
+   ulpi {
+   phy {
+   compatible = "vendor,phy";
+   };
+   };
+};
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 01c0c0477a9e..33039a374847 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* -- 
*/
 
@@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
struct ulpi *ulpi = to_ulpi_dev(dev);
const struct ulpi_device_id *id;
 
+   /* Some ULPI devices don't have a vendor id so rely on OF match */
+   if (ulpi->id.vendor == 0)
+   return of_driver_match_device(dev, driver);
+
for (id = drv->id_table; id->vendor; id++)
if (id->vendor == ulpi->id.vendor &&
id->product == ulpi->id.product)
@@ -50,6 +57,11 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
 static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
 {
struct ulpi *ulpi = to_ulpi_dev(dev);
+   int ret;
+
+   ret = of_device_uevent_modalias(dev, env);
+   if (ret != -ENODEV)
+   return ret;
 
if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
   ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +72,11 @@ static int ulpi_uevent(struct device *dev, struct 
kobj_uevent_env *env)
 static int ulpi_probe(struct device *dev)
 {
struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
+   int ret;
+
+   ret = of_clk_set_defaults(dev->of_node, false);
+   if (ret < 0)
+   return ret;
 
return drv->probe(to_ulpi_dev(dev));
 }
@@ -87,8 +104,13 @@ static struct bus_type ulpi_bus = {
 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
 char *buf)
 {
+   int len;
struct ulpi *ulpi = to_ulpi_dev(dev);
 
+   len = of_device_get_modalias(dev, buf, PAGE_SIZE - 1);
+   if (len != -ENODEV)
+   return len;
+
return sprintf(buf, &quo

[PATCH v3 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules

[Stephen Boyd]

The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.or
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index 8a22a253a830..6719ab35b62e 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -225,6 +225,7 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
 
return tsize;
 }
+EXPORT_SYMBOL_GPL(of_device_get_modalias);
 
 int of_device_request_module(struct device *dev)
 {
@@ -290,6 +291,7 @@ void of_device_uevent(struct device *dev, struct 
kobj_uevent_env *env)
}
mutex_unlock(_mutex);
 }
+EXPORT_SYMBOL_GPL(of_device_uevent_modalias);
 
 int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 00/22] Support qcom's HSIC USB and rewrite USB2 HS phy support

[Stephen Boyd]

The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
duplicates the OTG state machine and touches the ci controller wrapper
registers when it should really be focused on the phy and the ULPI accesses
needed to get the phy working. There's also a slimmed down phy driver for
the msm8916 platform, but really the phy hardware is the same as other MSMs,
so we have two drivers doing pretty much the same thing. This leads to a
situtaion where we have the chipidea core driver, the "phy" driver, and
sometimes the ehci-msm.c driver operating the same device all at the same
time with very little coordination. This just isn't very safe and is
confusing from a driver perspective when trying to figure out who does what.
Finally, there isn't any HSIC support on platforms like apq8074 so we
should add that.

This patch series updates the ChipIdea driver and the MSM wrapper
(ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
times in the right places. To get there, we update the ChipIdea core to
have support for the ULPI phy bus introduced by Heikki. Along the way
we fix bugs with the extcon handling for peripheral and OTG mode controllers
and move the parts of phy-usb-msm.c that are touching the CI controller
wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
(phy-usb-msm.c) as a standard ULPI phy driver.

Once this series is accepted, we should be able to delete the phy-usb-msm.c,
phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
and the chipidea host core instead.

I've also sent separate patches for other minor pieces to make this
all work. The full tree can be found here[3], hacks and all to get
things working. I've tested this on the db410c, apq8074 dragonboard,
and ifc6410 with configfs gadgets and otg cables.

Patches based on v4.8-rc1

Changes from v2:

 * Added SoC specific compatibles in phy bindings

 * Dropped AVVIS patch for OTG statemachine

 * New patch to consolidate extcon handlers

 * Picked up Acks from Peter

 * Rebased onto v4.8-rc1

 * Reworked ULPI OF code to look at vid == 0 instead of pid == 0
 
 * Dropped ULPI bindings for vid and pid overrides

Changes from v1:

 * Reworked ULPI device probing to keep using vendor/product ids that
   come from DT if needed and falls back to OF style match when product id
   is 0

 * PHY init later patch was rejected so that moved to a quirk flag and
   the msm wrapper started managing the phy on/off

 * Updated clk requirements for HSIC phy in binding doc

 * Added optional clk in wrapper for "housekeeping" found on older qcom
   platforms
 
 * Bug fix to OTGSC polling function

 * Changed runtime PM patch to set as active instead of get/put

TODO:
 * DMA fails on arm64 so we need something like [1] to make it work.

 * The db410c needs a driver to toggle the onboard switch to connect
   the usb hub instead of micro port when the usb cable is disconnected

 * apq8064 platforms need a vbus regulator to really use otg and I haven't
   tried out the RPM based regulators yet

 * The HSIC phy on the apq8074 dragonboard is connected to a usb4604
   device which requires the i2c driver to probe and send an i2c
   sequence before the HSIC controller enumerates or HSIC doesn't work.
   Right now I have a hack to force the controller to probe defer
   once so that usb4604 probes first. This needs a more proper solution
   like having the DT describe a linkage between the controller and
   the usb device so we can enforce probe ordering.
 
 * OTG support requires a working VBUS supply on apq8074 dragonboard
   and that requires changes to the smbb_charger driver to support
   the OTG OVP switch as a regulator[2]. This series needs revival
   on the list so that OTG works properly on that board.

[1] https://lkml.org/lkml/2016/2/22/7
[2] 
http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.b...@sonymobile.com
[3] 
https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074



Stephen Boyd (22):
  of: device: Support loading a module with OF based modalias
  of: device: Export of_device_{get_modalias,uvent_modalias} to modules
  usb: ulpi: Support device discovery via device properties
  usb: chipidea: Only read/write OTGSC from one place
  usb: chipidea: Handle extcon events properly
  usb: chipidea: Add platform flag for wrapper phy management
  usb: chipidea: Notify events when switching host mode
  usb: chipidea: Remove locking in ci_udc_start()
  usb: chipidea: Add support for ULPI PHY bus
  usb: chipidea: Consolidate extcon notifiers
  usb: chipide

[PATCH v3 05/22] usb: chipidea: Handle extcon events properly

[Stephen Boyd]

We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/otg.c   | 46 +++-
 include/linux/usb/chipidea.h |  2 ++
 2 files changed, 43 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index a829607c3e4d..0cf149e8 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
+
+   if (cable->enabled)
+   val |= OTGSC_BSVIE;
+   else
+   val &= ~OTGSC_BSVIE;
}
 
cable = >platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_ID;
else
val &= ~OTGSC_ID;
+
+   if (cable->enabled)
+   val |= OTGSC_IDIE;
+   else
+   val &= ~OTGSC_IDIE;
}
 
-   return val;
+   return val & mask;
 }
 
 /**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  */
 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
 {
+   struct ci_hdrc_cable *cable;
+
+   cable = >platdata->vbus_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_BSVIS)
+   cable->changed = false;
+
+   /* Don't enable vbus interrupt if using external notifier */
+   if (data & mask & OTGSC_BSVIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_BSVIE;
+   } else if (mask & OTGSC_BSVIE) {
+   cable->enabled = false;
+   }
+   }
+
+   cable = >platdata->id_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_IDIS)
+   cable->changed = false;
+
+   /* Don't enable id interrupt if using external notifier */
+   if (data & mask & OTGSC_IDIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_IDIE;
+   } else if (mask & OTGSC_IDIE) {
+   cable->enabled = false;
+   }
+   }
+
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
 }
 
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..f9be467d6695 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -14,6 +14,7 @@ struct ci_hdrc;
  * struct ci_hdrc_cable - structure for external connector cable state tracking
  * @state: current state of the line
  * @changed: set to true when extcon event happen
+ * @enabled: set to true if we've enabled the vbus or id interrupt
  * @edev: device which generate events
  * @ci: driver state of the chipidea device
  * @nb: hold event notification callback
@@ -22,6 +23,7 @@ struct ci_hdrc;
 struct ci_hdrc_cable {
boolstate;
boolchanged;
+   boolenabled;
struct extcon_dev   *edev;
struct ci_hdrc  *ci;
struct notifier_block   nb;
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 11/22] usb: chipidea: msm: Mark device as runtime pm active

[Stephen Boyd]

We're not properly marking the glue layer/wrapper device as
runtime active, so runtime PM believes that the hardware state is
inactive when we call pm_runtime_enable() in this driver. This
causes a problem when the glue layer has a power domain
associated with it, because runtime PM will go and disable the
power domain to match the 'inactive' state of the device. Let's
mark the device as active so that runtime PM doesn't improperly
power down this device when it's actually active.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 3889809fd0c4..89c1a02d69b5 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -80,6 +80,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, plat_ci);
 
+   pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 04/22] usb: chipidea: Only read/write OTGSC from one place

[Stephen Boyd]

With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci.h   |  3 ---
 drivers/usb/chipidea/core.c | 32 
 drivers/usb/chipidea/otg.c  | 34 ++
 3 files changed, 30 insertions(+), 39 deletions(-)

diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..05bc4d631cb9 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -428,9 +428,6 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms);
-
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 69426e644d17..01390e02ee53 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -516,38 +516,6 @@ int hw_device_reset(struct ci_hdrc *ci)
return 0;
 }
 
-/**
- * hw_wait_reg: wait the register value
- *
- * Sometimes, it needs to wait register value before going on.
- * Eg, when switch to device mode, the vbus value should be lower
- * than OTGSC_BSV before connects to host.
- *
- * @ci: the controller
- * @reg: register index
- * @mask: mast bit
- * @value: the bit value to wait
- * @timeout_ms: timeout in millisecond
- *
- * This function returns an error code if timeout
- */
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms)
-{
-   unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
-
-   while (hw_read(ci, reg, mask) != value) {
-   if (time_after(jiffies, elapse)) {
-   dev_err(ci->dev, "timeout waiting for %08x in %d\n",
-   mask, reg);
-   return -ETIMEDOUT;
-   }
-   msleep(20);
-   }
-
-   return 0;
-}
-
 static irqreturn_t ci_irq(int irq, void *data)
 {
struct ci_hdrc *ci = data;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..a829607c3e4d 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -104,7 +104,31 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
usb_gadget_vbus_disconnect(>gadget);
 }
 
-#define CI_VBUS_STABLE_TIMEOUT_MS 5000
+/**
+ * When we switch to device mode, the vbus value should be lower
+ * than OTGSC_BSV before connecting to host.
+ *
+ * @ci: the controller
+ *
+ * This function returns an error code if timeout
+ */
+static int hw_wait_vbus_lower_bsv(struct ci_hdrc *ci)
+{
+   unsigned long elapse = jiffies + msecs_to_jiffies(5000);
+   u32 mask = OTGSC_BSV;
+
+   while (hw_read_otgsc(ci, mask)) {
+   if (time_after(jiffies, elapse)) {
+   dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
+   mask);
+   return -ETIMEDOUT;
+   }
+   msleep(20);
+   }
+
+   return 0;
+}
+
 static void ci_handle_id_switch(struct ci_hdrc *ci)
 {
enum ci_role role = ci_otg_role(ci);
@@ -116,9 +140,11 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
ci_role_stop(ci);
 
if (role == CI_ROLE_GADGET)
-   /* wait vbus lower than OTGSC_BSV */
-   hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
-   CI_VBUS_STABLE_TIMEOUT_MS);
+   /*
+* wait vbus lower than OTGSC_BSV before connecting
+* to host
+*/
+   hw_wait_vbus_lower_bsv(ci);
 
ci_role_start(ci, role);
}
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 01/22] of: device: Support loading a module with OF based modalias

[Stephen Boyd]

In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to request it with the
OF based modalias instead. Add a common function that allows
anyone to request a module with the OF based modalias.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c   | 23 +++
 include/linux/of_device.h |  6 ++
 2 files changed, 29 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index fd5cfad7c403..8a22a253a830 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -226,6 +226,29 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
return tsize;
 }
 
+int of_device_request_module(struct device *dev)
+{
+   char *str;
+   ssize_t size;
+   int ret;
+
+   size = of_device_get_modalias(dev, NULL, 0);
+   if (size < 0)
+   return size;
+
+   str = kmalloc(size + 1, GFP_KERNEL);
+   if (!str)
+   return -ENOMEM;
+
+   of_device_get_modalias(dev, str, size);
+   str[size] = '\0';
+   ret = request_module(str);
+   kfree(str);
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(of_device_request_module);
+
 /**
  * of_device_uevent - Display OF related uevent information
  */
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index cc7dd687a89d..e9afbcc8de12 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -37,6 +37,7 @@ extern const void *of_device_get_match_data(const struct 
device *dev);
 
 extern ssize_t of_device_get_modalias(struct device *dev,
char *str, ssize_t len);
+extern int of_device_request_module(struct device *dev);
 
 extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env);
 extern int of_device_uevent_modalias(struct device *dev, struct 
kobj_uevent_env *env);
@@ -78,6 +79,11 @@ static inline int of_device_get_modalias(struct device *dev,
return -ENODEV;
 }
 
+static inline int of_device_request_module(struct device *dev)
+{
+   return -ENODEV;
+}
+
 static inline int of_device_uevent_modalias(struct device *dev,
   struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 06/22] usb: chipidea: Add platform flag for wrapper phy management

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly.
Therefore, add a flag to skip any phy power management in the
core layer, leaving it up to the glue driver to manage.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c  | 6 ++
 include/linux/usb/chipidea.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 01390e02ee53..532085a096d9 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -361,6 +361,9 @@ static int _ci_usb_phy_init(struct ci_hdrc *ci)
  */
 static void ci_usb_phy_exit(struct ci_hdrc *ci)
 {
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return;
+
if (ci->phy) {
phy_power_off(ci->phy);
phy_exit(ci->phy);
@@ -379,6 +382,9 @@ static int ci_usb_phy_init(struct ci_hdrc *ci)
 {
int ret;
 
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return 0;
+
switch (ci->platdata->phy_mode) {
case USBPHY_INTERFACE_MODE_UTMI:
case USBPHY_INTERFACE_MODE_UTMIW:
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index f9be467d6695..d07b162073f7 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -57,6 +57,7 @@ struct ci_hdrc_platform_data {
 #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
 #define CI_HDRC_OVERRIDE_TX_BURST  BIT(10)
 #define CI_HDRC_OVERRIDE_RX_BURST  BIT(11)
+#define CI_HDRC_OVERRIDE_PHY_CONTROL   BIT(12) /* Glue layer manages phy */
enum usb_dr_modedr_mode;
 #define CI_HDRC_CONTROLLER_RESET_EVENT 0
 #define CI_HDRC_CONTROLLER_STOPPED_EVENT   1
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 12/22] usb: chipidea: msm: Rely on core to override AHBBURST

[Stephen Boyd]

The core framework already handles setting this parameter with a
platform quirk. Add the appropriate flag so that we always set
AHBBURST to 0. Technically DT should be doing this, but we always
do it for msm chipidea devices so setting the flag in the driver
works just as well. If the burst needs to be anything besides 0,
we expect the 'ahb-burst-config' dts property to be present.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 89c1a02d69b5..719b20caf88e 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
-   writel(0, USB_AHBBURST);
/* use AHB transactor, allow posted data writes */
writel(0x8, USB_AHBMODE);
usb_phy_init(ci->usb_phy);
@@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.name   = "ci_hdrc_msm",
.capoffset  = DEF_CAPOFFSET,
.flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING,
+ CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST,
 
.notify_event   = ci_hdrc_msm_notify_event,
 };
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 10/22] usb: chipidea: Consolidate extcon notifiers

[Stephen Boyd]

The two extcon notifiers are almost the same except for the
variable name for the cable structure and the id notifier inverts
the cable->state logic. Make it the same and replace two
functions with one to save some lines. This also makes it so that
the id cable state is true when the id pin is pulled low.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c | 41 ++---
 drivers/usb/chipidea/otg.c  |  4 ++--
 2 files changed, 12 insertions(+), 33 deletions(-)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index f144e1bbcc82..f3b8d7488648 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -577,35 +577,14 @@ static irqreturn_t ci_irq(int irq, void *data)
return ret;
 }
 
-static int ci_vbus_notifier(struct notifier_block *nb, unsigned long event,
-   void *ptr)
+static int ci_cable_notifier(struct notifier_block *nb, unsigned long event,
+void *ptr)
 {
-   struct ci_hdrc_cable *vbus = container_of(nb, struct ci_hdrc_cable, nb);
-   struct ci_hdrc *ci = vbus->ci;
+   struct ci_hdrc_cable *cbl = container_of(nb, struct ci_hdrc_cable, nb);
+   struct ci_hdrc *ci = cbl->ci;
 
-   if (event)
-   vbus->state = true;
-   else
-   vbus->state = false;
-
-   vbus->changed = true;
-
-   ci_irq(ci->irq, ci);
-   return NOTIFY_DONE;
-}
-
-static int ci_id_notifier(struct notifier_block *nb, unsigned long event,
- void *ptr)
-{
-   struct ci_hdrc_cable *id = container_of(nb, struct ci_hdrc_cable, nb);
-   struct ci_hdrc *ci = id->ci;
-
-   if (event)
-   id->state = false;
-   else
-   id->state = true;
-
-   id->changed = true;
+   cbl->state = event;
+   cbl->changed = true;
 
ci_irq(ci->irq, ci);
return NOTIFY_DONE;
@@ -714,7 +693,7 @@ static int ci_get_platdata(struct device *dev,
}
 
cable = >vbus_extcon;
-   cable->nb.notifier_call = ci_vbus_notifier;
+   cable->nb.notifier_call = ci_cable_notifier;
cable->edev = ext_vbus;
 
if (!IS_ERR(ext_vbus)) {
@@ -726,15 +705,15 @@ static int ci_get_platdata(struct device *dev,
}
 
cable = >id_extcon;
-   cable->nb.notifier_call = ci_id_notifier;
+   cable->nb.notifier_call = ci_cable_notifier;
cable->edev = ext_id;
 
if (!IS_ERR(ext_id)) {
ret = extcon_get_cable_state_(cable->edev, EXTCON_USB_HOST);
if (ret)
-   cable->state = false;
-   else
cable->state = true;
+   else
+   cable->state = false;
}
return 0;
 }
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 0cf149e8..fb58d6b312c2 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -63,9 +63,9 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
val &= ~OTGSC_IDIS;
 
if (cable->state)
-   val |= OTGSC_ID;
+   val &= ~OTGSC_ID; /* A device */
else
-   val &= ~OTGSC_ID;
+   val |= OTGSC_ID; /* B device */
 
if (cable->enabled)
val |= OTGSC_IDIE;
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 07/22] usb: chipidea: Notify events when switching host mode

[Stephen Boyd]

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.

The intent of the reset event is to allow the wrapper driver to
do any wrapper specific things after the reset bit has been set
in the usb command register. Therefore, add this event hook in
the host role after we toggle that bit.

Similarly, the intent of the stopped event is to allow the
wrapper driver to do any wrapper specific things after the device
is stopped. So when we stop the host role, send the stopped
event.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/host.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..a1d8551ca79d 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,6 +87,9 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
if (ret)
return ret;
 
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_RESET_EVENT);
+
ci_platform_configure(ci);
 
return ret;
@@ -184,6 +187,9 @@ static void host_stop(struct ci_hdrc *ci)
struct usb_hcd *hcd = ci->hcd;
 
if (hcd) {
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci,
+   CI_HDRC_CONTROLLER_STOPPED_EVENT);
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 09/22] usb: chipidea: Add support for ULPI PHY bus

[Stephen Boyd]

Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig  |   7 +++
 drivers/usb/chipidea/Makefile |   1 +
 drivers/usb/chipidea/ci.h |  21 
 drivers/usb/chipidea/core.c   |  31 +---
 drivers/usb/chipidea/ulpi.c   | 113 ++
 5 files changed, 167 insertions(+), 6 deletions(-)
 create mode 100644 drivers/usb/chipidea/ulpi.c

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 5e5b9eb7ebf6..19c20eaa23f2 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -38,4 +38,11 @@ config USB_CHIPIDEA_HOST
  Say Y here to enable host controller functionality of the
  ChipIdea driver.
 
+config USB_CHIPIDEA_ULPI
+   bool "ChipIdea ULPI PHY support"
+   depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
+   help
+ Say Y here if you have a ULPI PHY attached to your ChipIdea
+ controller.
+
 endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y   := core.o otg.o debug.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)+= host.o
 ci_hdrc-$(CONFIG_USB_OTG_FSM)  += otg_fsm.o
+ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI)+= ulpi.o
 
 # Glue/Bridge layers go here
 
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 05bc4d631cb9..59e22389c10b 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 /**
  * DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
OP_ENDPTLISTADDR,
OP_TTCTRL,
OP_BURSTSIZE,
+   OP_ULPI_VIEWPORT,
OP_PORTSC,
OP_DEVLC,
OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
  * @test_mode: the selected test mode
  * @platdata: platform specific information supplied by parent device
  * @vbus_active: is VBUS active
+ * @ulpi: pointer to ULPI device, if any
+ * @ulpi_ops: ULPI read/write ops for this device
  * @phy: pointer to PHY, if any
  * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
  * @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
 
struct ci_hdrc_platform_data*platdata;
int vbus_active;
+#ifdef CONFIG_USB_CHIPIDEA_ULPI
+   struct ulpi *ulpi;
+   struct ulpi_ops ulpi_ops;
+#endif
struct phy  *phy;
/* old usb_phy interface */
struct usb_phy  *usb_phy;
@@ -418,6 +427,16 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
+int ci_ulpi_init(struct ci_hdrc *ci);
+void ci_ulpi_exit(struct ci_hdrc *ci);
+int ci_ulpi_resume(struct ci_hdrc *ci);
+#else
+static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
+static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
+static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
+#endif
+
 u32 hw_read_intr_enable(struct ci_hdrc *ci);
 
 u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,6 +447,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
+void hw_phymode_configure(struct ci_hdrc *ci);
+
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 532085a096d9..f144e1bbcc82 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0x64U,
@@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0xC4U,
@@ -285,7 +287,7 @@ static int hw_device_ini

[PATCH v3 21/22] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  65 +
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 160 +
 4 files changed, 233 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..3c7cb2be4b12
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,65 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy" and more specifically one 
of the
+   following:
+
+   "qcom,usb-hsic-phy-mdm9615"
+   "qcom,usb-hsic-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy-msm8974",
+"qcom,usb-hsic-phy";
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 19bff3a10f69..830c443eeabf 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 90ae19879b0a..5422f543d17d 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..47690f9945b9
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,160 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   0x33
+
+struct qcom_usb_hsic_phy {
+   struc

[PATCH v3 22/22] phy: Add support for Qualcomm's USB HS phy

[Stephen Boyd]

The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hs-phy.txt|  83 ++
 drivers/phy/Kconfig|   8 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hs.c  | 288 +
 4 files changed, 380 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hs.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
new file mode 100644
index ..d7eacd63d06b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
@@ -0,0 +1,83 @@
+Qualcomm's USB HS PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hs-phy" and more specifically one of 
the
+following:
+
+"qcom,usb-hs-phy-apq8064"
+"qcom,usb-hs-phy-msm8916"
+"qcom,usb-hs-phy-msm8974"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for the reference and sleep
+clocks
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "ref" and "sleep" for the reference and sleep
+clocks respectively
+
+- resets:
+Usage: required
+Value type: 
+Definition: Should contain the phy and POR resets
+
+- reset-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy" and "por" for the phy and POR resets
+respectively
+
+- v3p3-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 3.3V supply
+
+- v1p8-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 1.8V supply
+
+- extcon:
+Usage: optional
+Value type: 
+Definition: Should contain the vbus and ID extcons in the first and second
+cells respectively
+
+- qcom,init-seq:
+Usage: optional
+Value type: 
+Definition: Should contain a sequence of ULPI register and address pairs to
+program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
+to Device Mode Eye Diagram test.
+
+EXAMPLE
+
+otg: usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hs-phy-msm8974", 
"qcom,usb-hs-phy";
+   #phy-cells = <0>;
+   clocks = <_board>, < GCC_USB2A_PHY_SLEEP_CLK>;
+   clock-names = "ref", "sleep";
+   resets = < GCC_USB2A_PHY_BCR>, < 0>;
+   reset-names = "phy", "por";
+   v3p3-supply = <_l24>;
+   v1p8-supply = <_l6>;
+   extcon = <>, <_id>;
+   qcom,init-seq = /bits/ 8 <0x81 0x63>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index 830c443eeabf..ee0ec021a98c 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -417,6 +417,14 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HS
+   tristate "Qualcomm USB HS PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB high-speed ULPI compliant phy on Qualcomm
+ chipsets.
+
 config PHY_QCOM_USB_HSIC
tristate "Qualcomm USB HSIC ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 5422f543d17d..31c84faa07fa 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -50,6 +50,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HS)  += phy-qcom-usb-hs.o
 obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
diff --git a/drivers/phy/phy-qcom-usb-hs.c b/drivers/phy/phy-qcom-usb-hs.c
new file mode 100644
index ..ff3917629f2d
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hs.c
@@ -0,0 +1,288 @@
+/**
+ * Copyright (

[PATCH v3 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel

[Stephen Boyd]

The MSM_USB_BASE macro trick is not very clear, and we're using
it for only one register write so let's just move to using
hw_write_id_reg() and passing the ci pointer instead. That
clearly shows what offset we're using and avoids needing to
include the msm_hsusb_hw.h file when we're going to delete that
file soon.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 719b20caf88e..b282a717bf8c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,14 +8,12 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
 #include "ci.h"
 
-#define MSM_USB_BASE   (ci->hw_bank.abs)
+#define HS_PHY_AHB_MODE0x0098
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
@@ -25,7 +23,7 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
/* use AHB transactor, allow posted data writes */
-   writel(0x8, USB_AHBMODE);
+   hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 20/22] usb: chipidea: msm: Be silent on probe defer errors

[Stephen Boyd]

If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 316044dba0ac..f1ede7909f54 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -262,8 +262,9 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
-   dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
+   if (ret != -EPROBE_DEFER)
+   dev_err(>dev, "ci_hdrc_add_device failed!\n");
goto err_mux;
}
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 14/22] usb: chipidea: msm: Add proper clk and reset support

[Stephen Boyd]

The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.

Also add support for an optional third clk that we need to turn
on to reset the controller and wrapper logic and other
"housekeeping" things. This clk was removed in later revisions of
the hardware because the reset methodology no longer required
clks to be enabled to propagate resets.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 72 +++---
 1 file changed, 68 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index b282a717bf8c..7e870a253f55 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -10,11 +10,20 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+struct ci_hdrc_msm {
+   struct platform_device *ci;
+   struct clk *core_clk;
+   struct clk *iface_clk;
+   struct clk *fs_clk;
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->gadget.dev.parent;
@@ -52,11 +61,20 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
 
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
+   struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
struct usb_phy *phy;
+   struct clk *clk;
+   struct reset_control *reset;
+   int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
+   ci = devm_kzalloc(>dev, sizeof(*ci), GFP_KERNEL);
+   if (!ci)
+   return -ENOMEM;
+   platform_set_drvdata(pdev, ci);
+
/*
 * OTG(PHY) driver takes care of PHY initialization, clock management,
 * powering up VBUS, mapping of registers address space and power
@@ -68,29 +86,75 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ci_hdrc_msm_platdata.usb_phy = phy;
 
+   reset = devm_reset_control_get(>dev, "core");
+   if (IS_ERR(reset))
+   return PTR_ERR(reset);
+
+   ci->core_clk = clk = devm_clk_get(>dev, "core");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->iface_clk = clk = devm_clk_get(>dev, "iface");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->fs_clk = clk = devm_clk_get(>dev, "fs");
+   if (IS_ERR(clk)) {
+   if (PTR_ERR(clk) == -EPROBE_DEFER)
+   return -EPROBE_DEFER;
+   ci->fs_clk = NULL;
+   }
+
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   return ret;
+
+   reset_control_assert(reset);
+   usleep_range(1, 12000);
+   reset_control_deassert(reset);
+
+   clk_disable_unprepare(ci->fs_clk);
+
+   ret = clk_prepare_enable(ci->core_clk);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(ci->iface_clk);
+   if (ret)
+   goto err_iface;
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
-   return PTR_ERR(plat_ci);
+   ret = PTR_ERR(plat_ci);
+   goto err_mux;
}
 
-   platform_set_drvdata(pdev, plat_ci);
+   ci->ci = plat_ci;
 
pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
return 0;
+
+err_mux:
+   clk_disable_unprepare(ci->iface_clk);
+err_iface:
+   clk_disable_unprepare(ci->core_clk);
+   return ret;
 }
 
 static int ci_hdrc_msm_remove(struct platform_device *pdev)
 {
-   struct platform_device *plat_ci = platform_get_drvdata(pdev);
+   struct ci_hdrc_msm *ci = platform_get_drvdata(pdev);
 
pm_runtime_disable(>dev);
-   ci_hdrc_remove_device(plat_ci);
+   ci_hdrc_remove_device(ci->ci);
+   clk_disable_unprepare(ci->iface_clk);
+   clk_disable_unprepare(ci->core_clk);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 19/22] usb: chipidea: msm: Handle phy power states

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Hook
the phy initialization into the RESET event and the phy power off
into the STOPPED event.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <sb...@codeaurora.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 40 +++---
 drivers/usb/chipidea/core.c|  8 ++--
 drivers/usb/chipidea/host.c|  8 ++--
 include/linux/usb/chipidea.h   |  2 +-
 4 files changed, 33 insertions(+), 25 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index fe96df7b530c..316044dba0ac 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -80,20 +80,33 @@ static const struct reset_control_ops ci_hdrc_msm_reset_ops 
= {
.reset = ci_hdrc_msm_por_reset,
 };
 
-static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
+static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
+   int ret;
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+
+   hw_phymode_configure(ci);
if (msm_ci->secondary_phy) {
u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
val |= HS_PHY_DIG_CLAMP_N;
writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
}
 
+   ret = phy_init(ci->phy);
+   if (ret)
+   return ret;
+
+   ret = phy_power_on(ci->phy);
+   if (ret) {
+   phy_exit(ci->phy);
+   return ret;
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
 
@@ -113,21 +126,18 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 HSPHY_SESS_VLD_CTRL);
 
}
-
-   usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n");
-   /*
-* Put the phy in non-driving mode. Otherwise host
-* may not detect soft-disconnection.
-*/
-   usb_phy_notify_disconnect(ci->usb_phy, USB_SPEED_UNKNOWN);
+   phy_power_off(ci->phy);
+   phy_exit(ci->phy);
break;
default:
dev_dbg(dev, "unknown ci_hdrc event\n");
break;
}
+
+   return 0;
 }
 
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
@@ -167,7 +177,6 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
-   struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
struct resource *res;
@@ -181,21 +190,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
return -ENOMEM;
platform_set_drvdata(pdev, ci);
 
-   /*
-* OTG(PHY) driver takes care of PHY initialization, clock management,
-* powering up VBUS, mapping of registers address space and power
-* management.
-*/
-   phy = devm_usb_get_phy_by_phandle(>dev, "usb-phy", 0);
-   if (IS_ERR(phy))
-   return PTR_ERR(phy);
-
ci->pdata.name = "ci_hdrc_msm";
ci->pdata.capoffset = DEF_CAPOFFSET;
ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST;
+ CI_HDRC_OVERRIDE_AHB_BURST |
+ CI_HDRC_OVERRIDE_PHY_CONTROL;
ci->pdata.notify_event = ci_hdrc_msm_notify_event;
-   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index f3b8d7488648..82cf39a927c6 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -327,6 +327,7 @@ void hw_phymode_configure(struct ci_hdrc *ci)
hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
}
 }
+EXPORT_SYMBOL_GPL(hw_phymode_configure);
 
 /**
  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
@@ -503,9 +504,12 @@ int hw_device_reset(struct ci_hdrc *ci)
  

[PATCH v3 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

[Stephen Boyd]

The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig   |  1 +
 drivers/usb/chipidea/ci_hdrc_msm.c | 50 --
 2 files changed, 49 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 19c20eaa23f2..fc96f5cdcb5c 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
tristate "ChipIdea Highspeed Dual Role Controller"
depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && 
!USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
select EXTCON
+   select RESET_CONTROLLER
help
  Say Y here if your system has a dual role high speed USB
  controller based on ChipIdea silicon IP. It supports:
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 2489a63d3e75..fe96df7b530c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -31,8 +32,10 @@
 #define HSPHY_SESS_VLD_CTRLBIT(25)
 
 /* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_CTRL0x0040
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
+#define HS_PHY_POR_ASSERT  BIT(0)
 
 struct ci_hdrc_msm {
struct platform_device *ci;
@@ -40,11 +43,43 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
struct ci_hdrc_platform_data pdata;
+   struct reset_controller_dev rcdev;
bool secondary_phy;
bool hsic;
void __iomem *base;
 };
 
+static int
+ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
+{
+   struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
+   void __iomem *addr = ci_msm->base;
+   u32 val;
+
+   if (id)
+   addr += HS_PHY_SEC_CTRL;
+   else
+   addr += HS_PHY_CTRL;
+
+   val = readl_relaxed(addr);
+   val |= HS_PHY_POR_ASSERT;
+   writel(val, addr);
+   /*
+* wait for minimum 10 microseconds as suggested by manual.
+* Use a slightly larger value since the exact value didn't
+* work 100% of the time.
+*/
+   udelay(12);
+   val &= ~HS_PHY_POR_ASSERT;
+   writel(val, addr);
+
+   return 0;
+}
+
+static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
+   .reset = ci_hdrc_msm_por_reset,
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
@@ -186,10 +221,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (!ci->base)
return -ENOMEM;
 
-   ret = clk_prepare_enable(ci->fs_clk);
+   ci->rcdev.owner = THIS_MODULE;
+   ci->rcdev.ops = _hdrc_msm_reset_ops;
+   ci->rcdev.of_node = pdev->dev.of_node;
+   ci->rcdev.nr_resets = 2;
+   ret = reset_controller_register(>rcdev);
if (ret)
return ret;
 
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   goto err_fs;
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
@@ -198,7 +241,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ret = clk_prepare_enable(ci->core_clk);
if (ret)
-   return ret;
+   goto err_fs;
 
ret = clk_prepare_enable(ci->iface_clk);
if (ret)
@@ -236,6 +279,8 @@ err_mux:
clk_disable_unprepare(ci->iface_clk);
 err_iface:
clk_disable_unprepare(ci->core_clk);
+err_fs:
+   reset_controller_unregister(>rcdev);
return ret;
 }
 
@@ -247,6 +292,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
ci_hdrc_remove_device(ci->ci);
clk_disable_unprepare(ci->iface_clk);
clk_disable_unprepare(ci->core_clk);
+   reset_controller_unregister(>rcdev);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 17/22] usb: chipidea: msm: Make platform data driver local instead of global

[Stephen Boyd]

If two devices are probed with this same driver, they'll share
the same platform data structure, while the chipidea core layer
writes and modifies it. This can lead to interesting results
especially if one device is an OTG type chipidea controller and
another is a host. Let's create a copy of this structure per each
device instance so that odd things don't happen.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 23 +--
 1 file changed, 9 insertions(+), 14 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 333817291798..2489a63d3e75 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -39,6 +39,7 @@ struct ci_hdrc_msm {
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   struct ci_hdrc_platform_data pdata;
bool secondary_phy;
bool hsic;
void __iomem *base;
@@ -94,16 +95,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
}
 }
 
-static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
-   .name   = "ci_hdrc_msm",
-   .capoffset  = DEF_CAPOFFSET,
-   .flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST,
-
-   .notify_event   = ci_hdrc_msm_notify_event,
-};
-
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
   struct platform_device *pdev)
 {
@@ -164,7 +155,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (IS_ERR(phy))
return PTR_ERR(phy);
 
-   ci_hdrc_msm_platdata.usb_phy = phy;
+   ci->pdata.name = "ci_hdrc_msm";
+   ci->pdata.capoffset = DEF_CAPOFFSET;
+   ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST;
+   ci->pdata.notify_event = ci_hdrc_msm_notify_event;
+   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
@@ -220,9 +216,8 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
}
of_node_put(ulpi_node);
 
-   plat_ci = ci_hdrc_add_device(>dev,
-   pdev->resource, pdev->num_resources,
-   _hdrc_msm_platdata);
+   plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
+pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 16/22] usb: chipidea: msm: Restore wrapper settings after reset

[Stephen Boyd]

When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 4b0aadc2be2f..333817291798 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,11 +14,22 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+#define HS_PHY_GENCONFIG   0x009c
+#define HS_PHY_TXFIFO_IDLE_FORCE_DIS   BIT(4)
+
+#define HS_PHY_GENCONFIG_2 0x00a0
+#define HS_PHY_SESS_VLD_CTRL_ENBIT(7)
+#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX  BIT(19)
+
+#define HSPHY_SESS_VLD_CTRLBIT(25)
+
 /* Vendor base starts at 0x200 beyond CI base */
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
@@ -29,6 +40,7 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
bool secondary_phy;
+   bool hsic;
void __iomem *base;
 };
 
@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
+
+   /* workaround for rx buffer collision issue */
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG,
+   HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
+
+   if (!msm_ci->hsic)
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
+
+   if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_SESS_VLD_CTRL_EN,
+   HS_PHY_SESS_VLD_CTRL_EN);
+   hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
+HSPHY_SESS_VLD_CTRL);
+
+   }
+
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct reset_control *reset;
struct resource *res;
int ret;
+   struct device_node *ulpi_node, *phy_node;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_mux;
 
+   ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
+   if (ulpi_node) {
+   phy_node = of_get_next_available_child(ulpi_node, NULL);
+   ci->hsic = of_device_is_compatible(phy_node, 
"qcom,usb-hsic-phy");
+   of_node_put(phy_node);
+   }
+   of_node_put(ulpi_node);
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v3 15/22] usb: chipidea: msm: Mux over secondary phy at the right time

[Stephen Boyd]

We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary phy) after the
RESET bit is set in USBCMD.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 62 --
 1 file changed, 60 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 7e870a253f55..4b0aadc2be2f 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,29 +8,44 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+/* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_SEC_CTRL0x0078
+#define HS_PHY_DIG_CLAMP_N BIT(16)
+
 struct ci_hdrc_msm {
struct platform_device *ci;
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   bool secondary_phy;
+   void __iomem *base;
 };
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
-   struct device *dev = ci->gadget.dev.parent;
+   struct device *dev = ci->dev->parent;
+   struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+   if (msm_ci->secondary_phy) {
+   u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
@@ -59,6 +74,39 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.notify_event   = ci_hdrc_msm_notify_event,
 };
 
+static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
+  struct platform_device *pdev)
+{
+   struct regmap *regmap;
+   struct device *dev = >dev;
+   struct of_phandle_args args;
+   u32 val;
+   int ret;
+
+   ret = of_parse_phandle_with_fixed_args(dev->of_node, "phy-select", 2, 0,
+  );
+   if (ret)
+   return 0;
+
+   regmap = syscon_node_to_regmap(args.np);
+   of_node_put(args.np);
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   ret = regmap_write(regmap, args.args[0], args.args[1]);
+   if (ret)
+   return ret;
+
+   ci->secondary_phy = !!args.args[1];
+   if (ci->secondary_phy) {
+   val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL);
+   }
+
+   return 0;
+}
+
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
@@ -66,6 +114,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
+   struct resource *res;
int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
@@ -105,6 +154,11 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
ci->fs_clk = NULL;
}
 
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+   ci->base = devm_ioremap_resource(>dev, res);
+   if (!ci->base)
+   return -ENOMEM;
+
ret = clk_prepare_enable(ci->fs_clk);
if (ret)
return ret;
@@ -123,6 +177,10 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_iface;
 
+   ret = ci_hdrc_msm_mux_phy(ci, pdev);
+   if (ret)
+   goto err_mux;
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
-- 
2.9.0.rc2.8.ga28705d

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Re: [PATCH v2 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

On Tue, Aug 23, 2016 at 4:06 PM, Rob Herring <r...@kernel.org> wrote:
> On Tue, Aug 23, 2016 at 3:00 PM, Stephen Boyd <stephen.b...@linaro.org> wrote:
>> On Fri, Aug 5, 2016 at 2:40 PM, Stephen Boyd <stephen.b...@linaro.org> wrote:
>>> Quoting Rob Herring (2016-07-17 19:23:55)
>>>> On Thu, Jul 07, 2016 at 03:20:54PM -0700, Stephen Boyd wrote:
>>>> > +---
>>>> > +
>>>> > +usb {
>>>> > + compatible = "vendor,usb-controller";
>>>> > +
>>>> > + ulpi {
>>>> > + phy {
>>>> > + compatible = "vendor,phy";
>>>> > + ulpi-vendor = /bits/ 16 <0x1d6b>;
>>>> > + ulpi-product = /bits/ 16 <0x0002>;
>>>> > + };
>>>> > + };
>>>>
>>>> I'm still having concerns about describing both phys and devices. If I
>>>> have a controller with 2 ports and 2 devices attached, I'd have
>>>> something like this under the USB controller:
>>>>
>>>> ulpi {
>>>> phy@1 {
>>>> };
>>>> phy@2 {
>>>> };
>>>> };
>>>
>>> My understanding is there would only be one status="ok" node on the ULPI
>>> bus for the single phy that a usb controller would have. At the least,
>>> the kernel's ULPI layer only seems to support one ULPI phy for a
>>> controller right now. So even if there are two ports, it doesn't mean
>>> there are two phys.
>>>
>>>>
>>>> dev@1 {
>>>> ...
>>>> };
>>>>
>>>> dev@2 {
>>>> ...
>>>> };
>>>>
>>>>
>>>> That doesn't seem the best, but I don't have a better suggestion. Maybe
>>>> the device nodes need to go under the phy nodes?
>>>>
>>>
>>> What if we moved the dev@1 and dev@2 to another sub node like "ports" or
>>> "usb-devices"? Legacy code can support having those devices directly
>>> underneath the usb controller, but future users would always need to put
>>> them in a different sub-node so that we can easily differentiate the
>>> different busses that a usb controller node may support?
>>>
>>> I'm not sure I see any need to relate the phy to the ports that are on
>>> the controller, but if that is needed then perhaps you're right and we
>>> should move the ports underneath the phy. USB core could be modified to
>>> go through the legacy path or through the phy, if it even exists, to
>>> find ports.
>>>
>>> Do we typically do this for other phy designs like sata or pci? The phy
>>> always seemed like a parallel thing to the logical bus that the phy is
>>> used for.
>>
>> Rob does this sound ok to you?
>
> Well, if there's only ever 1 phy under the controller, then as you had
> it is fine.
>

Ok. For ULPI I believe that's the case, but in general usb controllers
can have more than one phy.
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Re: [PATCH v2 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

On Fri, Aug 5, 2016 at 2:40 PM, Stephen Boyd <stephen.b...@linaro.org> wrote:
> Quoting Rob Herring (2016-07-17 19:23:55)
>> On Thu, Jul 07, 2016 at 03:20:54PM -0700, Stephen Boyd wrote:
>> > +---
>> > +
>> > +usb {
>> > + compatible = "vendor,usb-controller";
>> > +
>> > + ulpi {
>> > + phy {
>> > + compatible = "vendor,phy";
>> > + ulpi-vendor = /bits/ 16 <0x1d6b>;
>> > + ulpi-product = /bits/ 16 <0x0002>;
>> > + };
>> > + };
>>
>> I'm still having concerns about describing both phys and devices. If I
>> have a controller with 2 ports and 2 devices attached, I'd have
>> something like this under the USB controller:
>>
>> ulpi {
>> phy@1 {
>> };
>> phy@2 {
>> };
>> };
>
> My understanding is there would only be one status="ok" node on the ULPI
> bus for the single phy that a usb controller would have. At the least,
> the kernel's ULPI layer only seems to support one ULPI phy for a
> controller right now. So even if there are two ports, it doesn't mean
> there are two phys.
>
>>
>> dev@1 {
>> ...
>> };
>>
>> dev@2 {
>> ...
>> };
>>
>>
>> That doesn't seem the best, but I don't have a better suggestion. Maybe
>> the device nodes need to go under the phy nodes?
>>
>
> What if we moved the dev@1 and dev@2 to another sub node like "ports" or
> "usb-devices"? Legacy code can support having those devices directly
> underneath the usb controller, but future users would always need to put
> them in a different sub-node so that we can easily differentiate the
> different busses that a usb controller node may support?
>
> I'm not sure I see any need to relate the phy to the ports that are on
> the controller, but if that is needed then perhaps you're right and we
> should move the ports underneath the phy. USB core could be modified to
> go through the legacy path or through the phy, if it even exists, to
> find ports.
>
> Do we typically do this for other phy designs like sata or pci? The phy
> always seemed like a parallel thing to the logical bus that the phy is
> used for.

Rob does this sound ok to you?
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Re: [PATCH v2 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

On Fri, Aug 5, 2016 at 2:27 PM, Stephen Boyd <stephen.b...@linaro.org> wrote:
> Quoting Peter Chen (2016-07-08 02:04:58)
>> On Thu, Jul 07, 2016 at 03:20:54PM -0700, Stephen Boyd wrote:
>> > @@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct 
>> > device_driver *driver)
>> >   struct ulpi *ulpi = to_ulpi_dev(dev);
>> >   const struct ulpi_device_id *id;
>> >
>> > + /* Some ULPI devices don't have a product id so rely on OF match */
>> > + if (ulpi->id.product == 0)
>> > + return of_driver_match_device(dev, driver);
>> > +
>>
>> How about using vendor id? It can't be 0, but pid may be 0.
>> See: http://www.linux-usb.org/usb.ids
>
> Heikki suggested a product id of 0 would mean we need to use DT
> matching. Should it be changed to vendor id instead?

Any comments here?
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Re: [PATCH v5 5/6] usb: chipidea: let chipidea core device of_node equal's glue layer device of_node

[Stephen Boyd]

Quoting Peter Chen (2016-08-08 01:52:10)
> From: Peter Chen 
> 
> At device tree, we have no device node for chipidea core,
> the glue layer's node is the parent node for host and udc
> device. But in related driver, the parent device is chipidea
> core. So, in order to let the common driver get parent's node,
> we let the core's device node equals glue layer device node.
> 
> Signed-off-by: Peter Chen 
> Tested-by: Maciej S. Szmigiero 
> Tested-by Joshua Clayton 
> ---
>  drivers/usb/chipidea/core.c | 11 +++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
> index 69426e6..b189dc7 100644
> --- a/drivers/usb/chipidea/core.c
> +++ b/drivers/usb/chipidea/core.c
> @@ -954,6 +954,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
> dev_err(dev, "unable to init phy: %d\n", ret);
> return ret;
> }
> +   /*
> +* At device tree, we have no device node for chipidea core,
> +* the glue layer's node is the parent node for host and udc
> +* device. But in related driver, the parent device is chipidea
> +* core. So, in order to let the common driver get parent's node,
> +* we let the core's device node equals glue layer's node.
> +*/
> +   if (dev->parent && dev->parent->of_node)
> +   dev->of_node = dev->parent->of_node;

Can this be done earlier? Perhaps after hw_device_init() in this probe
routine? That would allow me to remove the awkward parent searching in
my ULPI DT awareness patch.
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Re: [PATCH v2 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

[Stephen Boyd]

On 10 July 2016 at 22:32, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Thu, Jul 07, 2016 at 03:21:09PM -0700, Stephen Boyd wrote:
>> @@ -40,11 +43,38 @@ struct ci_hdrc_msm {
>>   struct clk *iface_clk;
>>   struct clk *fs_clk;
>>   struct ci_hdrc_platform_data pdata;
>> + struct reset_controller_dev rcdev;
>>   bool secondary_phy;
>>   bool hsic;
>>   void __iomem *base;
>>  };
>>
>> +static int
>> +ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
>> +{
>> + struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, 
>> rcdev);
>> + void __iomem *addr = ci_msm->base;
>> + u32 val;
>> +
>> + if (id)
>> + addr += HS_PHY_SEC_CTRL;
>> + else
>> + addr += HS_PHY_CTRL;
>> +
>> + val = readl_relaxed(addr);
>> + val |= HS_PHY_POR_ASSERT;
>> + writel(val, addr);
>> + udelay(12);
>
> Does this delay is reference manual defines or experienced value?
> Do you need to comment it?
>

10us comes from the manual but we add two more from experience. I can
add a comment to that effect similar to the one above udelay(12) in
phy-msm-usb.c?
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Re: [PATCH v2 15/22] usb: chipidea: msm: Mux over secondary phy at the right time

[Stephen Boyd]

On 10 July 2016 at 21:43, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Thu, Jul 07, 2016 at 03:21:06PM -0700, Stephen Boyd wrote:
>> diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
>> b/drivers/usb/chipidea/ci_hdrc_msm.c
>> index 7e870a253f55..7708bee3ff3e 100644
>> --- a/drivers/usb/chipidea/ci_hdrc_msm.c
>> +++ b/drivers/usb/chipidea/ci_hdrc_msm.c
>> @@ -8,29 +8,44 @@
>>  #include 
>>  #include 
>>  #include 
>> -#include 
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>> +#include 
>> +#include 
>>
>>  #include "ci.h"
>>
>>  #define HS_PHY_AHB_MODE  0x0098
>>
>> +/* Vendor base starts at 0x200 beyond CI base */
>> +#define HS_PHY_SEC_CTRL  0x0078
>> +#define HS_PHY_DIG_CLAMP_N   BIT(16)
>> +
>
> Keep alignment

It's aligned in my editor, tabs vs. spaces problem?

>> @@ -123,9 +177,12 @@ static int ci_hdrc_msm_probe(struct platform_device 
>> *pdev)
>>   if (ret)
>>   goto err_iface;
>>
>> - plat_ci = ci_hdrc_add_device(>dev,
>> - pdev->resource, pdev->num_resources,
>> - _hdrc_msm_platdata);
>> + ret = ci_hdrc_msm_mux_phy(ci, pdev);
>> + if (ret)
>> + goto err_mux;
>> +
>> + plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
>> +  pdev->num_resources, 
>> _hdrc_msm_platdata);
>
> The above line has not changed.

Fixed.
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Re: [PATCH v2 10/22] usb: chipidea: Add support for ULPI PHY bus

[Stephen Boyd]

On 10 July 2016 at 20:10, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Thu, Jul 07, 2016 at 03:21:01PM -0700, Stephen Boyd wrote:
>> @@ -418,6 +427,17 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc 
>> *ci)
>>  #endif
>>  }
>>
>> +#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
>> +int ci_ulpi_init(struct ci_hdrc *ci);
>> +void ci_ulpi_exit(struct ci_hdrc *ci);
>> +int ci_ulpi_resume(struct ci_hdrc *ci);
>> +#else
>> +static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
>> +static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
>> +static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
>> +#endif
>> +
>> +
>
> One more blank line
>

Fixed.

>> @@ -911,11 +918,15 @@ static int ci_hdrc_probe(struct platform_device *pdev)
>>
>>   /* if both generic PHY and USB PHY layers aren't enabled */
>>   if (PTR_ERR(ci->phy) == -ENOSYS &&
>> - PTR_ERR(ci->usb_phy) == -ENXIO)
>> - return -ENXIO;
>> + PTR_ERR(ci->usb_phy) == -ENXIO) {
>> + ret = -ENXIO;
>> + goto ulpi_exit;
>> + }
>>
>> - if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy))
>> - return -EPROBE_DEFER;
>> + if (IS_ERR(ci->phy) && IS_ERR(ci->usb_phy)) {
>> + ret = -EPROBE_DEFER;
>> + goto ulpi_exit;
>> + }
>
> Just confirm, you try to get PHY through:
> ci->phy = devm_phy_get(dev->parent, "usb-phy");
> right?

Yes.
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Re: [PATCH 5/6] usb: chipidea: host: let the hcd know's parent device node

[Stephen Boyd]

Quoting Peter Chen (2016-07-07 02:14:51)
> diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
> index 053bac9..55120ef 100644
> --- a/drivers/usb/chipidea/host.c
> +++ b/drivers/usb/chipidea/host.c
> @@ -109,15 +109,25 @@ static int host_start(struct ci_hdrc *ci)
> struct ehci_hcd *ehci;
> struct ehci_ci_priv *priv;
> int ret;
> +   struct device *dev = ci->dev;
>  
> -   if (usb_disabled())
> +   if (usb_disabled() || !dev)

Does that ever happen?

> return -ENODEV;
>  
> -   hcd = usb_create_hcd(_ehci_hc_driver, ci->dev, dev_name(ci->dev));
> +   /*
> +* USB Core will try to get child node under roothub,
> +* but chipidea core has no of_node, and the child node
> +* for controller is located at glue layer's node which
> +* is chipidea core's parent.
> +*/
> +   if (dev->parent && dev->parent->of_node)
> +   dev->of_node = dev->parent->of_node;

Why not do this during the ci device probe? How is host special for
having an of_node for the child device.

Doing that would also make my ULPI bus DT discovery patch simpler
because we wouldn't have to search the parent of the parent for a DT
node to find the ULPI node that's a child of the ci glue device.
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[PATCH v2 01/22] of: device: Support loading a module with OF based modalias

[Stephen Boyd]

In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to request it with the
OF based modalias instead. Add a common function that allows
anyone to request a module with the OF based modalias.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c   | 23 +++
 include/linux/of_device.h |  6 ++
 2 files changed, 29 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index fd5cfad7c403..8a22a253a830 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -226,6 +226,29 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
return tsize;
 }
 
+int of_device_request_module(struct device *dev)
+{
+   char *str;
+   ssize_t size;
+   int ret;
+
+   size = of_device_get_modalias(dev, NULL, 0);
+   if (size < 0)
+   return size;
+
+   str = kmalloc(size + 1, GFP_KERNEL);
+   if (!str)
+   return -ENOMEM;
+
+   of_device_get_modalias(dev, str, size);
+   str[size] = '\0';
+   ret = request_module(str);
+   kfree(str);
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(of_device_request_module);
+
 /**
  * of_device_uevent - Display OF related uevent information
  */
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index cc7dd687a89d..e9afbcc8de12 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -37,6 +37,7 @@ extern const void *of_device_get_match_data(const struct 
device *dev);
 
 extern ssize_t of_device_get_modalias(struct device *dev,
char *str, ssize_t len);
+extern int of_device_request_module(struct device *dev);
 
 extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env);
 extern int of_device_uevent_modalias(struct device *dev, struct 
kobj_uevent_env *env);
@@ -78,6 +79,11 @@ static inline int of_device_get_modalias(struct device *dev,
return -ENODEV;
 }
 
+static inline int of_device_request_module(struct device *dev)
+{
+   return -ENODEV;
+}
+
 static inline int of_device_uevent_modalias(struct device *dev,
   struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 08/22] usb: chipidea: Remove locking in ci_udc_start()

[Stephen Boyd]

We don't call hw_device_reset() with the ci->lock held, so it
doesn't seem like this lock here is protecting anything. Let's
just remove it. This allows us to call sleeping functions like
phy_init() from within the CI_HDRC_CONTROLLER_RESET_EVENT hook.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/udc.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 065f5d97aa67..f16be4710cdb 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1719,7 +1719,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
 struct usb_gadget_driver *driver)
 {
struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
-   unsigned long flags;
int retval = -ENOMEM;
 
if (driver->disconnect == NULL)
@@ -1746,7 +1745,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
 
pm_runtime_get_sync(>gadget.dev);
if (ci->vbus_active) {
-   spin_lock_irqsave(>lock, flags);
hw_device_reset(ci);
} else {
usb_udc_vbus_handler(>gadget, false);
@@ -1755,7 +1753,6 @@ static int ci_udc_start(struct usb_gadget *gadget,
}
 
retval = hw_device_state(ci, ci->ep0out->qh.dma);
-   spin_unlock_irqrestore(>lock, flags);
if (retval)
pm_runtime_put_sync(>gadget.dev);
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 21/22] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  72 +
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 167 +
 4 files changed, 247 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..97191f31d6f8
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,72 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy"
+
+- ulpi-vendor:
+Usage: required
+Value type: 
+Definition: Should be 0x05c6
+
+- ulpi-product:
+Usage: required
+Value type: 
+Definition: Should be 0x
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy";
+   ulpi-vendor = /bits/ 16 <0x05c6>;
+   ulpi-product = /bits/ 16 <0x>;
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b869b98835f4..a2866949dc97 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -406,6 +406,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 9c3e73ccabc4..982e84a290ec 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..ea7272b36e4c
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,167 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   

[PATCH v2 05/22] usb: chipidea: Handle extcon events properly

[Stephen Boyd]

We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/otg.c   | 46 +++-
 include/linux/usb/chipidea.h |  2 ++
 2 files changed, 43 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index a6fc60934297..090fc20d9294 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
+
+   if (cable->enabled)
+   val |= OTGSC_BSVIE;
+   else
+   val &= ~OTGSC_BSVIE;
}
 
cable = >platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_ID;
else
val &= ~OTGSC_ID;
+
+   if (cable->enabled)
+   val |= OTGSC_IDIE;
+   else
+   val &= ~OTGSC_IDIE;
}
 
-   return val;
+   return val & mask;
 }
 
 /**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  */
 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
 {
+   struct ci_hdrc_cable *cable;
+
+   cable = >platdata->vbus_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_BSVIS)
+   cable->changed = false;
+
+   /* Don't enable vbus interrupt if using external notifier */
+   if (data & mask & OTGSC_BSVIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_BSVIE;
+   } else if (mask & OTGSC_BSVIE) {
+   cable->enabled = false;
+   }
+   }
+
+   cable = >platdata->id_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_IDIS)
+   cable->changed = false;
+
+   /* Don't enable id interrupt if using external notifier */
+   if (data & mask & OTGSC_IDIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_IDIE;
+   } else if (mask & OTGSC_IDIE) {
+   cable->enabled = false;
+   }
+   }
+
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
 }
 
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..f9be467d6695 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -14,6 +14,7 @@ struct ci_hdrc;
  * struct ci_hdrc_cable - structure for external connector cable state tracking
  * @state: current state of the line
  * @changed: set to true when extcon event happen
+ * @enabled: set to true if we've enabled the vbus or id interrupt
  * @edev: device which generate events
  * @ci: driver state of the chipidea device
  * @nb: hold event notification callback
@@ -22,6 +23,7 @@ struct ci_hdrc;
 struct ci_hdrc_cable {
boolstate;
boolchanged;
+   boolenabled;
struct extcon_dev   *edev;
struct ci_hdrc  *ci;
struct notifier_block   nb;
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 09/22] usb: chipidea: Kick OTG state machine for AVVIS with vbus extcon

[Stephen Boyd]

Force the OTG state machine to go forward when we're using an
extcon for vbus detection. In this case, the controller may never
raise an interrupt for AVVIS, so we need to simulate the event by
toggling the appropriate OTG fsm bits and kicking the state
machine again.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---

I think this was rejected last time around but I've kept it in the
series to continue discussion on how we're supposed to be emulating
vbus an id pin interrupts and the otgsc register.

 drivers/usb/chipidea/otg_fsm.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/usb/chipidea/otg_fsm.c b/drivers/usb/chipidea/otg_fsm.c
index de8e22ec3902..aab076fc4d82 100644
--- a/drivers/usb/chipidea/otg_fsm.c
+++ b/drivers/usb/chipidea/otg_fsm.c
@@ -475,6 +475,14 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
return;
}
}
+   /*
+* Force state machine forward if we use extcon
+* to detect vbus state (i.e. simulate AVVIS event)
+*/
+   if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
+   fsm->a_vbus_vld = 1;
+   ci_otg_queue_work(ci);
+   }
/* Disable data pulse irq */
hw_write_otgsc(ci, OTGSC_DPIE, 0);
 
@@ -486,6 +494,15 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
 
fsm->a_bus_drop = 1;
fsm->a_bus_req = 0;
+   /*
+* Force state machine forward if we use extcon
+* to detect vbus state (i.e. simulate AVVIS event)
+*/
+   if (!IS_ERR(ci->platdata->vbus_extcon.edev)) {
+   fsm->a_vbus_vld = 0;
+   fsm->b_conn = 0;
+   ci_otg_queue_work(ci);
+   }
}
 }
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 07/22] usb: chipidea: Notify events when switching host mode

[Stephen Boyd]

The chipidea/udc.c file sends a CI_HDRC_CONTROLLER_RESET_EVENT to
the wrapper drivers when it calls hw_device_reset(), but that
function is not called from chipidea/host.c. And the udc.c file
sends the CI_HDRC_CONTROLLER_STOPPED_EVENT but the host.c file
doesn't do anything.

The intent of the reset event is to allow the wrapper driver to
do any wrapper specific things after the reset bit has been set
in the usb command register. Therefore, add this event hook in
the host role after we toggle that bit.

Similarly, the intent of the stopped event is to allow the
wrapper driver to do any wrapper specific things after the device
is stopped. So when we stop the host role, send the stopped
event.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/host.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..a1d8551ca79d 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,6 +87,9 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
if (ret)
return ret;
 
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci, CI_HDRC_CONTROLLER_RESET_EVENT);
+
ci_platform_configure(ci);
 
return ret;
@@ -184,6 +187,9 @@ static void host_stop(struct ci_hdrc *ci)
struct usb_hcd *hcd = ci->hcd;
 
if (hcd) {
+   if (ci->platdata->notify_event)
+   ci->platdata->notify_event(ci,
+   CI_HDRC_CONTROLLER_STOPPED_EVENT);
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 04/22] usb: chipidea: Only read/write OTGSC from one place

[Stephen Boyd]

With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci.h   |  3 ---
 drivers/usb/chipidea/core.c | 32 
 drivers/usb/chipidea/otg.c  | 34 ++
 3 files changed, 30 insertions(+), 39 deletions(-)

diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..05bc4d631cb9 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -428,9 +428,6 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms);
-
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 69426e644d17..01390e02ee53 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -516,38 +516,6 @@ int hw_device_reset(struct ci_hdrc *ci)
return 0;
 }
 
-/**
- * hw_wait_reg: wait the register value
- *
- * Sometimes, it needs to wait register value before going on.
- * Eg, when switch to device mode, the vbus value should be lower
- * than OTGSC_BSV before connects to host.
- *
- * @ci: the controller
- * @reg: register index
- * @mask: mast bit
- * @value: the bit value to wait
- * @timeout_ms: timeout in millisecond
- *
- * This function returns an error code if timeout
- */
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms)
-{
-   unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
-
-   while (hw_read(ci, reg, mask) != value) {
-   if (time_after(jiffies, elapse)) {
-   dev_err(ci->dev, "timeout waiting for %08x in %d\n",
-   mask, reg);
-   return -ETIMEDOUT;
-   }
-   msleep(20);
-   }
-
-   return 0;
-}
-
 static irqreturn_t ci_irq(int irq, void *data)
 {
struct ci_hdrc *ci = data;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..a6fc60934297 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -104,7 +104,31 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
usb_gadget_vbus_disconnect(>gadget);
 }
 
-#define CI_VBUS_STABLE_TIMEOUT_MS 5000
+/**
+ * When we switch to device mode, the vbus value should be lower
+ * than OTGSC_BSV before connecting to host.
+ *
+ * @ci: the controller
+ *
+ * This function returns an error code if timeout
+ */
+static int hw_wait_otgsc_bsv(struct ci_hdrc *ci)
+{
+   unsigned long elapse = jiffies + msecs_to_jiffies(5000);
+   u32 mask = OTGSC_BSV;
+
+   while (hw_read_otgsc(ci, mask)) {
+   if (time_after(jiffies, elapse)) {
+   dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
+   mask);
+   return -ETIMEDOUT;
+   }
+   msleep(20);
+   }
+
+   return 0;
+}
+
 static void ci_handle_id_switch(struct ci_hdrc *ci)
 {
enum ci_role role = ci_otg_role(ci);
@@ -116,9 +140,11 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
ci_role_stop(ci);
 
if (role == CI_ROLE_GADGET)
-   /* wait vbus lower than OTGSC_BSV */
-   hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
-   CI_VBUS_STABLE_TIMEOUT_MS);
+   /*
+* wait vbus lower than OTGSC_BSV before connecting
+* to host
+*/
+   hw_wait_otgsc_bsv(ci);
 
ci_role_start(ci, role);
}
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 18/22] usb: chipidea: msm: Add reset controller for PHY POR bit

[Stephen Boyd]

The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig   |  1 +
 drivers/usb/chipidea/ci_hdrc_msm.c | 45 --
 2 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 4f8c342a8865..488ecdf56bdd 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -2,6 +2,7 @@ config USB_CHIPIDEA
tristate "ChipIdea Highspeed Dual Role Controller"
depends on ((USB_EHCI_HCD && USB_GADGET) || (USB_EHCI_HCD && 
!USB_GADGET) || (!USB_EHCI_HCD && USB_GADGET)) && HAS_DMA
select EXTCON
+   select RESET_CONTROLLER
help
  Say Y here if your system has a dual role high speed USB
  controller based on ChipIdea silicon IP. Currently, only the
diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index da2d399acdd2..ab6a7713ee5c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -31,8 +32,10 @@
 #define HSPHY_SESS_VLD_CTRLBIT(25)
 
 /* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_CTRL0x0040
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
+#define HS_PHY_POR_ASSERT  BIT(0)
 
 struct ci_hdrc_msm {
struct platform_device *ci;
@@ -40,11 +43,38 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
struct ci_hdrc_platform_data pdata;
+   struct reset_controller_dev rcdev;
bool secondary_phy;
bool hsic;
void __iomem *base;
 };
 
+static int
+ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
+{
+   struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
+   void __iomem *addr = ci_msm->base;
+   u32 val;
+
+   if (id)
+   addr += HS_PHY_SEC_CTRL;
+   else
+   addr += HS_PHY_CTRL;
+
+   val = readl_relaxed(addr);
+   val |= HS_PHY_POR_ASSERT;
+   writel(val, addr);
+   udelay(12);
+   val &= ~HS_PHY_POR_ASSERT;
+   writel(val, addr);
+
+   return 0;
+}
+
+static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
+   .reset = ci_hdrc_msm_por_reset,
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
@@ -186,10 +216,18 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (!ci->base)
return -ENOMEM;
 
-   ret = clk_prepare_enable(ci->fs_clk);
+   ci->rcdev.owner = THIS_MODULE;
+   ci->rcdev.ops = _hdrc_msm_reset_ops;
+   ci->rcdev.of_node = pdev->dev.of_node;
+   ci->rcdev.nr_resets = 2;
+   ret = reset_controller_register(>rcdev);
if (ret)
return ret;
 
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   goto err_fs;
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
@@ -198,7 +236,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ret = clk_prepare_enable(ci->core_clk);
if (ret)
-   return ret;
+   goto err_fs;
 
ret = clk_prepare_enable(ci->iface_clk);
if (ret)
@@ -236,6 +274,8 @@ err_mux:
clk_disable_unprepare(ci->iface_clk);
 err_iface:
clk_disable_unprepare(ci->core_clk);
+err_fs:
+   reset_controller_unregister(>rcdev);
return ret;
 }
 
@@ -247,6 +287,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
ci_hdrc_remove_device(ci->ci);
clk_disable_unprepare(ci->iface_clk);
clk_disable_unprepare(ci->core_clk);
+   reset_controller_unregister(>rcdev);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 06/22] usb: chipidea: Add platform flag for wrapper phy management

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly.
Therefore, add a flag to skip any phy power management in the
core layer, leaving it up to the glue driver to manage.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c  | 6 ++
 include/linux/usb/chipidea.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 01390e02ee53..532085a096d9 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -361,6 +361,9 @@ static int _ci_usb_phy_init(struct ci_hdrc *ci)
  */
 static void ci_usb_phy_exit(struct ci_hdrc *ci)
 {
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return;
+
if (ci->phy) {
phy_power_off(ci->phy);
phy_exit(ci->phy);
@@ -379,6 +382,9 @@ static int ci_usb_phy_init(struct ci_hdrc *ci)
 {
int ret;
 
+   if (ci->platdata->flags & CI_HDRC_OVERRIDE_PHY_CONTROL)
+   return 0;
+
switch (ci->platdata->phy_mode) {
case USBPHY_INTERFACE_MODE_UTMI:
case USBPHY_INTERFACE_MODE_UTMIW:
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index f9be467d6695..d07b162073f7 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -57,6 +57,7 @@ struct ci_hdrc_platform_data {
 #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
 #define CI_HDRC_OVERRIDE_TX_BURST  BIT(10)
 #define CI_HDRC_OVERRIDE_RX_BURST  BIT(11)
+#define CI_HDRC_OVERRIDE_PHY_CONTROL   BIT(12) /* Glue layer manages phy */
enum usb_dr_modedr_mode;
 #define CI_HDRC_CONTROLLER_RESET_EVENT 0
 #define CI_HDRC_CONTROLLER_STOPPED_EVENT   1
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 17/22] usb: chipidea: msm: Make platform data driver local instead of global

[Stephen Boyd]

If two devices are probed with this same driver, they'll share
the same platform data structure, while the chipidea core layer
writes and modifies it. This can lead to interesting results
especially if one device is an OTG type chipidea controller and
another is a host. Let's create a copy of this structure per each
device instance so that odd things don't happen.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 20 
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 81437c8cea82..da2d399acdd2 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -39,6 +39,7 @@ struct ci_hdrc_msm {
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   struct ci_hdrc_platform_data pdata;
bool secondary_phy;
bool hsic;
void __iomem *base;
@@ -94,16 +95,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
}
 }
 
-static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
-   .name   = "ci_hdrc_msm",
-   .capoffset  = DEF_CAPOFFSET,
-   .flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST,
-
-   .notify_event   = ci_hdrc_msm_notify_event,
-};
-
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
   struct platform_device *pdev)
 {
@@ -164,7 +155,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (IS_ERR(phy))
return PTR_ERR(phy);
 
-   ci_hdrc_msm_platdata.usb_phy = phy;
+   ci->pdata.name = "ci_hdrc_msm";
+   ci->pdata.capoffset = DEF_CAPOFFSET;
+   ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST;
+   ci->pdata.notify_event = ci_hdrc_msm_notify_event;
+   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
@@ -221,7 +217,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
of_node_put(ulpi_node);
 
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
-pdev->num_resources, 
_hdrc_msm_platdata);
+pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 19/22] usb: chipidea: msm: Handle phy power states

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Hook
the phy initialization into the RESET event and the phy power off
into the STOPPED event.

Cc: Peter Chen 
Cc: Greg Kroah-Hartman 
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 40 +++---
 drivers/usb/chipidea/core.c|  8 ++--
 drivers/usb/chipidea/host.c|  8 ++--
 include/linux/usb/chipidea.h   |  2 +-
 4 files changed, 33 insertions(+), 25 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index ab6a7713ee5c..5c486c15e043 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -75,20 +75,33 @@ static const struct reset_control_ops ci_hdrc_msm_reset_ops 
= {
.reset = ci_hdrc_msm_por_reset,
 };
 
-static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
+static int ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
+   int ret;
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+
+   hw_phymode_configure(ci);
if (msm_ci->secondary_phy) {
u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
val |= HS_PHY_DIG_CLAMP_N;
writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
}
 
+   ret = phy_init(ci->phy);
+   if (ret)
+   return ret;
+
+   ret = phy_power_on(ci->phy);
+   if (ret) {
+   phy_exit(ci->phy);
+   return ret;
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
 
@@ -108,21 +121,18 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 HSPHY_SESS_VLD_CTRL);
 
}
-
-   usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_STOPPED_EVENT received\n");
-   /*
-* Put the phy in non-driving mode. Otherwise host
-* may not detect soft-disconnection.
-*/
-   usb_phy_notify_disconnect(ci->usb_phy, USB_SPEED_UNKNOWN);
+   phy_power_off(ci->phy);
+   phy_exit(ci->phy);
break;
default:
dev_dbg(dev, "unknown ci_hdrc event\n");
break;
}
+
+   return 0;
 }
 
 static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
@@ -162,7 +172,6 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
-   struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
struct resource *res;
@@ -176,21 +185,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
return -ENOMEM;
platform_set_drvdata(pdev, ci);
 
-   /*
-* OTG(PHY) driver takes care of PHY initialization, clock management,
-* powering up VBUS, mapping of registers address space and power
-* management.
-*/
-   phy = devm_usb_get_phy_by_phandle(>dev, "usb-phy", 0);
-   if (IS_ERR(phy))
-   return PTR_ERR(phy);
-
ci->pdata.name = "ci_hdrc_msm";
ci->pdata.capoffset = DEF_CAPOFFSET;
ci->pdata.flags = CI_HDRC_REGS_SHARED | CI_HDRC_DISABLE_STREAMING |
- CI_HDRC_OVERRIDE_AHB_BURST;
+ CI_HDRC_OVERRIDE_AHB_BURST |
+ CI_HDRC_OVERRIDE_PHY_CONTROL;
ci->pdata.notify_event = ci_hdrc_msm_notify_event;
-   ci->pdata.usb_phy = phy;
 
reset = devm_reset_control_get(>dev, "core");
if (IS_ERR(reset))
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index f144e1bbcc82..0866c03d66df 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -327,6 +327,7 @@ void hw_phymode_configure(struct ci_hdrc *ci)
hw_write(ci, OP_PORTSC, PORTSC_STS, PORTSC_STS);
}
 }
+EXPORT_SYMBOL_GPL(hw_phymode_configure);
 
 /**
  * _ci_usb_phy_init: initialize phy taking in account both phy and usb_phy
@@ -503,9 +504,12 @@ int hw_device_reset(struct ci_hdrc *ci)
return ret;
}
 
-   if (ci->platdata->notify_event)
-   ci->platdata->notify_event(ci,
+   if (ci->platdata->notify_event) {
+   ret = 

[PATCH v2 12/22] usb: chipidea: msm: Rely on core to override AHBBURST

[Stephen Boyd]

The core framework already handles setting this parameter with a
platform quirk. Add the appropriate flag so that we always set
AHBBURST to 0. Technically DT should be doing this, but we always
do it for msm chipidea devices so setting the flag in the driver
works just as well.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 89c1a02d69b5..719b20caf88e 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -24,7 +24,6 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
-   writel(0, USB_AHBBURST);
/* use AHB transactor, allow posted data writes */
writel(0x8, USB_AHBMODE);
usb_phy_init(ci->usb_phy);
@@ -47,7 +46,8 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.name   = "ci_hdrc_msm",
.capoffset  = DEF_CAPOFFSET,
.flags  = CI_HDRC_REGS_SHARED |
- CI_HDRC_DISABLE_STREAMING,
+ CI_HDRC_DISABLE_STREAMING |
+ CI_HDRC_OVERRIDE_AHB_BURST,
 
.notify_event   = ci_hdrc_msm_notify_event,
 };
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 14/22] usb: chipidea: msm: Add proper clk and reset support

[Stephen Boyd]

The msm chipidea controller uses two main clks, an AHB clk to
read/write the MMIO registers and a core clk called the system
clk that drives the controller itself. Add support for these clks
as they're required in all designs.

Also add support for an optional third clk that we need to turn
on to reset the controller and wrapper logic and other
"housekeeping" things. This clk was removed in later revisions of
the hardware because the reset methodology no longer required
clks to be enabled to propagate resets.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 72 +++---
 1 file changed, 68 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index b282a717bf8c..7e870a253f55 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -10,11 +10,20 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+struct ci_hdrc_msm {
+   struct platform_device *ci;
+   struct clk *core_clk;
+   struct clk *iface_clk;
+   struct clk *fs_clk;
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->gadget.dev.parent;
@@ -52,11 +61,20 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
 
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
+   struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
struct usb_phy *phy;
+   struct clk *clk;
+   struct reset_control *reset;
+   int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
+   ci = devm_kzalloc(>dev, sizeof(*ci), GFP_KERNEL);
+   if (!ci)
+   return -ENOMEM;
+   platform_set_drvdata(pdev, ci);
+
/*
 * OTG(PHY) driver takes care of PHY initialization, clock management,
 * powering up VBUS, mapping of registers address space and power
@@ -68,29 +86,75 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
ci_hdrc_msm_platdata.usb_phy = phy;
 
+   reset = devm_reset_control_get(>dev, "core");
+   if (IS_ERR(reset))
+   return PTR_ERR(reset);
+
+   ci->core_clk = clk = devm_clk_get(>dev, "core");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->iface_clk = clk = devm_clk_get(>dev, "iface");
+   if (IS_ERR(clk))
+   return PTR_ERR(clk);
+
+   ci->fs_clk = clk = devm_clk_get(>dev, "fs");
+   if (IS_ERR(clk)) {
+   if (PTR_ERR(clk) == -EPROBE_DEFER)
+   return -EPROBE_DEFER;
+   ci->fs_clk = NULL;
+   }
+
+   ret = clk_prepare_enable(ci->fs_clk);
+   if (ret)
+   return ret;
+
+   reset_control_assert(reset);
+   usleep_range(1, 12000);
+   reset_control_deassert(reset);
+
+   clk_disable_unprepare(ci->fs_clk);
+
+   ret = clk_prepare_enable(ci->core_clk);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(ci->iface_clk);
+   if (ret)
+   goto err_iface;
+
plat_ci = ci_hdrc_add_device(>dev,
pdev->resource, pdev->num_resources,
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
-   return PTR_ERR(plat_ci);
+   ret = PTR_ERR(plat_ci);
+   goto err_mux;
}
 
-   platform_set_drvdata(pdev, plat_ci);
+   ci->ci = plat_ci;
 
pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
return 0;
+
+err_mux:
+   clk_disable_unprepare(ci->iface_clk);
+err_iface:
+   clk_disable_unprepare(ci->core_clk);
+   return ret;
 }
 
 static int ci_hdrc_msm_remove(struct platform_device *pdev)
 {
-   struct platform_device *plat_ci = platform_get_drvdata(pdev);
+   struct ci_hdrc_msm *ci = platform_get_drvdata(pdev);
 
pm_runtime_disable(>dev);
-   ci_hdrc_remove_device(plat_ci);
+   ci_hdrc_remove_device(ci->ci);
+   clk_disable_unprepare(ci->iface_clk);
+   clk_disable_unprepare(ci->core_clk);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 20/22] usb: chipidea: msm: Be silent on probe defer errors

[Stephen Boyd]

If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 5c486c15e043..d4cc45f8e65e 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -257,8 +257,9 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
-   dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
+   if (ret != -EPROBE_DEFER)
+   dev_err(>dev, "ci_hdrc_add_device failed!\n");
goto err_mux;
}
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 22/22] phy: Add support for Qualcomm's USB HS phy

[Stephen Boyd]

The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hs-phy.txt|  83 ++
 drivers/phy/Kconfig|   8 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hs.c  | 295 +
 4 files changed, 387 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hs.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
new file mode 100644
index ..a7bda9186d5b
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hs-phy.txt
@@ -0,0 +1,83 @@
+Qualcomm's USB HS PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hs-phy"
+
+- ulpi-vendor:
+Usage: required
+Value type: 
+Definition: Should be 0x05c6
+
+- ulpi-product:
+Usage: required
+Value type: 
+Definition: Should be 0x
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for the reference and sleep
+clocks
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "ref" and "sleep" for the reference and sleep
+clocks respectively
+
+- resets:
+Usage: required
+Value type: 
+Definition: Should contain the phy and POR resets
+
+- reset-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy" and "por" for the phy and POR resets
+respectively
+
+- v3p3-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 3.3V supply
+
+- v1p8-supply:
+Usage: required
+Value type: 
+Definition: Should contain a reference to the 1.8V supply
+
+- qcom,init-seq:
+Usage: optional
+Value type: 
+Definition: Should contain a sequence of ULPI register and address pairs to
+program into the ULPI_EXT_VENDOR_SPECIFIC area. This is related
+to Device Mode Eye Diagram test.
+
+EXAMPLE
+
+otg: usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hs-phy";
+   ulpi-vendor = /bits/ 16 <0x05c6>;
+   ulpi-product = /bits/ 16 <0x>;
+   #phy-cells = <0>;
+   clocks = <_board>, < GCC_USB2A_PHY_SLEEP_CLK>;
+   clock-names = "ref", "sleep";
+   resets = < GCC_USB2A_PHY_BCR>, < 0>;
+   reset-names = "phy", "por";
+   v3p3-supply = <_l24>;
+   v1p8-supply = <_l6>;
+   qcom,init-seq = /bits/ 8 <0x81 0x63>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index a2866949dc97..cfb3ded0896d 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -406,6 +406,14 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HS
+   tristate "Qualcomm USB HS PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB high-speed ULPI compliant phy on Qualcomm
+ chipsets.
+
 config PHY_QCOM_USB_HSIC
tristate "Qualcomm USB HSIC ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 982e84a290ec..21435fc0b656 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HS)  += phy-qcom-usb-hs.o
 obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
diff --git a/drivers/phy/phy-qcom-usb-hs.c b/drivers/phy/phy-qcom-usb-hs.c
new file mode 100644
index ..0585f7bce920
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hs.c
@@ -0,0 +1,295 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the

[PATCH v2 13/22] usb: chipidea: msm: Use hw_write_id_reg() instead of writel

[Stephen Boyd]

The MSM_USB_BASE macro trick is not very clear, and we're using
it for only one register write so let's just move to using
hw_write_id_reg() and passing the ci pointer instead. That
clearly shows what offset we're using and avoids needing to
include the msm_hsusb_hw.h file when we're going to delete that
file soon.

Acked-by: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 719b20caf88e..b282a717bf8c 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,14 +8,12 @@
 #include 
 #include 
 #include 
-#include 
-#include 
 #include 
 #include 
 
 #include "ci.h"
 
-#define MSM_USB_BASE   (ci->hw_bank.abs)
+#define HS_PHY_AHB_MODE0x0098
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
@@ -25,7 +23,7 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
/* use AHB transactor, allow posted data writes */
-   writel(0x8, USB_AHBMODE);
+   hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 15/22] usb: chipidea: msm: Mux over secondary phy at the right time

[Stephen Boyd]

We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary phy) after the
RESET bit is set in USBCMD.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 67 +++---
 1 file changed, 62 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 7e870a253f55..7708bee3ff3e 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,29 +8,44 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+/* Vendor base starts at 0x200 beyond CI base */
+#define HS_PHY_SEC_CTRL0x0078
+#define HS_PHY_DIG_CLAMP_N BIT(16)
+
 struct ci_hdrc_msm {
struct platform_device *ci;
struct clk *core_clk;
struct clk *iface_clk;
struct clk *fs_clk;
+   bool secondary_phy;
+   void __iomem *base;
 };
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
-   struct device *dev = ci->gadget.dev.parent;
+   struct device *dev = ci->dev->parent;
+   struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
+   if (msm_ci->secondary_phy) {
+   u32 val = readl_relaxed(msm_ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, msm_ci->base + HS_PHY_SEC_CTRL);
+   }
+
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
usb_phy_init(ci->usb_phy);
@@ -59,6 +74,39 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.notify_event   = ci_hdrc_msm_notify_event,
 };
 
+static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
+  struct platform_device *pdev)
+{
+   struct regmap *regmap;
+   struct device *dev = >dev;
+   struct of_phandle_args args;
+   u32 val;
+   int ret;
+
+   ret = of_parse_phandle_with_fixed_args(dev->of_node, "phy-select", 2, 0,
+  );
+   if (ret)
+   return 0;
+
+   regmap = syscon_node_to_regmap(args.np);
+   of_node_put(args.np);
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   ret = regmap_write(regmap, args.args[0], args.args[1]);
+   if (ret)
+   return ret;
+
+   ci->secondary_phy = !!args.args[1];
+   if (ci->secondary_phy) {
+   val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL);
+   }
+
+   return 0;
+}
+
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
@@ -66,6 +114,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct usb_phy *phy;
struct clk *clk;
struct reset_control *reset;
+   struct resource *res;
int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
@@ -105,6 +154,11 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
ci->fs_clk = NULL;
}
 
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+   ci->base = devm_ioremap_resource(>dev, res);
+   if (!ci->base)
+   return -ENOMEM;
+
ret = clk_prepare_enable(ci->fs_clk);
if (ret)
return ret;
@@ -123,9 +177,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_iface;
 
-   plat_ci = ci_hdrc_add_device(>dev,
-   pdev->resource, pdev->num_resources,
-   _hdrc_msm_platdata);
+   ret = ci_hdrc_msm_mux_phy(ci, pdev);
+   if (ret)
+   goto err_mux;
+
+   plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
+pdev->num_resources, 
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 11/22] usb: chipidea: msm: Mark device as runtime pm active

[Stephen Boyd]

We're not properly marking the glue layer/wrapper device as
runtime active, so runtime PM believes that the hardware state is
inactive when we call pm_runtime_enable() in this driver. This
causes a problem when the glue layer has a power domain
associated with it, because runtime PM will go and disable the
power domain to match the 'inactive' state of the device. Let's
mark the device as active so that runtime PM doesn't improperly
power down this device when it's actually active.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 3889809fd0c4..89c1a02d69b5 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -80,6 +80,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
 
platform_set_drvdata(pdev, plat_ci);
 
+   pm_runtime_set_active(>dev);
pm_runtime_no_callbacks(>dev);
pm_runtime_enable(>dev);
 
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 16/22] usb: chipidea: msm: Restore wrapper settings after reset

[Stephen Boyd]

When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 39 ++
 1 file changed, 39 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 7708bee3ff3e..81437c8cea82 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,11 +14,22 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
 
+#define HS_PHY_GENCONFIG   0x009c
+#define HS_PHY_TXFIFO_IDLE_FORCE_DIS   BIT(4)
+
+#define HS_PHY_GENCONFIG_2 0x00a0
+#define HS_PHY_SESS_VLD_CTRL_ENBIT(7)
+#define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX  BIT(19)
+
+#define HSPHY_SESS_VLD_CTRLBIT(25)
+
 /* Vendor base starts at 0x200 beyond CI base */
 #define HS_PHY_SEC_CTRL0x0078
 #define HS_PHY_DIG_CLAMP_N BIT(16)
@@ -29,6 +40,7 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct clk *fs_clk;
bool secondary_phy;
+   bool hsic;
void __iomem *base;
 };
 
@@ -48,6 +60,24 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
 
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
+
+   /* workaround for rx buffer collision issue */
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG,
+   HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
+
+   if (!msm_ci->hsic)
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
+
+   if (ci->platdata->vbus_extcon.edev) {
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_SESS_VLD_CTRL_EN,
+   HS_PHY_SESS_VLD_CTRL_EN);
+   hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
+HSPHY_SESS_VLD_CTRL);
+
+   }
+
usb_phy_init(ci->usb_phy);
break;
case CI_HDRC_CONTROLLER_STOPPED_EVENT:
@@ -116,6 +146,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
struct reset_control *reset;
struct resource *res;
int ret;
+   struct device_node *ulpi_node, *phy_node;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
@@ -181,6 +212,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_mux;
 
+   ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
+   if (ulpi_node) {
+   phy_node = of_get_next_available_child(ulpi_node, NULL);
+   ci->hsic = of_device_is_compatible(phy_node, 
"qcom,usb-hsic-phy");
+   of_node_put(phy_node);
+   }
+   of_node_put(ulpi_node);
+
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, 
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 03/22] usb: ulpi: Support device discovery via device properties

[Stephen Boyd]

The qcom HSIC ULPI phy doesn't have any bits set in the vendor or
product ID registers. This makes it impossible to make a ULPI
driver match against the ID registers. Add support to discover
the ULPI phys via DT/device properties to help alleviate this
problem. In the DT case, we'll look for a ULPI bus node
underneath the device registering the ULPI viewport (or the
parent of that device to support chipidea's device layout) and
then match up the phy node underneath that with the ULPI device
that's created.

The side benefit of this is that we can use standard properties
in the phy node like clks, regulators, gpios, etc. because we
don't have firmware like ACPI to turn these things on for us. And
we can use the DT phy binding to point our phy consumer to the
phy provider.

Furthermore, this avoids any problems with reading the ID
registers before the phy is powered up. The ULPI bus supports
native enumeration by reading the vendor ID and product ID
registers at device creation time, but we can't be certain that
those register reads will succeed if the phy is not powered.

If the ULPI spec had some generic power sequencing for these
registers we could put that into the ULPI bus layer and power up
the device before reading the ID registers. Unfortunately this
doesn't exist and the power sequence is usually device specific.
By having the vendor and product ID properties in ACPI or DT, we
can match up devices with drivers without having to read the
hardware before it's powered up and avoid this problem.

Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Cc: <devicet...@vger.kernel.org>
Cc: Rob Herring <robh...@kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 Documentation/devicetree/bindings/usb/ulpi.txt | 35 
 drivers/usb/common/ulpi.c  | 74 +-
 2 files changed, 107 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt

diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt 
b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index ..c649ca5b0996
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,35 @@
+ULPI bus binding
+
+
+Phys that are behind a ULPI connection can be described with the following
+binding. The host controller shall have a "ulpi" named node as a child, and
+that node shall have one enabled node underneath it representing the ulpi
+device on the bus.
+
+PROPERTIES
+--
+
+- ulpi-vendor:
+Usage: optional
+Value type: 
+Definition: The USB-IF assigned vendor id for this device
+
+- ulpi-product:
+Usage: required if ulpi-vendor is present
+Value type: 
+Definition: The vendor assigned product id for this device
+
+EXAMPLE
+---
+
+usb {
+   compatible = "vendor,usb-controller";
+
+   ulpi {
+   phy {
+   compatible = "vendor,phy";
+   ulpi-vendor = /bits/ 16 <0x1d6b>;
+   ulpi-product = /bits/ 16 <0x0002>;
+   };
+   };
+};
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 01c0c0477a9e..3e8dd7b57aaf 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* -- 
*/
 
@@ -39,6 +42,10 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
struct ulpi *ulpi = to_ulpi_dev(dev);
const struct ulpi_device_id *id;
 
+   /* Some ULPI devices don't have a product id so rely on OF match */
+   if (ulpi->id.product == 0)
+   return of_driver_match_device(dev, driver);
+
for (id = drv->id_table; id->vendor; id++)
if (id->vendor == ulpi->id.vendor &&
id->product == ulpi->id.product)
@@ -50,6 +57,11 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
 static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
 {
struct ulpi *ulpi = to_ulpi_dev(dev);
+   int ret;
+
+   ret = of_device_uevent_modalias(dev, env);
+   if (ret != -ENODEV)
+   return ret;
 
if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
   ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +72,11 @@ static int ulpi_uevent(struct device *dev, struct 
kobj_uevent_env *env)
 static int ulpi_probe(struct device *dev)
 {
struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
+   int ret;
+
+   ret = of_clk_set_defaults(dev->of_node, false);
+   if (ret < 0)
+   return ret;
 
return drv->probe(to_ulpi_dev(dev));
 }
@@ -87

[PATCH v2 02/22] of: device: Export of_device_{get_modalias,uvent_modalias} to modules

[Stephen Boyd]

The ULPI bus can be built as a module, and it will soon be
calling these functions when it supports probing devices from DT.
Export them so they can be used by the ULPI module.

Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index 8a22a253a830..6719ab35b62e 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -225,6 +225,7 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
 
return tsize;
 }
+EXPORT_SYMBOL_GPL(of_device_get_modalias);
 
 int of_device_request_module(struct device *dev)
 {
@@ -290,6 +291,7 @@ void of_device_uevent(struct device *dev, struct 
kobj_uevent_env *env)
}
mutex_unlock(_mutex);
 }
+EXPORT_SYMBOL_GPL(of_device_uevent_modalias);
 
 int of_device_uevent_modalias(struct device *dev, struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH v2 10/22] usb: chipidea: Add support for ULPI PHY bus

[Stephen Boyd]

Some phys for the chipidea controller are controlled via the ULPI
viewport. Add support for the ULPI bus so that these sorts of
phys can be probed and read/written automatically without having
to duplicate the viewport logic in each phy driver.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/Kconfig  |   7 +++
 drivers/usb/chipidea/Makefile |   1 +
 drivers/usb/chipidea/ci.h |  22 
 drivers/usb/chipidea/core.c   |  31 +---
 drivers/usb/chipidea/ulpi.c   | 113 ++
 5 files changed, 168 insertions(+), 6 deletions(-)
 create mode 100644 drivers/usb/chipidea/ulpi.c

diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 3644a3500b70..4f8c342a8865 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -37,4 +37,11 @@ config USB_CHIPIDEA_HOST
  Say Y here to enable host controller functionality of the
  ChipIdea driver.
 
+config USB_CHIPIDEA_ULPI
+   bool "ChipIdea ULPI PHY support"
+   depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_CHIPIDEA
+   help
+ Say Y here if you have a ULPI PHY attached to your ChipIdea
+ controller.
+
 endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index 518e445476c3..39fca5715ed3 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -4,6 +4,7 @@ ci_hdrc-y   := core.o otg.o debug.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
 ci_hdrc-$(CONFIG_USB_CHIPIDEA_HOST)+= host.o
 ci_hdrc-$(CONFIG_USB_OTG_FSM)  += otg_fsm.o
+ci_hdrc-$(CONFIG_USB_CHIPIDEA_ULPI)+= ulpi.o
 
 # Glue/Bridge layers go here
 
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index 05bc4d631cb9..637dd7675e71 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -18,6 +18,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 /**
  * DEFINE
@@ -52,6 +54,7 @@ enum ci_hw_regs {
OP_ENDPTLISTADDR,
OP_TTCTRL,
OP_BURSTSIZE,
+   OP_ULPI_VIEWPORT,
OP_PORTSC,
OP_DEVLC,
OP_OTGSC,
@@ -187,6 +190,8 @@ struct hw_bank {
  * @test_mode: the selected test mode
  * @platdata: platform specific information supplied by parent device
  * @vbus_active: is VBUS active
+ * @ulpi: pointer to ULPI device, if any
+ * @ulpi_ops: ULPI read/write ops for this device
  * @phy: pointer to PHY, if any
  * @usb_phy: pointer to USB PHY, if any and if using the USB PHY framework
  * @hcd: pointer to usb_hcd for ehci host driver
@@ -236,6 +241,10 @@ struct ci_hdrc {
 
struct ci_hdrc_platform_data*platdata;
int vbus_active;
+#ifdef CONFIG_USB_CHIPIDEA_ULPI
+   struct ulpi *ulpi;
+   struct ulpi_ops ulpi_ops;
+#endif
struct phy  *phy;
/* old usb_phy interface */
struct usb_phy  *usb_phy;
@@ -418,6 +427,17 @@ static inline bool ci_otg_is_fsm_mode(struct ci_hdrc *ci)
 #endif
 }
 
+#if IS_ENABLED(CONFIG_USB_CHIPIDEA_ULPI)
+int ci_ulpi_init(struct ci_hdrc *ci);
+void ci_ulpi_exit(struct ci_hdrc *ci);
+int ci_ulpi_resume(struct ci_hdrc *ci);
+#else
+static inline int ci_ulpi_init(struct ci_hdrc *ci) { return 0; }
+static inline void ci_ulpi_exit(struct ci_hdrc *ci) { }
+static inline int ci_ulpi_resume(struct ci_hdrc *ci) { return 0; }
+#endif
+
+
 u32 hw_read_intr_enable(struct ci_hdrc *ci);
 
 u32 hw_read_intr_status(struct ci_hdrc *ci);
@@ -428,6 +448,8 @@ int hw_port_test_set(struct ci_hdrc *ci, u8 mode);
 
 u8 hw_port_test_get(struct ci_hdrc *ci);
 
+void hw_phymode_configure(struct ci_hdrc *ci);
+
 void ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 532085a096d9..f144e1bbcc82 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -86,6 +86,7 @@ static const u8 ci_regs_nolpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0x64U,
@@ -110,6 +111,7 @@ static const u8 ci_regs_lpm[] = {
[OP_ENDPTLISTADDR]  = 0x18U,
[OP_TTCTRL] = 0x1CU,
[OP_BURSTSIZE]  = 0x20U,
+   [OP_ULPI_VIEWPORT]  = 0x30U,
[OP_PORTSC] = 0x44U,
[OP_DEVLC]  = 0x84U,
[OP_OTGSC]  = 0xC4U,
@@ -285,7 +287,7 @@ static int hw_de

[PATCH v2 00/22] Support qcom's HSIC USB and rewrite USB2 HS phy support

[Stephen Boyd]

The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
duplicates the OTG state machine and touches the ci controller wrapper
registers when it should really be focused on the phy and the ULPI accesses
needed to get the phy working. There's also a slimmed down phy driver for
the msm8916 platform, but really the phy hardware is the same as other MSMs,
so we have two drivers doing pretty much the same thing. This leads to a
situtaion where we have the chipidea core driver, the "phy" driver, and
sometimes the ehci-msm.c driver operating the same device all at the same
time with very little coordination. This just isn't very safe and is
confusing from a driver perspective when trying to figure out who does what.
Finally, there isn't any HSIC support on platforms like apq8074 so we
should add that.

This patch series updates the ChipIdea driver and the MSM wrapper
(ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
times in the right places. To get there, we update the ChipIdea core to
have support for the ULPI phy bus introduced by Heikki. Along the way
we fix bugs with the extcon handling for peripheral and OTG mode controllers
and move the parts of phy-usb-msm.c that are touching the CI controller
wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
(phy-usb-msm.c) as a standard ULPI phy driver.

Once this series is accepted, we should be able to delete the phy-usb-msm.c,
phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
and the chipidea host core instead.

I've also sent separate patches for other minor pieces to make this
all work. The full tree can be found here[3], hacks and all to get
things working. I've tested this on the db410c, apq8074 dragonboard,
and ifc6410 with configfs gadgets and otg cables.

Changes from v1:

 * Reworked ULPI device probing to keep using vendor/product ids that
   come from DT if needed and falls back to OF style match when product id
   is 0

 * PHY init later patch was rejected so that moved to a quirk flag and
   the msm wrapper started managing the phy on/off

 * Updated clk requirements for HSIC phy in binding doc

 * Added optional clk in wrapper for "housekeeping" found on older qcom
   platforms
 
 * Bug fix to otgsc polling function

 * Changed runtime PM patch to set as active instead of get/put

TODO:
 * DMA fails on arm64 so we need something like [1] to make it work.

 * The db410c needs a driver to toggle the onboard switch to connect
   the usb hub instead of micro port when the usb cable is disconnected

 * apq8064 platforms need a vbus regulator to really use otg and I haven't
   tried out the RPM based regulators yet

 * The HSIC phy on the apq8074 dragonboard is connected to a usb4604
   device which requires the i2c driver to probe and send an i2c
   sequence before the HSIC controller enumerates or HSIC doesn't work.
   Right now I have a hack to force the controller to probe defer
   once so that usb4604 probes first. This needs a more proper solution
   like having the DT describe a linkage between the controller and
   the usb device so we can enforce probe ordering.
 
 * OTG support requires a working VBUS supply on apq8074 dragonboard
   and that requires changes to the smbb_charger driver to support
   the OTG OVP switch as a regulator[2]. This series needs revival
   on the list so that OTG works properly on that board.

[1] https://lkml.org/lkml/2016/2/22/7
[2] 
http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.b...@sonymobile.com
[3] 
https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074

Stephen Boyd (22):
  of: device: Support loading a module with OF based modalias
  of: device: Export of_device_{get_modalias,uvent_modalias} to modules
  usb: ulpi: Support device discovery via device properties
  usb: chipidea: Only read/write OTGSC from one place
  usb: chipidea: Handle extcon events properly
  usb: chipidea: Add platform flag for wrapper phy management
  usb: chipidea: Notify events when switching host mode
  usb: chipidea: Remove locking in ci_udc_start()
  usb: chipidea: Kick OTG state machine for AVVIS with vbus extcon
  usb: chipidea: Add support for ULPI PHY bus
  usb: chipidea: msm: Mark device as runtime pm active
  usb: chipidea: msm: Rely on core to override AHBBURST
  usb: chipidea: msm: Use hw_write_id_reg() instead of writel
  usb: chipidea: msm: Add proper clk and reset support
  usb: chipidea: msm: Mux over secondary phy at the right time
  usb: chipidea: msm: Restore wrapper settings after reset
  usb

Re: [PATCH 16/21] usb: chipidea: msm: Restore wrapper settings after reset

[Stephen Boyd]

On 30 June 2016 at 01:54, Peter Chen <hzpeterc...@gmail.com> wrote:
> On Wed, Jun 29, 2016 at 12:13:45PM -0700, Stephen Boyd wrote:
>> Quoting Peter Chen (2016-06-29 01:26:48
>> > Why not using ci->platdata->vbus_extcon directly?
>>
>> Because ci->platdata->vbus_extcon is assigned after the child platform
>> driver probes, and we have no idea when that will happen from the
>> ci_hdrc_msm driver probe. If we try after ci_hdrc_add_device() we'll
>> race with the driver probe and only get the pointer sometimes.
>
> ci->platdata->vbus_extcon->edev is assigned at ci_get_platdata which is
> called before ci core device is created.
>

Ok.
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Re: [PATCH 20/21] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

Quoting Neil Armstrong (2016-06-29 02:16:51)
> On 06/28/2016 11:58 PM, Stephen Boyd wrote:
> > Quoting Neil Armstrong (2016-06-28 01:49:37)
> >> On 06/26/2016 09:28 AM, Stephen Boyd wrote:
> >>> + uphy->cal_sleep_clk = clk = devm_clk_get(>dev, "cal_sleep");
> >>> + if (IS_ERR(clk))
> >>> + return PTR_ERR(clk);
> >>
> >> Hi Stephen,
> >>
> >> In the bindings the cal_sleep is marked optional, and I think should be 
> >> since AFAIK
> >> it's not present on MDM9615 for example.
> > 
> > The cal_sleep clk is just the sleep clk then (should be a board clk in
> > DT). Sometimes there's a gate in GCC to allow us to turn it off, other
> > times there isn't. Either way, it's always wired there so I'll update
> > the binding to say it isn't optional.
> 
> Sorry I don't understand !
> What should I do if GCC does not provide a gate here ? And looking at the 
> driver, it could be optional.

You should set the property to point to _clk which should be under
the "clocks" node at the root of the OF tree. For example, see the
sleep_clk node in arch/arm/boot/dts/qcom-apq8064.dtsi.
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Re: [PATCH 20/21] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

Quoting Neil Armstrong (2016-06-28 01:49:37)
> On 06/26/2016 09:28 AM, Stephen Boyd wrote:
> > + uphy->cal_sleep_clk = clk = devm_clk_get(>dev, "cal_sleep");
> > + if (IS_ERR(clk))
> > + return PTR_ERR(clk);
> 
> Hi Stephen,
> 
> In the bindings the cal_sleep is marked optional, and I think should be since 
> AFAIK
> it's not present on MDM9615 for example.

The cal_sleep clk is just the sleep clk then (should be a board clk in
DT). Sometimes there's a gate in GCC to allow us to turn it off, other
times there isn't. Either way, it's always wired there so I'll update
the binding to say it isn't optional.

> 
> Also MDM9615 HSIC requires "core", "alt-core", "phy", "cal" and "iface" 
> clocks.
> I assume "core" can be attributed to the main chipidea node, but I think 
> "alt-core" and "iface" should be also optionnal.

Looking at the downstream sources I see this:

"core_clk" -> usb_hsic_sys_clk
"iface_clk"-> usb_hsic_p_clk
"alt_core_clk" -> usb_hsic_xcvr_clk

"cal_clk"  -> usb_hsic_hsio_cal_clk
"phy_clk"  -> usb_hsic_clk

"core_clk" would be the core clk in ci_hdrc_msm. "iface_clk" would be
the iface clk in ci_hdrc_msm. "cal_clk" would be the cal clk in the hsic
phy and "phy_clk" would be the phy clk in the hsic phy.

That leaves alt_core_clk which seems to be a clock that needs to be on
during the reset assert/deassert and possibly for LPM and USB1.1 FS
modes. Sometimes it's referred to as the "housekeeping" clk. Due to the
way resets are done on msm8974 and later SoCs it looks like this clk was
removed. I can make this an optional clk in the ci_hdrc_msm driver, or
we can have two versions of the ci_hdrc_msm compatible string, one for a
device that has the housekeeping clk and one for the device that
doesn't.

> 
> Finally, it misses an optional reset line AFAIK mandatory on MDM9615.
> 

>From what I can tell downstream, all those clks point to the same bit 0
of HSIC_RESET register? So there isn't any phy reset, just the chipidea
controller wrapper reset bit, which should go into the wrapper node?
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[PATCH] usb: otg-fsm: Cancel HNP polling work when not used

[Stephen Boyd]

We setup the HNP polling worker, but we never stop it. The OTG
state machine can go round and round and keep reinitializing the
worker even while it's actively running. That's bad, and debug
objects catches it. Fix this by canceling the work when we leave
the A_HOST or B_HOST states.

[otg_set_state]  Set state: a_wait_bcon
usb 2-1: USB disconnect, device number 2
[otg_statemachine]  quit statemachine, changed = 1
[otg_set_state]  Set state: a_host

[otg_statemachine]  quit statemachine, changed = 1
usb 2-1: new low-speed USB device number 3 using ci_hdrc
usb 2-1: New USB device found, idVendor=03f0, idProduct=134a
usb 2-1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 2-1: Product: HP USB Optical Mouse
usb 2-1: Manufacturer: PixArt
input: PixArt HP USB Optical Mouse as 
/devices/platform/soc/f9a55000.usb/ci_hdrc.0/usb2/2-1/2-1:1.0/0003:03F0:134A.0002/input/input1
hid-generic 0003:03F0:134A.0002: input: USB HID v1.11 Mouse [PixArt HP USB 
Optical Mouse] on usb-ci_hdrc.0-1/input0
[otg_set_state]  Set state: a_wait_bcon
usb 2-1: USB disconnect, device number 3
[otg_statemachine]  quit statemachine, changed = 1
[otg_set_state]  Set state: a_host

[ cut here ]
WARNING: CPU: 2 PID: 95 at lib/debugobjects.c:263 debug_print_object+0x98/0xc0
ODEBUG: init active (active state 0) object type: timer_list hint: 
delayed_work_timer_fn+0x0/0x2c
Modules linked in: phy_qcom_usb_hsic phy_qcom_usb_hs ci_hdrc_msm ci_hdrc
CPU: 2 PID: 95 Comm: kworker/u8:1 Not tainted 
4.7.0-rc1-00043-g1f22f3b65c44-dirty #442
Hardware name: Qualcomm (Flattened Device Tree)
Workqueue: ci_otg ci_otg_work [ci_hdrc]
[] (unwind_backtrace) from [] (show_stack+0x20/0x24)
[] (show_stack) from [] (dump_stack+0x7c/0x9c)
[] (dump_stack) from [] (__warn+0xe4/0x110)
[] (__warn) from [] (warn_slowpath_fmt+0x48/0x50)
[] (warn_slowpath_fmt) from [] 
(debug_print_object+0x98/0xc0)
[] (debug_print_object) from [] 
(__debug_object_init+0xcc/0x3bc)
[] (__debug_object_init) from [] 
(debug_object_init+0x24/0x2c)
[] (debug_object_init) from [] (init_timer_key+0x24/0x120)
[] (init_timer_key) from [] 
(otg_start_hnp_polling+0x7c/0xbc)
[] (otg_start_hnp_polling) from [] 
(otg_set_state+0x740/0xc20)
[] (otg_set_state) from [] (otg_statemachine+0x47c/0x4ac)
[] (otg_statemachine) from [] (ci_otg_fsm_work+0x48/0x1a0 
[ci_hdrc])
[] (ci_otg_fsm_work [ci_hdrc]) from [] 
(ci_otg_work+0xd4/0x218 [ci_hdrc])
[] (ci_otg_work [ci_hdrc]) from [] 
(process_one_work+0x154/0x4b4)
[] (process_one_work) from [] (worker_thread+0x38/0x4d0)
[] (worker_thread) from [] (kthread+0xe8/0x104)
[] (kthread) from [] (ret_from_fork+0x14/0x3c)

Cc: Li Jun <jun...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Fixes: ae57e97a9521 ("usb: common: otg-fsm: add HNP polling support")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/common/usb-otg-fsm.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/drivers/usb/common/usb-otg-fsm.c b/drivers/usb/common/usb-otg-fsm.c
index 9059b7dc185e..73eec8c12235 100644
--- a/drivers/usb/common/usb-otg-fsm.c
+++ b/drivers/usb/common/usb-otg-fsm.c
@@ -61,6 +61,18 @@ static int otg_set_protocol(struct otg_fsm *fsm, int 
protocol)
return 0;
 }
 
+static void otg_stop_hnp_polling(struct otg_fsm *fsm)
+{
+   /*
+* The memory of host_req_flag should be allocated by
+* controller driver, otherwise, hnp polling is not started.
+*/
+   if (!fsm->host_req_flag)
+   return;
+
+   cancel_delayed_work_sync(>hnp_polling_work);
+}
+
 /* Called when leaving a state.  Do state clean up jobs here */
 static void otg_leave_state(struct otg_fsm *fsm, enum usb_otg_state old_state)
 {
@@ -84,6 +96,7 @@ static void otg_leave_state(struct otg_fsm *fsm, enum 
usb_otg_state old_state)
fsm->b_ase0_brst_tmout = 0;
break;
case OTG_STATE_B_HOST:
+   otg_stop_hnp_polling(fsm);
break;
case OTG_STATE_A_IDLE:
fsm->adp_prb = 0;
@@ -97,6 +110,7 @@ static void otg_leave_state(struct otg_fsm *fsm, enum 
usb_otg_state old_state)
fsm->a_wait_bcon_tmout = 0;
break;
case OTG_STATE_A_HOST:
+   otg_stop_hnp_polling(fsm);
otg_del_timer(fsm, A_WAIT_ENUM);
break;
case OTG_STATE_A_SUSPEND:
-- 
2.9.0.rc2.8.ga28705d

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RE: [PATCH 04/21] usb: chipidea: Only read/write OTGSC from one place

[Stephen Boyd]

Quoting Jun Li (2016-06-27 01:04:39)
> > diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c index
> > 03b6743461d1..763a8332b009 100644
> > --- a/drivers/usb/chipidea/otg.c
> > +++ b/drivers/usb/chipidea/otg.c
> > @@ -104,7 +104,32 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
> >   usb_gadget_vbus_disconnect(>gadget);
> >  }
> > 
> > -#define CI_VBUS_STABLE_TIMEOUT_MS 5000
> > +/**
> > + * Sometimes, it needs to wait register value before going on.
> > + * Eg, when switch to device mode, the vbus value should be lower
> > + * than OTGSC_BSV before connects to host.
> 
> This should be updated since this API is dedicated for BSV now.

Ok I've updated it to say:

  When we switch to device mode, the vbus value should be lower
  than OTGSC_BSV before connecting to host.

> 
> > + *
> > + * @ci: the controller
> > + *
> > + * This function returns an error code if timeout  */ static int
> > +hw_wait_otgsc_bsv(struct ci_hdrc *ci) {
> > + unsigned long elapse = jiffies + msecs_to_jiffies(5000);
> > + u32 mask = OTGSC_BSV;
> > +
> > + while (!hw_read_otgsc(ci, mask)) {
> 
> Reverse logic, should be:
> while (hw_read_otgsc(ci, mask)) {
> 

Good catch! Thanks.
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[PATCH 00/21] Support qcom's HSIC USB and rewrite USB2 HS phy support

[Stephen Boyd]

The state of USB ChipIdea support on Qualcomm's platforms is not great.
The DT description of these devices requires up to three different nodes
for what amounts to be the same hardware block, when there should really
only be one. Furthermore, the "phy" driver that is in mainline (phy-msm-usb.c)
duplicates the OTG state machine and touches the ci controller wrapper
registers when it should really be focused on the phy and the ULPI accesses
needed to get the phy working. There's also a slimmed down phy driver for
the msm8916 platform, but really the phy hardware is the same as other MSMs,
so we have two drivers doing pretty much the same thing. This leads to a
situtaion where we have the chipidea core driver, the "phy" driver, and
sometimes the ehci-msm.c driver operating the same device all at the same
time with very little coordination. This just isn't very safe and is
confusing from a driver perspective when trying to figure out who does what.
Finally, there isn't any HSIC support on platforms like apq8074 so we
should add that.

This patch series updates the ChipIdea driver and the MSM wrapper
(ci_hdrc_msm.c) to properly handle the PHY and wrapper bits at the right
times in the right places. To get there, we update the ChipIdea core to
have support for the ULPI phy bus introduced by Heikki. Along the way
we fix bugs with the extcon handling for peripheral and OTG mode controllers
and move the parts of phy-usb-msm.c that are touching the CI controller
wrapper into the wrapper driver (ci_hdrc_msm.c). Finally we add support
for the HSIC phy based on the ULPI bus and rewrite the HS phy driver
(phy-usb-msm.c) as a standard ULPI phy driver.

Once this series is accepted, we should be able to delete the phy-usb-msm.c
phy-qcom-8x16-usb.c, and ehci-msm.c drivers from the tree and use the ULPI
based phy driver (which also lives in drivers/phy/ instead of drivers/usb/phy/)
and the chipidea host core instead.

I've also sent seperate patches for other minor pieces to make this
all work. The full tree can be found here[3], hacks and all to get
things working. I've tested this on the db410c, apq8074 dragonboard,
and ifc6410 with configfs gadgets and otg cables.

TODO:
 * DMA fails on arm64 so we need something like [1] to make it work.

 * The HSIC phy on the apq8074 dragonboard is connected to a usb4604
   device which requires the i2c driver to probe and send an i2c
   sequence before the HSIC controller enumerates or HSIC doesn't work.
   Right now I have a hack to force the controller to probe defer
   once so that usb4604 probes first. This needs a more proper solution
   like having the DT describe a linkage between the controller and
   the usb device so we can enforce probe ordering.
 
 * OTG support requires a working VBUS supply on apq8074 dragonboard
   and that requires changes to the smbb_charger driver to support
   the OTG OVP switch as a regulator[2]. This series needs revival.

 * Sleeping while atomic problems exist when trying to do phy operations
   underneath some spinlocks in the ci core. I have a patch to remove a
   spinlock, but that needs more thought if it's correct. At the least
   it's necessary though because of how we need to initialize the HSIC
   phy after the reset bit is toggled in USBCMD.

[1] https://lkml.org/lkml/2016/2/22/7
[2] 
http://lkml.kernel.org/g/1449621618-11900-1-git-send-email-tim.b...@sonymobile.com
[3] 
https://git.linaro.org/people/stephen.boyd/linux.git/shortlog/refs/heads/usb-hsic-8074

Stephen Boyd (21):
  of: device: Support loading a module with OF based modalias
  usb: ulpi: Support device discovery via DT
  usb: ulpi: Avoid reading/writing in device creation with OF devices
  usb: chipidea: Only read/write OTGSC from one place
  usb: chipidea: Handle extcon events properly
  usb: chipidea: Initialize and reinitialize phy later
  usb: chipidea: Notify of reset when switching into host mode
  usb: chipidea: Kick OTG state machine for AVVIS with vbus extcon
  usb: chipidea: Add support for ULPI PHY bus
  usb: chipidea: msm: Rely on core to override AHBBURST
  usb: chipidea: msm: Use hw_write_id_reg() instead of writel directly
  usb: chipidea: msm: Keep device runtime enabled
  usb: chipidea: msm: Allow core to get usb phy
  usb: chipidea: msm: Add proper clk and reset support
  usb: chipidea: msm: Mux over secondary phy at the right time
  usb: chipidea: msm: Restore wrapper settings after reset
  usb: chipidea: msm: Make platform data driver local instead of global
  usb: chipidea: msm: Add reset controller for PHY POR bit
  usb: chipidea: msm: Be silent on probe defer errors
  phy: Add support for Qualcomm's USB HSIC phy
  phy: Add support for Qualcomm's USB HS phy

 .../devicetree/bindings/phy/qcom,usb-hs-phy.txt|  71 ++
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  60 +
 Documentation/devicetree/bindings/usb/ulpi.txt |  20 ++
 drivers/of/device.c|  50 

[PATCH 01/21] of: device: Support loading a module with OF based modalias

[Stephen Boyd]

In the case of ULPI devices, we want to be able to load the
driver before registering the device so that we don't get stuck
in a loop waiting for the phy module to appear and failing usb
controller probe. Currently we request the ulpi module via the
ulpi ids, but in the DT case we might need to request it with the
OF based modalias instead. Add a common function that allows
anyone to request a module with the OF based modalias.

Cc: Rob Herring <robh...@kernel.org>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/of/device.c   | 50 +++
 include/linux/of_device.h |  6 ++
 2 files changed, 56 insertions(+)

diff --git a/drivers/of/device.c b/drivers/of/device.c
index fd5cfad7c403..f275e5beb736 100644
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -226,6 +226,56 @@ ssize_t of_device_get_modalias(struct device *dev, char 
*str, ssize_t len)
return tsize;
 }
 
+static ssize_t of_device_modalias_size(struct device *dev)
+{
+   const char *compat;
+   int cplen, i;
+   ssize_t csize;
+
+   if ((!dev) || (!dev->of_node))
+   return -ENODEV;
+
+   /* Name & Type */
+   csize = 5 + strlen(dev->of_node->name) + strlen(dev->of_node->type);
+
+   /* Get compatible property if any */
+   compat = of_get_property(dev->of_node, "compatible", );
+   if (!compat)
+   return csize;
+
+   /* Find true end (we tolerate multiple \0 at the end */
+   for (i = (cplen - 1); i >= 0 && !compat[i]; i--)
+   cplen--;
+   if (!cplen)
+   return csize;
+   cplen++;
+
+   /* Check space (need cplen+1 chars including final \0) */
+   return csize + cplen;
+}
+
+int of_device_request_module(struct device *dev)
+{
+   char *str;
+   ssize_t size;
+   int ret;
+
+   size = of_device_modalias_size(dev);
+   if (size < 0)
+   return size;
+
+   str = kmalloc(size + 1, GFP_KERNEL);
+   if (!str)
+   return -ENOMEM;
+
+   of_device_get_modalias(dev, str, size);
+   str[size] = '\0';
+   ret = request_module(str);
+   kfree(str);
+
+   return ret;
+}
+
 /**
  * of_device_uevent - Display OF related uevent information
  */
diff --git a/include/linux/of_device.h b/include/linux/of_device.h
index cc7dd687a89d..e9afbcc8de12 100644
--- a/include/linux/of_device.h
+++ b/include/linux/of_device.h
@@ -37,6 +37,7 @@ extern const void *of_device_get_match_data(const struct 
device *dev);
 
 extern ssize_t of_device_get_modalias(struct device *dev,
char *str, ssize_t len);
+extern int of_device_request_module(struct device *dev);
 
 extern void of_device_uevent(struct device *dev, struct kobj_uevent_env *env);
 extern int of_device_uevent_modalias(struct device *dev, struct 
kobj_uevent_env *env);
@@ -78,6 +79,11 @@ static inline int of_device_get_modalias(struct device *dev,
return -ENODEV;
 }
 
+static inline int of_device_request_module(struct device *dev)
+{
+   return -ENODEV;
+}
+
 static inline int of_device_uevent_modalias(struct device *dev,
   struct kobj_uevent_env *env)
 {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 16/21] usb: chipidea: msm: Restore wrapper settings after reset

[Stephen Boyd]

When the RESET bit is set in the USBCMD register it resets quite
a few of the wrapper's registers to their reset state. This
includes the GENCONFIG and GENCONFIG2 registers. Currently this
is done by the usb phy and ehci-msm drivers writing into the
controller wrapper's MMIO address space. Let's consolidate the
register writes into the wrapper driver instead so that we
clearly split the wrapper from the phys.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 46 ++
 1 file changed, 46 insertions(+)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index df0f8b31db4f..cc6f9b0df9d5 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,6 +14,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "ci.h"
 
@@ -21,11 +23,22 @@
 #define HS_PHY_SEC_CTRL0x0278
 # define HS_PHY_DIG_CLAMP_NBIT(16)
 
+#define HS_PHY_GENCONFIG   0x009c
+# define HS_PHY_TXFIFO_IDLE_FORCE_DIS  BIT(4)
+
+#define HS_PHY_GENCONFIG_2 0x00a0
+# define HS_PHY_SESS_VLD_CTRL_EN   BIT(7)
+# define HS_PHY_ULPI_TX_PKT_EN_CLR_FIX BIT(19)
+
+#define HSPHY_SESS_VLD_CTRLBIT(25)
+
 struct ci_hdrc_msm {
struct platform_device *ci;
struct clk *core_clk;
struct clk *iface_clk;
+   struct extcon_dev *vbus_edev;
bool secondary_phy;
+   bool hsic;
void __iomem *base;
 };
 
@@ -39,9 +52,26 @@ static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, 
unsigned event)
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
+   /* workaround for rx buffer collision issue */
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG,
+   HS_PHY_TXFIFO_IDLE_FORCE_DIS, 0);
+
if (msm_ci->secondary_phy)
hw_write_id_reg(ci, HS_PHY_SEC_CTRL, HS_PHY_DIG_CLAMP_N,
HS_PHY_DIG_CLAMP_N);
+
+   if (!msm_ci->hsic)
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_ULPI_TX_PKT_EN_CLR_FIX, 0);
+
+   if (msm_ci->vbus_edev) {
+   hw_write_id_reg(ci, HS_PHY_GENCONFIG_2,
+   HS_PHY_SESS_VLD_CTRL_EN,
+   HS_PHY_SESS_VLD_CTRL_EN);
+   hw_write(ci, OP_USBCMD, HSPHY_SESS_VLD_CTRL,
+HSPHY_SESS_VLD_CTRL);
+
+   }
break;
default:
dev_dbg(dev, "unknown ci_hdrc event\n");
@@ -112,6 +142,7 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
void __iomem *base;
resource_size_t size;
int ret;
+   struct device_node *ulpi_node, *phy_node;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
 
@@ -141,6 +172,13 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (!base)
return -ENOMEM;
 
+   ci->vbus_edev = extcon_get_edev_by_phandle(>dev, 0);
+   if (IS_ERR(ci->vbus_edev)) {
+   if (PTR_ERR(ci->vbus_edev) != -ENODEV)
+   return PTR_ERR(ci->vbus_edev);
+   ci->vbus_edev = NULL;
+   }
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
@@ -157,6 +195,14 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_mux;
 
+   ulpi_node = of_find_node_by_name(pdev->dev.of_node, "ulpi");
+   if (ulpi_node) {
+   phy_node = of_get_next_available_child(ulpi_node, NULL);
+   ci->hsic = of_device_is_compatible(phy_node, 
"qcom,usb-hsic-phy");
+   of_node_put(phy_node);
+   }
+   of_node_put(ulpi_node);
+
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, 
_hdrc_msm_platdata);
if (IS_ERR(plat_ci)) {
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 02/21] usb: ulpi: Support device discovery via DT

[Stephen Boyd]

The qcom HSIC ulpi phy doesn't have any bits set in the vendor or
product id ulpi registers. This makes it impossible to make a
ulpi driver match against the id registers. Add support to
discover the ulpi phys via DT to help alleviate this problem.
We'll look for a ulpi bus node underneath the device registering
the ulpi viewport (or the parent of that device to support
chipidea's device layout) and then match up the phy node
underneath that with the ulpi device that's created.

The side benefit of this is that we can use standard DT
properties in the phy node like clks, regulators, gpios, etc.
because we don't have firmware like ACPI to turn these things on
for us. And we can use the DT phy binding to point our phy
consumer to the phy provider.

Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: Heikki Krogerus <heikki.kroge...@linux.intel.com>
Cc: <devicet...@vger.kernel.org>
Cc: Rob Herring <robh...@kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 Documentation/devicetree/bindings/usb/ulpi.txt | 20 +
 drivers/usb/common/ulpi.c  | 56 +-
 2 files changed, 74 insertions(+), 2 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/usb/ulpi.txt

diff --git a/Documentation/devicetree/bindings/usb/ulpi.txt 
b/Documentation/devicetree/bindings/usb/ulpi.txt
new file mode 100644
index ..ca179dc4bd50
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/ulpi.txt
@@ -0,0 +1,20 @@
+ULPI bus binding
+
+
+Phys that are behind a ULPI connection can be described with the following
+binding. The host controller shall have a "ulpi" named node as a child, and
+that node shall have one enabled node underneath it representing the ulpi
+device on the bus.
+
+EXAMPLE
+---
+
+usb {
+   compatible = "vendor,usb-controller";
+
+   ulpi {
+   phy {
+   compatible = "vendor,phy";
+   };
+   };
+};
diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c
index 01c0c0477a9e..980af672bfe3 100644
--- a/drivers/usb/common/ulpi.c
+++ b/drivers/usb/common/ulpi.c
@@ -16,6 +16,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 /* -- 
*/
 
@@ -39,7 +42,10 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
struct ulpi *ulpi = to_ulpi_dev(dev);
const struct ulpi_device_id *id;
 
-   for (id = drv->id_table; id->vendor; id++)
+   if (of_driver_match_device(dev, driver))
+   return 1;
+
+   for (id = drv->id_table; id && id->vendor; id++)
if (id->vendor == ulpi->id.vendor &&
id->product == ulpi->id.product)
return 1;
@@ -50,6 +56,11 @@ static int ulpi_match(struct device *dev, struct 
device_driver *driver)
 static int ulpi_uevent(struct device *dev, struct kobj_uevent_env *env)
 {
struct ulpi *ulpi = to_ulpi_dev(dev);
+   int ret;
+
+   ret = of_device_uevent_modalias(dev, env);
+   if (ret != -ENODEV)
+   return ret;
 
if (add_uevent_var(env, "MODALIAS=ulpi:v%04xp%04x",
   ulpi->id.vendor, ulpi->id.product))
@@ -60,6 +71,11 @@ static int ulpi_uevent(struct device *dev, struct 
kobj_uevent_env *env)
 static int ulpi_probe(struct device *dev)
 {
struct ulpi_driver *drv = to_ulpi_driver(dev->driver);
+   int ret;
+
+   ret = of_clk_set_defaults(dev->of_node, false);
+   if (ret < 0)
+   return ret;
 
return drv->probe(to_ulpi_dev(dev));
 }
@@ -87,8 +103,13 @@ static struct bus_type ulpi_bus = {
 static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
 char *buf)
 {
+   int len;
struct ulpi *ulpi = to_ulpi_dev(dev);
 
+   len = of_device_get_modalias(dev, buf, PAGE_SIZE - 1);
+   if (len != -ENODEV)
+   return len;
+
return sprintf(buf, "ulpi:v%04xp%04x\n",
   ulpi->id.vendor, ulpi->id.product);
 }
@@ -152,6 +173,28 @@ EXPORT_SYMBOL_GPL(ulpi_unregister_driver);
 
 /* -- 
*/
 
+static int ulpi_of_register(struct ulpi *ulpi)
+{
+   struct device_node *np = NULL, *child;
+
+   /* Find a ulpi bus underneath the parent or the parent of the parent */
+   if (ulpi->dev.parent->of_node)
+   np = of_find_node_by_name(ulpi->dev.parent->of_node, "ulpi");
+   else if (ulpi->dev.parent->parent &&
+ulpi->dev.parent->parent->of_node)
+   np = of_find_node_by_name(ulpi->dev.parent->parent->of_node, 
"ulpi");

[PATCH 15/21] usb: chipidea: msm: Mux over secondary phy at the right time

[Stephen Boyd]

We need to pick the correct phy at runtime based on how the SoC
has been wired onto the board. If the secondary phy is used, take
it out of reset and mux over to it by writing into the TCSR
register. Make sure to do this on reset too, because this
register is reset to the default value (primary phy) after the
RESET bit is set in USBCMD.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 78 +++---
 1 file changed, 73 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 40249b0e3e93..df0f8b31db4f 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -8,30 +8,40 @@
 #include 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
+#define HS_PHY_SEC_CTRL0x0278
+# define HS_PHY_DIG_CLAMP_NBIT(16)
 
 struct ci_hdrc_msm {
struct platform_device *ci;
struct clk *core_clk;
struct clk *iface_clk;
+   bool secondary_phy;
+   void __iomem *base;
 };
 
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
-   struct device *dev = ci->gadget.dev.parent;
+   struct device *dev = ci->dev->parent;
+   struct ci_hdrc_msm *msm_ci = dev_get_drvdata(dev);
 
switch (event) {
case CI_HDRC_CONTROLLER_RESET_EVENT:
dev_dbg(dev, "CI_HDRC_CONTROLLER_RESET_EVENT received\n");
/* use AHB transactor, allow posted data writes */
hw_write_id_reg(ci, HS_PHY_AHB_MODE, 0x, 0x8);
+   if (msm_ci->secondary_phy)
+   hw_write_id_reg(ci, HS_PHY_SEC_CTRL, HS_PHY_DIG_CLAMP_N,
+   HS_PHY_DIG_CLAMP_N);
break;
default:
dev_dbg(dev, "unknown ci_hdrc event\n");
@@ -49,12 +59,58 @@ static struct ci_hdrc_platform_data ci_hdrc_msm_platdata = {
.notify_event   = ci_hdrc_msm_notify_event,
 };
 
+static int ci_hdrc_msm_mux_phy(struct ci_hdrc_msm *ci,
+  struct platform_device *pdev)
+{
+   struct regmap *regmap;
+   struct device_node *syscon;
+   struct device *dev = >dev;
+   u32 off, val;
+   int ret;
+
+   syscon = of_parse_phandle(dev->of_node, "phy-select", 0);
+   if (!syscon)
+   return 0;
+
+   regmap = syscon_node_to_regmap(syscon);
+   if (IS_ERR(regmap))
+   return PTR_ERR(regmap);
+
+   ret = of_property_read_u32_index(dev->of_node, "phy-select", 1, );
+   if (ret < 0) {
+   dev_err(dev, "no offset in syscon\n");
+   return -EINVAL;
+   }
+
+   ret = of_property_read_u32_index(dev->of_node, "phy-select", 2, );
+   if (ret < 0) {
+   dev_err(dev, "no value in syscon\n");
+   return -EINVAL;
+   }
+
+   ret = regmap_write(regmap, off, val);
+   if (ret)
+   return ret;
+
+   ci->secondary_phy = !!val;
+   if (ci->secondary_phy) {
+   val = readl_relaxed(ci->base + HS_PHY_SEC_CTRL);
+   val |= HS_PHY_DIG_CLAMP_N;
+   writel_relaxed(val, ci->base + HS_PHY_SEC_CTRL);
+   }
+
+   return 0;
+}
+
 static int ci_hdrc_msm_probe(struct platform_device *pdev)
 {
struct ci_hdrc_msm *ci;
struct platform_device *plat_ci;
struct clk *clk;
struct reset_control *reset;
+   struct resource *res;
+   void __iomem *base;
+   resource_size_t size;
int ret;
 
dev_dbg(>dev, "ci_hdrc_msm_probe\n");
@@ -76,6 +132,15 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (IS_ERR(clk))
return PTR_ERR(clk);
 
+   res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+   if (!res)
+   return -ENODEV;
+
+   size = resource_size(res);
+   ci->base = base = devm_ioremap(>dev, res->start, size);
+   if (!base)
+   return -ENOMEM;
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
@@ -88,9 +153,12 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
if (ret)
goto err_iface;
 
-   plat_ci = ci_hdrc_add_device(>dev,
-   pdev->resource, pdev->num_resources,
-   _hdrc_msm_platdata);
+   ret = ci_hdrc_msm_mux_phy(ci, pdev);
+   if (ret)
+   goto err_mux;
+
+   plat_ci = ci_hdrc_a

[PATCH 04/21] usb: chipidea: Only read/write OTGSC from one place

[Stephen Boyd]

With the id and vbus detection done via extcon we need to make
sure we poll the status of OTGSC properly by considering what the
extcon is saying, and not just what the register is saying. Let's
move this hw_wait_reg() function to the only place it's used and
simplify it for polling the OTGSC register. Then we can make
certain we only use the hw_read_otgsc() API to read OTGSC, which
will make sure we properly handle extcon events.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/core.c | 32 
 drivers/usb/chipidea/otg.c  | 35 +++
 2 files changed, 31 insertions(+), 36 deletions(-)

diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 69426e644d17..01390e02ee53 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -516,38 +516,6 @@ int hw_device_reset(struct ci_hdrc *ci)
return 0;
 }
 
-/**
- * hw_wait_reg: wait the register value
- *
- * Sometimes, it needs to wait register value before going on.
- * Eg, when switch to device mode, the vbus value should be lower
- * than OTGSC_BSV before connects to host.
- *
- * @ci: the controller
- * @reg: register index
- * @mask: mast bit
- * @value: the bit value to wait
- * @timeout_ms: timeout in millisecond
- *
- * This function returns an error code if timeout
- */
-int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
-   u32 value, unsigned int timeout_ms)
-{
-   unsigned long elapse = jiffies + msecs_to_jiffies(timeout_ms);
-
-   while (hw_read(ci, reg, mask) != value) {
-   if (time_after(jiffies, elapse)) {
-   dev_err(ci->dev, "timeout waiting for %08x in %d\n",
-   mask, reg);
-   return -ETIMEDOUT;
-   }
-   msleep(20);
-   }
-
-   return 0;
-}
-
 static irqreturn_t ci_irq(int irq, void *data)
 {
struct ci_hdrc *ci = data;
diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 03b6743461d1..763a8332b009 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -104,7 +104,32 @@ void ci_handle_vbus_change(struct ci_hdrc *ci)
usb_gadget_vbus_disconnect(>gadget);
 }
 
-#define CI_VBUS_STABLE_TIMEOUT_MS 5000
+/**
+ * Sometimes, it needs to wait register value before going on.
+ * Eg, when switch to device mode, the vbus value should be lower
+ * than OTGSC_BSV before connects to host.
+ *
+ * @ci: the controller
+ *
+ * This function returns an error code if timeout
+ */
+static int hw_wait_otgsc_bsv(struct ci_hdrc *ci)
+{
+   unsigned long elapse = jiffies + msecs_to_jiffies(5000);
+   u32 mask = OTGSC_BSV;
+
+   while (!hw_read_otgsc(ci, mask)) {
+   if (time_after(jiffies, elapse)) {
+   dev_err(ci->dev, "timeout waiting for %08x in OTGSC\n",
+   mask);
+   return -ETIMEDOUT;
+   }
+   msleep(20);
+   }
+
+   return 0;
+}
+
 static void ci_handle_id_switch(struct ci_hdrc *ci)
 {
enum ci_role role = ci_otg_role(ci);
@@ -116,9 +141,11 @@ static void ci_handle_id_switch(struct ci_hdrc *ci)
ci_role_stop(ci);
 
if (role == CI_ROLE_GADGET)
-   /* wait vbus lower than OTGSC_BSV */
-   hw_wait_reg(ci, OP_OTGSC, OTGSC_BSV, 0,
-   CI_VBUS_STABLE_TIMEOUT_MS);
+   /*
+* wait vbus lower than OTGSC_BSV before connecting
+* to host
+*/
+   hw_wait_otgsc_bsv(ci);
 
ci_role_start(ci, role);
}
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 20/21] phy: Add support for Qualcomm's USB HSIC phy

[Stephen Boyd]

The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kis...@ti.com>
Cc: <devicet...@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 .../devicetree/bindings/phy/qcom,usb-hsic-phy.txt  |  60 
 drivers/phy/Kconfig|   7 +
 drivers/phy/Makefile   |   1 +
 drivers/phy/phy-qcom-usb-hsic.c| 161 +
 4 files changed, 229 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
 create mode 100644 drivers/phy/phy-qcom-usb-hsic.c

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt 
b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
new file mode 100644
index ..6b1c6aad2962
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-hsic-phy.txt
@@ -0,0 +1,60 @@
+Qualcomm's USB HSIC PHY
+
+PROPERTIES
+
+- compatible:
+Usage: required
+Value type: 
+Definition: Should contain "qcom,usb-hsic-phy"
+
+- #phy-cells:
+Usage: required
+Value type: 
+Definition: Should contain 0
+
+- clocks:
+Usage: required
+Value type: 
+Definition: Should contain clock specifier for phy, calibration and
+optionally a calibration sleep clock
+
+- clock-names:
+Usage: required
+Value type: 
+Definition: Should contain "phy, "cal" and optionally "cal_sleep"
+
+- pinctrl-names:
+Usage: required
+Value type: 
+Definition: Should contain "init" and "default" in that order
+
+- pinctrl-0:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to keep HSIC pins in a glitch
+free state
+
+- pinctrl-1:
+Usage: required
+Value type: 
+Definition: List of pinctrl settings to apply to mux out the HSIC pins
+
+EXAMPLE
+
+usb-controller {
+   ulpi {
+   phy {
+   compatible = "qcom,usb-hsic-phy";
+   #phy-cells = <0>;
+   pinctrl-names = "init", "default";
+   pinctrl-0 = <_sleep>;
+   pinctrl-1 = <_default>;
+   clocks = < GCC_USB_HSIC_CLK>,
+< GCC_USB_HSIC_IO_CAL_CLK>,
+< GCC_USB_HSIC_IO_CAL_SLEEP_CLK>;
+   clock-names = "phy", "cal", "cal_sleep";
+   assigned-clocks = < GCC_USB_HSIC_IO_CAL_CLK>;
+   assigned-clock-rates = <96>;
+   };
+   };
+};
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index b869b98835f4..a2866949dc97 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -406,6 +406,13 @@ config PHY_QCOM_UFS
help
  Support for UFS PHY on QCOM chipsets.
 
+config PHY_QCOM_USB_HSIC
+   tristate "Qualcomm USB HSIC ULPI PHY module"
+   depends on USB_ULPI_BUS
+   select GENERIC_PHY
+   help
+ Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
+
 config PHY_TUSB1210
tristate "TI TUSB1210 ULPI PHY module"
depends on USB_ULPI_BUS
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index 9c3e73ccabc4..982e84a290ec 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_PHY_STIH41X_USB) += phy-stih41x-usb.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-20nm.o
 obj-$(CONFIG_PHY_QCOM_UFS) += phy-qcom-ufs-qmp-14nm.o
+obj-$(CONFIG_PHY_QCOM_USB_HSIC)+= phy-qcom-usb-hsic.o
 obj-$(CONFIG_PHY_TUSB1210) += phy-tusb1210.o
 obj-$(CONFIG_PHY_BRCM_SATA)+= phy-brcm-sata.o
 obj-$(CONFIG_PHY_PISTACHIO_USB)+= phy-pistachio-usb.o
diff --git a/drivers/phy/phy-qcom-usb-hsic.c b/drivers/phy/phy-qcom-usb-hsic.c
new file mode 100644
index ..a81b2f8bfe37
--- /dev/null
+++ b/drivers/phy/phy-qcom-usb-hsic.c
@@ -0,0 +1,161 @@
+/**
+ * Copyright (C) 2016 Linaro Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "ulpi_phy.h"
+
+#define ULPI_HSIC_CFG  0x30
+#define ULPI_HSIC_IO_CAL   0x33
+
+struct qcom_usb_hsic_phy {
+   struct ulpi *ulpi;
+   struct phy *phy;
+   struct pinctrl *pctl;
+   struct clk *phy_clk;
+   struct clk *cal_clk;
+   struct clk *cal_sleep_clk;
+};
+
+static int qcom_usb_hsic_phy_power_on(struct phy *phy)
+{
+

[PATCH 05/21] usb: chipidea: Handle extcon events properly

[Stephen Boyd]

We're currently emulating the vbus and id interrupts in the OTGSC
read API, but we also need to make sure that if we're handling
the events with extcon that we don't enable the interrupts for
those events in the hardware. Therefore, properly emulate this
register if we're using extcon, but don't enable the interrupts.
This allows me to get my cable connect/disconnect working
properly without getting spurious interrupts on my device that
uses an extcon for these two events.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Cc: "Ivan T. Ivanov" <iivanov...@gmail.com>
Fixes: 3ecb3e09b042 ("usb: chipidea: Use extcon framework for VBUS and ID 
detect")
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/otg.c   | 46 +++-
 include/linux/usb/chipidea.h |  2 ++
 2 files changed, 43 insertions(+), 5 deletions(-)

diff --git a/drivers/usb/chipidea/otg.c b/drivers/usb/chipidea/otg.c
index 763a8332b009..b6a88bea4cac 100644
--- a/drivers/usb/chipidea/otg.c
+++ b/drivers/usb/chipidea/otg.c
@@ -44,12 +44,15 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_BSVIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_BSV;
else
val &= ~OTGSC_BSV;
+
+   if (cable->enabled)
+   val |= OTGSC_BSVIE;
+   else
+   val &= ~OTGSC_BSVIE;
}
 
cable = >platdata->id_extcon;
@@ -59,15 +62,18 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
else
val &= ~OTGSC_IDIS;
 
-   cable->changed = false;
-
if (cable->state)
val |= OTGSC_ID;
else
val &= ~OTGSC_ID;
+
+   if (cable->enabled)
+   val |= OTGSC_IDIE;
+   else
+   val &= ~OTGSC_IDIE;
}
 
-   return val;
+   return val & mask;
 }
 
 /**
@@ -77,6 +83,36 @@ u32 hw_read_otgsc(struct ci_hdrc *ci, u32 mask)
  */
 void hw_write_otgsc(struct ci_hdrc *ci, u32 mask, u32 data)
 {
+   struct ci_hdrc_cable *cable;
+
+   cable = >platdata->vbus_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_BSVIS)
+   cable->changed = false;
+
+   /* Don't enable vbus interrupt if using external notifier */
+   if (data & mask & OTGSC_BSVIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_BSVIE;
+   } else if (mask & OTGSC_BSVIE) {
+   cable->enabled = false;
+   }
+   }
+
+   cable = >platdata->id_extcon;
+   if (!IS_ERR(cable->edev)) {
+   if (data & mask & OTGSC_IDIS)
+   cable->changed = false;
+
+   /* Don't enable id interrupt if using external notifier */
+   if (data & mask & OTGSC_IDIE) {
+   cable->enabled = true;
+   data &= ~OTGSC_IDIE;
+   } else if (mask & OTGSC_IDIE) {
+   cable->enabled = false;
+   }
+   }
+
hw_write(ci, OP_OTGSC, mask | OTGSC_INT_STATUS_BITS, data);
 }
 
diff --git a/include/linux/usb/chipidea.h b/include/linux/usb/chipidea.h
index 5dd75fa47dd8..f9be467d6695 100644
--- a/include/linux/usb/chipidea.h
+++ b/include/linux/usb/chipidea.h
@@ -14,6 +14,7 @@ struct ci_hdrc;
  * struct ci_hdrc_cable - structure for external connector cable state tracking
  * @state: current state of the line
  * @changed: set to true when extcon event happen
+ * @enabled: set to true if we've enabled the vbus or id interrupt
  * @edev: device which generate events
  * @ci: driver state of the chipidea device
  * @nb: hold event notification callback
@@ -22,6 +23,7 @@ struct ci_hdrc;
 struct ci_hdrc_cable {
boolstate;
boolchanged;
+   boolenabled;
struct extcon_dev   *edev;
struct ci_hdrc  *ci;
struct notifier_block   nb;
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 19/21] usb: chipidea: msm: Be silent on probe defer errors

[Stephen Boyd]

If something fails in ci_hdrc_add_device() due to probe defer, we
shouldn't print an error message. Be silent in this case as we'll
try probe again later.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index 7d191928e55b..2ed9a181f4b6 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -241,7 +241,8 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
plat_ci = ci_hdrc_add_device(>dev, pdev->resource,
 pdev->num_resources, >pdata);
if (IS_ERR(plat_ci)) {
-   dev_err(>dev, "ci_hdrc_add_device failed!\n");
+   if (PTR_ERR(plat_ci) != -EPROBE_DEFER)
+   dev_err(>dev, "ci_hdrc_add_device failed!\n");
ret = PTR_ERR(plat_ci);
goto err_mux;
}
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 18/21] usb: chipidea: msm: Add reset controller for PHY POR bit

[Stephen Boyd]

The MSM chipidea wrapper has two bits that are used to reset the
first or second phy. Add support for these bits via the reset
controller framework, so that phy drivers can reset their
hardware at the right time during initialization.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci_hdrc_msm.c | 43 +-
 1 file changed, 42 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/chipidea/ci_hdrc_msm.c 
b/drivers/usb/chipidea/ci_hdrc_msm.c
index fb4340f02c16..7d191928e55b 100644
--- a/drivers/usb/chipidea/ci_hdrc_msm.c
+++ b/drivers/usb/chipidea/ci_hdrc_msm.c
@@ -14,14 +14,17 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
 #include "ci.h"
 
 #define HS_PHY_AHB_MODE0x0098
+#define HS_PHY_CTRL0x0240
 #define HS_PHY_SEC_CTRL0x0278
 # define HS_PHY_DIG_CLAMP_NBIT(16)
+# define HS_PHY_POR_ASSERT BIT(0)
 
 #define HS_PHY_GENCONFIG   0x009c
 # define HS_PHY_TXFIFO_IDLE_FORCE_DIS  BIT(4)
@@ -38,11 +41,38 @@ struct ci_hdrc_msm {
struct clk *iface_clk;
struct extcon_dev *vbus_edev;
struct ci_hdrc_platform_data pdata;
+   struct reset_controller_dev rcdev;
bool secondary_phy;
bool hsic;
void __iomem *base;
 };
 
+static int
+ci_hdrc_msm_por_reset(struct reset_controller_dev *r, unsigned long id)
+{
+   struct ci_hdrc_msm *ci_msm = container_of(r, struct ci_hdrc_msm, rcdev);
+   void __iomem *addr = ci_msm->base;
+   u32 val;
+
+   if (id)
+   addr += HS_PHY_SEC_CTRL;
+   else
+   addr += HS_PHY_CTRL;
+
+   val = readl_relaxed(addr);
+   val |= HS_PHY_POR_ASSERT;
+   writel_relaxed(val, addr);
+   udelay(12);
+   val &= ~HS_PHY_POR_ASSERT;
+   writel(val, addr);
+
+   return 0;
+}
+
+static const struct reset_control_ops ci_hdrc_msm_reset_ops = {
+   .reset = ci_hdrc_msm_por_reset,
+};
+
 static void ci_hdrc_msm_notify_event(struct ci_hdrc *ci, unsigned event)
 {
struct device *dev = ci->dev->parent;
@@ -176,13 +206,21 @@ static int ci_hdrc_msm_probe(struct platform_device *pdev)
ci->vbus_edev = NULL;
}
 
+   ci->rcdev.owner = THIS_MODULE;
+   ci->rcdev.ops = _hdrc_msm_reset_ops;
+   ci->rcdev.of_node = pdev->dev.of_node;
+   ci->rcdev.nr_resets = 2;
+   ret = reset_controller_register(>rcdev);
+   if (ret)
+   return ret;
+
reset_control_assert(reset);
usleep_range(1, 12000);
reset_control_deassert(reset);
 
ret = clk_prepare_enable(ci->core_clk);
if (ret)
-   return ret;
+   goto err_core;
 
ret = clk_prepare_enable(ci->iface_clk);
if (ret)
@@ -220,6 +258,8 @@ err_mux:
clk_disable_unprepare(ci->iface_clk);
 err_iface:
clk_disable_unprepare(ci->core_clk);
+err_core:
+   reset_controller_unregister(>rcdev);
return ret;
 }
 
@@ -232,6 +272,7 @@ static int ci_hdrc_msm_remove(struct platform_device *pdev)
ci_hdrc_remove_device(ci->ci);
clk_disable_unprepare(ci->iface_clk);
clk_disable_unprepare(ci->core_clk);
+   reset_controller_unregister(>rcdev);
 
return 0;
 }
-- 
2.9.0.rc2.8.ga28705d

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[PATCH 06/21] usb: chipidea: Initialize and reinitialize phy later

[Stephen Boyd]

The ULPI phy on qcom platforms needs to be initialized and
powered on after a USB reset and before we toggle the run/stop
bit. Otherwise, the phy locks up and doesn't work properly. Move
the phy initialization to a later point, and shut it down outside
of driver remove so that the phy state is properly managed across
role switches.

Cc: Peter Chen <peter.c...@nxp.com>
Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org>
Signed-off-by: Stephen Boyd <stephen.b...@linaro.org>
---
 drivers/usb/chipidea/ci.h   |  3 ++-
 drivers/usb/chipidea/core.c | 23 ++-
 drivers/usb/chipidea/host.c |  5 ++---
 drivers/usb/chipidea/udc.c  |  2 ++
 4 files changed, 16 insertions(+), 17 deletions(-)

diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
index cd414559040f..f87805235caa 100644
--- a/drivers/usb/chipidea/ci.h
+++ b/drivers/usb/chipidea/ci.h
@@ -431,7 +431,8 @@ u8 hw_port_test_get(struct ci_hdrc *ci);
 int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,
u32 value, unsigned int timeout_ms);
 
-void ci_platform_configure(struct ci_hdrc *ci);
+void ci_usb_phy_exit(struct ci_hdrc *ci);
+int ci_platform_configure(struct ci_hdrc *ci);
 
 int dbg_create_files(struct ci_hdrc *ci);
 
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index 01390e02ee53..a01611c7f815 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -359,7 +359,7 @@ static int _ci_usb_phy_init(struct ci_hdrc *ci)
  * interfaces
  * @ci: the controller
  */
-static void ci_usb_phy_exit(struct ci_hdrc *ci)
+void ci_usb_phy_exit(struct ci_hdrc *ci)
 {
if (ci->phy) {
phy_power_off(ci->phy);
@@ -412,9 +412,14 @@ static int ci_usb_phy_init(struct ci_hdrc *ci)
  * @ci: the controller
  *
  */
-void ci_platform_configure(struct ci_hdrc *ci)
+int ci_platform_configure(struct ci_hdrc *ci)
 {
bool is_device_mode, is_host_mode;
+   int ret;
+
+   ret = ci_usb_phy_init(ci);
+   if (ret)
+   return ret;
 
is_device_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_DC;
is_host_mode = hw_read(ci, OP_USBMODE, USBMODE_CM) == USBMODE_CM_HC;
@@ -453,6 +458,8 @@ void ci_platform_configure(struct ci_hdrc *ci)
hw_write(ci, OP_BURSTSIZE, RX_BURST_MASK,
ci->platdata->rx_burst_size);
}
+
+   return 0;
 }
 
 /**
@@ -511,9 +518,7 @@ int hw_device_reset(struct ci_hdrc *ci)
return -ENODEV;
}
 
-   ci_platform_configure(ci);
-
-   return 0;
+   return ci_platform_configure(ci);
 }
 
 static irqreturn_t ci_irq(int irq, void *data)
@@ -917,12 +922,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
ci->usb_phy = NULL;
}
 
-   ret = ci_usb_phy_init(ci);
-   if (ret) {
-   dev_err(dev, "unable to init phy: %d\n", ret);
-   return ret;
-   }
-
ci->hw_bank.phys = res->start;
 
ci->irq = platform_get_irq(pdev, 0);
@@ -1025,7 +1024,6 @@ static int ci_hdrc_probe(struct platform_device *pdev)
 stop:
ci_role_destroy(ci);
 deinit_phy:
-   ci_usb_phy_exit(ci);
 
return ret;
 }
@@ -1044,7 +1042,6 @@ static int ci_hdrc_remove(struct platform_device *pdev)
ci_extcon_unregister(ci);
ci_role_destroy(ci);
ci_hdrc_enter_lpm(ci, true);
-   ci_usb_phy_exit(ci);
 
return 0;
 }
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
index 053bac9d983c..523c155daea8 100644
--- a/drivers/usb/chipidea/host.c
+++ b/drivers/usb/chipidea/host.c
@@ -87,9 +87,7 @@ static int ehci_ci_reset(struct usb_hcd *hcd)
if (ret)
return ret;
 
-   ci_platform_configure(ci);
-
-   return ret;
+   return ci_platform_configure(ci);
 }
 
 static const struct ehci_driver_overrides ehci_ci_overrides = {
@@ -186,6 +184,7 @@ static void host_stop(struct ci_hdrc *ci)
if (hcd) {
usb_remove_hcd(hcd);
usb_put_hcd(hcd);
+   ci_usb_phy_exit(ci);
if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
(ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
regulator_disable(ci->platdata->reg_vbus);
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index 065f5d97aa67..8f44e2d1e0c0 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1534,6 +1534,7 @@ static int ci_udc_vbus_session(struct usb_gadget 
*_gadget, int is_active)
if (ci->driver)
ci->driver->disconnect(>gadget);
hw_device_state(ci, 0);
+   ci_usb_phy_exit(ci);