Re: [PATCH v1 2/9] mailbox: Add NVIDIA Tegra XUSB mailbox driver

2014-06-25 Thread Andrew Bresticker 
On Wed, Jun 25, 2014 at 3:02 PM, Stephen Warren  wrote:
> On 06/18/2014 12:16 AM, Andrew Bresticker wrote:
>> The Tegra XHCI controller communicates requests to the host through
>> a mailbox interface.  Host drivers which can handle these requests,
>> such as the Tegra XUSB pad controller driver and upcoming Tegra XHCI
>> host controller driver, can send messages and register to be notified
>> of incoming messages.
>
>> diff --git a/include/linux/tegra-xusb-mbox.h 
>> b/include/linux/tegra-xusb-mbox.h
>
>> +extern int tegra_xusb_mbox_register_notifier(struct tegra_xusb_mbox *mbox,
>> +  struct notifier_block *nb);
>> +extern void tegra_xusb_mbox_unregister_notifier(struct tegra_xusb_mbox 
>> *mbox,
>> + struct notifier_block *nb);
>> +extern int tegra_xusb_mbox_send(struct tegra_xusb_mbox *mbox,
>> + enum tegra_xusb_mbox_cmd cmd, u32 data);
>> +extern struct tegra_xusb_mbox *
>> +tegra_xusb_mbox_lookup_by_phandle(struct device_node *np, const char *prop);
>
> This seems to use a custom API. I've seen mention of a mailbox
> subsystem, and I assume that has a standardized API. Should this driver
> implement that instead?

All the mailbox drivers currently use a custom API, but there is
indeed a patch series floating around to create a generic mailbox
framework, though it hasn't landed in -next yet.  I can take a look at
how this driver would fit into that framework.
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Re: [PATCH v1 2/9] mailbox: Add NVIDIA Tegra XUSB mailbox driver

2014-06-25 Thread Stephen Warren 
On 06/18/2014 12:16 AM, Andrew Bresticker wrote:
> The Tegra XHCI controller communicates requests to the host through
> a mailbox interface.  Host drivers which can handle these requests,
> such as the Tegra XUSB pad controller driver and upcoming Tegra XHCI
> host controller driver, can send messages and register to be notified
> of incoming messages.

> diff --git a/include/linux/tegra-xusb-mbox.h b/include/linux/tegra-xusb-mbox.h

> +extern int tegra_xusb_mbox_register_notifier(struct tegra_xusb_mbox *mbox,
> +  struct notifier_block *nb);
> +extern void tegra_xusb_mbox_unregister_notifier(struct tegra_xusb_mbox *mbox,
> + struct notifier_block *nb);
> +extern int tegra_xusb_mbox_send(struct tegra_xusb_mbox *mbox,
> + enum tegra_xusb_mbox_cmd cmd, u32 data);
> +extern struct tegra_xusb_mbox *
> +tegra_xusb_mbox_lookup_by_phandle(struct device_node *np, const char *prop);

This seems to use a custom API. I've seen mention of a mailbox
subsystem, and I assume that has a standardized API. Should this driver
implement that instead?
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[PATCH v1 2/9] mailbox: Add NVIDIA Tegra XUSB mailbox driver

2014-06-17 Thread Andrew Bresticker 
The Tegra XHCI controller communicates requests to the host through
a mailbox interface.  Host drivers which can handle these requests,
such as the Tegra XUSB pad controller driver and upcoming Tegra XHCI
host controller driver, can send messages and register to be notified
of incoming messages.

Signed-off-by: Andrew Bresticker 
---
 drivers/mailbox/Kconfig   |   7 +
 drivers/mailbox/Makefile  |   2 +
 drivers/mailbox/tegra-xusb-mbox.c | 308 ++
 include/linux/tegra-xusb-mbox.h   |  98 
 4 files changed, 415 insertions(+)
 create mode 100644 drivers/mailbox/tegra-xusb-mbox.c
 create mode 100644 include/linux/tegra-xusb-mbox.h

diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index c8b5c13..510c44a 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -50,4 +50,11 @@ config OMAP_MBOX_KFIFO_SIZE
  Specify the default size of mailbox's kfifo buffers (bytes).
  This can also be changed at runtime (via the mbox_kfifo_size
  module parameter).
+
+config TEGRA_XUSB_MBOX
+   bool "NVIDIA Tegra XUSB mailbox support"
+   depends on ARCH_TEGRA
+   help
+ Mailbox driver used for communication with the firmware on the
+ on-chip XHCI controller present on NVIDIA Tegra124 SoCs.
 endif
diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile
index e0facb3..8cc53ef 100644
--- a/drivers/mailbox/Makefile
+++ b/drivers/mailbox/Makefile
@@ -5,3 +5,5 @@ obj-$(CONFIG_OMAP1_MBOX)+= mailbox_omap1.o
 mailbox_omap1-objs := mailbox-omap1.o
 obj-$(CONFIG_OMAP2PLUS_MBOX)   += mailbox_omap2.o
 mailbox_omap2-objs := mailbox-omap2.o
+
+obj-$(CONFIG_TEGRA_XUSB_MBOX)  += tegra-xusb-mbox.o
diff --git a/drivers/mailbox/tegra-xusb-mbox.c 
b/drivers/mailbox/tegra-xusb-mbox.c
new file mode 100644
index 000..a4d2929
--- /dev/null
+++ b/drivers/mailbox/tegra-xusb-mbox.c
@@ -0,0 +1,308 @@
+/*
+ * NVIDIA Tegra XUSB mailbox driver
+ *
+ * Copyright (C) 2014 NVIDIA Corporation
+ * Copyright (C) 2014 Google, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define XUSB_CFG_ARU_MBOX_CMD  0xe4
+#define  MBOX_FALC_INT_EN  BIT(27)
+#define  MBOX_PME_INT_EN   BIT(28)
+#define  MBOX_SMI_INT_EN   BIT(29)
+#define  MBOX_XHCI_INT_EN  BIT(30)
+#define  MBOX_INT_EN   BIT(31)
+#define XUSB_CFG_ARU_MBOX_DATA_IN  0xe8
+#define  CMD_DATA_SHIFT0
+#define  CMD_DATA_MASK 0xff
+#define  CMD_TYPE_SHIFT24
+#define  CMD_TYPE_MASK 0xff
+#define XUSB_CFG_ARU_MBOX_DATA_OUT 0xec
+#define XUSB_CFG_ARU_MBOX_OWNER0xf0
+#define  MBOX_OWNER_NONE   0
+#define  MBOX_OWNER_FW 1
+#define  MBOX_OWNER_SW 2
+#define XUSB_CFG_ARU_SMI_INTR  0x428
+#define  MBOX_SMI_INTR_FW_HANG BIT(1)
+#define  MBOX_SMI_INTR_EN  BIT(3)
+
+#define XUSB_MBOX_IDLE_TIMEOUT 20
+#define XUSB_MBOX_ACQUIRE_TIMEOUT  10
+
+struct tegra_xusb_mbox {
+   struct device *dev;
+   int irq;
+   struct raw_notifier_head notifiers;
+   struct mutex lock;
+   void __iomem *regs;
+};
+
+static struct platform_driver tegra_xusb_mbox_driver;
+
+int tegra_xusb_mbox_register_notifier(struct tegra_xusb_mbox *mbox,
+ struct notifier_block *nb)
+{
+   int ret;
+
+   mutex_lock(&mbox->lock);
+   ret = raw_notifier_chain_register(&mbox->notifiers, nb);
+   mutex_unlock(&mbox->lock);
+
+   return ret;
+}
+EXPORT_SYMBOL(tegra_xusb_mbox_register_notifier);
+
+void tegra_xusb_mbox_unregister_notifier(struct tegra_xusb_mbox *mbox,
+struct notifier_block *nb)
+{
+   mutex_lock(&mbox->lock);
+   raw_notifier_chain_unregister(&mbox->notifiers, nb);
+   mutex_unlock(&mbox->lock);
+}
+EXPORT_SYMBOL(tegra_xusb_mbox_unregister_notifier);
+
+static int tegra_xusb_mbox_match_node(struct device *dev, void *data)
+{
+   struct device_node *np = dat