Re: [PATCH v5] phy: Renesas R-Car Gen2 PHY driver

2014-09-05 Thread Sergei Shtylyov

Hello.

On 08/20/2014 06:42 PM, Kishon Vijay Abraham I wrote:

   Sorry for the delayed reply, I was busy in other kernel areas. Should have 
replied yesterday though...


[...]


Index: linux-phy/drivers/phy/phy-rcar-gen2.c
===
--- /dev/null
+++ linux-phy/drivers/phy/phy-rcar-gen2.c
@@ -0,0 +1,341 @@
+/*
+ * Renesas R-Car Gen2 PHY driver
+ *
+ * Copyright (C) 2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Cogent Embedded, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include linux/clk.h
+#include linux/delay.h
+#include linux/io.h
+#include linux/module.h
+#include linux/of.h
+#include linux/phy/phy.h
+#include linux/platform_device.h
+#include linux/spinlock.h
+
+#include asm/cmpxchg.h
+
+#define USBHS_LPSTS0x02
+#define USBHS_UGCTRL   0x80
+#define USBHS_UGCTRL2  0x84
+#define USBHS_UGSTS0x88/* The manuals have 0x90 */
+
+/* Low Power Status register (LPSTS) */
+#define USBHS_LPSTS_SUSPM  0x4000
+
+/* USB General control register (UGCTRL) */
+#define USBHS_UGCTRL_CONNECT   0x0004
+#define USBHS_UGCTRL_PLLRESET  0x0001
+
+/* USB General control register 2 (UGCTRL2) */
+#define USBHS_UGCTRL2_USB2SEL  0x8000
+#define USBHS_UGCTRL2_USB2SEL_PCI  0x
+#define USBHS_UGCTRL2_USB2SEL_USB300x8000
+#define USBHS_UGCTRL2_USB0SEL  0x0030
+#define USBHS_UGCTRL2_USB0SEL_PCI  0x0010
+#define USBHS_UGCTRL2_USB0SEL_HS_USB   0x0030
+
+/* USB General status register (UGSTS) */
+#define USBHS_UGSTS_LOCK   0x0300 /* The manuals have 0x3 */
+
+#define PHYS_PER_CHANNEL   2
+
+struct rcar_gen2_phy {
+   struct phy *phy;
+   struct rcar_gen2_channel *channel;
+   int number;
+   u32 select_value;
+};
+
+struct rcar_gen2_channel {
+   struct device_node *of_node;
+   struct rcar_gen2_phy_driver *drv;
+   struct rcar_gen2_phy phys[PHYS_PER_CHANNEL];
+   int selected_phy;
+   u32 select_mask;
+};
+
+struct rcar_gen2_phy_driver {
+   void __iomem *base;
+   struct clk *clk;
+   spinlock_t lock;
+   int num_channels;
+   struct rcar_gen2_channel *channels;
+};
+
+static int rcar_gen2_phy_init(struct phy *p)
+{
+   struct rcar_gen2_phy *phy = phy_get_drvdata(p);
+   struct rcar_gen2_channel *channel = phy-channel;
+   struct rcar_gen2_phy_driver *drv = channel-drv;
+   unsigned long flags;
+   u32 ugctrl2;
+
+   /*
+* Try to acquire exclusive access to PHY.  The first driver calling
+* phy_init()  on a given channel wins, and all attempts  to use another
+* PHY on this channel will fail until phy_exit() is called by the first
+* driver.   Achieving this with cmpxcgh() should be SMP-safe.
+*/
+   if (cmpxchg(channel-selected_phy, -1, phy-number) != -1)
+   return -EBUSY;



This should be done in phy_get no?


   No, if you mean the of_xlate() method: I need a place to release the lock 
which I wouldn't have in this case.
   If you mean modifying _of_phy_get(), it has no notion of channels and 
probably shouldn't have since the channels are a special case for this driver 
(and maybe some others) ...



Can we add this in phy-core? There might be other users who want to have
exclusive access within the same phy provider.


   The exclusive access is not within the provider in my case, it's within a 
channel (each of which has a corresponding DT subnode), so I don't think it's 
well representable in the phy-core. I'm not using your suggested 
subnode-per-PHY representation since it doesn't really fit my case well...



Rest of it looks fine to me.


   Thanks.


Thanks
Kishon


WBR, Sergei

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Re: [PATCH v5] phy: Renesas R-Car Gen2 PHY driver

2014-08-20 Thread Kishon Vijay Abraham I
Hi,

On Wednesday 23 July 2014 12:57 AM, Sergei Shtylyov wrote:
.
.
snip
.
.

 Index: linux-phy/drivers/phy/phy-rcar-gen2.c
 ===
 --- /dev/null
 +++ linux-phy/drivers/phy/phy-rcar-gen2.c
 @@ -0,0 +1,341 @@
 +/*
 + * Renesas R-Car Gen2 PHY driver
 + *
 + * Copyright (C) 2014 Renesas Solutions Corp.
 + * Copyright (C) 2014 Cogent Embedded, Inc.
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License version 2 as
 + * published by the Free Software Foundation.
 + */
 +
 +#include linux/clk.h
 +#include linux/delay.h
 +#include linux/io.h
 +#include linux/module.h
 +#include linux/of.h
 +#include linux/phy/phy.h
 +#include linux/platform_device.h
 +#include linux/spinlock.h
 +
 +#include asm/cmpxchg.h
 +
 +#define USBHS_LPSTS  0x02
 +#define USBHS_UGCTRL 0x80
 +#define USBHS_UGCTRL20x84
 +#define USBHS_UGSTS  0x88/* The manuals have 0x90 */
 +
 +/* Low Power Status register (LPSTS) */
 +#define USBHS_LPSTS_SUSPM0x4000
 +
 +/* USB General control register (UGCTRL) */
 +#define USBHS_UGCTRL_CONNECT 0x0004
 +#define USBHS_UGCTRL_PLLRESET0x0001
 +
 +/* USB General control register 2 (UGCTRL2) */
 +#define USBHS_UGCTRL2_USB2SEL0x8000
 +#define USBHS_UGCTRL2_USB2SEL_PCI0x
 +#define USBHS_UGCTRL2_USB2SEL_USB30  0x8000
 +#define USBHS_UGCTRL2_USB0SEL0x0030
 +#define USBHS_UGCTRL2_USB0SEL_PCI0x0010
 +#define USBHS_UGCTRL2_USB0SEL_HS_USB 0x0030
 +
 +/* USB General status register (UGSTS) */
 +#define USBHS_UGSTS_LOCK 0x0300 /* The manuals have 0x3 */
 +
 +#define PHYS_PER_CHANNEL 2
 +
 +struct rcar_gen2_phy {
 + struct phy *phy;
 + struct rcar_gen2_channel *channel;
 + int number;
 + u32 select_value;
 +};
 +
 +struct rcar_gen2_channel {
 + struct device_node *of_node;
 + struct rcar_gen2_phy_driver *drv;
 + struct rcar_gen2_phy phys[PHYS_PER_CHANNEL];
 + int selected_phy;
 + u32 select_mask;
 +};
 +
 +struct rcar_gen2_phy_driver {
 + void __iomem *base;
 + struct clk *clk;
 + spinlock_t lock;
 + int num_channels;
 + struct rcar_gen2_channel *channels;
 +};
 +
 +static int rcar_gen2_phy_init(struct phy *p)
 +{
 + struct rcar_gen2_phy *phy = phy_get_drvdata(p);
 + struct rcar_gen2_channel *channel = phy-channel;
 + struct rcar_gen2_phy_driver *drv = channel-drv;
 + unsigned long flags;
 + u32 ugctrl2;
 +
 + /*
 +  * Try to acquire exclusive access to PHY.  The first driver calling
 +  * phy_init()  on a given channel wins, and all attempts  to use another
 +  * PHY on this channel will fail until phy_exit() is called by the first
 +  * driver.   Achieving this with cmpxcgh() should be SMP-safe.
 +  */
 + if (cmpxchg(channel-selected_phy, -1, phy-number) != -1)
 + return -EBUSY;

This should be done in phy_get no?

Can we add this in phy-core? There might be other users who want to have
exclusive access within the same phy provider.

Rest of it looks fine to me.

Thanks
Kishon
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Re: [PATCH v5] phy: Renesas R-Car Gen2 PHY driver

2014-08-19 Thread Kishon Vijay Abraham I


On Tuesday 19 August 2014 03:54 AM, Sergei Shtylyov wrote:
 Hello.
 
 On 07/22/2014 11:27 PM, Sergei Shtylyov wrote:
 
 This PHY, though formally being a part of Renesas USBHS controller, contains 
 the
 UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls 
 them
 channels) to the different USB controllers: channel 0 can be connected to 
 either
 PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI 
 EHCI/OHCI
 or xHCI controllers.
 
 This is a new driver for this USB PHY currently already supported under 
 drivers/
 usb/phy/. The reason for writing the new driver was the requirement that the
 multiplexing  of USB channels to the controller be dynamic, depending on what
 USB drivers  are loaded,  rather than static as provided by the old driver. 
 The
 infrastructure provided by drivers/phy/phy-core.c  seems to fit that purpose
 ideally. The new driver only  supports device tree probing  for now.
 
 Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com
 
 ---
 The patch is against the 'next' branch of Kishon's 'linux-phy.git' repo.
 
Kishon, may I ask what was the problem with this patch? I don't see it in
 3.17-rc1 and you've never replied though nearly a month has passed...

It was too late to make it to 3.17.
Overall this patch looks much better. will take a closer look in a day.

Thanks
Kishon
 
 WBR, Sergei
 
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Re: [PATCH v5] phy: Renesas R-Car Gen2 PHY driver

2014-08-18 Thread Sergei Shtylyov

Hello.

On 07/22/2014 11:27 PM, Sergei Shtylyov wrote:


This PHY, though formally being a part of Renesas USBHS controller, contains the
UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them
channels) to the different USB controllers: channel 0 can be connected to either
PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI
or xHCI controllers.



This is a new driver for this USB PHY currently already supported under drivers/
usb/phy/. The reason for writing the new driver was the requirement that the
multiplexing  of USB channels to the controller be dynamic, depending on what
USB drivers  are loaded,  rather than static as provided by the old driver. The
infrastructure provided by drivers/phy/phy-core.c  seems to fit that purpose
ideally. The new driver only  supports device tree probing  for now.



Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com



---
The patch is against the 'next' branch of Kishon's 'linux-phy.git' repo.


   Kishon, may I ask what was the problem with this patch? I don't see it in 
3.17-rc1 and you've never replied though nearly a month has passed...


WBR, Sergei

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[PATCH v5] phy: Renesas R-Car Gen2 PHY driver

2014-07-22 Thread Sergei Shtylyov
This PHY, though formally being a part of Renesas USBHS controller, contains the
UGCTRL2 register that controls multiplexing of the USB ports (Renesas calls them
channels) to the different USB controllers: channel 0 can be connected to either
PCI EHCI/OHCI or USBHS controllers, channel 2 can be connected to PCI EHCI/OHCI
or xHCI controllers.

This is a new driver for this USB PHY currently already supported under drivers/
usb/phy/. The reason for writing the new driver was the requirement that the
multiplexing  of USB channels to the controller be dynamic, depending on what
USB drivers  are loaded,  rather than static as provided by the old driver. The
infrastructure provided by drivers/phy/phy-core.c  seems to fit that purpose
ideally. The new driver only  supports device tree probing  for now.

Signed-off-by: Sergei Shtylyov sergei.shtyl...@cogentembedded.com

---
The patch is against the 'next' branch of Kishon's 'linux-phy.git' repo.

Changes in version 5:
- added 'struct rcar_gen2_channel' to provide for exclusive binding to a single
  PHY on each channel, using cmpxchg() call in order to achieve exclusive PHY
  bind in the PHY init() method;
- moved 'drv' and 'select_mask' fields from 'struct rcar_gen2_phy' to 'struct
  rcar_gen2_channel';
- switched to per-channel device tree subnodes versus the PHY subnodes, thus
  replaced phys[] field of 'struct rcar_gen2_driver' with 'channels' that gets
  assigned with the memory allocated based on the number of device tree subnodes
  of the main PHY device node;
- moved #phy-cells property from the main PHY node to the channel subnodes,
  thus making them target to the phys properties of USB controller nodes
  instead of the main PHY node (and so changing the value from 2 to 1), thus
  having to add channel lookup loop to the xlate() method;
- added status property check via of_device_is_available() call to the xlate()
  method;
- dropped renesas,phy-select property, instead introducing reg property for
  the channel subnodes, reperesenting the USB channel number (and thus adding
  #address-cells and #size-cells to the main PHY node);  also returned to
  handling 3 USB channels versus 2;
- returned to initializing the UGCTRL2 register masks/values in the driver code
  versus reading them from renesas,ugctrl2-masks subnode property;
- added comments to misdocumented register/field #define's;
- added argument in devm_phy_create() call as its prototype changed upstream;
- removed spaces before tabs in the probe() method;
- resolved reject, refreshed the patch.

Changes in version 4:
- added subnodes to the USB PHY node, described their properties in the binding
  document; rewrote the probe() method to parse out PHY selection and UGCTRL2
  mask values out of these child nodes;
- changed NUM_USB_CHANNELS to 2, removed the former channel #1 support as we
  don't have control over it anyway;
- refreshed the patch.

Changes in version 3:
- removed 'rcar_gen2_usbhs_phy_ops', moving 'power_{on|off}' intializers to
  'rcar_gen2_phy_ops' and adding a check for USBHS PHY to power_{on|off}()
  methods;
- renamed the power_{on|off}() methods;
- replaced io{read|write}16() calls with {read|write}w();
- removed the comment to '#define USBHS_UGSTS_LOCK';
- broke the line in the dev_err() call in the probe() method;
- moved the driver's line in the 'Makefile' before OMAP drivers.

Changes in version 2:
- rebased the patch, resolving reject.

 Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt |   51 ++
 drivers/phy/Kconfig |7 
 drivers/phy/Makefile|1 
 drivers/phy/phy-rcar-gen2.c |  341 
 4 files changed, 400 insertions(+)

Index: linux-phy/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
===
--- /dev/null
+++ linux-phy/Documentation/devicetree/bindings/phy/rcar-gen2-phy.txt
@@ -0,0 +1,51 @@
+* Renesas R-Car generation 2 USB PHY
+
+This file provides information on what the device node for the R-Car generation
+2 USB PHY contains.
+
+Required properties:
+- compatible: renesas,usb-phy-r8a7790 if the device is a part of R8A7790 SoC.
+ renesas,usb-phy-r8a7791 if the device is a part of R8A7791 SoC.
+- reg: offset and length of the register block.
+- #address-cells: number of address cells for the USB channel subnodes, must
+ be 1.
+- #size-cells: number of size cells for the USB channel subnodes, must be 0.
+- clocks: clock phandle and specifier pair.
+- clock-names: string, clock input name, must be usbhs.
+
+The USB PHY device tree node should have the subnodes corresponding to the USB
+channels. These subnodes must contain the following properties:
+- reg: the USB controller selector; see the table below for the values.
+- #phy-cells: see phy-bindings.txt in the same directory, must be 1.
+
+The phandle's argument in the PHY specifier is the USB