Re: [PATCH 4/4] usb: Add APIs to access host registers from Tegra PHY
On Wed, 16 Jan 2013, Stephen Warren wrote:
> On 01/16/2013 08:08 AM, Alan Stern wrote:
> > On Wed, 16 Jan 2013, Venu Byravarasu wrote:
> >
> >> As Tegra PHY driver needs to access one of the Host registers,
> >> added few APIs.
>
> >> --- a/drivers/usb/host/ehci-tegra.c
> >> +++ b/drivers/usb/host/ehci-tegra.c
>
> >> +void tegra_ehci_set_wakeon_events(struct usb_phy *x, bool enable)
> >> +{
> >> + unsigned long val;
> >> + struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
> >> + void __iomem *base = hcd->regs;
> >> + u32 wake = USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN;
> >> +
> >> + val = readl(base + USB_PORTSC1);
> >> + if (enable)
> >> + val |= wake;
> >> + else
> >> + val &= ~wake;
> >> + writel(val, base + USB_PORTSC1);
> >> +}
> >
> > Here and below, this sort of code is highly questionable. You
> > evidently don't realize that some of the bits in the PORTSC registers
> > are R/WC. This means writing a 1 to these bits will clear them.
> >
> > Consequently it is almost always wrong to read a PORTSC register and
> > then write back the same (or a slightly modified) value.
>
> Sorry I'm not familiar with USB... Are the bits being manipulated here
> (i.e. USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN)
> standardized USBisms, or some custom Tegra stuff?
The _symbols_ are not standard (i.e., not used in the regular ehci-hcd
driver) but the _values_ are: compare with PORT_WKOC_E etc. in
include/linux/usb/ehci_defs.h. I'm not sure about the register
addresses, however.
> Anyway, is the solution here to do:
>
> val = readl(addr)
>
> // i.e. add the following line:
> val &= ~(all write-to-clear bits);
>
> if (enable) val |= wake; else val &= ~wake;
>
> writel(val, addr)
>
> ... or is there more broken than just that?
Nope, that's the right way to do it. There are loads of examples in
drivers/usb/host/ehci-hub.c; look at usages of PORT_RWC_BITS.
> Also note that the driver is already doing exactly what is in these new
> functions; the code is just being split out so that only the EHCI driver
> touches EHCI registers, and the PHY driver only touches PHY registers.
> Still, I'll admit it's a good time to fix any mistakes in this part of
> the code.
Agreed.
Alan Stern
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Re: [PATCH 4/4] usb: Add APIs to access host registers from Tegra PHY
On 01/16/2013 08:08 AM, Alan Stern wrote:
> On Wed, 16 Jan 2013, Venu Byravarasu wrote:
>
>> As Tegra PHY driver needs to access one of the Host registers,
>> added few APIs.
>> --- a/drivers/usb/host/ehci-tegra.c
>> +++ b/drivers/usb/host/ehci-tegra.c
>> +void tegra_ehci_set_wakeon_events(struct usb_phy *x, bool enable)
>> +{
>> +unsigned long val;
>> +struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
>> +void __iomem *base = hcd->regs;
>> +u32 wake = USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN;
>> +
>> +val = readl(base + USB_PORTSC1);
>> +if (enable)
>> +val |= wake;
>> +else
>> +val &= ~wake;
>> +writel(val, base + USB_PORTSC1);
>> +}
>
> Here and below, this sort of code is highly questionable. You
> evidently don't realize that some of the bits in the PORTSC registers
> are R/WC. This means writing a 1 to these bits will clear them.
>
> Consequently it is almost always wrong to read a PORTSC register and
> then write back the same (or a slightly modified) value.
Sorry I'm not familiar with USB... Are the bits being manipulated here
(i.e. USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN)
standardized USBisms, or some custom Tegra stuff?
Anyway, is the solution here to do:
val = readl(addr)
// i.e. add the following line:
val &= ~(all write-to-clear bits);
if (enable) val |= wake; else val &= ~wake;
writel(val, addr)
... or is there more broken than just that?
Also note that the driver is already doing exactly what is in these new
functions; the code is just being split out so that only the EHCI driver
touches EHCI registers, and the PHY driver only touches PHY registers.
Still, I'll admit it's a good time to fix any mistakes in this part of
the code.
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Re: [PATCH 4/4] usb: Add APIs to access host registers from Tegra PHY
On Wed, 16 Jan 2013, Venu Byravarasu wrote:
> As Tegra PHY driver needs to access one of the Host registers,
> added few APIs.
>
> Signed-off-by: Venu Byravarasu
> --- a/drivers/usb/host/ehci-tegra.c
> +++ b/drivers/usb/host/ehci-tegra.c
> @@ -605,6 +619,50 @@ static const struct dev_pm_ops tegra_ehci_pm_ops = {
>
> #endif
>
> +void tegra_ehci_set_wakeon_events(struct usb_phy *x, bool enable)
> +{
> + unsigned long val;
> + struct usb_hcd *hcd = bus_to_hcd(x->otg->host);
> + void __iomem *base = hcd->regs;
> + u32 wake = USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN;
> +
> + val = readl(base + USB_PORTSC1);
> + if (enable)
> + val |= wake;
> + else
> + val &= ~wake;
> + writel(val, base + USB_PORTSC1);
> +}
Here and below, this sort of code is highly questionable. You
evidently don't realize that some of the bits in the PORTSC registers
are R/WC. This means writing a 1 to these bits will clear them.
Consequently it is almost always wrong to read a PORTSC register and
then write back the same (or a slightly modified) value.
Alan Stern
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