Re: XHCI controller does not detect USB key insertion
On 05/12/2016 09:26, Neil Armstrong wrote: > On 12/02/2016 07:00 PM, Mason wrote: > >> On 02/12/2016 14:46, Neil Armstrong wrote: >> >>> On 12/02/2016 11:24 AM, Mason wrote: >>> (Sad face) All the documentation I have is in front of me, and nothing is ringing a bell. This is a Sigma Designs SoC, with a Pravega XHCI controller + Synopsys PHY. The documentation I have: Pravega_Dual_Mode_Datasheet_v10c.pdf (documents IP signals) Pravega_Dual_Mode_Controller_Programmers_Reference_manual_v1.pdf (documents IP registers) PHY databook (very low-level stuff) SoC register mapping (for how the SoC maps the IP signals to registers) >>> >>> You should have all the necessary bits to enable and configure the Embedded >>> Synopsys PHY ! >>> >>> You should have some register mapping of the PHY signals, or at least a way >>> to write those registers. >>> >>> You should have a reset, clock gate and eventually a power regulator to >>> enable in order to have the PHY running. >> >> I'll dump all the non-0 non-standard registers. Maybe someone >> more experienced than me will spot an obvious mistake. >> >> host_usb30_0_config: 0x2e800 >> - host_usb30_0_fladj 0x20 >> - host_usb30_0_usb30_controller_cg_disable 0x0 >> - host_usb30_0_mode_select 0x1 >> - host_usb30_0_device_reset_mode 0x0 >> >> host_usb30_0_control: 0x2e804 >> - host_usb30_0_app_lfps_u3_wp0x0 >> - host_usb30_0_link_up 0x1 >> - host_usb30_0_msi_msg_sent 0x0 >> - host_usb30_0_usb3_p0_over_current 0x0 >> - host_usb30_0_usb2_p0_over_current 0x0 >> >> host_usb30_0_test: 0x2e808 >> - host_usb30_0_test_powerdown_hsp0x0 >> - host_usb30_0_test_powerdown_ssp0x0 >> - host_usb30_0_test_burnin 0x0 >> - host_usb30_0_acjt_level0x14 >> - host_usb30_0_lane0_tx2rx_loopbk0x0 >> - host_usb30_0_rtune_req 0x0 >> >> host_usb30_0_status: 0x2e80c >> - host_usb30_0_phystatus 0x0 >> - host_usb30_0_usb2_p0_pp0x1 >> - host_usb30_0_usb3_p0_pp0x1 >> - host_usb30_0_usb3_sleep0x0 >> - host_usb30_0_rtune_ack 0x0 >> >> host_usb30_0_clk_rst_0: 0x2e810 >> - host_usb30_0_commononn 0x1 >> - host_usb30_0_portreset 0x0 >> - host_usb30_0_refclksel 0x2 >> - host_usb30_0_teneable 0x1 >> - host_usb30_0_fsel 0x27 >> - host_usb30_0_mpll_multiplier 0x19 >> - host_usb30_0_ref_clkdiv2 0x0 >> - host_usb30_0_ref_ssp_en0x1 >> - host_usb30_0_ref_use_pad 0x0 >> - host_usb30_0_ssc_en0x1 >> - host_usb30_0_ssc_range 0x0 >> >> host_usb30_0_clk_rst_1: 0x2e814 >> - host_usb30_0_ssc_ref_clk_sel 0x88 >> - host_usb30_0_sleepm0x1 >> - host_usb30_0_vbusvldext0x1 >> >> host_usb30_0_param_0: 0x2e818 >> - host_usb30_0_compdistune 0x4 >> - host_usb30_0_otgtune 0x4 >> - host_usb30_0_sqrxtune 0x3 >> - host_usb30_0_txfsltune 0x3 >> - host_usb30_0_txhsxvtune0x3 >> - host_usb30_0_txpreempltune 0x0 >> - host_usb30_0_txpreemppulsetune 0x0 >> - host_usb30_0_txrestune 0x1 >> - host_usb30_0_txrisetune0x2 >> - host_usb30_0_txvreftune0x4 >> >> host_usb30_0_param_1: 0x2e81c >> - host_usb30_0_los_bias 0x5 >> - host_usb30_0_los_level 0xc >> - host_usb30_0_pcs_rx_los_mask_val 0xf0 >> - host_usb30_0_pcs_tx_deemph_3p5db 0x18 >> - host_usb30_0_pcs_tx_deemph_6db 0x21 >> >> host_usb30_0_param_2: 0x2e820 >> - host_usb30_0_pcs_tx_swing_full 0x73 >> - host_usb30_0_lane0_tx_term_offset 0x0 >> - host_usb30_0_tx_vboost_lvl 0x4 >> >> host_usb30_0_SNPS_CR_ADD: 0x2e880 >> - host_usb30_0_snps_cr_add 0xe03c > > This is obviously
Re: XHCI controller does not detect USB key insertion
Hi Mason, On 12/02/2016 07:00 PM, Mason wrote: > [ Fix incorrect address for Felipe ] > > On 02/12/2016 14:46, Neil Armstrong wrote: > >> On 12/02/2016 11:24 AM, Mason wrote: >> >>> (Sad face) All the documentation I have is in front of me, and nothing >>> is ringing a bell. This is a Sigma Designs SoC, with a Pravega XHCI >>> controller + Synopsys PHY. >>> >>> The documentation I have: >>> >>> Pravega_Dual_Mode_Datasheet_v10c.pdf (documents IP signals) >>> Pravega_Dual_Mode_Controller_Programmers_Reference_manual_v1.pdf (documents >>> IP registers) >>> PHY databook (very low-level stuff) >>> SoC register mapping (for how the SoC maps the IP signals to registers) >> >> You should have all the necessary bits to enable and configure the Embedded >> Synopsys PHY ! >> >> You should have some register mapping of the PHY signals, or at least a way >> to write those registers. >> >> You should have a reset, clock gate and eventually a power regulator to >> enable in order to have the PHY running. > > I'll dump all the non-0 non-standard registers. Maybe someone > more experienced than me will spot an obvious mistake. > > host_usb30_0_config: 0x2e800 > - host_usb30_0_fladj 0x20 > - host_usb30_0_usb30_controller_cg_disable 0x0 > - host_usb30_0_mode_select 0x1 > - host_usb30_0_device_reset_mode 0x0 > > host_usb30_0_control: 0x2e804 > - host_usb30_0_app_lfps_u3_wp0x0 > - host_usb30_0_link_up 0x1 > - host_usb30_0_msi_msg_sent 0x0 > - host_usb30_0_usb3_p0_over_current 0x0 > - host_usb30_0_usb2_p0_over_current 0x0 > > host_usb30_0_test: 0x2e808 > - host_usb30_0_test_powerdown_hsp0x0 > - host_usb30_0_test_powerdown_ssp0x0 > - host_usb30_0_test_burnin 0x0 > - host_usb30_0_acjt_level0x14 > - host_usb30_0_lane0_tx2rx_loopbk0x0 > - host_usb30_0_rtune_req 0x0 > > host_usb30_0_status: 0x2e80c > - host_usb30_0_phystatus 0x0 > - host_usb30_0_usb2_p0_pp0x1 > - host_usb30_0_usb3_p0_pp0x1 > - host_usb30_0_usb3_sleep0x0 > - host_usb30_0_rtune_ack 0x0 > > host_usb30_0_clk_rst_0: 0x2e810 > - host_usb30_0_commononn 0x1 > - host_usb30_0_portreset 0x0 > - host_usb30_0_refclksel 0x2 > - host_usb30_0_teneable 0x1 > - host_usb30_0_fsel 0x27 > - host_usb30_0_mpll_multiplier 0x19 > - host_usb30_0_ref_clkdiv2 0x0 > - host_usb30_0_ref_ssp_en0x1 > - host_usb30_0_ref_use_pad 0x0 > - host_usb30_0_ssc_en0x1 > - host_usb30_0_ssc_range 0x0 > > host_usb30_0_clk_rst_1: 0x2e814 > - host_usb30_0_ssc_ref_clk_sel 0x88 > - host_usb30_0_sleepm0x1 > - host_usb30_0_vbusvldext0x1 > > host_usb30_0_param_0: 0x2e818 > - host_usb30_0_compdistune 0x4 > - host_usb30_0_otgtune 0x4 > - host_usb30_0_sqrxtune 0x3 > - host_usb30_0_txfsltune 0x3 > - host_usb30_0_txhsxvtune0x3 > - host_usb30_0_txpreempltune 0x0 > - host_usb30_0_txpreemppulsetune 0x0 > - host_usb30_0_txrestune 0x1 > - host_usb30_0_txrisetune0x2 > - host_usb30_0_txvreftune0x4 > > host_usb30_0_param_1: 0x2e81c > - host_usb30_0_los_bias 0x5 > - host_usb30_0_los_level 0xc > - host_usb30_0_pcs_rx_los_mask_val 0xf0 > - host_usb30_0_pcs_tx_deemph_3p5db 0x18 > - host_usb30_0_pcs_tx_deemph_6db 0x21 > > host_usb30_0_param_2: 0x2e820 > - host_usb30_0_pcs_tx_swing_full 0x73 > - host_usb30_0_lane0_tx_term_offset 0x0 > - host_usb30_0_tx_vboost_lvl 0x4 > > host_usb30_0_SNPS_CR_ADD: 0x2e880 > - host_usb30_0_snps_cr_add 0xe03c This is obviously the PHY registers. Commonly, the
Re: XHCI controller does not detect USB key insertion
[ Fix incorrect address for Felipe ] On 02/12/2016 14:46, Neil Armstrong wrote: > On 12/02/2016 11:24 AM, Mason wrote: > >> (Sad face) All the documentation I have is in front of me, and nothing >> is ringing a bell. This is a Sigma Designs SoC, with a Pravega XHCI >> controller + Synopsys PHY. >> >> The documentation I have: >> >> Pravega_Dual_Mode_Datasheet_v10c.pdf (documents IP signals) >> Pravega_Dual_Mode_Controller_Programmers_Reference_manual_v1.pdf (documents >> IP registers) >> PHY databook (very low-level stuff) >> SoC register mapping (for how the SoC maps the IP signals to registers) > > You should have all the necessary bits to enable and configure the Embedded > Synopsys PHY ! > > You should have some register mapping of the PHY signals, or at least a way > to write those registers. > > You should have a reset, clock gate and eventually a power regulator to > enable in order to have the PHY running. I'll dump all the non-0 non-standard registers. Maybe someone more experienced than me will spot an obvious mistake. host_usb30_0_config: 0x2e800 - host_usb30_0_fladj 0x20 - host_usb30_0_usb30_controller_cg_disable 0x0 - host_usb30_0_mode_select 0x1 - host_usb30_0_device_reset_mode 0x0 host_usb30_0_control: 0x2e804 - host_usb30_0_app_lfps_u3_wp0x0 - host_usb30_0_link_up 0x1 - host_usb30_0_msi_msg_sent 0x0 - host_usb30_0_usb3_p0_over_current 0x0 - host_usb30_0_usb2_p0_over_current 0x0 host_usb30_0_test: 0x2e808 - host_usb30_0_test_powerdown_hsp0x0 - host_usb30_0_test_powerdown_ssp0x0 - host_usb30_0_test_burnin 0x0 - host_usb30_0_acjt_level0x14 - host_usb30_0_lane0_tx2rx_loopbk0x0 - host_usb30_0_rtune_req 0x0 host_usb30_0_status: 0x2e80c - host_usb30_0_phystatus 0x0 - host_usb30_0_usb2_p0_pp0x1 - host_usb30_0_usb3_p0_pp0x1 - host_usb30_0_usb3_sleep0x0 - host_usb30_0_rtune_ack 0x0 host_usb30_0_clk_rst_0: 0x2e810 - host_usb30_0_commononn 0x1 - host_usb30_0_portreset 0x0 - host_usb30_0_refclksel 0x2 - host_usb30_0_teneable 0x1 - host_usb30_0_fsel 0x27 - host_usb30_0_mpll_multiplier 0x19 - host_usb30_0_ref_clkdiv2 0x0 - host_usb30_0_ref_ssp_en0x1 - host_usb30_0_ref_use_pad 0x0 - host_usb30_0_ssc_en0x1 - host_usb30_0_ssc_range 0x0 host_usb30_0_clk_rst_1: 0x2e814 - host_usb30_0_ssc_ref_clk_sel 0x88 - host_usb30_0_sleepm0x1 - host_usb30_0_vbusvldext0x1 host_usb30_0_param_0: 0x2e818 - host_usb30_0_compdistune 0x4 - host_usb30_0_otgtune 0x4 - host_usb30_0_sqrxtune 0x3 - host_usb30_0_txfsltune 0x3 - host_usb30_0_txhsxvtune0x3 - host_usb30_0_txpreempltune 0x0 - host_usb30_0_txpreemppulsetune 0x0 - host_usb30_0_txrestune 0x1 - host_usb30_0_txrisetune0x2 - host_usb30_0_txvreftune0x4 host_usb30_0_param_1: 0x2e81c - host_usb30_0_los_bias 0x5 - host_usb30_0_los_level 0xc - host_usb30_0_pcs_rx_los_mask_val 0xf0 - host_usb30_0_pcs_tx_deemph_3p5db 0x18 - host_usb30_0_pcs_tx_deemph_6db 0x21 host_usb30_0_param_2: 0x2e820 - host_usb30_0_pcs_tx_swing_full 0x73 - host_usb30_0_lane0_tx_term_offset 0x0 - host_usb30_0_tx_vboost_lvl 0x4 host_usb30_0_SNPS_CR_ADD: 0x2e880 - host_usb30_0_snps_cr_add 0xe03c DEVICE_AND_PORT_000: 0x7005 - sw_reset 0x0 - gen_resume 0x0 -
Re: XHCI controller does not detect USB key insertion
On 02/12/2016 14:46, Neil Armstrong wrote: > On 12/02/2016 11:24 AM, Mason wrote: > >> (Sad face) All the documentation I have is in front of me, and nothing >> is ringing a bell. This is a Sigma Designs SoC, with a Pravega XHCI >> controller + Synopsys PHY. >> >> The documentation I have: >> >> Pravega_Dual_Mode_Datasheet_v10c.pdf (documents IP signals) >> Pravega_Dual_Mode_Controller_Programmers_Reference_manual_v1.pdf (documents >> IP registers) >> PHY databook (very low-level stuff) >> SoC register mapping (for how the SoC maps the IP signals to registers) > > You should have all the necessary bits to enable and configure the Embedded > Synopsys PHY ! > > You should have some register mapping of the PHY signals, or at least a way > to write those registers. > > You should have a reset, clock gate and eventually a power regulator to > enable in order to have the PHY running. I'll dump all the non-0 non-standard registers. Maybe someone more experienced than me will spot an obvious mistake. host_usb30_0_config: 0x2e800 - host_usb30_0_fladj 0x20 - host_usb30_0_usb30_controller_cg_disable 0x0 - host_usb30_0_mode_select 0x1 - host_usb30_0_device_reset_mode 0x0 host_usb30_0_control: 0x2e804 - host_usb30_0_app_lfps_u3_wp0x0 - host_usb30_0_link_up 0x1 - host_usb30_0_msi_msg_sent 0x0 - host_usb30_0_usb3_p0_over_current 0x0 - host_usb30_0_usb2_p0_over_current 0x0 host_usb30_0_test: 0x2e808 - host_usb30_0_test_powerdown_hsp0x0 - host_usb30_0_test_powerdown_ssp0x0 - host_usb30_0_test_burnin 0x0 - host_usb30_0_acjt_level0x14 - host_usb30_0_lane0_tx2rx_loopbk0x0 - host_usb30_0_rtune_req 0x0 host_usb30_0_status: 0x2e80c - host_usb30_0_phystatus 0x0 - host_usb30_0_usb2_p0_pp0x1 - host_usb30_0_usb3_p0_pp0x1 - host_usb30_0_usb3_sleep0x0 - host_usb30_0_rtune_ack 0x0 host_usb30_0_clk_rst_0: 0x2e810 - host_usb30_0_commononn 0x1 - host_usb30_0_portreset 0x0 - host_usb30_0_refclksel 0x2 - host_usb30_0_teneable 0x1 - host_usb30_0_fsel 0x27 - host_usb30_0_mpll_multiplier 0x19 - host_usb30_0_ref_clkdiv2 0x0 - host_usb30_0_ref_ssp_en0x1 - host_usb30_0_ref_use_pad 0x0 - host_usb30_0_ssc_en0x1 - host_usb30_0_ssc_range 0x0 host_usb30_0_clk_rst_1: 0x2e814 - host_usb30_0_ssc_ref_clk_sel 0x88 - host_usb30_0_sleepm0x1 - host_usb30_0_vbusvldext0x1 host_usb30_0_param_0: 0x2e818 - host_usb30_0_compdistune 0x4 - host_usb30_0_otgtune 0x4 - host_usb30_0_sqrxtune 0x3 - host_usb30_0_txfsltune 0x3 - host_usb30_0_txhsxvtune0x3 - host_usb30_0_txpreempltune 0x0 - host_usb30_0_txpreemppulsetune 0x0 - host_usb30_0_txrestune 0x1 - host_usb30_0_txrisetune0x2 - host_usb30_0_txvreftune0x4 host_usb30_0_param_1: 0x2e81c - host_usb30_0_los_bias 0x5 - host_usb30_0_los_level 0xc - host_usb30_0_pcs_rx_los_mask_val 0xf0 - host_usb30_0_pcs_tx_deemph_3p5db 0x18 - host_usb30_0_pcs_tx_deemph_6db 0x21 host_usb30_0_param_2: 0x2e820 - host_usb30_0_pcs_tx_swing_full 0x73 - host_usb30_0_lane0_tx_term_offset 0x0 - host_usb30_0_tx_vboost_lvl 0x4 host_usb30_0_SNPS_CR_ADD: 0x2e880 - host_usb30_0_snps_cr_add 0xe03c DEVICE_AND_PORT_000: 0x7005 - sw_reset 0x0 - gen_resume 0x0 - ss_support
Re: XHCI controller does not detect USB key insertion
On Fri, Dec 02, 2016 at 12:08:21PM +0100, Mason wrote: > On 02/12/2016 11:42, Greg KH wrote: > > > On Fri, Dec 02, 2016 at 11:24:05AM +0100, Mason wrote: > > > >> # lsusb -v > >> Bus 001 Device 001: ID 1d6b:0002 > >> Bus 002 Device 001: ID 1d6b:0003 > >> > >> Isn't lsusb verbose supposed to print much more than that? > > > > Yes, if you are using the usbutils version of 'lsusb', odds are this is > > busybox, right? > > Right. (You win a digital cookie.) Yeah! {munch munch} > cd buildroot && make menuconfig > Drop BR2_PACKAGE_USBMOUNT (maybe it causes unexpected issues) > Add BR2_PACKAGE_USBUTILS (I want the real deal) > > > And these are just the root hubs, that the USB controller driver creates > > as "virtual" USB devices, they are not "real" USB devices on your bus. > > # lsusb --version > lsusb (usbutils) 007 > I see there's a 008 version. Wow, 008 was released in 2014, what type of old repo are you using that has 007 as the "latest"? And I really should go do a new update, lots of bug fixes have happened since 2014... > Am I missing out on important diagnostics? Not really, if you are not doing a lot of USB 3-only device specific work, which is where the majority of the changes have happened in the past 2 years in the tool. > > # lsusb -v > > Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub > Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub > Does everything look normal? Yes, two internal "virtual" hubs. > Or are there any investigation-worthy nuggets? You need to figure out why the driver isn't getting interrupts, that's the main problem for your hardware at the moment, lsusb isn't going to help you out at all with that... good luck! greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: XHCI controller does not detect USB key insertion
On 02/12/2016 11:42, Greg KH wrote: > On Fri, Dec 02, 2016 at 11:24:05AM +0100, Mason wrote: > >> # lsusb -v >> Bus 001 Device 001: ID 1d6b:0002 >> Bus 002 Device 001: ID 1d6b:0003 >> >> Isn't lsusb verbose supposed to print much more than that? > > Yes, if you are using the usbutils version of 'lsusb', odds are this is > busybox, right? Right. (You win a digital cookie.) cd buildroot && make menuconfig Drop BR2_PACKAGE_USBMOUNT (maybe it causes unexpected issues) Add BR2_PACKAGE_USBUTILS (I want the real deal) > And these are just the root hubs, that the USB controller driver creates > as "virtual" USB devices, they are not "real" USB devices on your bus. # lsusb --version lsusb (usbutils) 007 I see there's a 008 version. Am I missing out on important diagnostics? # lsusb -v Bus 002 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub Device Descriptor: bLength18 bDescriptorType 1 bcdUSB 3.00 bDeviceClass9 Hub bDeviceSubClass 0 Unused bDeviceProtocol 3 bMaxPacketSize0 9 idVendor 0x1d6b Linux Foundation idProduct 0x0003 3.0 root hub bcdDevice4.07 iManufacturer 3 Linux 4.7.0-rc6 xhci-hcd iProduct2 xHCI Host Controller iSerial 1 3004.usb3 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 31 bNumInterfaces 1 bConfigurationValue 1 iConfiguration 0 bmAttributes 0xe0 Self Powered Remote Wakeup MaxPower0mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber0 bAlternateSetting 0 bNumEndpoints 1 bInterfaceClass 9 Hub bInterfaceSubClass 0 Unused bInterfaceProtocol 0 Full speed (or root) hub iInterface 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x81 EP 1 IN bmAttributes3 Transfer TypeInterrupt Synch Type None Usage Type Data wMaxPacketSize 0x0004 1x 4 bytes bInterval 12 bMaxBurst 0 Hub Descriptor: bLength 12 bDescriptorType 42 nNbrPorts 1 wHubCharacteristic 0x000a No power switching (usb 1.0) Per-port overcurrent protection bPwrOn2PwrGood 10 * 2 milli seconds bHubContrCurrent 0 milli Ampere bHubDecLat 0.0 micro seconds wHubDelay 0 nano seconds DeviceRemovable0x00 Hub Port Status: Port 1: .02a0 5Gbps power Rx.Detect Binary Object Store Descriptor: bLength 5 bDescriptorType15 wTotalLength 15 bNumDeviceCaps 1 SuperSpeed USB Device Capability: bLength10 bDescriptorType16 bDevCapabilityType 3 bmAttributes 0x00 wSpeedsSupported 0x0008 Device can operate at SuperSpeed (5Gbps) bFunctionalitySupport 3 Lowest fully-functional device speed is SuperSpeed (5Gbps) bU1DevExitLat 0 micro seconds bU2DevExitLat 0 micro seconds Device Status: 0x0001 Self Powered Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Device Descriptor: bLength18 bDescriptorType 1 bcdUSB 2.00 bDeviceClass9 Hub bDeviceSubClass 0 Unused bDeviceProtocol 1 Single TT bMaxPacketSize064 idVendor 0x1d6b Linux Foundation idProduct 0x0002 2.0 root hub bcdDevice4.07 iManufacturer 3 Linux 4.7.0-rc6 xhci-hcd iProduct2 xHCI Host Controller iSerial 1 3004.usb3 bNumConfigurations 1 Configuration Descriptor: bLength 9 bDescriptorType 2 wTotalLength 25 bNumInterfaces 1 bConfigurationValue 1 iConfiguration 0 bmAttributes 0xe0 Self Powered Remote Wakeup MaxPower0mA Interface Descriptor: bLength 9 bDescriptorType 4 bInterfaceNumber0 bAlternateSetting 0 bNumEndpoints 1 bInterfaceClass 9 Hub bInterfaceSubClass 0 Unused bInterfaceProtocol 0 Full speed (or root) hub iInterface 0 Endpoint Descriptor: bLength 7 bDescriptorType 5 bEndpointAddress 0x81 EP 1 IN bmAttributes3 Transfer TypeInterrupt Synch Type None
Re: XHCI controller does not detect USB key insertion
On Fri, Dec 02, 2016 at 11:24:05AM +0100, Mason wrote: > >> # lsusb -v > >> Bus 001 Device 001: ID 1d6b:0002 > >> Bus 002 Device 001: ID 1d6b:0003 > > Isn't lsusb verbose supposed to print much more than that? Yes, if you are using the usbutils version of 'lsusb', odds are this is busybox, right? And these are just the root hubs, that the USB controller driver creates as "virtual" USB devices, they are not "real" USB devices on your bus. hope this helps, greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: XHCI controller does not detect USB key insertion
On 02/12/2016 10:03, Felipe Balbi wrote: > Mason wrote: > >> I'm trying out a SoC with a brand new USB controller, which is (supposedly) >> a standard XHCI controller. In theory, I would just need to build the right >> driver, and everything would auto-magically work, right? > > perhaps, but there might be needed initialization of other resources > like PHYs and stuff like that. Let me dive into additional details... First of all, there is a register aptly called "USB3_RESET" which is used to release several USB3-related blocks from reset. Of course, that's the first register I tweaked :-) There are *3* address ranges with USB3-related registers. 1) one called host_usb30_xhcl (I believe "xhcl" is a typo for "xhci") This is the address I passed to the Linux driver. The first register is CAPLENGTH_VERSION. I assume these are the standard XHCI registers. (Last register is XHCL_EXTENDED_CAP3_USB3 at offset 0xc008) 2) one called host_usb30_port This contains "Device and Port Specific Registers". Is it standard? How is Linux supposed to know where to find it? Contains registers such as Device Transaction Status Device UTMI command and status for USB2 Set ISOC Delay USB3 Function Notification Rx DMA BD Start Address for Control Endpoint EP Burst Size Tx DMA BD Start Address Control Endpoint EP $N IN/OUT Device Notification Register EP_Isochronous Timestamp Are registers named LTSSM_TIMER_REGISTER{1,2,3} standard? they have fields such as reg_12_ms_timeout (and other numbers like 2, 6, 100, 300) 3) one called host_usb30 This contains lower-level stuff 0x2e800 CONFIG 0x2e804 CONTROL 0x2e808 TEST 0x2e80c STATUS 0x2e810 CLK_RST_0 0x2e814 CLK_RST_1 0x2e818 PARAM_0 0x2e81c PARAM_1 0x2e820 PARAM_2 0x2e880 SNPS_CR_ADD 0x2e884 SNPS_CR_DATA 0x2e8c0 RESET_CTRL I haven't touched any of these so far. >> # lsusb -v >> Bus 001 Device 001: ID 1d6b:0002 >> Bus 002 Device 001: ID 1d6b:0003 Isn't lsusb verbose supposed to print much more than that? >> I'd like to hear suggestions about what I can tweak to fix the problem. > > go to your documentation and see if you have initialized > everything. Which SoC is this? (Sad face) All the documentation I have is in front of me, and nothing is ringing a bell. This is a Sigma Designs SoC, with a Pravega XHCI controller + Synopsys PHY. The documentation I have: Pravega_Dual_Mode_Datasheet_v10c.pdf (documents IP signals) Pravega_Dual_Mode_Controller_Programmers_Reference_manual_v1.pdf (documents IP registers) PHY databook (very low-level stuff) SoC register mapping (for how the SoC maps the IP signals to registers) So far, I'm stumped :-( Regards. -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: XHCI controller does not detect USB key insertion
Hi, Masonwrites: > Hello everyone, > > I'm trying out a SoC with a brand new USB controller, which is (supposedly) > a standard XHCI controller. In theory, I would just need to build the right > driver, and everything would auto-magically work, right? perhaps, but there might be needed initialization of other resources like PHYs and stuff like that. > So my defconfig contains: > > CONFIG_USB=y > CONFIG_USB_ANNOUNCE_NEW_DEVICES=y > CONFIG_USB_XHCI_HCD=y > CONFIG_USB_XHCI_PLATFORM=y > CONFIG_USB_STORAGE=y > CONFIG_USB_STORAGE_DEBUG=y > > > And my device tree contains: > > usb3@3004 { > compatible = "generic-xhci"; > reg = <0x3004 0x1>; > interrupts = ; > }; > > > The boot messages I get: > > [1.618214] xhci-hcd 3004.usb3: xHCI Host Controller > [1.623611] xhci-hcd 3004.usb3: new USB bus registered, assigned bus > number 1 > [1.631181] reset function is xhci_plat_setup > [1.635588] xhci_plat_setup from usb_add_hcd > [1.640109] xhci-hcd 3004.usb3: hcc params 0x30003192 hci version > 0x100 quirks 0x00010010 > [1.648766] xhci-hcd 3004.usb3: irq 22, io mem 0x3004 > [1.654572] xhci_plat_start from usb_add_hcd > [1.659086] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 > [1.665943] usb usb1: New USB device strings: Mfr=3, Product=2, > SerialNumber=1 > [1.673228] usb usb1: Product: xHCI Host Controller > [1.678154] usb usb1: Manufacturer: Linux 4.7.0-rc6 xhci-hcd > [1.683865] usb usb1: SerialNumber: 3004.usb3 > [1.689391] hub 1-0:1.0: USB hub found > [1.693227] hub 1-0:1.0: 1 port detected > [1.697601] xhci-hcd 3004.usb3: xHCI Host Controller > [1.702983] xhci-hcd 3004.usb3: new USB bus registered, assigned bus > number 2 > [1.710545] reset function is xhci_plat_setup > [1.714950] xhci_plat_setup from usb_add_hcd > [1.719265] xhci_plat_start from usb_add_hcd > [1.723653] usb usb2: We don't know the algorithms for LPM for this host, > disabling LPM. > [1.731956] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 > [1.738814] usb usb2: New USB device strings: Mfr=3, Product=2, > SerialNumber=1 > [1.746100] usb usb2: Product: xHCI Host Controller > [1.751025] usb usb2: Manufacturer: Linux 4.7.0-rc6 xhci-hcd > [1.756736] usb usb2: SerialNumber: 3004.usb3 > [1.762195] hub 2-0:1.0: USB hub found > [1.766027] hub 2-0:1.0: 1 port detected > [1.770661] usbcore: registered new interface driver usb-storage > [1.784584] usbcore: registered new interface driver usbhid > [1.790213] usbhid: USB HID core driver > > Which looks encouraging, right? yes > Am I supposed to have had USB interrupts at that point? nope, unless a device was already plugged in. > # cat /proc/interrupts >CPU0 CPU1 CPU2 CPU3 > 20:609365393356 GIC-0 29 Edge twd > 21:101 0 0 0 INTC 1 Level > serial > 22: 0 0 0 0 INTC 67 Level > xhci-hcd:usb1 > IPI0: 0 0 0 0 CPU wakeup interrupts > IPI1: 0 0 0 0 Timer broadcast interrupts > IPI2:794620 1223 1045 Rescheduling interrupts > IPI3: 0 37 37 37 Function call interrupts > IPI4: 0 0 0 0 CPU stop interrupts > IPI5: 0 0 0 0 IRQ work interrupts > IPI6: 0 0 0 0 completion interrupts > Err: 0 > > > When I insert a USB key, nothing happens :-( > > # lsusb -v > Bus 001 Device 001: ID 1d6b:0002 > Bus 002 Device 001: ID 1d6b:0003 > > > I'd like to hear suggestions about what I can tweak to fix the problem. go to your documentation and see if you have initialized everything. Which SoC is this? -- balbi -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
XHCI controller does not detect USB key insertion
Hello everyone, I'm trying out a SoC with a brand new USB controller, which is (supposedly) a standard XHCI controller. In theory, I would just need to build the right driver, and everything would auto-magically work, right? So my defconfig contains: CONFIG_USB=y CONFIG_USB_ANNOUNCE_NEW_DEVICES=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_DEBUG=y And my device tree contains: usb3@3004 { compatible = "generic-xhci"; reg = <0x3004 0x1>; interrupts = ; }; The boot messages I get: [1.618214] xhci-hcd 3004.usb3: xHCI Host Controller [1.623611] xhci-hcd 3004.usb3: new USB bus registered, assigned bus number 1 [1.631181] reset function is xhci_plat_setup [1.635588] xhci_plat_setup from usb_add_hcd [1.640109] xhci-hcd 3004.usb3: hcc params 0x30003192 hci version 0x100 quirks 0x00010010 [1.648766] xhci-hcd 3004.usb3: irq 22, io mem 0x3004 [1.654572] xhci_plat_start from usb_add_hcd [1.659086] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 [1.665943] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [1.673228] usb usb1: Product: xHCI Host Controller [1.678154] usb usb1: Manufacturer: Linux 4.7.0-rc6 xhci-hcd [1.683865] usb usb1: SerialNumber: 3004.usb3 [1.689391] hub 1-0:1.0: USB hub found [1.693227] hub 1-0:1.0: 1 port detected [1.697601] xhci-hcd 3004.usb3: xHCI Host Controller [1.702983] xhci-hcd 3004.usb3: new USB bus registered, assigned bus number 2 [1.710545] reset function is xhci_plat_setup [1.714950] xhci_plat_setup from usb_add_hcd [1.719265] xhci_plat_start from usb_add_hcd [1.723653] usb usb2: We don't know the algorithms for LPM for this host, disabling LPM. [1.731956] usb usb2: New USB device found, idVendor=1d6b, idProduct=0003 [1.738814] usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1 [1.746100] usb usb2: Product: xHCI Host Controller [1.751025] usb usb2: Manufacturer: Linux 4.7.0-rc6 xhci-hcd [1.756736] usb usb2: SerialNumber: 3004.usb3 [1.762195] hub 2-0:1.0: USB hub found [1.766027] hub 2-0:1.0: 1 port detected [1.770661] usbcore: registered new interface driver usb-storage [1.784584] usbcore: registered new interface driver usbhid [1.790213] usbhid: USB HID core driver Which looks encouraging, right? Am I supposed to have had USB interrupts at that point? # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 20:609365393356 GIC-0 29 Edge twd 21:101 0 0 0 INTC 1 Level serial 22: 0 0 0 0 INTC 67 Level xhci-hcd:usb1 IPI0: 0 0 0 0 CPU wakeup interrupts IPI1: 0 0 0 0 Timer broadcast interrupts IPI2:794620 1223 1045 Rescheduling interrupts IPI3: 0 37 37 37 Function call interrupts IPI4: 0 0 0 0 CPU stop interrupts IPI5: 0 0 0 0 IRQ work interrupts IPI6: 0 0 0 0 completion interrupts Err: 0 When I insert a USB key, nothing happens :-( # lsusb -v Bus 001 Device 001: ID 1d6b:0002 Bus 002 Device 001: ID 1d6b:0003 I'd like to hear suggestions about what I can tweak to fix the problem. Regards. -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html