Re: [PATCH v4 1/2] bcma: register bcma as device tree driver
On Wednesday 24 September 2014 23:19:12 Hauke Mehrtens wrote:
> On 09/24/2014 11:48 AM, Arnd Bergmann wrote:
> > On Wednesday 24 September 2014 00:04:18 Hauke Mehrtens wrote:
> >> I assume this should then look somehow like this:
> >>
> >> axi@1800 {
> >> compatible = "brcm,bus-axi";
> >> reg = <0x1800 0x1000>;
> >> ranges = <0x 0x1800 0x0010>;
> >> #address-cells = <1>;
> >> #size-cells = <1>;
> >>
> >> #interrupt-cells = <1>;
> >> interrupt-map = <
> >> /* ChipCommon */
> >> 0x 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH
> >>
> >> /* PCIe Controller 0 */
> >> 0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
> >> 0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH
> >> 0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH
> >> 0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH
> >> 0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH
> >> 0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH
> >>
> >> /* USB 2.0 Controller */
> >> 0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
> >> >;
> >> };
> >
> > Right, although I would add a few more '<', '>' and ',' for readability,
> > separating each line with a comma.
> >
> > You are also missing an 'interrupt-map-mask' property that lists which
> > bits of the address are significant.
> >
> > Are the interrupt numbers you have in the example (0, 0, 1, 2, ... 5, 0)
> > the actual numbers that are present in the hw registers?
>
> Some cores do have more than one IRQ. The NAND core uses 8 IRQs and the
> PCIe controller uses 5 (the vendor code just uses the last one which
> gets triggered always). How can I handle this cases where one device has
> more than one IRQ? There is no hardware register these IRQ get mapped
> to. As far as I know the driver just knows that this device needs more
> IRQs. Should I just add a special device node entry for such devices?
You create your own local irq domain (in the DT sense, not the Linux sense)
by using #interrrupt-cells = <1> or more, and then use whatever input data
you have available.
Ideally there would be registers that you can use to look up a token
you use (like the BCMA_MIPS_MIPS74K_INTMASK), if you don't have them
here, just use the local index, and pass that down to bcma_core_irq(),
from where you put it into the of_phandle_args.
Arnd
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Re: [PATCH v4 1/2] bcma: register bcma as device tree driver
On 09/24/2014 11:48 AM, Arnd Bergmann wrote:
> On Wednesday 24 September 2014 00:04:18 Hauke Mehrtens wrote:
>> I assume this should then look somehow like this:
>>
>> axi@1800 {
>> compatible = "brcm,bus-axi";
>> reg = <0x1800 0x1000>;
>> ranges = <0x 0x1800 0x0010>;
>> #address-cells = <1>;
>> #size-cells = <1>;
>>
>> #interrupt-cells = <1>;
>> interrupt-map = <
>> /* ChipCommon */
>> 0x 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH
>>
>> /* PCIe Controller 0 */
>> 0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
>> 0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH
>> 0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH
>> 0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH
>> 0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH
>> 0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH
>>
>> /* USB 2.0 Controller */
>> 0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
>> >;
>> };
>
> Right, although I would add a few more '<', '>' and ',' for readability,
> separating each line with a comma.
>
> You are also missing an 'interrupt-map-mask' property that lists which
> bits of the address are significant.
>
> Are the interrupt numbers you have in the example (0, 0, 1, 2, ... 5, 0)
> the actual numbers that are present in the hw registers?
Some cores do have more than one IRQ. The NAND core uses 8 IRQs and the
PCIe controller uses 5 (the vendor code just uses the last one which
gets triggered always). How can I handle this cases where one device has
more than one IRQ? There is no hardware register these IRQ get mapped
to. As far as I know the driver just knows that this device needs more
IRQs. Should I just add a special device node entry for such devices?
>> How does the mapping of these interrupts to the devices work?
>
> The same way that of_irq_parse_and_map_pci() works (the second half of it).
> It's a very similar situation: you have a discoverable bus on which the
> interrupts are listed in a different domain from which they are supposed to
> be on the parent. The trick is to make up your own address property
> and of_phandle_args on the stack and fill that with the data from
> the hw bus scan, so you can get into the middle of the normal DT
> irq code that gets them from device nodes.
Thanks for the description, that worked for me.
>> Do I have to add a device tree entry for every device after all?
>
> No, unless you want to add other properties in the node, such as
> a MAC address, but then you still only need some of the devices.
>
>> Do you have some example code where this is handled in code, I could not
>> find the code doing this for PCI.
>
> drivers/of/of_pci_irq.c, though the hard part is done in drivers/of/irq.c,
> which parses the interrupt-map and interrupt-map-mask properties.
I will split this patch into two patches, one just adding the bcma
registration and an additional RFC patch adding the IRQ stuff.
Hauke
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Re: [PATCH v4 1/2] bcma: register bcma as device tree driver
On Wednesday 24 September 2014 00:04:18 Hauke Mehrtens wrote:
> I assume this should then look somehow like this:
>
> axi@1800 {
> compatible = "brcm,bus-axi";
> reg = <0x1800 0x1000>;
> ranges = <0x 0x1800 0x0010>;
> #address-cells = <1>;
> #size-cells = <1>;
>
> #interrupt-cells = <1>;
> interrupt-map = <
> /* ChipCommon */
> 0x 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH
>
> /* PCIe Controller 0 */
> 0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
> 0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH
> 0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH
> 0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH
> 0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH
> 0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH
>
> /* USB 2.0 Controller */
> 0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
> >;
> };
Right, although I would add a few more '<', '>' and ',' for readability,
separating each line with a comma.
You are also missing an 'interrupt-map-mask' property that lists which
bits of the address are significant.
Are the interrupt numbers you have in the example (0, 0, 1, 2, ... 5, 0)
the actual numbers that are present in the hw registers?
> How does the mapping of these interrupts to the devices work?
The same way that of_irq_parse_and_map_pci() works (the second half of it).
It's a very similar situation: you have a discoverable bus on which the
interrupts are listed in a different domain from which they are supposed to
be on the parent. The trick is to make up your own address property
and of_phandle_args on the stack and fill that with the data from
the hw bus scan, so you can get into the middle of the normal DT
irq code that gets them from device nodes.
> Do I have to add a device tree entry for every device after all?
No, unless you want to add other properties in the node, such as
a MAC address, but then you still only need some of the devices.
> Do you have some example code where this is handled in code, I could not
> find the code doing this for PCI.
drivers/of/of_pci_irq.c, though the hard part is done in drivers/of/irq.c,
which parses the interrupt-map and interrupt-map-mask properties.
Arnd
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Re: [PATCH v4 1/2] bcma: register bcma as device tree driver
On 09/22/2014 09:26 AM, Arnd Bergmann wrote:
> On Monday 22 September 2014 00:38:27 Hauke Mehrtens wrote:
>> +
>> +- reg : iomem address range of chipcommon core
>> +
>> +The cores on the AXI bus are automatically detected by bcma with the
>> +memory ranges they are using and they get registered afterwards.
>> +Automatic detection of the IRQ number is not reliable on
>> +BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
>> +them manually through device tree. The IRQ number and the device tree
>> +child entry will get assigned to the core with the matching reg address.
>> +
>> +Example:
>> +
>> + axi@1800 {
>> + compatible = "brcm,bus-axi";
>> + reg = <0x1800 0x1000>;
>> + ranges = <0x 0x1800 0x0010>;
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> +
>> + pcie@12000 {
>> + reg = <0x00012000 0x1000>;
>> + interrupts = ;
>> + };
>> +
>> + ethernet@24000 {
>> + reg = <0x00024000 0x1000>;
>> + interrupts = ;
>> + };
>> +
>> + ethernet@25000 {
>> + reg = <0x00025000 0x1000>;
>> + interrupts = ;
>> + };
>> + };
>>
>
> While reading through this new version, I had a new idea about how
> this could be handled better for any machines that have a unique
> number in the interrupt field: If you do the same thing as PCI
> and add an interrupt-map property [1], you can translate that
> number into a real interrupt specifier for the child nodes.
>
> This can work even if every device lists the local interrupt
> as '0', since you can have device-specific lookup entries if you
> use the correct interrupt-map-mask property.
>
> Arnd
>
> [1] http://www.openfirmware.org/1275/practice/imap/imap0_9d.pdf
>
I assume this should then look somehow like this:
axi@1800 {
compatible = "brcm,bus-axi";
reg = <0x1800 0x1000>;
ranges = <0x 0x1800 0x0010>;
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <1>;
interrupt-map = <
/* ChipCommon */
0x 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH
/* PCIe Controller 0 */
0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH
0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH
0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH
0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH
0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH
0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH
/* USB 2.0 Controller */
0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
>;
};
How does the mapping of these interrupts to the devices work?
Do I have to add a device tree entry for every device after all?
Do you have some example code where this is handled in code, I could not
find the code doing this for PCI.
Hauke
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Re: [PATCH v4 1/2] bcma: register bcma as device tree driver
On Monday 22 September 2014 00:38:27 Hauke Mehrtens wrote:
> +
> +- reg : iomem address range of chipcommon core
> +
> +The cores on the AXI bus are automatically detected by bcma with the
> +memory ranges they are using and they get registered afterwards.
> +Automatic detection of the IRQ number is not reliable on
> +BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
> +them manually through device tree. The IRQ number and the device tree
> +child entry will get assigned to the core with the matching reg address.
> +
> +Example:
> +
> + axi@1800 {
> + compatible = "brcm,bus-axi";
> + reg = <0x1800 0x1000>;
> + ranges = <0x 0x1800 0x0010>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + pcie@12000 {
> + reg = <0x00012000 0x1000>;
> + interrupts = ;
> + };
> +
> + ethernet@24000 {
> + reg = <0x00024000 0x1000>;
> + interrupts = ;
> + };
> +
> + ethernet@25000 {
> + reg = <0x00025000 0x1000>;
> + interrupts = ;
> + };
> + };
>
While reading through this new version, I had a new idea about how
this could be handled better for any machines that have a unique
number in the interrupt field: If you do the same thing as PCI
and add an interrupt-map property [1], you can translate that
number into a real interrupt specifier for the child nodes.
This can work even if every device lists the local interrupt
as '0', since you can have device-specific lookup entries if you
use the correct interrupt-map-mask property.
Arnd
[1] http://www.openfirmware.org/1275/practice/imap/imap0_9d.pdf
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