[linux-yocto][yocto-kernel-cache][yocto-5.15] features/kvm: enable kvm configs for arm64
From: Wenlin Kang The CONFIG_VIRTUALIZATION is not enabled for ARM64, but it is default for X86. And CONFIG_KVM depends on CONFIG_VIRTUALIZATION. In addition, the CONFIG_KVM is a bool type in ARM64, it could not be built as a kernel module, so split KVM configs out based the architecture to standalone files. Signed-off-by: Liu Haitao Signed-off-by: Wenlin Kang --- features/kvm/qemu-kvm-arm64.cfg | 3 +++ features/kvm/qemu-kvm-enable.scc | 5 + features/kvm/qemu-kvm-x86.cfg| 4 features/kvm/qemu-kvm.cfg| 3 --- 4 files changed, 12 insertions(+), 3 deletions(-) create mode 100644 features/kvm/qemu-kvm-arm64.cfg create mode 100644 features/kvm/qemu-kvm-x86.cfg diff --git a/features/kvm/qemu-kvm-arm64.cfg b/features/kvm/qemu-kvm-arm64.cfg new file mode 100644 index ..143a7bc4 --- /dev/null +++ b/features/kvm/qemu-kvm-arm64.cfg @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: MIT +CONFIG_VIRTUALIZATION=y +CONFIG_KVM=y diff --git a/features/kvm/qemu-kvm-enable.scc b/features/kvm/qemu-kvm-enable.scc index 880bdaa0..23b4af5f 100644 --- a/features/kvm/qemu-kvm-enable.scc +++ b/features/kvm/qemu-kvm-enable.scc @@ -3,3 +3,8 @@ define KFEATURE_DESCRIPTION "Enable KVM host support" define KFEATURE_COMPATIBILITY board kconf non-hardware qemu-kvm.cfg +if [ "$KARCH" = "x86_64" ] || [ "$KARCH" = "x86" ] || [ "$KARCH" = "i386" ]; then + kconf non-hardware qemu-kvm-x86.cfg +elif [ "$KARCH" = "arm64" ]; then + kconf non-hardware qemu-kvm-arm64.cfg +fi diff --git a/features/kvm/qemu-kvm-x86.cfg b/features/kvm/qemu-kvm-x86.cfg new file mode 100644 index ..5c885b9e --- /dev/null +++ b/features/kvm/qemu-kvm-x86.cfg @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: MIT +CONFIG_KVM=m +CONFIG_KVM_INTEL=m +CONFIG_KVM_AMD=m diff --git a/features/kvm/qemu-kvm.cfg b/features/kvm/qemu-kvm.cfg index aa0c29ff..3eef744e 100644 --- a/features/kvm/qemu-kvm.cfg +++ b/features/kvm/qemu-kvm.cfg @@ -1,7 +1,4 @@ # SPDX-License-Identifier: MIT -CONFIG_KVM=m -CONFIG_KVM_INTEL=m -CONFIG_KVM_AMD=m CONFIG_TUN=y # Macvtap -- 2.35.5 -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#14138): https://lists.yoctoproject.org/g/linux-yocto/message/14138 Mute This Topic: https://lists.yoctoproject.org/mt/107140874/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto][linux-yocto v6.6] kernel code for marvell octeon
Hi Bruce, Please help to merge this patch into our linux-yocto repo. repo: linux-yocto branch: v6.6/standard/cn-sdkv6.1/octeon v6.6/standard/preempt-rt/cn-sdkv6.1/octeon Thanks, Ruiqiang -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#14136): https://lists.yoctoproject.org/g/linux-yocto/message/14136 Mute This Topic: https://lists.yoctoproject.org/mt/107139151/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto] [PATCH] irqchip/gic-v3: change gic_ipi_track::lock type
From: Ruiqiang Hao When start with preempt-rt kernel, the following problem occurs. Change the type of gic_ipi_track::lock from spinlock_t to raw_spinlock_t to fix this. BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:46 in_atomic(): 1, irqs_disabled(): 128, non_block: 0, pid: 0, name: swapper/15 preempt_count: 6, expected: 0 RCU nest depth: 0, expected: 0 Preemption disabled at: [] __create_object+0x110/0x380 CPU: 15 PID: 0 Comm: swapper/15 Tainted: GW 6.1.90-rt18-yocto-preempt-rt #1 Hardware name: Marvell OcteonTX CN96XX board (DT) Call trace: dump_backtrace.part.0+0xe8/0xf4 show_stack+0x20/0x30 dump_stack_lvl+0x64/0x80 dump_stack+0x18/0x34 __might_resched+0x160/0x1c0 rt_spin_lock+0x38/0xd0 gic_write_sgi1r_retry+0x58/0x120 gic_ipi_send_mask+0x148/0x184 __ipi_send_mask+0x34/0x11c smp_cross_call+0x4c/0x10c arch_irq_work_raise+0x3c/0x4c __irq_work_queue_local+0x9c/0xb0 irq_work_queue+0x48/0x80 sugov_update_shared+0x258/0x260 enqueue_top_rt_rq+0x7c/0x124 enqueue_task_rt+0x1cc/0x2ec ttwu_do_activate+0x84/0x170 try_to_wake_up+0x21c/0x5c0 wake_up_process+0x20/0x30 irq_exit_rcu+0x134/0x140 el1_interrupt+0x38/0x70 el1h_64_irq_handler+0x18/0x2c el1h_64_irq+0x64/0x68 arch_cpu_idle+0x18/0x2c default_idle_call+0x40/0x1d0 do_idle+0x230/0x2a0 cpu_startup_entry+0x3c/0x4c secondary_start_kernel+0x120/0x14c __secondary_switched+0xb0/0xb4 Signed-off-by: Ruiqiang Hao --- drivers/irqchip/irq-gic-v3-fixes.c | 8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-gic-v3-fixes.c b/drivers/irqchip/irq-gic-v3-fixes.c index 7d88e3295686..62d41cb4e9a4 100644 --- a/drivers/irqchip/irq-gic-v3-fixes.c +++ b/drivers/irqchip/irq-gic-v3-fixes.c @@ -31,7 +31,7 @@ enum ipi_msg_type { struct gic_ipi_track { atomic_t tx_count; atomic_t rx_count; - spinlock_t lock; + raw_spinlock_t lock; }; static struct gic_ipi_track gic_ipitrack[NR_CPUS][NR_IPIS]; @@ -79,7 +79,7 @@ void gic_write_sgi1r_retry(int dest_cpu, int irq, u64 val) { unsigned long flags; - spin_lock_irqsave(_ipitrack[dest_cpu][irq].lock, flags); + raw_spin_lock_irqsave(_ipitrack[dest_cpu][irq].lock, flags); wmb(); /* Ensure lock is acquired before we generate an IPI */ retry: gic_write_sgi1r(val); @@ -95,7 +95,7 @@ void gic_write_sgi1r_retry(int dest_cpu, int irq, u64 val) wmb(); /* Ensure the write is completed before we start again */ goto retry; out: - spin_unlock_irqrestore(_ipitrack[dest_cpu][irq].lock, flags); + raw_spin_unlock_irqrestore(_ipitrack[dest_cpu][irq].lock, flags); } static bool __maybe_unused gicv3_enable_quirk_otx(void *data) @@ -107,7 +107,7 @@ static bool __maybe_unused gicv3_enable_quirk_otx(void *data) /* Initialize necessary lock */ for_each_possible_cpu(cpu) for (ipi = 0; ipi < NR_IPIS; ipi++) - spin_lock_init(_ipitrack[cpu][ipi].lock); + raw_spin_lock_init(_ipitrack[cpu][ipi].lock); return true; } -- 2.45.0 -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#14137): https://lists.yoctoproject.org/g/linux-yocto/message/14137 Mute This Topic: https://lists.yoctoproject.org/mt/107139152/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto] [yocto-kernel-cache]: nxp-ls1043: add scc and cfg files for nxp-ls1043 platform
Hi Bruce, Currently I am working on nxp-ls1043 SoC BSP, and want to add scc and cfg files for this BSP in kernel-cache. Could you please help to merge this patch into yocto-kernel-cache, branch is only yocto-6.6? diffstat info as below: bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc | 7 + bsp/nxp-ls1043/nxp-ls1043-standard.scc | 7 + bsp/nxp-ls1043/nxp-ls1043.cfg| 164 bsp/nxp-ls1043/nxp-ls1043.scc| 9 ++ 4 files changed, 187 insertions(+) Thanks, MinWang -=-=-=-=-=-=-=-=-=-=-=- Links: You receive all messages sent to this group. View/Reply Online (#14134): https://lists.yoctoproject.org/g/linux-yocto/message/14134 Mute This Topic: https://lists.yoctoproject.org/mt/107138509/21656 Group Owner: linux-yocto+ow...@lists.yoctoproject.org Unsubscribe: https://lists.yoctoproject.org/g/linux-yocto/unsub [arch...@mail-archive.com] -=-=-=-=-=-=-=-=-=-=-=-
[linux-yocto] [yocto-kernel-cache-6.6][PATCH 1/1] nxp-ls1043: add scc and cfg files for nxp-ls1043 platform
Refer to scc and cfg files on branch yocto-6.1, add new scc and cfg files for BSP nxp-ls1043 on branch yocto-6.6. Signed-off-by: Min Wang1 --- bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc | 7 + bsp/nxp-ls1043/nxp-ls1043-standard.scc | 7 + bsp/nxp-ls1043/nxp-ls1043.cfg| 164 +++ bsp/nxp-ls1043/nxp-ls1043.scc| 9 ++ 4 files changed, 187 insertions(+) create mode 100755 bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc create mode 100755 bsp/nxp-ls1043/nxp-ls1043-standard.scc create mode 100755 bsp/nxp-ls1043/nxp-ls1043.cfg create mode 100755 bsp/nxp-ls1043/nxp-ls1043.scc diff --git a/bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc b/bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc new file mode 100755 index ..f9a00a07 --- /dev/null +++ b/bsp/nxp-ls1043/nxp-ls1043-preempt-rt.scc @@ -0,0 +1,7 @@ +define KMACHINE nxp-ls1043 +define KTYPE preempt-rt +define KARCH arm64 + +include ktypes/preempt-rt + +include nxp-ls1043.scc diff --git a/bsp/nxp-ls1043/nxp-ls1043-standard.scc b/bsp/nxp-ls1043/nxp-ls1043-standard.scc new file mode 100755 index ..f27fc10b --- /dev/null +++ b/bsp/nxp-ls1043/nxp-ls1043-standard.scc @@ -0,0 +1,7 @@ +define KMACHINE nxp-ls1043 +define KTYPE standard +define KARCH arm64 + +include ktypes/standard + +include nxp-ls1043.scc diff --git a/bsp/nxp-ls1043/nxp-ls1043.cfg b/bsp/nxp-ls1043/nxp-ls1043.cfg new file mode 100755 index ..39700e67 --- /dev/null +++ b/bsp/nxp-ls1043/nxp-ls1043.cfg @@ -0,0 +1,164 @@ +.. +.WARNING +. +. This file is a kernel configuration fragment, and not a full kernel +. configuration file. The final kernel configuration is made up of +. an assembly of processed fragments, each of which is designed to +. capture a specific part of the final configuration (e.g. platform +. configuration, feature configuration, and board specific hardware +. configuration). For more information on kernel configuration, please +. consult the product documentation. +. +.. + +CONFIG_ARM64=y +CONFIG_ARM64_VA_BITS_48=y +CONFIG_ARCH_NXP=y +CONFIG_ARCH_LAYERSCAPE=y +CONFIG_SCHED_MC=y +CONFIG_ARM_SMMU=y + +CONFIG_PCI=y +CONFIG_PCI_LAYERSCAPE=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_XGENE=y +CONFIG_PCI_MSI=y +CONFIG_PCIEPORTBUS=y +CONFIG_HOTPLUG_PCI=y +CONFIG_HOTPLUG_PCI_PCIE=y + +CONFIG_CPU_IDLE=y +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPUFREQ_DT=y +CONFIG_QORIQ_CPUFREQ=y + +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_INTELEXT=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_PHYSMAP_OF=y +CONFIG_MTD_DATAFLASH=y +CONFIG_MTD_SST25L=y +CONFIG_MTD_NAND_DENALI_DT=y +CONFIG_MTD_NAND_FSL_IFC=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MEMORY=y +CONFIG_MTD_SPI_NOR=y +CONFIG_SPI_FSL_QUADSPI=y +CONFIG_ATA=y +CONFIG_SATA_AHCI=y +CONFIG_AHCI_QORIQ=y + +CONFIG_FSL_XGMAC_MDIO=y + +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIAL_FSL_LPUART=y +CONFIG_SERIAL_FSL_LPUART_CONSOLE=y + +CONFIG_SPI=y +CONFIG_SPI_FSL_DSPI=y +CONFIG_SPI_PL022=y + +CONFIG_POWER_RESET_XGENE=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_ENERGY_MODEL=y +CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y + +CONFIG_CPU_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_IMX2_WDT=y + +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_HOST=y +CONFIG_USB_GADGET=y + +CONFIG_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_OF_ESDHC=y + +CONFIG_GPIOLIB=y +CONFIG_OF_GPIO=y +CONFIG_GPIO_MPC8XXX=y + +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_BITBANG=y +CONFIG_PHYLIB=y +CONFIG_AQUANTIA_PHY=y + +# +# I2C support +# +CONFIG_I2C=y +CONFIG_I2C_IMX=y + +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_PCF2127=y +CONFIG_RTC_DRV_DS3232=y +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_PCF85363=y +CONFIG_RTC_DRV_FSL_FTM_ALARM=y +CONFIG_FSL_RCPM=y + +CONFIG_DMADEVICES=y +CONFIG_FSL_EDMA=y +CONFIG_CMA=y +CONFIG_DMA_CMA=y + +CONFIG_VFIO=y + +CONFIG_STAGING=y + +CONFIG_CLK_QORIQ=y + +CONFIG_FSL_GUTS=y + +CONFIG_ARCH_XGENE=y +CONFIG_PHY_XGENE=y +CONFIG_PHY_FSL_LYNX_10G=y + +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y + +# dpaa1 +CONFIG_FSL_SDK_DPA=y +CONFIG_FSL_SDK_FMAN=y +CONFIG_FSL_SDK_DPAA_ETH=y +CONFIG_FSL_DPAA_TS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_QORIQ=y +CONFIG_FSL_DPAA_1588=y + +# EDAC +CONFIG_EDAC_LAYERSCAPE=y + +# Thermal +CONFIG_THERMAL=y +CONFIG_DEVICE_THERMAL=y +CONFIG_QORIQ_THERMAL=y + +# I2C Slave devices
[linux-yocto][v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc][PATCH] Revert "drivers: clk: zynqmp: update divider round rate logic"
From: Quanyang Wang This patch reverts the commit c249ef9d0978a ("drivers: clk: zynqmp: update divider round rate logic"). This is because that there has been a similar commit efe0d3640f6ff ("drivers: clk: zynqmp: update divider round rate logic") which is picked from SDK. This commit introduces some problem and the SDK patch 7e6654b576a00 ("drivers: clk: zynqmp: add hack to use old algorithm for divider round rate") is to fix it. But when merging, the content of the commit 7e6654b576a00 is missing. So we need to revert the commit c249ef9d0978a and bring the content of the commit 7e6654b576a00 back. Signed-off-by: Quanyang Wang --- Hi Bruce, Would you please help merge this patch to the branches: v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc v6.1/standard/sdkv6.1/xlnx-soc Thanks, Quanyang --- drivers/clk/zynqmp/divider.c | 88 ++-- 1 file changed, 83 insertions(+), 5 deletions(-) diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index a491f19ef7f8b..0ed124ba0ea6b 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -111,6 +111,51 @@ static unsigned long zynqmp_clk_divider_recalc_rate(struct clk_hw *hw, return DIV_ROUND_UP_ULL(parent_rate, value); } +static void zynqmp_get_divider2_val(struct clk_hw *hw, unsigned long rate, + struct zynqmp_clk_divider *divider, + u32 *bestdiv) +{ + int div1; + int div2; + long error = LONG_MAX; + unsigned long div1_prate; + struct clk_hw *div1_parent_hw; + struct zynqmp_clk_divider *pdivider; + struct clk_hw *div2_parent_hw = clk_hw_get_parent(hw); + + if (!div2_parent_hw) + return; + + pdivider = to_zynqmp_clk_divider(div2_parent_hw); + if (!pdivider) + return; + + div1_parent_hw = clk_hw_get_parent(div2_parent_hw); + if (!div1_parent_hw) + return; + + div1_prate = clk_hw_get_rate(div1_parent_hw); + *bestdiv = 1; + for (div1 = 1; div1 <= pdivider->max_div;) { + for (div2 = 1; div2 <= divider->max_div;) { + long new_error = ((div1_prate / div1) / div2) - rate; + + if (abs(new_error) < abs(error)) { + *bestdiv = div2; + error = new_error; + } + if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) + div2 = div2 << 1; + else + div2++; + } + if (pdivider->flags & CLK_DIVIDER_POWER_OF_TWO) + div1 = div1 << 1; + else + div1++; + } +} + /** * zynqmp_clk_divider_round_rate() - Round rate of divider clock * @hw:handle between common and hardware-specific interfaces @@ -129,7 +174,8 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, u32 div_type = divider->div_type; u32 bestdiv; int ret; - u8 width = 0; + u8 width; + struct device_node *np; /* if read only, just return current value */ if (divider->flags & CLK_DIVIDER_READ_ONLY) { @@ -149,12 +195,44 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); } - width = fls(divider->max_div); + /* +* Hack to use old algorithm for round rate div clocks. Currently PL +* rate is getting changed because RPLL_TO_FPD clock is changing RPLL +* rate for DP audio driver. Using old algorithm RPLL rate change is +* less and its not affecting PL clocks more so as a temporary solution +* use old algorithm for Versal and ZynqMP platforms. +* +* TBD: Remove this hack and use new algorithm for all platform once PL +* clock issue is fixed with better way. +*/ + np = of_find_compatible_node(NULL, NULL, "xlnx,versal-net"); + if (np) { + width = fls(divider->max_div); - rate = divider_round_rate(hw, rate, prate, NULL, width, divider->flags); + rate = divider_round_rate(hw, rate, prate, NULL, width, divider->flags); - if (divider->is_frac && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && (rate % *prate)) - *prate = rate; + if (divider->is_frac && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && + (rate % *prate)) + *prate = rate; + } else { + bestdiv = zynqmp_divider_get_val(*prate, rate, divider->flags); + + /* +* In case of two divisors, compute best divider values and return +* divider2 value based on compute value. div1 will be automatically +* set to