Re: [linux-yocto][v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts: Aptiv-FL: Update 'Slew-Rates' from MSCR registers

2024-04-15 Thread Bruce Ashfield 
In message: 
[linux-yocto][v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts: 
Aptiv-FL: Update 'Slew-Rates' from MSCR registers
on 15/04/2024 quanyang.w...@windriver.com wrote:

> From: Quanyang Wang 
> 
> In SDK commit 3bf1e1fe0321 ("s32cc: Update 'Slew-Rates' from MSCR
> registers", "Slew-Rates" is updated.
> 
> Signed-off-by: Quanyang Wang 
> ---
> Hi Bruce,
> Would you please help merge this patch to the branches:
>   v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g
>   v6.1/standard/nxp-sdk-5.15/nxp-s32g

merged.

Bruce

> Thanks,
> Quanyang
> ---
>  .../boot/dts/freescale/s32gxxxa-cvc-fl.dtsi   | 86 +--
>  1 file changed, 43 insertions(+), 43 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi 
> b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
> index 537eda907e80d..9ca0424e49fdb 100644
> --- a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
> +++ b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
> @@ -255,13 +255,13 @@ can0_pins: can0 {
>   can0_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can0_grp1 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can0_grp2 {
> @@ -273,13 +273,13 @@ can1_pins: can1 {
>   can1_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can1_grp1 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can1_grp2 {
> @@ -292,13 +292,13 @@ can2_pins: can2 {
>   can2_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can2_grp1 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can2_grp2 {
> @@ -311,13 +311,13 @@ can3_pins: can3 {
>   can3_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can3_grp1 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   can3_grp2 {
> @@ -330,26 +330,26 @@ dspi1_pins: dspi1 {
>   dspi1_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   bias-pull-up;
>   };
>  
>   dspi1_grp1 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   dspi1_grp2 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   dspi1_grp3 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   bias-pull-up;
>   };
>  
> @@ -363,13 +363,13 @@ dspi1slave_pins: dspi1slave {
>   dspi1slave_grp0 {
>   pinmux = ;
>   output-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   dspi1slave_grp1 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>   };
>  
>   dspi1slave_grp2 {
> @@ -381,13 +381,13 @@ dspi1slave_grp2 {
>   dspi1slave_grp3 {
>   pinmux = ;
>   input-enable;
> - slew-rate = ;
> + slew-rate = ;
>

[linux-yocto][v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g][PATCH] dts: Aptiv-FL: Update 'Slew-Rates' from MSCR registers

2024-04-14 Thread quanyang.wang via lists.yoctoproject.org 
From: Quanyang Wang 

In SDK commit 3bf1e1fe0321 ("s32cc: Update 'Slew-Rates' from MSCR
registers", "Slew-Rates" is updated.

Signed-off-by: Quanyang Wang 
---
Hi Bruce,
Would you please help merge this patch to the branches:
v6.1/standard/preempt-rt/nxp-sdk-5.15/nxp-s32g
v6.1/standard/nxp-sdk-5.15/nxp-s32g
Thanks,
Quanyang
---
 .../boot/dts/freescale/s32gxxxa-cvc-fl.dtsi   | 86 +--
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi 
b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
index 537eda907e80d..9ca0424e49fdb 100644
--- a/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32gxxxa-cvc-fl.dtsi
@@ -255,13 +255,13 @@ can0_pins: can0 {
can0_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can0_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can0_grp2 {
@@ -273,13 +273,13 @@ can1_pins: can1 {
can1_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can1_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can1_grp2 {
@@ -292,13 +292,13 @@ can2_pins: can2 {
can2_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can2_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can2_grp2 {
@@ -311,13 +311,13 @@ can3_pins: can3 {
can3_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can3_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
can3_grp2 {
@@ -330,26 +330,26 @@ dspi1_pins: dspi1 {
dspi1_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
bias-pull-up;
};
 
dspi1_grp1 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1_grp2 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1_grp3 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
bias-pull-up;
};
 
@@ -363,13 +363,13 @@ dspi1slave_pins: dspi1slave {
dspi1slave_grp0 {
pinmux = ;
output-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp1 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp2 {
@@ -381,13 +381,13 @@ dspi1slave_grp2 {
dspi1slave_grp3 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
dspi1slave_grp4 {
pinmux = ;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
bias-pull-up;
};
 
@@ -400,7 +400,7 @@ i2c0_grp0 {
drive-open-drain;
output-enable;
input-enable;
-   slew-rate = ;
+   slew-rate = ;
};
 
i2c0_grp1 {
@@ -416,7 +416,7 @@ i2c0_gpio_grp0 {
 ;
drive-open-drain;
output-enable;
-   slew-rate = ;
+