Re: [linux-yocto][v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc] Xilinx: update to v2023.02

2023-12-05 Thread Bruce Ashfield
merged.

Bruce

In message: [linux-yocto][v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc] Xilinx: 
update to v2023.02
on 05/12/2023 Quanyang Wang wrote:

> Hi Bruce,
> 
> Would you please help merge these patches to the branch:
> 
> v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc
> 
> Thanks,
> 
> Quanyang
> 
> 
> The following changes since commit de67708a86ef9bca7e9233ce3dee2f370f0c178c:
> 
>   net: axienet: Fix check for partial TX checksum (2023-12-04 10:14:51
> -0500)
> 
> are available in the Git repository at:
> 
>   g...@github.com:wqyoung/linux-yocto-dev.git wqy/xlnx/6.1/preempt-rt/2023.02
> 
> for you to fetch changes up to 5222d104e04217b18bb2594890b1d0818933a04c:
> 
>   net: macb: Set MDIO clock divisor for pclk higher than 160MHz (2023-12-05
> 15:56:54 +0800)
> 
> 
> Abhijit Gangurde (13):
>   cdx: Setting correct MSI msg value when irq_write_msi_msg is called
>   cdx: Move MSI domain initialization code to controller code
>   cdx: check return value of cdx_rpmsg_send
>   cdx: Remove unnecessary wrapper function
> cdx_mcdi_cmd_start_or_queue_ext
>   cdx: Include rpmsg header rpmsg.h in mcdi.h file
>   cdx: Rename MCDI_LOGGING to CDX_MCDI_LOGGING
>   cdx: Set num_msi variable when msi domain is created
>   vfio/cdx: Rename vfio_cdx, vfio_cdx_intr, vfio_cdx_private.h files
>   rpmsg: Make MAX_RPMSG_BUF_SIZE configurable from kconfig
>   cdx: Replace custom mcdi logging with print_hex_dump_debug()
>   cdx: Sending MSI msg to firmware from preemptible task context
>   vfio/cdx: Use module_driver macro
>   vfio/cdx: Remove unnecessary wrapper functions, macros.
> 
> Amit Cohen (1):
>   ethtool: Add support for 800Gbps link modes
> 
> Amit Kumar Mahapatra (18):
>   mtd: spi-nor: issi: Fix flash lock failure on ISSI flash parts
>   arm64: zynqmp: Add new parallel DT binding for ZC1751+DC1 board
>   arm64: versal-net: Add new parallel DT binding for tenzing se9 board
>   arm64: versal-net: Update spi-max-freq to 150Mhz
>   arm64: versal-net: Update spi-tx-bus-width to 4
>   Revert "mtd: rawnand: arasan: Prevent an unsupported configuration"
>   arm64: dts: zynqmp: make hw-ecc as the default ecc mode
>   spi: Fix kernel crash while using GPIO CS
>   dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting
> SRWD bit in status register
>   mtd: spi-nor: Avoid setting SRWD bit in SR if WP# signal not connected
>   mtd: spi-nor: Add flash protection support for OSPI flashes
>   mtd: spi-nor: issi: Disable 16bit status register write
>   arm64: versal: Add no-wp DT property in OSPI flash node
>   mtd: spi-nor: Avoid writing EAR register for flashes less than 16MB
>   mtd: spi-nor: For Winbond flashes with multiple die check WIP of each
> die
>   spi: spi-cadence: Correct irq sequence for read
>   mtd: spi-nor: Fix Write failure in SST flashes
>   mtd: rawnand: arasan: Avoid overwriting valid data while checking for
> bitflips during HW-ECC read
> 
> Arnd Bergmann (1):
>   gpio: synq: remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres
> 
> Ashok Reddy Soma (1):
>   arm64: zynqmp: Configure gem1 rx pins on kd240 board
> 
> Bartosz Wawrzyniak (1):
>   net: macb: Set MDIO clock divisor for pclk higher than 160MHz
> 
> Ben Levinsky (1):
>   rpmsg: virtio: show virtqueue debug information
> 
> Christophe JAILLET (1):
>   watchdog: of_xilinx_wdt: Use devm_clk_get_enabled() helper
> 
> Conall O'Griofa (4):
>   drivers: iio: adc: xilinx-ams: Add over temperature interrupts
>   drivers: iio: adc: Split driver into common and platform
>   drivers: iio: adc: versal-sysmon: Add I2C driver
>   drivers: iio: adc: xadc: Correct Write edge in CFG
> 
> Daniel Giritzer (1):
>   mtd: spi-nor: Use nor->info->id[0] for manufacturer id
> 
> Daniele Palmas (1):
>   ethtool: add tx aggregation parameters
> 
> Govindarajulu Varadarajan (7):
>   misc: xilinx-ai-engine: Import DMA_BUF module
>   misc: xilinx-ai-engine: Add l1/l2_ctrl register offsets for aieml
>   misc: xilinx-ai-engine: remove loc from aie_get_bc_event()
>   misc: xilinx-ai-engine: add support for events in mem tile
>   misc: xilinx-ai-engine: Add error interrupt support for aie2 hw
>   uio_xilinx_ai_engine: Fix irq number in call to irq_set_irqchip_state
>   uio_xilinx_ai_engine: Fix return value of
> xilinx_ai_engine_simulate_irq
> 
> Gregory Williams (6):
>   misc: xilinx-ai-engine: Add DMA buffer descriptor register attributes
>   misc: xilinx-ai-engine

[linux-yocto][v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc] Xilinx: update to v2023.02

2023-12-05 Thread quanyang.wang via lists.yoctoproject.org

Hi Bruce,

Would you please help merge these patches to the branch:

v6.1/standard/preempt-rt/sdkv6.1/xlnx-soc

Thanks,

Quanyang


The following changes since commit de67708a86ef9bca7e9233ce3dee2f370f0c178c:

  net: axienet: Fix check for partial TX checksum (2023-12-04 10:14:51 
-0500)


are available in the Git repository at:

  g...@github.com:wqyoung/linux-yocto-dev.git 
wqy/xlnx/6.1/preempt-rt/2023.02


for you to fetch changes up to 5222d104e04217b18bb2594890b1d0818933a04c:

  net: macb: Set MDIO clock divisor for pclk higher than 160MHz 
(2023-12-05 15:56:54 +0800)



Abhijit Gangurde (13):
  cdx: Setting correct MSI msg value when irq_write_msi_msg is called
  cdx: Move MSI domain initialization code to controller code
  cdx: check return value of cdx_rpmsg_send
  cdx: Remove unnecessary wrapper function 
cdx_mcdi_cmd_start_or_queue_ext

  cdx: Include rpmsg header rpmsg.h in mcdi.h file
  cdx: Rename MCDI_LOGGING to CDX_MCDI_LOGGING
  cdx: Set num_msi variable when msi domain is created
  vfio/cdx: Rename vfio_cdx, vfio_cdx_intr, vfio_cdx_private.h files
  rpmsg: Make MAX_RPMSG_BUF_SIZE configurable from kconfig
  cdx: Replace custom mcdi logging with print_hex_dump_debug()
  cdx: Sending MSI msg to firmware from preemptible task context
  vfio/cdx: Use module_driver macro
  vfio/cdx: Remove unnecessary wrapper functions, macros.

Amit Cohen (1):
  ethtool: Add support for 800Gbps link modes

Amit Kumar Mahapatra (18):
  mtd: spi-nor: issi: Fix flash lock failure on ISSI flash parts
  arm64: zynqmp: Add new parallel DT binding for ZC1751+DC1 board
  arm64: versal-net: Add new parallel DT binding for tenzing se9 board
  arm64: versal-net: Update spi-max-freq to 150Mhz
  arm64: versal-net: Update spi-tx-bus-width to 4
  Revert "mtd: rawnand: arasan: Prevent an unsupported configuration"
  arm64: dts: zynqmp: make hw-ecc as the default ecc mode
  spi: Fix kernel crash while using GPIO CS
  dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid 
setting SRWD bit in status register
  mtd: spi-nor: Avoid setting SRWD bit in SR if WP# signal not 
connected

  mtd: spi-nor: Add flash protection support for OSPI flashes
  mtd: spi-nor: issi: Disable 16bit status register write
  arm64: versal: Add no-wp DT property in OSPI flash node
  mtd: spi-nor: Avoid writing EAR register for flashes less than 16MB
  mtd: spi-nor: For Winbond flashes with multiple die check WIP of 
each die

  spi: spi-cadence: Correct irq sequence for read
  mtd: spi-nor: Fix Write failure in SST flashes
  mtd: rawnand: arasan: Avoid overwriting valid data while checking 
for bitflips during HW-ECC read


Arnd Bergmann (1):
  gpio: synq: remove unused zynq_gpio_irq_reqres/zynq_gpio_irq_relres

Ashok Reddy Soma (1):
  arm64: zynqmp: Configure gem1 rx pins on kd240 board

Bartosz Wawrzyniak (1):
  net: macb: Set MDIO clock divisor for pclk higher than 160MHz

Ben Levinsky (1):
  rpmsg: virtio: show virtqueue debug information

Christophe JAILLET (1):
  watchdog: of_xilinx_wdt: Use devm_clk_get_enabled() helper

Conall O'Griofa (4):
  drivers: iio: adc: xilinx-ams: Add over temperature interrupts
  drivers: iio: adc: Split driver into common and platform
  drivers: iio: adc: versal-sysmon: Add I2C driver
  drivers: iio: adc: xadc: Correct Write edge in CFG

Daniel Giritzer (1):
  mtd: spi-nor: Use nor->info->id[0] for manufacturer id

Daniele Palmas (1):
  ethtool: add tx aggregation parameters

Govindarajulu Varadarajan (7):
  misc: xilinx-ai-engine: Import DMA_BUF module
  misc: xilinx-ai-engine: Add l1/l2_ctrl register offsets for aieml
  misc: xilinx-ai-engine: remove loc from aie_get_bc_event()
  misc: xilinx-ai-engine: add support for events in mem tile
  misc: xilinx-ai-engine: Add error interrupt support for aie2 hw
  uio_xilinx_ai_engine: Fix irq number in call to irq_set_irqchip_state
  uio_xilinx_ai_engine: Fix return value of 
xilinx_ai_engine_simulate_irq


Gregory Williams (6):
  misc: xilinx-ai-engine: Add DMA buffer descriptor register attributes
  misc: xilinx-ai-engine: Add sysfs nodes to show DMA buffer 
descriptor metadata

  misc: xilinx-ai-engine: Print wrap value in BD sysfs node
  misc: xilinx-ai-engine: Fix compilation warning
  misc: xilinx-ai-engine: Fix dereference of null pointer
  misc: xilinx-ai-engine: Fix bug in setting

Harini Katakam (7):
  Revert "phy: dp83867: Add support for SGMII"
  Revert "net: macb: Disable macb pad and fcs for fragmented packets"
  arm64: zynqmp: Assign TSU clock frequency for KR260
  arm64: zynqmp: Assign TSU clock frequency for KV and KD boards
  arm64: versal_net: Update RMII property
  arm64: versal-net: Adjust TI PHY impedance
  ptp: xilinx: Add workaround