[linux-yocto] [yocto-kernel-cache][yocto-6.1][PATCH] bsp: aptiv-s32g: add support for Aptiv FL board

2023-05-11 Thread quanyang.wang via lists.yoctoproject.org 
From: Quanyang Wang 

Add scc and cfg files for Aptiv FL board.

Signed-off-by: Quanyang Wang 
---
Hi Bruce,
Would you please help merge this patch to the branch:
yocto-6.1
Thanks,
Quanyang
---
 bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc |   7 +
 bsp/aptiv-s32g/aptiv-cvc.cfg   | 177 +
 bsp/aptiv-s32g/aptiv-cvc.scc   |   7 +
 3 files changed, 191 insertions(+)
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc.cfg
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc.scc

diff --git a/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc 
b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
new file mode 100644
index 00..d8a0c51af0
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: MIT
+define KMACHINE aptiv-cvc-fl
+define KTYPE preempt-rt
+define KARCH arm64
+
+include ktypes/preempt-rt
+include aptiv-cvc.scc
diff --git a/bsp/aptiv-s32g/aptiv-cvc.cfg b/bsp/aptiv-s32g/aptiv-cvc.cfg
new file mode 100644
index 00..5714cb9c74
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc.cfg
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: MIT
+..
+.WARNING
+.
+. This file is a kernel configuration fragment, and not a full kernel
+. configuration file.  The final kernel configuration is made up of
+. an assembly of processed fragments, each of which is designed to
+. capture a specific part of the final configuration (e.g. platform
+. configuration, feature configuration, and board specific hardware
+. configuration).  For more information on kernel configuration, please
+. consult the product documentation.
+.
+..
+
+CONFIG_ARM64=y
+CONFIG_ARCH_NXP=y
+CONFIG_ARCH_S32=y
+CONFIG_SOC_S32CC=y
+CONFIG_SCHED_MC=y
+CONFIG_ARM_SMMU=y
+
+CONFIG_PINCTRL_S32CC=y
+
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_PSCI_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+
+CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE=y
+#To keep align with SDK, unset the ARM_SCMI_POWER_DOMAIN config
+# CONFIG_ARM_SCMI_POWER_DOMAIN is not set
+
+#CAN
+CONFIG_CAN=y
+CONFIG_CAN_VCAN=y
+CONFIG_CAN_SLCAN=y
+CONFIG_CAN_FLEXCAN=m
+
+#Ethernet
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_DWC_QOS_ETH=y
+
+#Serial
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_FSL_LINFLEXUART=y
+CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
+
+#SPI
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_SPI_SPIDEV=y
+
+#GPIO
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_S32CC=y
+CONFIG_GPIO_PCA953X=y
+
+#PCIE
+CONFIG_PCI=y
+CONFIG_PCIE_DW=y
+CONFIG_PCIE_DW_PLAT_HOST=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCIE_DW_PLAT_EP=y
+CONFIG_PCIEAER=y
+CONFIG_PCI_S32CC=y
+
+#USB
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_IMX=m
+CONFIG_USB_ULPI_GENERIC=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+
+CONFIG_USB_ACM=y
+CONFIG_USB_WDM=y
+
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+
+#MMC
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CMA=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=128
+
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_SPI_NOR=y
+
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+
+# Thermal
+CONFIG_THERMAL=y
+CONFIG_S32CC_THERMAL=y
+
+# ADC
+CONFIG_IIO=y
+CONFIG_S32CC_ADC=m
+
+# PWM
+CONFIG_PWM=y
+CONFIG_PWM_FSL_FTM=m
+
+CONFIG_S32CC_FCCU=y
+CONFIG_GPIOLIB=y
+CONFIG_OF_GPIO=y
+
+CONFIG_MDIO_DEVICE=y
+CONFIG_PHYLIB=y
+
+#QSPI
+CONFIG_SPI_FSL_QUADSPI=y
+
+#RTC
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_S32CC=y
+CONFIG_RTC_DRV_PCF85063=y
+
+#I2C
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=m
+
+#Watchdog
+# We need keep this driver built-in since rmmod will trigger reboot
+CONFIG_S32CC_WDT=y
+
+#NVME
+CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_TARGET=y
+CONFIG_NVMEM_S32CC_SIUL2=y
+
+#LLCE
+CONFIG_CAN_LLCE=y
+CONFIG_CAN_LLCE_CONTROLLER=m
+
+# Regulator configuration
+CONFIG_REGULATOR=y
+
+#HSE UIO
+CONFIG_UIO=y
+CONFIG_CRYPTO_DEV_NXP_HSE=y
+CONFIG_UIO_NXP_HSE=y
+CONFIG_UIO_NXP_HSE_MU0=y
+CONFIG_CRYPTO_DEV_NXP_HSE_MU1=y
+
+#RANDOM
+CONFIG_HW_RANDOM=y
diff --git a/bsp/aptiv-s32g/aptiv-cvc.scc b/bsp/aptiv-s32g/aptiv-cvc.scc
new file mode 100644
index 00..30fa80132f
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc.scc
@@ -0,0 +1,7 @@
+#

Re: [linux-yocto] [yocto-kernel-cache][yocto-6.1][PATCH] bsp: aptiv-s32g: add support for Aptiv FL board

2023-05-10 Thread Bruce Ashfield 
In message: [yocto-kernel-cache][yocto-6.1][PATCH] bsp: aptiv-s32g: add support 
for Aptiv FL board
on 10/05/2023 quanyang.w...@windriver.com wrote:

> From: Quanyang Wang 
> 
> Add scc and cfg files for Aptiv FL board.

merged.

Bruce

> 
> Signed-off-by: Quanyang Wang 
> ---
> Hi Bruce,
> Would you please help merge this patch to the branch:
>   yocto-6.1
> Thanks,
> Quanyang
> ---
>  bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc |   7 +
>  bsp/aptiv-s32g/aptiv-cvc.cfg   | 177 +
>  bsp/aptiv-s32g/aptiv-cvc.scc   |   7 +
>  3 files changed, 191 insertions(+)
>  create mode 100644 bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
>  create mode 100644 bsp/aptiv-s32g/aptiv-cvc.cfg
>  create mode 100644 bsp/aptiv-s32g/aptiv-cvc.scc
> 
> diff --git a/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc 
> b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
> new file mode 100644
> index 00..d8a0c51af0
> --- /dev/null
> +++ b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
> @@ -0,0 +1,7 @@
> +# SPDX-License-Identifier: MIT
> +define KMACHINE aptiv-cvc-fl
> +define KTYPE preempt-rt
> +define KARCH arm64
> +
> +include ktypes/preempt-rt
> +include aptiv-cvc.scc
> diff --git a/bsp/aptiv-s32g/aptiv-cvc.cfg b/bsp/aptiv-s32g/aptiv-cvc.cfg
> new file mode 100644
> index 00..5714cb9c74
> --- /dev/null
> +++ b/bsp/aptiv-s32g/aptiv-cvc.cfg
> @@ -0,0 +1,177 @@
> +# SPDX-License-Identifier: MIT
> +..
> +.WARNING
> +.
> +. This file is a kernel configuration fragment, and not a full kernel
> +. configuration file.  The final kernel configuration is made up of
> +. an assembly of processed fragments, each of which is designed to
> +. capture a specific part of the final configuration (e.g. platform
> +. configuration, feature configuration, and board specific hardware
> +. configuration).  For more information on kernel configuration, please
> +. consult the product documentation.
> +.
> +..
> +
> +CONFIG_ARM64=y
> +CONFIG_ARCH_NXP=y
> +CONFIG_ARCH_S32=y
> +CONFIG_SOC_S32CC=y
> +CONFIG_SCHED_MC=y
> +CONFIG_ARM_SMMU=y
> +
> +CONFIG_PINCTRL_S32CC=y
> +
> +CONFIG_CPU_IDLE=y
> +CONFIG_ARM_PSCI_CPUIDLE=y
> +CONFIG_CPU_FREQ=y
> +CONFIG_CPU_FREQ_STAT=y
> +CONFIG_CPU_FREQ_GOV_POWERSAVE=y
> +CONFIG_CPU_FREQ_GOV_USERSPACE=y
> +CONFIG_CPU_FREQ_GOV_ONDEMAND=y
> +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
> +
> +CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE=y
> +#To keep align with SDK, unset the ARM_SCMI_POWER_DOMAIN config
> +# CONFIG_ARM_SCMI_POWER_DOMAIN is not set
> +
> +#CAN
> +CONFIG_CAN=y
> +CONFIG_CAN_VCAN=y
> +CONFIG_CAN_SLCAN=y
> +CONFIG_CAN_FLEXCAN=m
> +
> +#Ethernet
> +CONFIG_STMMAC_ETH=y
> +CONFIG_DWMAC_DWC_QOS_ETH=y
> +
> +#Serial
> +CONFIG_SERIAL_AMBA_PL011=y
> +CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
> +CONFIG_SERIAL_FSL_LINFLEXUART=y
> +CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
> +
> +#SPI
> +CONFIG_SPI=y
> +CONFIG_SPI_FSL_DSPI=y
> +CONFIG_SPI_SPIDEV=y
> +
> +#GPIO
> +CONFIG_GPIO_CDEV=y
> +CONFIG_GPIO_S32CC=y
> +CONFIG_GPIO_PCA953X=y
> +
> +#PCIE
> +CONFIG_PCI=y
> +CONFIG_PCIE_DW=y
> +CONFIG_PCIE_DW_PLAT_HOST=y
> +CONFIG_PCI_ENDPOINT=y
> +CONFIG_PCIE_DW_PLAT_EP=y
> +CONFIG_PCIEAER=y
> +CONFIG_PCI_S32CC=y
> +
> +#USB
> +CONFIG_USB=y
> +CONFIG_USB_OTG=y
> +CONFIG_USB_OTG_FSM=y
> +CONFIG_USB_EHCI_HCD=y
> +CONFIG_USB_CHIPIDEA=y
> +CONFIG_USB_CHIPIDEA_UDC=y
> +CONFIG_USB_CHIPIDEA_HOST=y
> +CONFIG_USB_CHIPIDEA_IMX=m
> +CONFIG_USB_ULPI_GENERIC=y
> +CONFIG_USB_ULPI=y
> +CONFIG_USB_GADGET=y
> +CONFIG_USB_CONFIGFS=y
> +CONFIG_USB_CONFIGFS_MASS_STORAGE=y
> +
> +CONFIG_USB_ACM=y
> +CONFIG_USB_WDM=y
> +
> +CONFIG_USB_SERIAL=y
> +CONFIG_USB_SERIAL_FTDI_SIO=y
> +CONFIG_USB_SERIAL_CP210X=m
> +CONFIG_USB_SERIAL_PL2303=m
> +CONFIG_USB_SERIAL_WWAN=y
> +CONFIG_USB_SERIAL_OPTION=y
> +
> +#MMC
> +CONFIG_MMC=y
> +CONFIG_MMC_SDHCI=y
> +CONFIG_MMC_SDHCI_PLTFM=y
> +CONFIG_MMC_SDHCI_ESDHC_IMX=y
> +CONFIG_DMADEVICES=y
> +CONFIG_FSL_EDMA=y
> +CONFIG_CMA=y
> +CONFIG_DMA_CMA=y
> +CONFIG_CMA_SIZE_MBYTES=128
> +
> +CONFIG_MTD=y
> +CONFIG_MTD_CMDLINE_PARTS=y
> +CONFIG_MTD_BLOCK=y
> +CONFIG_MTD_CFI=y
> +CONFIG_MTD_PHYSMAP=y
> +CONFIG_MTD_PHYSMAP_OF=y
> +CONFIG_MTD_DATAFLASH=y
> +CONFIG_MTD_SPI_NOR=y
> +
> +CONFIG_INPUT_EVDEV=y
> +CONFIG_INPUT_MISC=y
> +CONFIG_INPUT_UINPUT=y
> +
> +# Thermal
> +CONFIG_THERMAL=y
> +CONFIG_S32CC_THERMAL=y
> +
> +# ADC
> +CONFIG_IIO=y
> +CONFIG_S32CC_ADC=m
> +
> +# PWM
> +CONFIG_PWM=y
> +CONFIG_PWM_FSL_FTM=m
> +
> +CONFIG_S32CC_FCCU=y
> +CONFIG_GPIOLIB=y
> +CONFIG_OF_GPIO=y
> +
> +CONFIG_MDIO_DEVICE=y
> +CONFIG_PHYLIB=y
> +
> +#QSPI
> +CONFIG_SPI_FSL_QUADSPI=y
> +
> +#RTC
> +CONFIG_RTC_CLASS=y
> +CONFIG_RTC_DRV_S32CC=y
> +CONFIG_RTC_DRV_PCF85063=y
> +
> +#I2C
> +CONFIG_I2C=y
> +CONFIG_I2C_CHARDEV=y
> +CONFIG_I2C_IMX=m
> +
> +#Watchdog
> +# We need keep this driver built-in since rmmod will trigger reboot
> +CONFIG_S32CC_WDT=y
> +
>

[linux-yocto] [yocto-kernel-cache][yocto-6.1][PATCH] bsp: aptiv-s32g: add support for Aptiv FL board

2023-05-10 Thread quanyang.wang via lists.yoctoproject.org 
From: Quanyang Wang 

Add scc and cfg files for Aptiv FL board.

Signed-off-by: Quanyang Wang 
---
Hi Bruce,
Would you please help merge this patch to the branch:
yocto-6.1
Thanks,
Quanyang
---
 bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc |   7 +
 bsp/aptiv-s32g/aptiv-cvc.cfg   | 177 +
 bsp/aptiv-s32g/aptiv-cvc.scc   |   7 +
 3 files changed, 191 insertions(+)
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc.cfg
 create mode 100644 bsp/aptiv-s32g/aptiv-cvc.scc

diff --git a/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc 
b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
new file mode 100644
index 00..d8a0c51af0
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc-fl-preempt-rt.scc
@@ -0,0 +1,7 @@
+# SPDX-License-Identifier: MIT
+define KMACHINE aptiv-cvc-fl
+define KTYPE preempt-rt
+define KARCH arm64
+
+include ktypes/preempt-rt
+include aptiv-cvc.scc
diff --git a/bsp/aptiv-s32g/aptiv-cvc.cfg b/bsp/aptiv-s32g/aptiv-cvc.cfg
new file mode 100644
index 00..5714cb9c74
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc.cfg
@@ -0,0 +1,177 @@
+# SPDX-License-Identifier: MIT
+..
+.WARNING
+.
+. This file is a kernel configuration fragment, and not a full kernel
+. configuration file.  The final kernel configuration is made up of
+. an assembly of processed fragments, each of which is designed to
+. capture a specific part of the final configuration (e.g. platform
+. configuration, feature configuration, and board specific hardware
+. configuration).  For more information on kernel configuration, please
+. consult the product documentation.
+.
+..
+
+CONFIG_ARM64=y
+CONFIG_ARCH_NXP=y
+CONFIG_ARCH_S32=y
+CONFIG_SOC_S32CC=y
+CONFIG_SCHED_MC=y
+CONFIG_ARM_SMMU=y
+
+CONFIG_PINCTRL_S32CC=y
+
+CONFIG_CPU_IDLE=y
+CONFIG_ARM_PSCI_CPUIDLE=y
+CONFIG_CPU_FREQ=y
+CONFIG_CPU_FREQ_STAT=y
+CONFIG_CPU_FREQ_GOV_POWERSAVE=y
+CONFIG_CPU_FREQ_GOV_USERSPACE=y
+CONFIG_CPU_FREQ_GOV_ONDEMAND=y
+CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
+
+CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE=y
+#To keep align with SDK, unset the ARM_SCMI_POWER_DOMAIN config
+# CONFIG_ARM_SCMI_POWER_DOMAIN is not set
+
+#CAN
+CONFIG_CAN=y
+CONFIG_CAN_VCAN=y
+CONFIG_CAN_SLCAN=y
+CONFIG_CAN_FLEXCAN=m
+
+#Ethernet
+CONFIG_STMMAC_ETH=y
+CONFIG_DWMAC_DWC_QOS_ETH=y
+
+#Serial
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_FSL_LINFLEXUART=y
+CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
+
+#SPI
+CONFIG_SPI=y
+CONFIG_SPI_FSL_DSPI=y
+CONFIG_SPI_SPIDEV=y
+
+#GPIO
+CONFIG_GPIO_CDEV=y
+CONFIG_GPIO_S32CC=y
+CONFIG_GPIO_PCA953X=y
+
+#PCIE
+CONFIG_PCI=y
+CONFIG_PCIE_DW=y
+CONFIG_PCIE_DW_PLAT_HOST=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCIE_DW_PLAT_EP=y
+CONFIG_PCIEAER=y
+CONFIG_PCI_S32CC=y
+
+#USB
+CONFIG_USB=y
+CONFIG_USB_OTG=y
+CONFIG_USB_OTG_FSM=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_CHIPIDEA=y
+CONFIG_USB_CHIPIDEA_UDC=y
+CONFIG_USB_CHIPIDEA_HOST=y
+CONFIG_USB_CHIPIDEA_IMX=m
+CONFIG_USB_ULPI_GENERIC=y
+CONFIG_USB_ULPI=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_CONFIGFS=y
+CONFIG_USB_CONFIGFS_MASS_STORAGE=y
+
+CONFIG_USB_ACM=y
+CONFIG_USB_WDM=y
+
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_CP210X=m
+CONFIG_USB_SERIAL_PL2303=m
+CONFIG_USB_SERIAL_WWAN=y
+CONFIG_USB_SERIAL_OPTION=y
+
+#MMC
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_ESDHC_IMX=y
+CONFIG_DMADEVICES=y
+CONFIG_FSL_EDMA=y
+CONFIG_CMA=y
+CONFIG_DMA_CMA=y
+CONFIG_CMA_SIZE_MBYTES=128
+
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_DATAFLASH=y
+CONFIG_MTD_SPI_NOR=y
+
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_MISC=y
+CONFIG_INPUT_UINPUT=y
+
+# Thermal
+CONFIG_THERMAL=y
+CONFIG_S32CC_THERMAL=y
+
+# ADC
+CONFIG_IIO=y
+CONFIG_S32CC_ADC=m
+
+# PWM
+CONFIG_PWM=y
+CONFIG_PWM_FSL_FTM=m
+
+CONFIG_S32CC_FCCU=y
+CONFIG_GPIOLIB=y
+CONFIG_OF_GPIO=y
+
+CONFIG_MDIO_DEVICE=y
+CONFIG_PHYLIB=y
+
+#QSPI
+CONFIG_SPI_FSL_QUADSPI=y
+
+#RTC
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_S32CC=y
+CONFIG_RTC_DRV_PCF85063=y
+
+#I2C
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IMX=m
+
+#Watchdog
+# We need keep this driver built-in since rmmod will trigger reboot
+CONFIG_S32CC_WDT=y
+
+#NVME
+CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_TARGET=y
+CONFIG_NVMEM_S32CC_SIUL2=y
+
+#LLCE
+CONFIG_CAN_LLCE=y
+CONFIG_CAN_LLCE_CONTROLLER=m
+
+# Regulator configuration
+CONFIG_REGULATOR=y
+
+#HSE UIO
+CONFIG_UIO=y
+CONFIG_CRYPTO_DEV_NXP_HSE=y
+CONFIG_UIO_NXP_HSE=y
+CONFIG_UIO_NXP_HSE_MU0=y
+CONFIG_CRYPTO_DEV_NXP_HSE_MU1=y
+
+#RANDOM
+CONFIG_HW_RANDOM=y
diff --git a/bsp/aptiv-s32g/aptiv-cvc.scc b/bsp/aptiv-s32g/aptiv-cvc.scc
new file mode 100644
index 00..30fa80132f
--- /dev/null
+++ b/bsp/aptiv-s32g/aptiv-cvc.scc
@@ -0,0 +1,7 @@
+#