Re: [linux-yocto] [PATCH] LSI AXXIA updates to 3.4 standard/axxia/base

2015-03-30 Thread Bruce Ashfield

On 2015-03-30 01:10 PM, cristian.berc...@windriver.com wrote:

From: Cristian Bercaru 

Hello! This patch is an update to IBM PPC476 erratum 48 fix and it is
tagged with the latest 3.4 tag: lsi_axxia_linux_7.8.1.43.


This came through multiple times .. is this the right version ? This
patch won't apply to the linux-yocto-3.4 standard/axxxia/base branch:

yow-bashfiel-d4 [/home/brucgit-merge]> git am -s a.mbox
Applying: arch/powerpc/kernel: Address IBM PPC476 erratum 47
error: patch failed: arch/powerpc/kernel/head_44x.S:1249
error: arch/powerpc/kernel/head_44x.S: patch does not apply
Patch failed at 0001 arch/powerpc/kernel: Address IBM PPC476 erratum 47
The copy of the patch that failed is found in:

/home/bruce/poky-kernel/linux-yocto-3.4.git-merge/.git/rebase-apply/patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

Bruce



Sangeetha Rao (1):
   arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

  arch/powerpc/kernel/traps.c |6 +++---
  1 file changed, 3 insertions(+), 3 deletions(-)



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[linux-yocto] [PATCH] arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

2015-03-30 Thread cristian . bercaru
From: Sangeetha Rao 

This patch updates the fix to PPC476 erratum 48 in order to use the
correct calculation for L2 cache register for CPUs 4 and 5.

Signed-off-by: Sangeetha Rao 
---
 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index b4b4048..cc036fb 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -866,8 +866,8 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256, 0x304);
l2plbstats1 = mfdcr((cpu + 3) * 256 + 4);
} else {
-   mtdcr((cpu + 9)*256, 0x304);
-   l2plbstats1 = mfdcr((cpu + 9) * 256 + 4);
+   mtdcr((cpu + 15) * 256, 0x304);
+   l2plbstats1 = mfdcr((cpu + 15) * 256 + 4);
}
 
if (((mcsr & 0x8020) == 0x8020) &&
@@ -879,7 +879,7 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256 + 4,
0x000C);
} else {
-   mtdcr((cpu + 9) * 256 + 4,
+   mtdcr((cpu + 15) * 256 + 4,
0x000C);
}
printk(KERN_INFO "machine_check_exception: Core %d: MCSR=0x%x 
l2plbstats1=0x%x",
-- 
1.7.9.5

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[linux-yocto] [PATCH] LSI AXXIA updates to 3.4 standard/axxia/base

2015-03-30 Thread cristian . bercaru
From: Cristian Bercaru 

Hello! This patch is an update to IBM PPC476 erratum 48 fix and it is
tagged with the latest 3.4 tag: lsi_axxia_linux_7.8.1.43.

Sangeetha Rao (1):
  arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

-- 
1.7.9.5

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[linux-yocto] [PATCH] LSI AXXIA updates to 3.4 standard/axxia/base

2015-03-30 Thread cristian . bercaru
From: Cristian Bercaru 

Hello! This patch is an update to IBM PPC476 erratum 48 fix and it is
tagged with the latest 3.4 tag: lsi_axxia_linux_7.8.1.43.

Sangeetha Rao (1):
  arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

-- 
1.7.9.5

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[linux-yocto] [PATCH] arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

2015-03-30 Thread cristian . bercaru
From: Sangeetha Rao 

This patch updates the fix to PPC476 erratum 48 in order to use the
correct calculation for L2 cache register for CPUs 4 and 5.

Signed-off-by: Sangeetha Rao 
---
 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index b4b4048..cc036fb 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -866,8 +866,8 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256, 0x304);
l2plbstats1 = mfdcr((cpu + 3) * 256 + 4);
} else {
-   mtdcr((cpu + 9)*256, 0x304);
-   l2plbstats1 = mfdcr((cpu + 9) * 256 + 4);
+   mtdcr((cpu + 15) * 256, 0x304);
+   l2plbstats1 = mfdcr((cpu + 15) * 256 + 4);
}
 
if (((mcsr & 0x8020) == 0x8020) &&
@@ -879,7 +879,7 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256 + 4,
0x000C);
} else {
-   mtdcr((cpu + 9) * 256 + 4,
+   mtdcr((cpu + 15) * 256 + 4,
0x000C);
}
printk(KERN_INFO "machine_check_exception: Core %d: MCSR=0x%x 
l2plbstats1=0x%x",
-- 
1.7.9.5

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Re: [linux-yocto] multiple compilers

2015-03-30 Thread Thomas PERROT
Hi,

There are two solutions, you can specify a preferred compiler in a
recipe or change the main compiler.

To change preferred compiler in a recipe:
TOOLCHAIN_pn- = ""
DEPENDS_append_pn- = " -cross "

To change the main compiler:
TOOLCHAIN = ""

There is a example in the official wiki :
http://www.openembedded.org/wiki/Adding_a_secondary_toolchain

Best regards,
Thomas P.


On Fri, Mar 27, 2015 at 10:32 PM, Mehaffey, John
 wrote:
> Hi Dan,
> I don't generally do compilers, but the Yocto way is to create another
> recipe where the SRC_URI points to the tarball/git repository you want to
> build from. It may be that you will need to start with an older compiler .bb
> recipe, you don't say how far back you need to go.
>
> You don't really say what you've tried, so I can't help much with specifics,
> as I am not sure of your level of proficiency with Yocto/bitbake.
>
>
> Sincerely,
> John Mehaffey
> Linux System Architect
> Mentor Graphics
> 
> From: linux-yocto-boun...@yoctoproject.org
> [linux-yocto-boun...@yoctoproject.org] on behalf of Dan Gundlach
> [cyclist2...@gmail.com]
> Sent: Friday, March 27, 2015 1:33 PM
> To: linux-yocto@yoctoproject.org
> Subject: [linux-yocto] multiple compilers
>
> How do I configure yocto to create multiple compilers?  I need to create a
> second (older) compiler to build the kernel.  It won't boot using the
> current one.  I've searched in vain to find a solution.  It says you can do
> it, but it dosn't tell you how.
>
> --
> ___
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>
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[linux-yocto] [PATCH] arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

2015-03-30 Thread cristian . bercaru
From: Sangeetha Rao 

This patch updates the fix to PPC476 erratum 48 in order to use the
correct calculation for L2 cache register for CPUs 4 and 5.

Signed-off-by: Sangeetha Rao 
---
 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index b4b4048..cc036fb 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -866,8 +866,8 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256, 0x304);
l2plbstats1 = mfdcr((cpu + 3) * 256 + 4);
} else {
-   mtdcr((cpu + 9)*256, 0x304);
-   l2plbstats1 = mfdcr((cpu + 9) * 256 + 4);
+   mtdcr((cpu + 15) * 256, 0x304);
+   l2plbstats1 = mfdcr((cpu + 15) * 256 + 4);
}
 
if (((mcsr & 0x8020) == 0x8020) &&
@@ -879,7 +879,7 @@ void machine_check_exception(struct pt_regs *regs)
mtdcr((cpu + 3) * 256 + 4,
0x000C);
} else {
-   mtdcr((cpu + 9) * 256 + 4,
+   mtdcr((cpu + 15) * 256 + 4,
0x000C);
}
printk(KERN_INFO "machine_check_exception: Core %d: MCSR=0x%x 
l2plbstats1=0x%x",
-- 
1.7.9.5

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[linux-yocto] [PATCH] LSI AXXIA updates to 3.4 standard/axxia/base

2015-03-30 Thread cristian . bercaru
From: Cristian Bercaru 

Hello! This patch is an update to IBM PPC476 erratum 48 fix and it is
tagged with the latest 3.4 tag: lsi_axxia_linux_7.8.1.43.

Sangeetha Rao (1):
  arch/powerpc/kernel: Address IBM PPC476 erratum 48 (update)

 arch/powerpc/kernel/traps.c |6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

-- 
1.7.9.5

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