Re: [linux-yocto] [PATCH 00/11] Pinctrl, Watchdog and P2SB driver for linux-yocto-4.1
On 2016-06-27 9:28 PM, Yong, Jonathan wrote: Hi, These will enable Apollo Lake specific Pinctrl, iTCO watchdog and P2SB drivers. The changes are quite interlinked due to the lpc-ich renaming. The 8250 change is used to suppress DMA warnings. These are already in the progress of being upstreamed into the main kernel.org kernel repository, but with different implementation. We won't be able to make it in by Apollo Lake Gold schedule, so these should go into standard/intel/base. These all look fine to me. I put them on standard/intel/base and standard/preempt-rt/intel/base. Cheers, Bruce Andy Shevchenko (1): serial: 8250_dma: stop ongoing RX DMA on exception Jonathan Yong (3): watchdog: iTCO-wdt handle 5th variation x86: Move Watchdog loader for Apollo Lake x86: Prepare to split lpc-ich driver Tan Jui Nee (2): pinctrl-broxton: enable platform device in the absent of ACPI enumeration pinctrl: intel: use 'bool' state for PINCTRL_APL_DEVICE in Kconfig Yong, Jonathan (5): Convert lpc_ich_init_wdt to use a switch-case x86: Sideband Interface driver for Apollo Lake x86: Rework Apollo Lake GPIO pinctrl non-ACPI mode driver x86: Add platform:apl_gpio alias to pinctrl-broxton x86: Suppress compile time warnings in pinctrl-broxton MAINTAINERS | 11 + arch/x86/Kconfig| 18 + arch/x86/platform/bxt/Makefile |1 + arch/x86/platform/bxt/sbi_apl.c | 399 ++ drivers/mfd/Makefile|1 + drivers/mfd/lpc_ich-apl.c | 46 ++ drivers/mfd/lpc_ich-core.c | 1322 +++ drivers/mfd/lpc_ich.c | 1117 -- drivers/pinctrl/intel/Kconfig | 12 +- drivers/pinctrl/intel/pinctrl-broxton.c | 34 +- drivers/tty/serial/8250/8250_dma.c | 17 +- drivers/watchdog/iTCO_wdt.c |2 + include/linux/pinctrl/pinctrl-apl.h | 45 ++ include/linux/platform_data/sbi_apl.h | 67 ++ 14 files changed, 1965 insertions(+), 1127 deletions(-) create mode 100644 arch/x86/platform/bxt/Makefile create mode 100644 arch/x86/platform/bxt/sbi_apl.c create mode 100644 drivers/mfd/lpc_ich-apl.c create mode 100644 drivers/mfd/lpc_ich-core.c delete mode 100644 drivers/mfd/lpc_ich.c create mode 100644 include/linux/pinctrl/pinctrl-apl.h create mode 100644 include/linux/platform_data/sbi_apl.h -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
Re: [linux-yocto] [yocto-kernel-cache] [PATCH] Fix bitbake warnings on build
On 2016-06-27 3:14 AM, rebecca.swee.fun.ch...@intel.com wrote: From: Rebecca Chang Swee FunHi Bruce, With a build test run on Intel Common BSP, some warning messages poped out about actual value set is not matched with requested value on CONFIG_GPIO_GENERIC. This can be resolved by setting CONFIG_GPIO_GENERIC_PLATFORM=y since CONFIG_GPIO_GENERIC is tristate selected by CONFIG_GPIO_GENERIC_PLATFORM. This is only targetted to fix on yocto-4.1 branch. Please review and feedback if you have any. Thank you! merged to the 4.1 branch. It will be in my next round of SRCREV updates. Bruce Regards, Rebecca Rebecca Chang Swee Fun (1): broxton: set CONFIG_GPIO_GENERIC_PLATFORM instead of CONFIG_GPIO_GENERIC features/soc/broxton/broxton.cfg | 1 + 1 file changed, 1 insertion(+) -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 08/11] x86: Prepare to split lpc-ich driver
From: Jonathan YongPrepare to spilt out the driver code since it is growing quite fast with many table entries. Signed-off-by: Jonathan Yong --- drivers/mfd/Makefile |1 + drivers/mfd/lpc_ich-core.c | 1248 drivers/mfd/lpc_ich.c | 1248 3 files changed, 1249 insertions(+), 1248 deletions(-) create mode 100644 drivers/mfd/lpc_ich-core.c delete mode 100644 drivers/mfd/lpc_ich.c diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index ab95dac..39e09eb 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -144,6 +144,7 @@ obj-$(CONFIG_MFD_KEMPLD)+= kempld-core.o obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o obj-$(CONFIG_LPC_SCH) += lpc_sch.o obj-$(CONFIG_LPC_ICH) += lpc_ich.o +lpc_ich-y := lpc_ich-core.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o diff --git a/drivers/mfd/lpc_ich-core.c b/drivers/mfd/lpc_ich-core.c new file mode 100644 index 000..20a176b --- /dev/null +++ b/drivers/mfd/lpc_ich-core.c @@ -0,0 +1,1248 @@ +/* + * lpc_ich.c - LPC interface for Intel ICH + * + * LPC bridge function of the Intel ICH contains many other + * functional units, such as Interrupt controllers, Timers, + * Power Management, System Management, GPIO, RTC, and LPC + * Configuration Registers. + * + * This driver is derived from lpc_sch. + + * Copyright (c) 2011 Extreme Engineering Solution, Inc. + * Author: Aaron Sierra + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + * + * This driver supports the following I/O Controller hubs: + * (See the intel documentation on http://developer.intel.com.) + * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO) + * document number 290687-002, 298242-027: 82801BA (ICH2) + * document number 290733-003, 290739-013: 82801CA (ICH3-S) + * document number 290716-001, 290718-007: 82801CAM (ICH3-M) + * document number 290744-001, 290745-025: 82801DB (ICH4) + * document number 252337-001, 252663-008: 82801DBM (ICH4-M) + * document number 273599-001, 273645-002: 82801E (C-ICH) + * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R) + * document number 300641-004, 300884-013: 6300ESB + * document number 301473-002, 301474-026: 82801F (ICH6) + * document number 313082-001, 313075-006: 631xESB, 632xESB + * document number 307013-003, 307014-024: 82801G (ICH7) + * document number 322896-001, 322897-001: NM10 + * document number 313056-003, 313057-017: 82801H (ICH8) + * document number 316972-004, 316973-012: 82801I (ICH9) + * document number 319973-002, 319974-002: 82801J (ICH10) + * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH) + * document number 320066-003, 320257-008: EP80597 (IICH) + * document number 324645-001, 324646-001: Cougar Point (CPT) + * document number TBD : Patsburg (PBG) + * document number TBD : DH89xxCC + * document number TBD : Panther Point + * document number TBD : Lynx Point + * document number TBD : Lynx Point-LP + * document number TBD : Wellsburg + * document number TBD : Avoton SoC + * document number TBD : Coleto Creek + * document number TBD : Wildcat Point-LP + * document number TBD : 9 Series + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ACPIBASE 0x40 +#define ACPIBASE_GPE_OFF 0x28 +#define ACPIBASE_GPE_END 0x2f +#define ACPIBASE_SMI_OFF 0x30 +#define ACPIBASE_SMI_END 0x33 +#define ACPIBASE_PMC_OFF 0x08 +#define ACPIBASE_PMC_END 0x0c +#define ACPIBASE_TCO_OFF 0x60 +#define ACPIBASE_TCO_END 0x7f +#define ACPICTRL_PMCBASE 0x44 + +#define ACPIBASE_GCS_OFF 0x3410 +#define ACPIBASE_GCS_END 0x3414 + +#define GPIOBASE_ICH0 0x58 +#define GPIOCTRL_ICH0 0x5C +#define GPIOBASE_ICH6 0x48 +#define GPIOCTRL_ICH6 0x4C + +#define RCBABASE 0xf0 + +#define
[linux-yocto] [PATCH 11/11] x86: Suppress compile time warnings in pinctrl-broxton
Suppresses the unused variable warning and bracer recommendation. bxt_gpio isn't actually in use yet. Signed-off-by: Yong, Jonathan--- drivers/pinctrl/intel/pinctrl-broxton.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index 4d15694..251b98f 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -999,10 +999,11 @@ static const struct intel_pinctrl_soc_data *apl_pinctrl_soc_data[] = { static const struct acpi_device_id bxt_pinctrl_acpi_match[] = { #ifdef CONFIG_PINCTRL_APL_DEVICE - "apl_gpio", (kernel_ulong_t)apl_pinctrl_soc_data, + { "apl_gpio", (kernel_ulong_t)apl_pinctrl_soc_data, }, + { "bxt_gpio", (kernel_ulong_t)bxt_pinctrl_soc_data, }, #else - "INT3452", (kernel_ulong_t)apl_pinctrl_soc_data, - "INT34D1", (kernel_ulong_t)bxt_pinctrl_soc_data, + { "INT3452", (kernel_ulong_t)apl_pinctrl_soc_data, }, + { "INT34D1", (kernel_ulong_t)bxt_pinctrl_soc_data, }, #endif { } }; -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 10/11] x86: Add platform:apl_gpio alias to pinctrl-broxton
This should allow it to load as a platform driver in non-ACPI mode. Signed-off-by: Yong, Jonathan--- drivers/pinctrl/intel/pinctrl-broxton.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/pinctrl/intel/pinctrl-broxton.c b/drivers/pinctrl/intel/pinctrl-broxton.c index 27855a5..4d15694 100644 --- a/drivers/pinctrl/intel/pinctrl-broxton.c +++ b/drivers/pinctrl/intel/pinctrl-broxton.c @@ -1085,3 +1085,7 @@ module_exit(bxt_pinctrl_exit); MODULE_AUTHOR("Mika Westerberg "); MODULE_DESCRIPTION("Intel Broxton SoC pinctrl/GPIO driver"); MODULE_LICENSE("GPL v2"); + +#ifdef CONFIG_PINCTRL_APL_DEVICE +MODULE_ALIAS("platform:apl_gpio"); +#endif -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 09/11] x86: Rework Apollo Lake GPIO pinctrl non-ACPI mode driver
The previous driver depends on a PCI device that is normally hidden by the BIOS, which means it can never bind correctly. This driver uses the P2SB hide/unhide mechanism cooperatively to pass the PCI BAR address to the gpio platform driver. Original work by Tan, Jui NeeSigned-off-by: Yong, Jonathan --- MAINTAINERS | 5 + drivers/mfd/Makefile| 2 +- drivers/mfd/lpc_ich-apl.c | 46 drivers/mfd/lpc_ich-core.c | 82 - drivers/pinctrl/intel/Makefile | 1 - drivers/pinctrl/intel/pinctrl-apl-dev.c | 201 include/linux/pinctrl/pinctrl-apl.h | 33 +- 7 files changed, 160 insertions(+), 210 deletions(-) create mode 100644 drivers/mfd/lpc_ich-apl.c delete mode 100644 drivers/pinctrl/intel/pinctrl-apl-dev.c diff --git a/MAINTAINERS b/MAINTAINERS index 5e13b56..66fc822 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2300,6 +2300,11 @@ S: Supported F: drivers/pinctrl/intel/pinctrl-apl-dev.c F: include/linux/pinctrl/pinctrl-apl.h +BROXTON PLATFORM TESTING +M: Yu, Ong Hock +S: Supported +F: arch/x86/platform/bxt/* + BSG (block layer generic sg v4 driver) M: FUJITA Tomonori L: linux-s...@vger.kernel.org diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 39e09eb..5c63c8b 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -144,7 +144,7 @@ obj-$(CONFIG_MFD_KEMPLD)+= kempld-core.o obj-$(CONFIG_MFD_INTEL_QUARK_I2C_GPIO) += intel_quark_i2c_gpio.o obj-$(CONFIG_LPC_SCH) += lpc_sch.o obj-$(CONFIG_LPC_ICH) += lpc_ich.o -lpc_ich-y := lpc_ich-core.o +lpc_ich-y := lpc_ich-core.o lpc_ich-apl.o obj-$(CONFIG_MFD_RDC321X) += rdc321x-southbridge.o obj-$(CONFIG_MFD_JANZ_CMODIO) += janz-cmodio.o obj-$(CONFIG_MFD_JZ4740_ADC) += jz4740-adc.o diff --git a/drivers/mfd/lpc_ich-apl.c b/drivers/mfd/lpc_ich-apl.c new file mode 100644 index 000..7e4afff --- /dev/null +++ b/drivers/mfd/lpc_ich-apl.c @@ -0,0 +1,46 @@ +/* Copyright (c) 2015 Intel Corporation. All rights reserved. + * Author: Yong, Jonathan + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. If not, write to + * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include +/* Offset data for Apollo Lake GPIO communities */ + +const struct apl_gpio_io_res apl_gpio_io_res_off[apl_pinctrl_max] = { + [apl_pinctrl_n] = { + .start = APL_GPIO_NORTH_OFFSET << 16, + .end = (APL_GPIO_NORTH_OFFSET << 16) + + APL_GPIO_NORTH_END, + .id = "1", + }, + [apl_pinctrl_nw] = { + .start = APL_GPIO_NORTHWEST_OFFSET << 16, + .end = (APL_GPIO_NORTHWEST_OFFSET << 16) + + APL_GPIO_NORTHWEST_END, + .id = "2", + }, + [apl_pinctrl_w] = { + .start = APL_GPIO_WEST_OFFSET << 16, + .end = (APL_GPIO_WEST_OFFSET << 16) + + APL_GPIO_WEST_END, + .id = "3", + }, + [apl_pinctrl_sw] = { + .start = APL_GPIO_SOUTHWEST_OFFSET << 16, + .end = (APL_GPIO_SOUTHWEST_OFFSET << 16) + + APL_GPIO_SOUTHWEST_END, + .id = "4", + }, +}; diff --git a/drivers/mfd/lpc_ich-core.c b/drivers/mfd/lpc_ich-core.c index 20a176b..15b2ac5 100644 --- a/drivers/mfd/lpc_ich-core.c +++ b/drivers/mfd/lpc_ich-core.c @@ -69,6 +69,7 @@ #include #include #include +#include #define ACPIBASE 0x40 #define ACPIBASE_GPE_OFF 0x28 @@ -1148,23 +1149,96 @@ wdt_done: return ret; } +#ifdef CONFIG_PINCTRL_APL_DEVICE +static struct resource apl_gpio_res[] = { + {}, + { + .start = 14, + .end = 14, + .flags = IORESOURCE_IRQ, + } +}; + +static struct apl_pinctrl_port apl_pinctrl_pdata; + +static const struct mfd_cell apl_gpio_devices = { + .name = "apl_gpio", + .resources = apl_gpio_res, + .num_resources = ARRAY_SIZE(apl_gpio_res), + .pdata_size = sizeof(apl_pinctrl_pdata), + .platform_data = _pinctrl_pdata, + .ignore_resource_conflicts = true, +}; +#endif + static int
[linux-yocto] [PATCH 05/11] x86: Sideband Interface driver for Apollo Lake
The Sideband Interface driver for Apollo Lake shares much similarity with the existing iosf_mbi driver functionality wise, but was rewritten for Apollo Lake due to incompatibility with the new registers. Signed-off-by: Yong, Jonathan--- arch/x86/Kconfig | 18 ++ arch/x86/platform/bxt/Makefile| 1 + arch/x86/platform/bxt/sbi_apl.c | 399 ++ include/linux/platform_data/sbi_apl.h | 67 ++ 4 files changed, 485 insertions(+) create mode 100644 arch/x86/platform/bxt/Makefile create mode 100644 arch/x86/platform/bxt/sbi_apl.c create mode 100644 include/linux/platform_data/sbi_apl.h diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 226d569..8e3f6e2 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -563,6 +563,24 @@ config IOSF_MBI_DEBUG If you don't require the option or are in doubt, say N. +config X86_INTEL_SBI_APL + tristate "Intel SoC Sideband Interface for Apollo Lake" + depends on PCI + ---help--- + This option enables sideband interface access for Intel Apollo Lake. + Like IOSF_MBI, the registers are used in lieu of MSR's. + + You should say Y if you are running a kernel on Apollo Lake. + +config X86_INTEL_SBI_APL_DEBUG + bool "Enable Intel SoC SBI for Apollo Lake access in debugfs" + depends on X86_INTEL_SBI_APL && DEBUG_FS + ---help--- + Select this option to expose the Sideband Interface through + debugfs. + + You should say N if you do not plan to debug the SoC. + config X86_RDC321X bool "RDC R-321x SoC" depends on X86_32 diff --git a/arch/x86/platform/bxt/Makefile b/arch/x86/platform/bxt/Makefile new file mode 100644 index 000..5990592 --- /dev/null +++ b/arch/x86/platform/bxt/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_X86_INTEL_SBI_APL) += sbi_apl.o diff --git a/arch/x86/platform/bxt/sbi_apl.c b/arch/x86/platform/bxt/sbi_apl.c new file mode 100644 index 000..1974f5f --- /dev/null +++ b/arch/x86/platform/bxt/sbi_apl.c @@ -0,0 +1,399 @@ +/* + * Sideband Interface driver for Apollo Lake + * Copyright (c) 2015, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * + * The Sideband Interface is an access mechanism to communicate with multiple + * devices on-board the SoC fabric over a PCI interface. This driver deals with + * the Apollo Lake SoC. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#define DRV_NAME "sbi_apl" +#define DRV_VERSION "1.0" + +static struct sbi_platform_data *plat_data; +#define sbi_pdev_bus plat_data->bus +#define sbi_pdev_slot plat_data->p2sb +#define sbi_apl_lock plat_data->lock + +static u32 sbi_address(const struct sbi_apl_message *args) +{ + return (((u32)args->port_address) << 24 | args->register_offset); +} + +static u16 sbi_status(const struct sbi_apl_message *args) +{ + return ((u16)args->opcode << 8) | + args->posted << 7 | + args->status << 1; +} + +static u16 sbi_routing(const struct sbi_apl_message *args) +{ + return ((u16)args->byte_enable << 12) | + args->base_address_register << 8 | + args->function_id; +} + +/* returns 0 on OK wait */ +static int sbi_do_wait(struct pci_bus *sbi_pdev, unsigned int devfn, u16 *word) +{ + int ret; + unsigned int timeout = 0x0FFF; /*2^28-1*/ + + do { + ret = pci_bus_read_config_word( + sbi_pdev, + devfn, + SBI_STAT_OFFSET, + word); + if (ret) + return ret; + if (*word == (u16) -1) { + pr_err("sbi_do_wait busy wait failed, P2SB read not allowed?"); + return 1; + } + timeout--; + } while (timeout && (*word & SBI_STAT_BUSY_MASK)); + /* fail if time-out occurs */ + return timeout ? 0 : 1; +} + +static int sbi_do_write(struct pci_bus *sbi_pdev, unsigned int devfn, + struct sbi_apl_message *args) +{ + int ret = 0; + u16 word; + + if (!sbi_pdev) + return -ENODEV; + if (!capable(CAP_SYS_RAWIO)) + return -EACCES; + /* Is it busy? */ + if (sbi_do_wait(sbi_pdev, devfn, )) { + pr_err(DRV_NAME " device has busy bit set %hx!\n", word); + ret = -EAGAIN; + goto err; + }; + ret =
[linux-yocto] [PATCH 06/11] watchdog: iTCO-wdt handle 5th variation
From: Jonathan YongApollo Lake Watchdog is not on the SMBUS, but on the PMC, most register locations remains unchanged except for the NO_REBOOT bit in the SMI_EN register. Signed-off-by: Jonathan Yong --- drivers/watchdog/iTCO_wdt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/watchdog/iTCO_wdt.c b/drivers/watchdog/iTCO_wdt.c index 0acc6c5..54cab18 100644 --- a/drivers/watchdog/iTCO_wdt.c +++ b/drivers/watchdog/iTCO_wdt.c @@ -150,6 +150,7 @@ static inline u32 no_reboot_bit(void) u32 enable_bit; switch (iTCO_wdt_private.iTCO_version) { + case 5: case 3: enable_bit = 0x0010; break; @@ -512,6 +513,7 @@ static int iTCO_wdt_probe(struct platform_device *dev) /* Clear out the (probably old) status */ switch (iTCO_wdt_private.iTCO_version) { + case 5: case 4: outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */ outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */ -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 07/11] x86: Move Watchdog loader for Apollo Lake
From: Jonathan YongThe watchdog timer on Apollo Lake is on the Power Management Controller instead of the SMBUS. The LPC driver will also load the Apollo Lake Sideband Interface platform driver. Signed-off-by: Jonathan Yong --- drivers/mfd/lpc_ich.c | 154 +- 1 file changed, 139 insertions(+), 15 deletions(-) diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index 231a372..20a176b 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c @@ -64,9 +64,11 @@ #include #include #include +#include #include #include #include +#include #define ACPIBASE 0x40 #define ACPIBASE_GPE_OFF 0x28 @@ -102,8 +104,9 @@ struct lpc_ich_priv { int gctrl; /* GPIO control */ int abase_save; /* Cached ACPI base value */ - int actrl_pbase_save; /* Cached ACPI control or PMC base value */ + int actrl_pbase_save; /* Cached ACPI control or PMC base value */ int gctrl_save; /* Cached GPIO control value */ + struct mutex lock; /* Device hide/unhide control */ }; static struct resource wdt_ich_res[] = { @@ -135,8 +138,11 @@ static struct resource gpio_ich_res[] = { enum lpc_cells { LPC_WDT = 0, LPC_GPIO, + LPC_P2SB_APL, }; +static struct sbi_platform_data sbi_apl_data; + static struct mfd_cell lpc_ich_cells[] = { [LPC_WDT] = { .name = "iTCO_wdt", @@ -150,6 +156,12 @@ static struct mfd_cell lpc_ich_cells[] = { .resources = gpio_ich_res, .ignore_resource_conflicts = true, }, + [LPC_P2SB_APL] = { + .name = "sbi_apl", + .num_resources = 0, + .platform_data = _apl_data, + .pdata_size = sizeof(sbi_apl_data), + } }; /* chipset related info */ @@ -220,6 +232,7 @@ enum lpc_chipsets { LPC_WPT_LP, /* Wildcat Point-LP */ LPC_BRASWELL, /* Braswell SoC */ LPC_9S, /* 9 Series */ + LPC_APL,/* Apollo Lake SoC */ }; static struct lpc_ich_info lpc_chipset_info[] = { @@ -531,6 +544,10 @@ static struct lpc_ich_info lpc_chipset_info[] = { .name = "9 Series", .iTCO_version = 2, }, + [LPC_APL] = { + .name = "Apollo Lake SoC", + .iTCO_version = 5, + }, }; /* @@ -679,6 +696,7 @@ static const struct pci_device_id lpc_ich_ids[] = { { PCI_VDEVICE(INTEL, 0x3b14), LPC_3420}, { PCI_VDEVICE(INTEL, 0x3b16), LPC_3450}, { PCI_VDEVICE(INTEL, 0x5031), LPC_EP80579}, + { PCI_VDEVICE(INTEL, 0x5ae8), LPC_APL}, { PCI_VDEVICE(INTEL, 0x8c40), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c41), LPC_LPT}, { PCI_VDEVICE(INTEL, 0x8c42), LPC_LPT}, @@ -794,6 +812,9 @@ static void lpc_ich_enable_acpi_space(struct pci_dev *dev) u8 reg_save; switch (lpc_chipset_info[priv->chipset].iTCO_version) { + case 5: + /* Doesn't apply for APL */ + break; case 3: /* * Some chipsets (eg Avoton) enable the ACPI space in the @@ -967,32 +988,73 @@ gpio_done: return ret; } -static int lpc_ich_init_wdt(struct pci_dev *dev) +static unsigned long lpc_ich_res(resource_size_t *start, struct pci_bus *bus, + unsigned int devfn, unsigned int bar) +{ + u32 dword; + unsigned long flag = 0; + unsigned int addr = PCI_BASE_ADDRESS_0 + 4 * bar; + + pci_bus_read_config_dword(bus, devfn, addr, ); + if ((dword & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) { + flag = IORESOURCE_IO; + *start = dword & PCI_BASE_ADDRESS_IO_MASK; + } else { + flag = IORESOURCE_MEM; + *start = dword & PCI_BASE_ADDRESS_MEM_MASK; + if (dword & PCI_BASE_ADDRESS_MEM_TYPE_64) { + flag |= IORESOURCE_MEM_64; +#ifdef CONFIG_PHYS_ADDR_T_64BIT + addr += 4; + pci_bus_read_config_dword(bus, devfn, addr, ); + *start |= ((u64) dword) << 32; +#endif + } + } + return flag; +} + +static int lpc_ich_init_wdt_pmc(struct pci_dev *dev, struct lpc_ich_priv *priv, + u32 *base_addr_cfg, u32 *base_addr) { - struct lpc_ich_priv *priv = pci_get_drvdata(dev); - u32 base_addr_cfg; - u32 base_addr; - int ret; struct resource *res; + /* Not applicable for APL */ + if (lpc_chipset_info[priv->chipset].iTCO_version == 5) + return 0; + /* Setup power management base register */ - pci_read_config_dword(dev, priv->abase, _addr_cfg); - base_addr = base_addr_cfg & 0xff80; - if (!base_addr) { + pci_read_config_dword(dev, priv->abase, base_addr_cfg); +
[linux-yocto] [PATCH 04/11] Convert lpc_ich_init_wdt to use a switch-case
Prevous version lacked a default case, uncovered by TCO v4 hardware. Print notice if unknown version encountered. Signed-off-by: Yong, Jonathan--- drivers/mfd/lpc_ich.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c index c5a9a08..231a372 100644 --- a/drivers/mfd/lpc_ich.c +++ b/drivers/mfd/lpc_ich.c @@ -1005,22 +1005,25 @@ static int lpc_ich_init_wdt(struct pci_dev *dev) * to it we have to read the PMC BASE from config space and address * the register at offset 0x8. */ - if (lpc_chipset_info[priv->chipset].iTCO_version == 1) { + switch (lpc_chipset_info[priv->chipset].iTCO_version) { + case 1: /* Don't register iomem for TCO ver 1 */ lpc_ich_cells[LPC_WDT].num_resources--; - } else if (lpc_chipset_info[priv->chipset].iTCO_version == 2) { + break; + case 2: pci_read_config_dword(dev, RCBABASE, _addr_cfg); base_addr = base_addr_cfg & 0xc000; if (!(base_addr_cfg & 1)) { - dev_notice(>dev, "RCBA is disabled by " - "hardware/BIOS, device disabled\n"); +dev_notice(>dev, "RCBA is disabled by " + "hardware/BIOS, device disabled\n"); ret = -ENODEV; goto wdt_done; } res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); res->start = base_addr + ACPIBASE_GCS_OFF; res->end = base_addr + ACPIBASE_GCS_END; - } else if (lpc_chipset_info[priv->chipset].iTCO_version == 3) { + break; + case 3: lpc_ich_enable_pmc_space(dev); pci_read_config_dword(dev, ACPICTRL_PMCBASE, _addr_cfg); base_addr = base_addr_cfg & 0xfe00; @@ -1028,6 +1031,10 @@ static int lpc_ich_init_wdt(struct pci_dev *dev) res = wdt_mem_res(ICH_RES_MEM_GCS_PMC); res->start = base_addr + ACPIBASE_PMC_OFF; res->end = base_addr + ACPIBASE_PMC_END; + break; + default: + dev_notice(>dev, "Unknown TCO v%u\n", + lpc_chipset_info[priv->chipset].iTCO_version); } ret = lpc_ich_finalize_wdt_cell(dev); -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 02/11] pinctrl-broxton: enable platform device in the absent of ACPI enumeration
From: Tan Jui NeeThis is to cater the need for non-ACPI system whereby a platform device has to be created in order to bind with the Apollo Lake Pinctrl GPIO platform driver. Signed-off-by: Tan Jui Nee Signed-off-by: Yong, Jonathan --- MAINTAINERS | 6 + drivers/pinctrl/intel/Kconfig | 12 +- drivers/pinctrl/intel/Makefile | 1 + drivers/pinctrl/intel/pinctrl-apl-dev.c | 201 drivers/pinctrl/intel/pinctrl-broxton.c | 29 - include/linux/pinctrl/pinctrl-apl.h | 18 +++ 6 files changed, 262 insertions(+), 5 deletions(-) create mode 100644 drivers/pinctrl/intel/pinctrl-apl-dev.c create mode 100644 include/linux/pinctrl/pinctrl-apl.h diff --git a/MAINTAINERS b/MAINTAINERS index dcfa127..5e13b56 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2294,6 +2294,12 @@ L: net...@vger.kernel.org S: Supported F: drivers/net/ethernet/brocade/bna/ +BROXTON PLATFORM Pin Controller +M: Tan, Jui Nee +S: Supported +F: drivers/pinctrl/intel/pinctrl-apl-dev.c +F: include/linux/pinctrl/pinctrl-apl.h + BSG (block layer generic sg v4 driver) M: FUJITA Tomonori L: linux-s...@vger.kernel.org diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index 4d2efad..bab8823 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -36,12 +36,22 @@ config PINCTRL_INTEL config PINCTRL_BROXTON tristate "Intel Broxton pinctrl and GPIO driver" - depends on ACPI select PINCTRL_INTEL help Broxton pinctrl driver provides an interface that allows configuring of SoC pins and using them as GPIOs. +config PINCTRL_APL_DEVICE + tristate "Intel Apollo Lake GPIO pin control Platform Device Emulation" + depends on PINCTRL_BROXTON + help + This driver is to set up platform device in the absent of ACPI + enumeration. + + Say yes for non-ACPI platform. This will enable the platform devices + to be created and bind with the Apollo Lake GPIO pin control platform + driver. + config PINCTRL_SUNRISEPOINT tristate "Intel Sunrisepoint pinctrl and GPIO driver" depends on ACPI diff --git a/drivers/pinctrl/intel/Makefile b/drivers/pinctrl/intel/Makefile index 03bc68e..2df696b 100644 --- a/drivers/pinctrl/intel/Makefile +++ b/drivers/pinctrl/intel/Makefile @@ -4,4 +4,5 @@ obj-$(CONFIG_PINCTRL_BAYTRAIL) += pinctrl-baytrail.o obj-$(CONFIG_PINCTRL_CHERRYVIEW) += pinctrl-cherryview.o obj-$(CONFIG_PINCTRL_INTEL)+= pinctrl-intel.o obj-$(CONFIG_PINCTRL_BROXTON) += pinctrl-broxton.o +obj-$(CONFIG_PINCTRL_APL_DEVICE) += pinctrl-apl-dev.o obj-$(CONFIG_PINCTRL_SUNRISEPOINT) += pinctrl-sunrisepoint.o diff --git a/drivers/pinctrl/intel/pinctrl-apl-dev.c b/drivers/pinctrl/intel/pinctrl-apl-dev.c new file mode 100644 index 000..226ec6a --- /dev/null +++ b/drivers/pinctrl/intel/pinctrl-apl-dev.c @@ -0,0 +1,201 @@ +/* + * pinctrl-apl-dev.c: APL pinctrl GPIO Platform Device + * + * (C) Copyright 2015 Intel Corporation + * Author: Kean Ho, Chew (kean.ho.c...@intel.com) + * Modified: Tan, Jui Nee (jui.nee@intel.com) + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; version 2 + * of the License. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* PCI Memory Base Access */ +#define PCI_DEVICE_ID_INTEL_APL_PCU0x5A92 +#define NO_REGISTER_SETTINGS (BIT(0) | BIT(1) | BIT(2)) + +/* Offsets */ +#define NORTH_OFFSET 0xC5 +#define NORTHWEST_OFFSET 0xC4 +#define WEST_OFFSET0xC7 +#define SOUTHWEST_OFFSET 0xC0 + +#define NORTH_END (90 * 0x8) +#define NORTHWEST_END (77 * 0x8) +#define WEST_END (47 * 0x8) +#define SOUTHWEST_END (43 * 0x8) + +static struct apl_pinctrl_port apl_gpio_north_platform_data = { + .unique_id = "1", +}; + +static struct resource apl_gpio_north_resources[] = { + { + .start = 0x0, + .end= 0x0, + .flags = IORESOURCE_MEM, + .name = "io-memory", + }, + { + .start = 14, + .end= 14, + .flags = IORESOURCE_IRQ, + .name = "irq", + } +}; + +static struct apl_pinctrl_port apl_gpio_northwest_platform_data = { + .unique_id = "2", +}; + +static struct resource apl_gpio_northwest_resources[] = { + { + .start = 0x0, + .end= 0x0, + .flags = IORESOURCE_MEM, + .name =
[linux-yocto] [PATCH 03/11] pinctrl: intel: use 'bool' state for PINCTRL_APL_DEVICE in Kconfig
From: Tan Jui NeeIntel Apollo Lake GPIO pin control Platform Device Emulation is only working as build-in module. Signed-off-by: Tan Jui Nee --- drivers/pinctrl/intel/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pinctrl/intel/Kconfig b/drivers/pinctrl/intel/Kconfig index bab8823..417fb39 100644 --- a/drivers/pinctrl/intel/Kconfig +++ b/drivers/pinctrl/intel/Kconfig @@ -42,7 +42,7 @@ config PINCTRL_BROXTON configuring of SoC pins and using them as GPIOs. config PINCTRL_APL_DEVICE - tristate "Intel Apollo Lake GPIO pin control Platform Device Emulation" + bool "Intel Apollo Lake GPIO pin control Platform Device Emulation" depends on PINCTRL_BROXTON help This driver is to set up platform device in the absent of ACPI -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 01/11] serial: 8250_dma: stop ongoing RX DMA on exception
From: Andy ShevchenkoIf we get an exeption interrupt. i.e. UART_IIR_RLSI, stop any ongoing RX DMA transfer otherwise it might generates more spurious interrupts and make port unavailable anymore. As has been seen on Intel Broxton system: ... [ 168.526281] serial8250: too much work for irq5 [ 168.535908] serial8250: too much work for irq5 [ 173.449464] serial8250_interrupt: 4439 callbacks suppressed [ 173.455694] serial8250: too much work for irq5 ... Signed-off-by: Andy Shevchenko (cherry picked from commit e12d119865e55525ccf7c7d76b50081d6e4c83a6) Signed-off-by: Yong, Jonathan --- drivers/tty/serial/8250/8250_dma.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dma.c b/drivers/tty/serial/8250/8250_dma.c index 78259d3..ec4d33f 100644 --- a/drivers/tty/serial/8250/8250_dma.c +++ b/drivers/tty/serial/8250/8250_dma.c @@ -110,6 +110,16 @@ err: return ret; } +static void __dma_rx_stop(struct uart_8250_port *p, struct uart_8250_dma *dma) +{ + if (!dma->rx_running) + return; + + dmaengine_pause(dma->rxchan); + __dma_rx_complete(p); + dmaengine_terminate_all(dma->rxchan); +} + int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) { struct uart_8250_dma*dma = p->dma; @@ -118,17 +128,14 @@ int serial8250_rx_dma(struct uart_8250_port *p, unsigned int iir) switch (iir & 0x3f) { case UART_IIR_RLSI: /* 8250_core handles errors and break interrupts */ + __dma_rx_stop(p, dma); return -EIO; case UART_IIR_RX_TIMEOUT: /* * If RCVR FIFO trigger level was not reached, complete the * transfer and let 8250_core copy the remaining data. */ - if (dma->rx_running) { - dmaengine_pause(dma->rxchan); - __dma_rx_complete(p); - dmaengine_terminate_all(dma->rxchan); - } + __dma_rx_stop(p, dma); return -ETIMEDOUT; default: break; -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 00/11] Pinctrl, Watchdog and P2SB driver for linux-yocto-4.1
Hi, These will enable Apollo Lake specific Pinctrl, iTCO watchdog and P2SB drivers. The changes are quite interlinked due to the lpc-ich renaming. The 8250 change is used to suppress DMA warnings. These are already in the progress of being upstreamed into the main kernel.org kernel repository, but with different implementation. We won't be able to make it in by Apollo Lake Gold schedule, so these should go into standard/intel/base. Andy Shevchenko (1): serial: 8250_dma: stop ongoing RX DMA on exception Jonathan Yong (3): watchdog: iTCO-wdt handle 5th variation x86: Move Watchdog loader for Apollo Lake x86: Prepare to split lpc-ich driver Tan Jui Nee (2): pinctrl-broxton: enable platform device in the absent of ACPI enumeration pinctrl: intel: use 'bool' state for PINCTRL_APL_DEVICE in Kconfig Yong, Jonathan (5): Convert lpc_ich_init_wdt to use a switch-case x86: Sideband Interface driver for Apollo Lake x86: Rework Apollo Lake GPIO pinctrl non-ACPI mode driver x86: Add platform:apl_gpio alias to pinctrl-broxton x86: Suppress compile time warnings in pinctrl-broxton MAINTAINERS | 11 + arch/x86/Kconfig| 18 + arch/x86/platform/bxt/Makefile |1 + arch/x86/platform/bxt/sbi_apl.c | 399 ++ drivers/mfd/Makefile|1 + drivers/mfd/lpc_ich-apl.c | 46 ++ drivers/mfd/lpc_ich-core.c | 1322 +++ drivers/mfd/lpc_ich.c | 1117 -- drivers/pinctrl/intel/Kconfig | 12 +- drivers/pinctrl/intel/pinctrl-broxton.c | 34 +- drivers/tty/serial/8250/8250_dma.c | 17 +- drivers/watchdog/iTCO_wdt.c |2 + include/linux/pinctrl/pinctrl-apl.h | 45 ++ include/linux/platform_data/sbi_apl.h | 67 ++ 14 files changed, 1965 insertions(+), 1127 deletions(-) create mode 100644 arch/x86/platform/bxt/Makefile create mode 100644 arch/x86/platform/bxt/sbi_apl.c create mode 100644 drivers/mfd/lpc_ich-apl.c create mode 100644 drivers/mfd/lpc_ich-core.c delete mode 100644 drivers/mfd/lpc_ich.c create mode 100644 include/linux/pinctrl/pinctrl-apl.h create mode 100644 include/linux/platform_data/sbi_apl.h -- 2.7.3 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH 1/1][yocto-kernel-cache][yocto-4.4] features/input: Add keyboard-gpio feature
This feature adds keyboard-gpio support to the kernel. We also add a specific implementation by default. More can be added as necessary. Signed-off-by: California Sullivan--- features/input/keyboard-gpio.cfg | 8 features/input/keyboard-gpio.scc | 6 ++ 2 files changed, 14 insertions(+) create mode 100644 features/input/keyboard-gpio.cfg create mode 100644 features/input/keyboard-gpio.scc diff --git a/features/input/keyboard-gpio.cfg b/features/input/keyboard-gpio.cfg new file mode 100644 index 000..c86a5fc --- /dev/null +++ b/features/input/keyboard-gpio.cfg @@ -0,0 +1,8 @@ +# Dependencies +CONFIG_INPUT_MISC=y + +# The main feature +CONFIG_KEYBOARD_GPIO=m + +# Implementations +CONFIG_INPUT_SOC_BUTTON_ARRAY=m diff --git a/features/input/keyboard-gpio.scc b/features/input/keyboard-gpio.scc new file mode 100644 index 000..aad85ab --- /dev/null +++ b/features/input/keyboard-gpio.scc @@ -0,0 +1,6 @@ +define KFEATURE_DESCRIPTION "Enable keyboard gpio devices" +define KFEATURE_COMPATIBILITY board + +kconf hardware keyboard-gpio.cfg + +include input.scc -- 2.5.5 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [yocto-kernel-cache] [PATCH] Fix bitbake warnings on build
From: Rebecca Chang Swee FunHi Bruce, With a build test run on Intel Common BSP, some warning messages poped out about actual value set is not matched with requested value on CONFIG_GPIO_GENERIC. This can be resolved by setting CONFIG_GPIO_GENERIC_PLATFORM=y since CONFIG_GPIO_GENERIC is tristate selected by CONFIG_GPIO_GENERIC_PLATFORM. This is only targetted to fix on yocto-4.1 branch. Please review and feedback if you have any. Thank you! Regards, Rebecca Rebecca Chang Swee Fun (1): broxton: set CONFIG_GPIO_GENERIC_PLATFORM instead of CONFIG_GPIO_GENERIC features/soc/broxton/broxton.cfg | 1 + 1 file changed, 1 insertion(+) -- 1.9.1 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [yocto-kernel-cache] [PATCH] broxton: set CONFIG_GPIO_GENERIC_PLATFORM instead of CONFIG_GPIO_GENERIC
From: Rebecca Chang Swee FunCONFIG_GPIO_GENERIC option is tristate, this will ensure we enable by selecting CONFIG_GPIO_GENERIC_PLATFORM. This addresses the following message: Value requested for CONFIG_GPIO_GENERIC not in final ".config" Requested value: "CONFIG_GPIO_GENERIC=y" Actual value set: "" Signed-off-by: Rebecca Chang Swee Fun --- features/soc/broxton/broxton.cfg | 1 + 1 file changed, 1 insertion(+) diff --git a/features/soc/broxton/broxton.cfg b/features/soc/broxton/broxton.cfg index 9ac809b..efe5d71 100644 --- a/features/soc/broxton/broxton.cfg +++ b/features/soc/broxton/broxton.cfg @@ -20,3 +20,4 @@ CONFIG_INTEL_IDMA64=y # GPIO support CONFIG_GPIO_SYSFS=y CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y -- 1.9.1 -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto