Re: [linux-yocto] [kernel v5.2/standard/xlnx-soc][PATCH 2/2] arch: arm64: dts: add overlay dts file
On 10/14/19 2:05 PM, Michal Simek wrote:
On 13. 10. 19 15:33, quanyang.w...@windriver.com wrote:
From: MengLi
Add overlay dts file for updating FPGA bitstream file on
zynqmp platform.
Signed-off-by: Meng Li
Signed-off-by: Quanyang Wang
---
arch/arm64/boot/dts/xilinx/Makefile| 1 +
.../dts/xilinx/zynqmp-zcu102-fpga-update.dts | 18 ++
2 files changed, 19 insertions(+)
create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
diff --git a/arch/arm64/boot/dts/xilinx/Makefile
b/arch/arm64/boot/dts/xilinx/Makefile
index bec4746fe721..d56c449988d0 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-fpga-update.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
new file mode 100644
index ..f1e1506b6210
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
@@ -0,0 +1,18 @@
+// overlay dts file.
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target-path = "/fpga-full";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ __overlay__ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ firmware-name = "system.bit.bin";
+ };
+ };
+};
I understand what you want to do but not sure why you think that this is
the best way how to do it.
Hi Michal,
This patch is based on the url:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming#x-Programming+the+PL+through+Linux
"FPGA programming using Device Tree Overlay (DTO)".
We will describe how to programming FPGA by using 2 methods in README
for our customer:
one is FPGA programming using sysfs attributes
And the other is FPGA programming using Device Tree Overlay (DTO)
This patch is used for the second method.
Is there any better way to do it?
Thanks,
Quanyang
Thanks,
Michal
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Re: [linux-yocto] [kernel v5.2/standard/xlnx-soc][PATCH 2/2] arch: arm64: dts: add overlay dts file
On 10/14/19 3:58 PM, Michal Simek wrote:
On 14. 10. 19 9:55, Quanyang Wang wrote:
On 10/14/19 2:05 PM, Michal Simek wrote:
On 13. 10. 19 15:33, quanyang.w...@windriver.com wrote:
From: MengLi
Add overlay dts file for updating FPGA bitstream file on
zynqmp platform.
Signed-off-by: Meng Li
Signed-off-by: Quanyang Wang
---
arch/arm64/boot/dts/xilinx/Makefile| 1 +
.../dts/xilinx/zynqmp-zcu102-fpga-update.dts | 18 ++
2 files changed, 19 insertions(+)
create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
diff --git a/arch/arm64/boot/dts/xilinx/Makefile
b/arch/arm64/boot/dts/xilinx/Makefile
index bec4746fe721..d56c449988d0 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-fpga-update.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
new file mode 100644
index ..f1e1506b6210
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
@@ -0,0 +1,18 @@
+// overlay dts file.
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target-path = "/fpga-full";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ __overlay__ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ firmware-name = "system.bit.bin";
+ };
+ };
+};
I understand what you want to do but not sure why you think that this is
the best way how to do it.
Hi Michal,
This patch is based on the url:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming#x-Programming+the+PL+through+Linux
"FPGA programming using Device Tree Overlay (DTO)".
We will describe how to programming FPGA by using 2 methods in README
for our customer:
one is FPGA programming using sysfs attributes
And the other is FPGA programming using Device Tree Overlay (DTO)
This patch is used for the second method.
Is there any better way to do it?
It is not about that using fragments is incorrect. It is about reasons
to include this dts file to Linux source code. Because this fragment is
just doing programming without anything else. It means it is coupled
with also description what it is in DT which is missing here.
It means this is just part A (with system.bit.bin generic name - which
is not fully accurate) and part B is missing.
In part B there should be what you are including with clock/reset and IP
part.
That's why my question remains if make even sense to merge part A
without any details about part B.
Hi Michal,
The target for this patch is to just simply test the FPGA programming
function. So it changes nothing.
It seems to be improper to add such a dts file to kernel source.
I will transform the dts file to a text description in README or make it
to be a more detailed and integral dts file in a V2 patch.
Thanks,
Quanyang
Thanks,
Michal
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Re: [linux-yocto] [kernel v5.2/standard/xlnx-soc][PATCH 2/2] arch: arm64: dts: add overlay dts file
On 10/14/19 6:00 PM, Michal Simek wrote:
On 14. 10. 19 11:34, Quanyang Wang wrote:
On 10/14/19 3:58 PM, Michal Simek wrote:
On 14. 10. 19 9:55, Quanyang Wang wrote:
On 10/14/19 2:05 PM, Michal Simek wrote:
On 13. 10. 19 15:33, quanyang.w...@windriver.com wrote:
From: MengLi
Add overlay dts file for updating FPGA bitstream file on
zynqmp platform.
Signed-off-by: Meng Li
Signed-off-by: Quanyang Wang
---
arch/arm64/boot/dts/xilinx/Makefile | 1 +
.../dts/xilinx/zynqmp-zcu102-fpga-update.dts | 18
++
2 files changed, 19 insertions(+)
create mode 100644
arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
diff --git a/arch/arm64/boot/dts/xilinx/Makefile
b/arch/arm64/boot/dts/xilinx/Makefile
index bec4746fe721..d56c449988d0 100644
--- a/arch/arm64/boot/dts/xilinx/Makefile
+++ b/arch/arm64/boot/dts/xilinx/Makefile
@@ -13,6 +13,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu100-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-revB.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-rev1.0.dtb
+dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu102-fpga-update.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revA.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu104-revC.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zcu106-revA.dtb
diff --git
a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
new file mode 100644
index ..f1e1506b6210
--- /dev/null
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-fpga-update.dts
@@ -0,0 +1,18 @@
+// overlay dts file.
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target-path = "/fpga-full";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ __overlay__ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ firmware-name = "system.bit.bin";
+ };
+ };
+};
I understand what you want to do but not sure why you think that
this is
the best way how to do it.
Hi Michal,
This patch is based on the url:
https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming#x-Programming+the+PL+through+Linux
"FPGA programming using Device Tree Overlay (DTO)".
We will describe how to programming FPGA by using 2 methods in README
for our customer:
one is FPGA programming using sysfs attributes
And the other is FPGA programming using Device Tree Overlay (DTO)
This patch is used for the second method.
Is there any better way to do it?
It is not about that using fragments is incorrect. It is about reasons
to include this dts file to Linux source code. Because this fragment is
just doing programming without anything else. It means it is coupled
with also description what it is in DT which is missing here.
It means this is just part A (with system.bit.bin generic name - which
is not fully accurate) and part B is missing.
In part B there should be what you are including with clock/reset and IP
part.
That's why my question remains if make even sense to merge part A
without any details about part B.
Hi Michal,
The target for this patch is to just simply test the FPGA programming
function. So it changes nothing.
It seems to be improper to add such a dts file to kernel source.
I will transform the dts file to a text description in README or make it
to be a more detailed and integral dts file in a V2 patch.
ok. let's see where you want to add this readme. If this targets
"Documentation" folder then not a problem at all.
Hi Michal,
Sorry for making you confuse. The README which I said about is not in
kernel source but in WRLinux project.
I mean that maybe I can just describe how to test FPGA programming in
some place of our own Product Document
instead of adding a dts file to kernel source since it's just a simple
testcase.
Thanks,
Quanyang
M
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Re: [linux-yocto] [PATCH v5.2&v5.3] pci: octeontx2: Use a more lightweight API to get the root bus
On Mon, Oct 14, 2019 at 4:56 AM Kevin Hao wrote:
>
> In the current code, the API pci_get_domain_bus_and_slot() is used to
> get the root bus. But we would get the below call trace on rt kernel
> due to the spin_lock is used in the klist.
> BUG: sleeping function called from invalid context at
> kernel/locking/rtmutex.c:968
> in_atomic(): 1, irqs_disabled(): 128, pid: 1, name: swapper/0
> 3 locks held by swapper/0/1:
>#0: (ptrval) (per_cpu_ptr(&bh_lock.lock, cpu)){}, at:
> __device_driver_lock+0x34/0x60
>#1: (ptrval) (pci_lock){}, at:
> pci_bus_write_config_word+0x40/0xa8
>#2: (ptrval) (&k->k_lock){+.+.}, at: klist_next+0x24/0x110
> irq event stamp: 1293008
> hardirqs last enabled at (1293007): []
> _raw_spin_unlock_irqrestore+0xa8/0xb8
> hardirqs last disabled at (1293008): []
> _raw_spin_lock_irqsave+0x38/0x80
> softirqs last enabled at (1032902): []
> raw_unhash_sk+0x74/0xb0
> softirqs last disabled at (1032891): []
> raw_unhash_sk+0x0/0xb0
> Preemption disabled at:
> [] pci_bus_write_config_word+0x40/0xa8
> CPU: 8 PID: 1 Comm: swapper/0 Not tainted 5.2.20-rt9-yocto-preempt-rt+ #12
> Hardware name: Marvell OcteonTX CN96XX board (DT)
> Call trace:
>dump_backtrace+0x0/0x140
>show_stack+0x24/0x30
>dump_stack+0xbc/0x104
>___might_sleep+0x16c/0x1d0
>rt_spin_lock+0x64/0x78
>klist_next+0x24/0x110
>bus_find_device+0x70/0xe0
>pci_get_dev_by_id+0x60/0x88
>pci_get_domain_bus_and_slot+0x5c/0xb0
>octeontx2_pem_config_write+0x84/0x3e0
>pci_bus_write_config_word+0x64/0xa8
>pci_write_config_word+0x44/0x68
>pci_setup_device+0x214/0x718
>pci_scan_single_device+0xb4/0xf8
>pci_scan_slot+0x44/0x108
>pci_scan_child_bus_extend+0x58/0x290
>pci_scan_bridge_extend+0x350/0x4f8
>pci_scan_child_bus_extend+0x1e4/0x290
>pci_scan_root_bus_bridge+0x60/0xd0
>pci_host_probe+0x20/0xb8
>pci_host_common_probe+0xf4/0x1f0
>octeontx2_pem_probe+0x2c/0x38
>platform_drv_probe+0x58/0xa8
>really_probe+0xe0/0x288
>driver_probe_device+0x5c/0xf0
>device_driver_attach+0x74/0x80
>__driver_attach+0x64/0xe0
>bus_for_each_dev+0x84/0xd8
>driver_attach+0x30/0x40
>bus_add_driver+0x190/0x1f0
>driver_register+0x64/0x110
>__platform_driver_register+0x54/0x60
>octeontx2_pem_driver_init+0x20/0x28
>do_one_initcall+0xa8/0x468
>kernel_init_freeable+0x514/0x5b8
>kernel_init+0x18/0x108
>ret_from_fork+0x10/0x1c
>
> Actually we can use a more lightweight API to get the rootbus without
> acquiring any lock, then fix this issue.
>
> Signed-off-by: Kevin Hao
> ---
>
> Hi Bruce,
>
> Please help merge this to the following branches:
>
> linux-yocto:
> v5.2/standard/cn96xx
> v5.2/standard/preempt-rt/cn96xx
merged
>
> linux-yocto-dev:
> standard/cn96xx
.. and merged. But I'm about a day away from replacing linux-yocto-dev
with v5.4-rc3, so be prepared that this will change shortly.
Bruce
>
> drivers/pci/controller/pci-octeontx2-pem.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-octeontx2-pem.c
> b/drivers/pci/controller/pci-octeontx2-pem.c
> index 90b5537e8cdb..1e14dc065322 100644
> --- a/drivers/pci/controller/pci-octeontx2-pem.c
> +++ b/drivers/pci/controller/pci-octeontx2-pem.c
> @@ -335,10 +335,10 @@ static void octeontx2_be_workaround_init(struct pci_bus
> *bus)
> static void octeontx2_be_workaround(struct pci_bus *bus, int where,
> int size, u32 val)
> {
> - struct pci_dev *rc;
> + struct pci_host_bridge *rc;
> u32 reg, be = 0;
>
> - rc = pci_get_domain_bus_and_slot(pci_domain_nr(bus), 0, 0);
> + rc = pci_find_host_bridge(bus);
>
> /* Setup RAS to inject one error */
> octeontx2_be_workaround_init(rc->bus);
> --
> 2.14.4
>
--
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thee at its end
- "Use the force Harry" - Gandalf, Star Trek II
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[linux-yocto] [PATCH] arm64: dts: r8a7795: Add CPUIdle support for all CPU core
From: Takeshi Kihara
commit 3c3b44c752c4eef9a29694f4262934445c5f5da9 from
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git
This patch enables CPUIdle (Core shutdown) support for R-Car H3.
Signed-off-by: Takeshi Kihara
Signed-off-by: Meng Li
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index e8c3d5f..7fe7428 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -123,6 +123,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
dynamic-power-coefficient = <854>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
@@ -135,6 +136,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -147,6 +149,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -159,6 +162,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -171,6 +175,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
#cooling-cells = <2>;
dynamic-power-coefficient = <277>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
@@ -182,6 +187,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -193,6 +199,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -204,6 +211,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -221,6 +229,30 @@
cache-unified;
cache-level = <2>;
};
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ local-timer-stop;
+ entry-latency-us = <400>;
+ exit-latency-us = <500>;
+ min-residency-us = <4000>;
+ status = "okay";
+ };
+
+ CPU_SLEEP_1: cpu-sleep-1 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ local-timer-stop;
+
[linux-yocto] [linux-yocto-v5.2]: [kernel standard/base]: renesas-rcar: arm64: dts: r8a7795: Add CPUIdle support for all CPU core
From: Limeng Hi Bruce, I get below patch from SDK kernel to support cpu idle feature, and intend to merge it into yocto community. 0001-arm64-dts-r8a7795-Add-CPUIdle-support-for-all-CPU-co.patch Could you please merge this patch into linux-yocto, branch is v5.2/standard/base? r8a7795.dtsi | 32 1 file changed, 32 insertions(+) thanks, Limeng -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
[linux-yocto] [PATCH] arm64: dts: r8a7795: Add CPUIdle support for all CPU core
From: Takeshi Kihara
commit 3c3b44c752c4eef9a29694f4262934445c5f5da9 from
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas-bsp.git
This patch enables CPUIdle (Core shutdown) support for R-Car H3.
Signed-off-by: Takeshi Kihara
Signed-off-by: Meng Li
---
arch/arm64/boot/dts/renesas/r8a7795.dtsi | 32
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index e8c3d5f..7fe7428 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -123,6 +123,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU0>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -135,6 +136,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU1>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -147,6 +149,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU2>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -159,6 +162,7 @@
power-domains = <&sysc R8A7795_PD_CA57_CPU3>;
next-level-cache = <&L2_CA57>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_0>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z>;
operating-points-v2 = <&cluster0_opp>;
capacity-dmips-mhz = <1024>;
@@ -171,6 +175,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU0>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -182,6 +187,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU1>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -193,6 +199,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU2>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -204,6 +211,7 @@
power-domains = <&sysc R8A7795_PD_CA53_CPU3>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
+ cpu-idle-states = <&CPU_SLEEP_1>;
clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>;
operating-points-v2 = <&cluster1_opp>;
capacity-dmips-mhz = <535>;
@@ -221,6 +229,30 @@
cache-unified;
cache-level = <2>;
};
+
+ idle-states {
+ entry-method = "psci";
+
+ CPU_SLEEP_0: cpu-sleep-0 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ local-timer-stop;
+ entry-latency-us = <400>;
+ exit-latency-us = <500>;
+ min-residency-us = <4000>;
+ status = "okay";
+ };
+
+ CPU_SLEEP_1: cpu-sleep-1 {
+ compatible = "arm,idle-state";
+ arm,psci-suspend-param = <0x001>;
+ local-timer-stop;
+
[linux-yocto] [linux-yocto-dev]: [kernel standard/base]: renesas-rcar: arm64: dts: r8a7795: Add CPUIdle support for all CPU core
From: Limeng Hi Bruce, I get below patch from SDK kernel to support cpu idle feature, and intend to merge it into yocto community. 0001-arm64-dts-r8a7795-Add-CPUIdle-support-for-all-CPU-co.patch Could you please merge this patch into linux-yocto-dev, branch is standard/base? r8a7795.dtsi | 32 1 file changed, 32 insertions(+) thanks, Limeng -- ___ linux-yocto mailing list linux-yocto@yoctoproject.org https://lists.yoctoproject.org/listinfo/linux-yocto
