Re: [linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch
Nope that seems sane to me. Thanks, Matt -Original Message- From: Bruce Ashfield [mailto:bruce.ashfi...@windriver.com] Sent: Tuesday, May 31, 2016 8:31 PM To: Ranostay, Matt Cc: linux-yocto@yoctoproject.org Subject: Re: [PULL REQUEST] add standard/bxt-rebase branch On 2016-05-31 6:24 PM, Ranostay, Matt wrote: > This pull request is for adding the standard/bxt-rebase branch with has > various backports from 4.6 and 4.5, which are have an unacceptable risk of > breaking other platforms. > This is based on standard/intel and will be rebased. Thus nobody should > expect the history to be linear. Seems sane to me. One minor question though. To keep the branch naming and inheritance sane, I'd create this as standard/intel/bxt-rebase Any objections ? Bruce > > The following changes since commit 53e84104c5e68eb468823dd0d262a64623d01a55: > > mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-19 17:15:25 > -0700) > > are available in the git repository at: > > git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase > > for you to fetch changes up to 1203930e034957e1fc9e0c4842ecd7922d5e0897: > > [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27 17:21:19 > -0700) > > > Aaron Plattner (1): > ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda > > Adrian Hunter (4): > mmc: core: Add a facility to "pause" re-tuning > mmc: block: Pause re-tuning while switched to the RPMB partition > mmc: block: Always switch back to main area after RPMB access > mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel controller > > Alan (1): > ASoC: Intel: Skylake: fix pointer scaling > > Alan Cox (1): > ASoC: Intel: Skylake: remove bogus comparison of an array with NULL > > Alex Dai (2): > drm/i915/guc: Add GuC css header parser > drm/i915/guc: Clean up locks in GuC > > Alex Goins (2): > i915: wait for fence in mmio_flip_work_func > i915: wait for fence in prepare_plane_fb > > Ander Conselvan de Oliveira (10): > drm/i915: Don't pass *DP around to link training functions > drm/i915: Split write of pattern to DP reg from intel_dp_set_link_train > drm/i915 Call get_adjust_train() from clock recovery and channel eq > drm/i915: Move register write into intel_dp_set_signal_levels() > drm/i915: Move generic link training code to a separate file > drm/i915: Create intel_dp->prepare_link_retrain() hook > drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer > drm/i915: Fix SKL i_boost level > drm/i915: Don't do edp panel detection in g4x_dp_detect() > drm/i915: Remove platform specific *_dp_detect() functions > > Andreas Ziegler (1): > drm/i915: Remove select to deleted STOP_MACHINE from Kconfig > > Animesh Manna (4): > drm/i915/skl: Making DC6 entry is the last call in suspend flow. > drm/i915/gen9: csr_init after runtime pm enable > drm/i915/gen9: Use flush_work to synchronize with dmc loader > drm/i915/skl: Removed assert for csr-fw-loading check during disabling > dc6 > > Arun Siluvery (1): > Revert "drm/i915: Initialize HWS page address after GPU reset" > > Bamvor Jian Zhang (1): > gpiolib: make comment consistent with code > > Chris Wilson (11): > drm/i915: Map the ringbuffer using WB on LLC machines > drm/i915: Report context GTT size > drm/i915: Add soft-pinning API for execbuffer > drm/i915: Recover all available ringbuffer space following reset > drm/i915: Serialise updates to GGTT with access through GGTT on Braswell > drm/i915: Fix RPS pointer passed from wait_ioctl to i915_wait_request > drm/i915: Add soft-pinning API for execbuffer > drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping > drm/i915: Move Braswell stop_machine GGTT insertion workaround > drm/i915: Allow i915_gem_object_get_page() on userptr as well > drm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM) > > Damien Lespiau (4): > drm/i915/skl: Store and print the DMC firmware version we load > drm/i915/skl: Print the DMC firmware status in debugfs > drm/i915/skl: Expose DC5/DC6 entry counts > drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini > sequences > > Damien.Horsley (1): > ASoC: Add SOC_DOUBLE_STS macro > > Dan Carpenter (3): > ASoC: Intel: Skylake: Fix a couple signedness bugs > ASoC: Intel: Skylake: pointer math issue > ASoC: Intel: sst: fix a loop t
[linux-yocto] [PULL REQUEST] add standard/bxt-rebase branch
This pull request is for adding the standard/bxt-rebase branch with has various backports from 4.6 and 4.5, which are have an unacceptable risk of breaking other platforms. This is based on standard/intel and will be rebased. Thus nobody should expect the history to be linear. The following changes since commit 53e84104c5e68eb468823dd0d262a64623d01a55: mmc: mmc: Fix partition switch timeout for some eMMCs (2016-05-19 17:15:25 -0700) are available in the git repository at: git://sandbox.sakoman.com/linux-yocto-4.4.git standard/bxt-rebase for you to fetch changes up to 1203930e034957e1fc9e0c4842ecd7922d5e0897: [UPSTREAM] ASoC: skylake: added WARN_ON invalid dsp (2016-05-27 17:21:19 -0700) Aaron Plattner (1): ALSA: hda - Add new GPU codec ID 0x10de0083 to snd-hda Adrian Hunter (4): mmc: core: Add a facility to "pause" re-tuning mmc: block: Pause re-tuning while switched to the RPMB partition mmc: block: Always switch back to main area after RPMB access mmc: sdhci-pci: Remove MMC_CAP_BUS_WIDTH_TEST for Intel controller Alan (1): ASoC: Intel: Skylake: fix pointer scaling Alan Cox (1): ASoC: Intel: Skylake: remove bogus comparison of an array with NULL Alex Dai (2): drm/i915/guc: Add GuC css header parser drm/i915/guc: Clean up locks in GuC Alex Goins (2): i915: wait for fence in mmio_flip_work_func i915: wait for fence in prepare_plane_fb Ander Conselvan de Oliveira (10): drm/i915: Don't pass *DP around to link training functions drm/i915: Split write of pattern to DP reg from intel_dp_set_link_train drm/i915 Call get_adjust_train() from clock recovery and channel eq drm/i915: Move register write into intel_dp_set_signal_levels() drm/i915: Move generic link training code to a separate file drm/i915: Create intel_dp->prepare_link_retrain() hook drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer drm/i915: Fix SKL i_boost level drm/i915: Don't do edp panel detection in g4x_dp_detect() drm/i915: Remove platform specific *_dp_detect() functions Andreas Ziegler (1): drm/i915: Remove select to deleted STOP_MACHINE from Kconfig Animesh Manna (4): drm/i915/skl: Making DC6 entry is the last call in suspend flow. drm/i915/gen9: csr_init after runtime pm enable drm/i915/gen9: Use flush_work to synchronize with dmc loader drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 Arun Siluvery (1): Revert "drm/i915: Initialize HWS page address after GPU reset" Bamvor Jian Zhang (1): gpiolib: make comment consistent with code Chris Wilson (11): drm/i915: Map the ringbuffer using WB on LLC machines drm/i915: Report context GTT size drm/i915: Add soft-pinning API for execbuffer drm/i915: Recover all available ringbuffer space following reset drm/i915: Serialise updates to GGTT with access through GGTT on Braswell drm/i915: Fix RPS pointer passed from wait_ioctl to i915_wait_request drm/i915: Add soft-pinning API for execbuffer drm/i915: Pin the ifbdev for the info->system_base GGTT mmapping drm/i915: Move Braswell stop_machine GGTT insertion workaround drm/i915: Allow i915_gem_object_get_page() on userptr as well drm/i915: Balance assert_rpm_wakelock_held() for !IS_ENABLED(CONFIG_PM) Damien Lespiau (4): drm/i915/skl: Store and print the DMC firmware version we load drm/i915/skl: Print the DMC firmware status in debugfs drm/i915/skl: Expose DC5/DC6 entry counts drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences Damien.Horsley (1): ASoC: Add SOC_DOUBLE_STS macro Dan Carpenter (3): ASoC: Intel: Skylake: Fix a couple signedness bugs ASoC: Intel: Skylake: pointer math issue ASoC: Intel: sst: fix a loop timeout in sst_hsw_stream_reset() Daniel Stone (2): drm/i915/pm: Unstatic power_domain_str drm/i915/pm: Print offending domain in refcount failure Daniel Vetter (25): drm/i915: Fix formatting for gen8_cs_irq_handler drm/i915: Update DRIVER_DATE to 20151023 Revert "drm/i915: Add soft-pinning API for execbuffer" drm/i915: Shut up GuC errors when it's disabled drm/i915: Don't complain about lack of ACPI video bios drm/i915: use correct power domain for csr loading drm/i915/gen9: move assert_csr_loaded into intel_rpm.c drm/i915/gen9: Remove csr.state, csr_lock and related code. drm/i915/gen9: Align line continuations in intel_csr.c. drm/i915/gen9: Simplify csr loading failure printing. drm/i915/gen9: Don't try to load garbage dmc firmware on resume drm/i915/gen9: Use dev_priv in csr functions drm/i915/gen9: extract parse_csr_fw drm/i915: Use request_firmware and our own async work drm/i915: Drop re
