Re: [PATCH] kexec memory ranges dynamic allocation
2008/11/1 Simon Horman [EMAIL PROTECTED]
On Fri, Oct 31, 2008 at 09:53:23AM +0300, Maxim Uvarov wrote:
2008/10/31 Simon Horman [EMAIL PROTECTED]
Hi,
Could someone please comment on the satus of this patch?
Hello, Simon
I can not reproduce error which you wrote before on my target. So it is
a
little bit
difficult to say what was wrong exactly.
Hi,
the version of the patch below (which I think is the latest)
compiles fine for me. I wanted to confirm that you
and Chandru are happy for it to be merged.
If so, could you please provide a short descripton for the change-log
and a Signed-off-by line.
Patch looks good.
Description is:
Do not count max_memory_range for allocation. Increase allocation
buffers
when it is needed. This actually allows us to avoid a lot of troubles
with
various device-tree files.
Signed-off-by: Maxim Uvarov [EMAIL PROTECTED]
Thanks
On Wed, Oct 15, 2008 at 12:46:24PM +0400, Maxim Uvarov wrote:
Patch corrected. ( git_kexec_powerpc_v2.patch is attached.)
I tested it on ppc64 pasemi electra board. Both kexec -l and kexec -p
works.
Maxim.
diff --git a/kexec/arch/ppc64/kexec-ppc64.c
b/kexec/arch/ppc64/kexec-ppc64.c
index 069a9fc..0ad40fa 100644
--- a/kexec/arch/ppc64/kexec-ppc64.c
+++ b/kexec/arch/ppc64/kexec-ppc64.c
@@ -96,96 +96,46 @@ err1:
}
-static int count_dyn_reconf_memory_ranges(void)
+static int realloc_memory_ranges()
{
- char device_tree[] = /proc/device-tree/;
- char fname[128];
- char buf[32];
- FILE *file;
-
- strcpy(fname, device_tree);
- strcat(fname,
ibm,dynamic-reconfiguration-memory/ibm,lmb-size);
- if ((file = fopen(fname, r)) == NULL) {
- perror(fname);
- return -1;
- }
+ size_t memory_range_len;
- if (fread(buf, 1, 8, file) 0) {
- perror(fname);
- fclose(file);
- return -1;
- }
-
- lmb_size = ((uint64_t *)buf)[0];
- fclose(file);
+ max_memory_ranges++;
+ memory_range_len = sizeof(struct memory_range) *
max_memory_ranges;
- /* Get number of lmbs from ibm,dynamic-memory */
- strcpy(fname, device_tree);
- strcat(fname,
ibm,dynamic-reconfiguration-memory/ibm,dynamic-memory);
- if ((file = fopen(fname, r)) == NULL) {
- perror(fname);
- return -1;
- }
- /*
- * first 4 bytes provide number of entries(lmbs)
- */
- if (fread(buf, 1, 4, file) 0) {
- perror(fname);
- fclose(file);
- return -1;
- }
- num_of_lmbs = ((unsigned int *)buf)[0];
- max_memory_ranges += num_of_lmbs;
- fclose(file);
+ memory_range = (struct memory_range *) realloc(memory_range,
memory_range_len);
+ if (!memory_range)
+ goto err;
- return 0;
-}
+ base_memory_range = (struct memory_range *)
realloc(memory_range,
memory_range_len);
+ if (!base_memory_range)
+ goto err;
-/*
- * Count the memory nodes under /proc/device-tree and populate the
- * max_memory_ranges variable. This variable replaces
MAX_MEMORY_RANGES
- * macro used earlier.
- */
-static int count_memory_ranges(void)
-{
- char device_tree[256] = /proc/device-tree/;
- struct dirent *dentry;
- DIR *dir;
+ exclude_range = (struct memory_range *) realloc(exclude_range,
memory_range_len);
+ if (!exclude_range)
+ goto err;
- if ((dir = opendir(device_tree)) == NULL) {
- perror(device_tree);
- return -1;
- }
+ usablemem_rgns.ranges = (struct memory_range *)
+ realloc(usablemem_rgns.ranges,
memory_range_len);
+ if (!(usablemem_rgns.ranges))
+ goto err;
- while ((dentry = readdir(dir)) != NULL) {
- if (!strncmp(dentry-d_name,
- ibm,dynamic-reconfiguration-memory,
35)){
- if (count_dyn_reconf_memory_ranges() != 0)
- return -1;
- continue;
- }
+ return 0;
- if (strncmp(dentry-d_name, memory@, 7)
- strcmp(dentry-d_name, memory)
- strncmp(dentry-d_name, pci@, 4))
- continue;
- max_memory_ranges++;
- }
- /* need to add extra region for retained initrd */
- if (reuse_initrd) {
- max_memory_ranges++;
- }
+err:
+ fprintf(stderr, memory range structure re-allocation
failure\n);
+ return -1;
+}
[PATCH] powerpc: allow configuring max stack dump depth
On my screen, when something crashes, I only have space for maybe
16 functions of the stack trace before the information above it
scrolls off the screen. It's easy to hack the kernel to print out
only that much, but it's harder to remember to do it. This patch
introduces a config option for it so that I can keep the setting
in my config.
Signed-off-by: Johannes Berg [EMAIL PROTECTED]
---
arch/powerpc/Kconfig.debug|7 +++
arch/powerpc/kernel/process.c |2 +-
2 files changed, 8 insertions(+), 1 deletion(-)
--- everything.orig/arch/powerpc/Kconfig.debug 2008-11-01 11:03:29.0
+0100
+++ everything/arch/powerpc/Kconfig.debug 2008-11-01 11:05:45.0
+0100
@@ -2,6 +2,13 @@ menu Kernel hacking
source lib/Kconfig.debug
+config PRINT_STACK_DEPTH
+ int Stack depth to print
+ default 64
+ help
+ This option allows you to set the stack depth that the kernel
+ prints out in case your display is too small.
+
config DEBUG_STACKOVERFLOW
bool Check for stack overflows
depends on DEBUG_KERNEL
--- everything.orig/arch/powerpc/kernel/process.c 2008-11-01
11:03:09.0 +0100
+++ everything/arch/powerpc/kernel/process.c2008-11-01 11:03:21.0
+0100
@@ -998,7 +998,7 @@ unsigned long get_wchan(struct task_stru
return 0;
}
-static int kstack_depth_to_print = 64;
+static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
void show_stack(struct task_struct *tsk, unsigned long *stack)
{
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/2] powerpc: add 16K/64K pages support for the 44x PPC32 architectures.
On Fri, Oct 31, 2008 at 06:23:28PM -0500, Hollis Blanchard wrote:
On Wed, Oct 22, 2008 at 9:28 AM, Christian Ehrhardt
[EMAIL PROTECTED] wrote:
Hi Ilya,
I just tried your patch on my 440 board because it would help us in our
environment.
Unfortunately I run into a bug on early boot (mark_bootmem).
A log can be found in this mail, this is the bug when running with 64k page
size.
I tried this with and without your 2/2 265k patch and also with page size
configured to 16k, the error is the same in all cases.
I used an earlier version of your patch in the past and it worked fine.
Applying this old patch causes the same problem.
Therefore I expect that there was some other code changed that breaks with
page size != 4k.
This patch seems to solve the problem for me, but I have to run and
haven't yet worked out if it's the right fix.
diff --git a/mm/bootmem.c b/mm/bootmem.c
--- a/mm/bootmem.c
+++ b/mm/bootmem.c
@@ -300,7 +300,7 @@ static int __init mark_bootmem(unsigned
unsigned long max;
if (pos bdata-node_min_pfn ||
- pos = bdata-node_low_pfn) {
+ pos bdata-node_low_pfn) {
BUG_ON(pos != start);
continue;
}
@@ -399,7 +399,7 @@ int __init reserve_bootmem(unsigned long
unsigned long start, end;
start = PFN_DOWN(addr);
- end = PFN_UP(addr + size);
+ end = PFN_DOWN(addr + size);
return mark_bootmem(start, end, 1, flags);
}
Looks like the breakage may have been accidentally introduced by
Johannes Weiner [EMAIL PROTECTED] on Jul 24 (post 2.6.26).
FWIW, the boards Christian and I are hitting the problem on are
Sequoias with 256MB of RAM. cuImage is reporting only 0x000 bytes
of RAM though, which may be exacerbating the situation.
That is on purpose. The chip has an errata that causes badness if
you use the last XX bytes of DRAM. I forget exactly what XX is, but
we just remove the last page.
josh
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
[patch] powerpc: smp_wmb lwsync optimisation fix
A previous change removed __SUBARCH_HAS_LWSYNC define, and replaced it with __powerpc64__. smp_wmb() seems to be the last place not updated. Signed-off-by: Nick Piggin [EMAIL PROTECTED] --- Index: linux-2.6/arch/powerpc/include/asm/system.h === --- linux-2.6.orig/arch/powerpc/include/asm/system.h2008-11-01 20:31:51.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/system.h 2008-11-01 20:32:33.0 +1100 @@ -44,7 +44,7 @@ #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ #ifdef CONFIG_SMP -#ifdef __SUBARCH_HAS_LWSYNC +#if defined(__powerpc64__) #define SMPWMB lwsync #else #define SMPWMB eieio ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[patch] powerpc: rmp_wmb lwsync optimisation
smp_rmb can be lwsync if possible. Clarify the comment. Signed-off-by: Nick Piggin [EMAIL PROTECTED] --- Index: linux-2.6/arch/powerpc/include/asm/system.h === --- linux-2.6.orig/arch/powerpc/include/asm/system.h2008-11-01 23:56:39.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/system.h 2008-11-02 00:02:46.0 +1100 @@ -23,15 +23,17 @@ * read_barrier_depends() prevents data-dependent loads being reordered * across this point (nop on PPC). * - * We have to use the sync instructions for mb(), since lwsync doesn't - * order loads with respect to previous stores. Lwsync is fine for - * rmb(), though. Note that rmb() actually uses a sync on 32-bit - * architectures. + * *mb() variants without smp_ prefix must order all types of memory + * operations with one another. sync is the only instruction sufficient + * to do this. * - * For wmb(), we use sync since wmb is used in drivers to order - * stores to system memory with respect to writes to the device. - * However, smp_wmb() can be a lighter-weight lwsync or eieio barrier - * on SMP since it is only used to order updates to system memory. + * For the smp_ barriers, ordering is for cacheable memory operations + * only. We have to use the sync instruction for smp_mb(), since lwsync + * doesn't order loads with respect to previous stores. Lwsync can be + * used for smp_rmb() and smp_wmb(). + * + * However, on 32-bit, lwsync is actually just a sync, in which case smp_wmb() + * can be a lighter-weight eieio barrier. */ #define mb() __asm__ __volatile__ (sync : : : memory) #define rmb() __asm__ __volatile__ (sync : : : memory) @@ -51,7 +53,7 @@ #endif #define smp_mb() mb() -#define smp_rmb() rmb() +#define smp_rmb() __asm__ __volatile__(LWSYNC_ON_SMP : : : memory) #define smp_wmb() __asm__ __volatile__ (__stringify(SMPWMB) : : :memory) #define smp_read_barrier_depends() read_barrier_depends() #else ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[rfc][patch] powerpc: replace isync with lwsync
Hi guys, This is an interesting one for me. AFAIKS it is possible to use lwsync for a full barrier after a successful ll/sc operation, right? (or stop me here if I'm wrong). Anyway, I was interested in exploring this. Unfortunately my G5 might not be very indicative of more modern, and future developments in high end powerpc CPUs... it would be interesting to get opinion and verification from insiders. OK, on my G5, using lwsync instead of isync in spinlocks is a bit faster in really stupid userspace microbenchmark (4 threads, looping, locking, incrementing shared variable, unlocking). This prompted me to look at bit further. So I converted a significant number of isyncs in the kernel to lwsync. The resulting kernel (on 2 core, 2 socket system) ran tbench consistently about 1.75% faster than unpatched (avg ~934MB/s vs ~918MB/s) (Tbench was just the first benchmark I picked that could run really quickly and give relatively stable numbers). This seems pretty significant. More than I was expecting. I've attached the patch I used (I've not thoroughly audited the code for all users of isync, only replaced some main ones) Now I'd like to know why this is faster, whether it makes sense to to, whether it helps with more useful workloads and modern systems. isync followed by a branch I guess does something like puts a bubble into the pipeline until the branch retires? So it is probably always going to cost some cycles. lwsync on the other hand, I suppose has to do a bit more when it comes to the store queue. Maybe flush it or insert a barrier or something into it. Also has some ordering of loads, but effectively no more than isync AFAIKS. Thanks, Nick --- Index: linux-2.6/arch/powerpc/include/asm/atomic.h === --- linux-2.6.orig/arch/powerpc/include/asm/atomic.h2008-11-01 20:36:12.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/atomic.h 2008-11-01 20:36:33.0 +1100 @@ -55,7 +55,7 @@ PPC405_ERR77(0,%2) stwcx. %0,0,%2 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (a), r (v-counter) : cc, memory); @@ -91,7 +91,7 @@ PPC405_ERR77(0,%2) stwcx. %0,0,%2 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (a), r (v-counter) : cc, memory); @@ -125,7 +125,7 @@ PPC405_ERR77(0,%1) stwcx. %0,0,%1 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (v-counter) : cc, memory); @@ -169,7 +169,7 @@ PPC405_ERR77(0,%1) stwcx. %0,0,%1\n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (v-counter) : cc, memory); @@ -202,7 +202,7 @@ PPC405_ERR77(0,%2) stwcx. %0,0,%1 \n\ bne-1b \n - ISYNC_ON_SMP + LWSYNC_ON_SMP subf%0,%2,%0 \n\ 2: : =r (t) @@ -235,7 +235,7 @@ PPC405_ERR77(0,%1) stwcx. %0,0,%1\n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP \n\ 2:: =b (t) : r (v-counter) @@ -293,7 +293,7 @@ add %0,%1,%0\n\ stdcx. %0,0,%2 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (a), r (v-counter) : cc, memory); @@ -327,7 +327,7 @@ subf%0,%1,%0\n\ stdcx. %0,0,%2 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (a), r (v-counter) : cc, memory); @@ -359,7 +359,7 @@ addic %0,%0,1\n\ stdcx. %0,0,%1 \n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (v-counter) : cc, memory); @@ -401,7 +401,7 @@ addic %0,%0,-1\n\ stdcx. %0,0,%1\n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (t) : r (v-counter) : cc, memory); @@ -427,7 +427,7 @@ blt-2f\n\ stdcx. %0,0,%1\n\ bne-1b - ISYNC_ON_SMP + LWSYNC_ON_SMP \n\ 2:: =r (t) : r (v-counter) @@ -460,7 +460,7 @@ add %0,%2,%0 \n stdcx. %0,0,%1 \n\ bne-1b \n - ISYNC_ON_SMP + LWSYNC_ON_SMP subf%0,%2,%0 \n\ 2: : =r (t) Index: linux-2.6/arch/powerpc/include/asm/bitops.h === --- linux-2.6.orig/arch/powerpc/include/asm/bitops.h2008-11-01 20:36:12.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/bitops.h 2008-11-01 20:36:40.0 +1100 @@ -139,7 +139,7 @@ PPC405_ERR77(0,%3) PPC_STLCX %1,0,%3 \n bne- 1b - ISYNC_ON_SMP + LWSYNC_ON_SMP : =r (old), =r (t) : r (mask), r (p) : cc, memory); @@ -160,7 +160,7 @@ PPC405_ERR77(0,%3) PPC_STLCX %1,0,%3 \n bne- 1b - ISYNC_ON_SMP +
Re: QE in MPC8360MDS
Anton. Thanks for the info you provide. The code I have actually works fine on MPC8568. It does NOT work on MPC8360. The value of following register are correct based on the manual. And the RxBD flag changed as well. I shall see the bit of UCCE changes, Right? Do I miss provision anything? Is there any other register shall I check in order to get the interrupt bit in UCCE? gumr : addr - 0xfdf02000, val - 0x400c ucce : addr - 0xfdf02010, val - 0x uccm : addr - 0xfdf02014, val - 0x7f010001 On Fri, Oct 31, 2008 at 10:01 AM, Anton Vorontsov [EMAIL PROTECTED] wrote: On Fri, Oct 31, 2008 at 09:47:18AM -0400, mike zheng wrote: Hi All, Anyone know the difference of QE between MPC8360 and MPC8568? I am using the QE code working for MPC8568 on a MPC8360MDS board. However there is no interrupt generated by UCC0. I set the QE working under loopback mode. The flag of TxBD got changed, but the UCCE remains the same value. Here is the logs and register value. I recalling these differences: QEIC to MPIC vs. IPIC cascading (may be the cause of interrupts issues). http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=cccd21027c17c27ad275093c22475354b4495814 QE ParIO layout (you may have pins misconfigured): http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=321872dcc07f83f9b60af1be41c6bafbaddf9bf6 -- Anton Vorontsov email: [EMAIL PROTECTED] irc://irc.freenode.net/bd2 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [patch] powerpc: smp_wmb lwsync optimisation fix
On Nov 1, 2008, at 7:33 AM, Nick Piggin wrote: A previous change removed __SUBARCH_HAS_LWSYNC define, and replaced it with __powerpc64__. smp_wmb() seems to be the last place not updated. Uugh... no.. I missed the patch that removed __SUBARCH_HAS_LWSYNC, but thats no good. We have LWSYNC on non-powerpc64 machines. Will go figure out who forgets we have ppc32 machines :) - k Signed-off-by: Nick Piggin [EMAIL PROTECTED] --- Index: linux-2.6/arch/powerpc/include/asm/system.h === --- linux-2.6.orig/arch/powerpc/include/asm/system.h 2008-11-01 20:31:51.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/system.h 2008-11-01 20:32:33.0 +1100 @@ -44,7 +44,7 @@ #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ #ifdef CONFIG_SMP -#ifdef __SUBARCH_HAS_LWSYNC +#if defined(__powerpc64__) #define SMPWMB lwsync #else #define SMPWMB eieio ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc/boot: allocate more memory for dtb
* David Gibson | 2008-10-14 13:00:04 [+1100]: Oh, one other thing. Since we are now unconditionally copying the dtb into a malloc()ed buffer, possibly it would be sensible to add a little padding to the buffer at that point, so that further device tree manipulations won't need to reallocate it. Signed-off-by: Sebastian Andrzej Siewior [EMAIL PROTECTED] --- Haven't notice earlier that the other patch went mainline. EXPAND_GRANULARITY is 1KiB and it is used in expand_buf() if the buffer has to be increased. I hope that is okay. All other platforms except prpmc2800 are passing the dtb to fdt_init(). prpmc2800 is reallocating the dtb to a malloced area. I thing I can remove that part since fdt_init() is doing this anyway. arch/powerpc/boot/libfdt-wrapper.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c index 1daa73f..0085930 100644 --- a/arch/powerpc/boot/libfdt-wrapper.c +++ b/arch/powerpc/boot/libfdt-wrapper.c @@ -179,7 +179,7 @@ void fdt_init(void *blob) /* Make sure the dt blob is the right version and so forth */ fdt = blob; - bufsize = fdt_totalsize(fdt) + 4; + bufsize = fdt_totalsize(fdt) + EXPAND_GRANULARITY; buf = malloc(bufsize); if(!buf) fatal(malloc failed. can't relocate the device tree\n\r); -- 1.5.6.5 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] ibm_newemac: Add support for Arches CPU0 SGMII0 to CPU1 SGMII0
On Arches, SGMII0 Rx/Tx on CPU0 is wired to SGMII0 Tx/Rx on CPU1.
Add GPCS as a phy type to allow for this.
Signed-off-by: Victor Gallardo [EMAIL PROTECTED]
---
arch/powerpc/boot/dts/arches.dts |3 ++-
drivers/net/ibm_newemac/core.c |5 -
drivers/net/ibm_newemac/phy.c| 29 +
3 files changed, 35 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/arches.dts b/arch/powerpc/boot/dts/arches.dts
index d9113b1..a5f1597 100644
--- a/arch/powerpc/boot/dts/arches.dts
+++ b/arch/powerpc/boot/dts/arches.dts
@@ -225,7 +225,8 @@
rx-fifo-size = 4096;
tx-fifo-size = 2048;
phy-mode = sgmii;
- phy-map = 0x;
+ phy-map = 0x0400;
+ phy-address = 0x000a;
gpcs-address = 0x000a;
tah-device = TAH0;
tah-channel = 0;
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index 2ee2622..9b62741 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -2814,7 +2814,10 @@ static int __devinit emac_probe(struct of_device *ofdev,
goto err_detach_rgmii;
/* Set some link defaults before we can find out real parameters */
- dev-phy.speed = SPEED_100;
+ if (emac_phy_gpcs(dev-phy_mode))
+ dev-phy.speed = SPEED_1000;
+ else
+ dev-phy.speed = SPEED_100;
dev-phy.duplex = DUPLEX_FULL;
dev-phy.autoneg = AUTONEG_DISABLE;
dev-phy.pause = dev-phy.asym_pause = 0;
diff --git a/drivers/net/ibm_newemac/phy.c b/drivers/net/ibm_newemac/phy.c
index c40cd8d..84e6e45 100644
--- a/drivers/net/ibm_newemac/phy.c
+++ b/drivers/net/ibm_newemac/phy.c
@@ -400,6 +400,18 @@ static int m88e1112_init(struct mii_phy *phy)
return 0;
}
+static int gpcs_init(struct mii_phy *phy)
+{
+ if (phy-mode == PHY_MODE_SGMII) {
+ /* Configure GPCS interface to recommended setting for SGMII */
+ phy_write(phy, 0x04, 0x8120); /* AsymPause, FDX */
+ phy_write(phy, 0x07, 0x2801); /* msg_pg, toggle */
+ phy_write(phy, 0x00, 0x0140); /* 1Gbps, FDX */
+ }
+
+ return 0;
+}
+
static int et1011c_init(struct mii_phy *phy)
{
u16 reg_short;
@@ -467,12 +479,29 @@ static struct mii_phy_def m88e1112_phy_def = {
.ops= m88e1112_phy_ops,
};
+static struct mii_phy_ops gpcs_phy_ops = {
+ .init = gpcs_init,
+ .setup_aneg = genmii_setup_aneg,
+ .setup_forced = genmii_setup_forced,
+ .poll_link = genmii_poll_link,
+ .read_link = genmii_read_link
+};
+
+static struct mii_phy_def gpcs_phy_def = {
+ .phy_id = 0xf6d5eeef,
+ .phy_id_mask= 0x,
+ .features = SUPPORTED_1000baseT_Full,
+ .name = Internal GPCS,
+ .ops= gpcs_phy_ops,
+};
+
static struct mii_phy_def *mii_phy_table[] = {
et1011c_phy_def,
cis8201_phy_def,
bcm5248_phy_def,
m88e_phy_def,
m88e1112_phy_def,
+ gpcs_phy_def,
genmii_phy_def,
NULL
};
--
1.5.5
___
Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/2] powerpc: add 16K/64K pages support for the 44x PPC32 architectures.
On Sat, 2008-11-01 at 07:30 -0400, Josh Boyer wrote: That is on purpose. The chip has an errata that causes badness if you use the last XX bytes of DRAM. I forget exactly what XX is, but we just remove the last page. Doing that from the device-tree is very hairy tho... you end up with informations in there that aren't aligned etc... oh well. Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [patch] powerpc: smp_wmb lwsync optimisation fix
On Sat, Nov 01, 2008 at 11:47:58AM -0500, Kumar Gala wrote: On Nov 1, 2008, at 7:33 AM, Nick Piggin wrote: A previous change removed __SUBARCH_HAS_LWSYNC define, and replaced it with __powerpc64__. smp_wmb() seems to be the last place not updated. Uugh... no.. I missed the patch that removed __SUBARCH_HAS_LWSYNC, but thats no good. We have LWSYNC on non-powerpc64 machines. Will go figure out who forgets we have ppc32 machines :) I think it may have been you :) But actually, SMPWMB would need more massaging before it is suitable, by the looks of your LWSYNC define in synch.h. I don't mind, so much, about how this gets fixed. But it would be nice to fix it somehow. After the smp_rmb and smp_wmb patches, there are practically no sync instructions left in mm/ :) - k Signed-off-by: Nick Piggin [EMAIL PROTECTED] --- Index: linux-2.6/arch/powerpc/include/asm/system.h === --- linux-2.6.orig/arch/powerpc/include/asm/system.h 2008-11-01 20:31:51.0 +1100 +++ linux-2.6/arch/powerpc/include/asm/system.h 2008-11-01 20:32:33.0 +1100 @@ -44,7 +44,7 @@ #define AT_VECTOR_SIZE_ARCH 6 /* entries in ARCH_DLINFO */ #ifdef CONFIG_SMP -#ifdef __SUBARCH_HAS_LWSYNC +#if defined(__powerpc64__) #define SMPWMB lwsync #else #define SMPWMB eieio ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
