[PATCH v2] 83xx: add support for the kmeter1 board.
The following series implements basic board support for
the kmeter1 board from keymile, based on a MPC8360.
This series provides the following functionality:
- The board can boot with a serial console on UART1
- Ethernet:
UCC1 in RGMII mode
UCC2 in RGMII mode
UCC4 in RMII mode
UCC5 in RMII mode
UCC6 in RMII mode
UCC7 in RMII mode
UCC8 in RMII mode
following patch is necessary for working UCC in RMII mode:
http://ozlabs.org/pipermail/linuxppc-dev/2009-April/070909.html
- Flash accessed via MTD layer
On this hardware there is an Intel P30 flash, following patch
series is necessary for working with this hardware:
http://ozlabs.org/pipermail/linuxppc-dev/2009-April/070716.html
- I2C using I2C Bus 1 from the MPC8360 cpu
Signed-off-by: Heiko Schocher h...@denx.de
---
changes since v1:
- added comments from Kumar Gala and Scott Wood
- get rid of using get_immrbase() in board specific code
$ ./scripts/checkpatch.pl
0001--Patch-v2-83xx-add-support-for-the-kmeter1-board.patch
total: 0 errors, 0 warnings, 1626 lines checked
0001--Patch-v2-83xx-add-support-for-the-kmeter1-board.patch has no obvious
style problems and is ready for submission.
arch/powerpc/boot/dts/kmeter1.dts | 513 +++
arch/powerpc/configs/83xx/kmeter1_defconfig | 908 +++
arch/powerpc/platforms/83xx/Kconfig |7 +
arch/powerpc/platforms/83xx/Makefile|1 +
arch/powerpc/platforms/83xx/kmeter1.c | 188 ++
5 files changed, 1617 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/kmeter1.dts
create mode 100644 arch/powerpc/configs/83xx/kmeter1_defconfig
create mode 100644 arch/powerpc/platforms/83xx/kmeter1.c
diff --git a/arch/powerpc/boot/dts/kmeter1.dts
b/arch/powerpc/boot/dts/kmeter1.dts
new file mode 100644
index 000..63c27da
--- /dev/null
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -0,0 +1,513 @@
+/*
+ * Keymile KMETER1 Device Tree Source
+ *
+ * 2008 DENX Software Engineering GmbH
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = KMETER1;
+ compatible = keymile,KMETER1;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ aliases {
+ ethernet0 = enet_piggy2;
+ ethernet1 = enet_estar1;
+ ethernet2 = enet_estar2;
+ ethernet3 = enet_eth1;
+ ethernet4 = enet_eth2;
+ ethernet5 = enet_eth3;
+ ethernet6 = enet_eth4;
+ serial0 = serial0;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,8...@0 {
+ device_type = cpu;
+ reg = 0x0;
+ d-cache-line-size = 32; // 32 bytes
+ i-cache-line-size = 32; // 32 bytes
+ d-cache-size = 32768; // L1, 32K
+ i-cache-size = 32768; // L1, 32K
+ timebase-frequency = 0; /* Filled in by U-Boot
*/
+ bus-frequency = 0;/* Filled in by U-Boot */
+ clock-frequency = 0; /* Filled in by U-Boot */
+ };
+ };
+
+ memory {
+ device_type = memory;
+ reg = 0 0;/* Filled in by U-Boot */
+ };
+
+ soc8...@e000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ device_type = soc;
+ compatible = simple-bus;
+ ranges = 0x0 0xe000 0x0020;
+ reg = 0xe000 0x0200;
+ bus-frequency = 0;/* Filled in by U-Boot */
+
+ i...@3000 {
+ #address-cells = 1;
+ #size-cells = 0;
+ cell-index = 0;
+ compatible = fsl-i2c;
+ reg = 0x3000 0x100;
+ interrupts = 14 0x8;
+ interrupt-parent = ipic;
+ dfsrr;
+ };
+
+ serial0: ser...@4500 {
+ cell-index = 0;
+ device_type = serial;
+ compatible = ns16550;
+ reg = 0x4500 0x100;
+ clock-frequency = 26400;
+ interrupts = 9 0x8;
+ interrupt-parent = ipic;
+ };
+
+ d...@82a8 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,mpc8360-dma, fsl,elo-dma;
+ reg = 0x82a8 4;
+ ranges = 0 0x8100
Re: Next April 28: boot failure on PowerPC with SLQB
On Tue, Apr 28, 2009 at 02:22:06PM +0300, Pekka Enberg wrote: Nick, Here's another one. I think we need to either fix these rather quickly or make SLUB the defaut for linux-next again so we don't interfere with other testing. Yeah, I'm working on it. Let me either give you a fix or a patch to change the default, by the end of the day ;) Thanks, Nick ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
Move VSX load/stores into ppc-opcode.h Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/ppc-opcode.h |9 + arch/powerpc/include/asm/ppc_asm.h| 10 -- 2 files changed, 9 insertions(+), 10 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h @@ -49,6 +49,7 @@ /* macros to insert fields into opcodes */ #define __PPC_RA(a)(((a) 0x1f) 16) #define __PPC_RB(b)(((b) 0x1f) 11) +#define __PPC_XS(s)s) 0x1f) 21) | (((s) 0x20) 5)) #define __PPC_T_TLB(t) (((t) 0x3) 21) #define __PPC_WC(w)(((w) 0x3) 21) @@ -70,4 +71,12 @@ #define PPC_WAIT(w)stringify_in_c(.long PPC_INST_WAIT | \ __PPC_WC(w)) +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b)) +#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b))) +#define LXVD2X(s, a, b).long (0x7c000698 | VSX_XX1((s), (a), (b))) + #endif /* _ASM_POWERPC_PPC_OPCODE_H */ Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc_asm.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc_asm.h @@ -75,16 +75,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR); REST_10GPRS(22, base) #endif -/* - * Define what the VSX XX1 form instructions will look like, then add - * the 128 bit load store instructions based on that. - */ -#define VSX_XX1(xs, ra, rb)(((xs) 0x1f) 21 | ((ra) 16) | \ -((rb) 11) | (((xs) 5))) - -#define STXVD2X(xs, ra, rb).long (0x7c000798 | VSX_XX1((xs), (ra), (rb))) -#define LXVD2X(xs, ra, rb) .long (0x7c000698 | VSX_XX1((xs), (ra), (rb))) - #define SAVE_2GPRS(n, base)SAVE_GPR(n, base); SAVE_GPR(n+1, base) #define SAVE_4GPRS(n, base)SAVE_2GPRS(n, base); SAVE_2GPRS(n+2, base) #define SAVE_8GPRS(n, base)SAVE_4GPRS(n, base); SAVE_4GPRS(n+4, base) ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 0/2] powerpc: Cleanup code in ppc-opcode.h
Cleanup some code in ppc-opcode.h ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: Cleanup macros in ppc-opcode.h
Macros need to be more braces happy Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/ppc-opcode.h |8 1 file changed, 4 insertions(+), 4 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h @@ -47,10 +47,10 @@ #define PPC_INST_WAIT 0x7c7c /* macros to insert fields into opcodes */ -#define __PPC_RA(a)((a 0x1f) 16) -#define __PPC_RB(b)((b 0x1f) 11) -#define __PPC_T_TLB(t) ((t 0x3) 21) -#define __PPC_WC(w)((w 0x3) 21) +#define __PPC_RA(a)(((a) 0x1f) 16) +#define __PPC_RB(b)(((b) 0x1f) 11) +#define __PPC_T_TLB(t) (((t) 0x3) 21) +#define __PPC_WC(w)(((w) 0x3) 21) /* Deal with instructions that older assemblers aren't aware of */ #definePPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 0/2] powerpc: tlbie implementation for PowerPC ISA 2.06
These patches implement the PowerPC ISA 2.06 tlbie mnemonics Signed-off-by: Michael Neuling mi...@neuling.org --- Built ontop of ppc-opcode cleanup patches Renamed somethings to be more logical based on comments from mpe. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: Enable MMU feature sections for inline asm
From: Milton Miller milt...@bga.com powerpc: Enable MMU feature sections for inline asm This adds the ability to do MMU feature sections for inline asm. Signed-off-by: Milton Miller milt...@bga.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/feature-fixups.h | 25 - 1 file changed, 20 insertions(+), 5 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/feature-fixups.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/feature-fixups.h @@ -8,8 +8,6 @@ * 2 of the License, or (at your option) any later version. */ -#ifdef __ASSEMBLY__ - /* * Feature section common macros * @@ -23,10 +21,12 @@ /* 64 bits kernel, 32 bits code (ie. vdso32) */ #define FTR_ENTRY_LONG .llong #define FTR_ENTRY_OFFSET .long 0x; .long +#elif defined(CONFIG_PPC64) +#define FTR_ENTRY_LONG .llong +#define FTR_ENTRY_OFFSET .llong #else -/* 64 bit kernel 64 bit code, or 32 bit kernel 32 bit code */ -#define FTR_ENTRY_LONG PPC_LONG -#define FTR_ENTRY_OFFSET PPC_LONG +#define FTR_ENTRY_LONG .long +#define FTR_ENTRY_OFFSET .long #endif #define START_FTR_SECTION(label) label##1: @@ -141,6 +141,21 @@ label##5: \ #define ALT_FW_FTR_SECTION_END_IFCLR(msk) \ ALT_FW_FTR_SECTION_END_NESTED_IFCLR(msk, 97) +#ifndef __ASSEMBLY__ + +#define ASM_MMU_FTR_IF(section_if, section_else, msk, val) \ + stringify_in_c(BEGIN_MMU_FTR_SECTION) \ + section_if ; \ + stringify_in_c(MMU_FTR_SECTION_ELSE)\ + section_else ;\ + stringify_in_c(ALT_MMU_FTR_SECTION_END((msk), (val))) + +#define ASM_MMU_FTR_IFSET(section_if, section_else, msk) \ + ASM_MMU_FTR_IF(section_if, section_else, (msk), (msk)) + +#define ASM_MMU_FTR_IFCLR(section_if, section_else, msk) \ + ASM_MMU_FTR_IF(section_if, section_else, (msk), 0) + #endif /* __ASSEMBLY__ */ /* LWSYNC feature sections */ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 2/2] powerpc: Add 2.06 tlbie mnemonics
From: Milton Miller milt...@bga.com This adds the PowerPC 2.06 tlbie mnemonics and keeps backwards compatibilty for CPUs before 2.06. Only useful for bare metal systems. Signed-off-by: Milton Miller milt...@bga.com Signed-off-by: Michael Neuling mi...@neuling.org --- arch/powerpc/include/asm/mmu.h|5 + arch/powerpc/include/asm/ppc-opcode.h |4 arch/powerpc/kernel/cputable.c|6 -- arch/powerpc/mm/hash_native_64.c | 13 +++-- 4 files changed, 24 insertions(+), 4 deletions(-) Index: linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/mmu.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/mmu.h @@ -52,6 +52,11 @@ */ #define MMU_FTR_NEED_DTLB_SW_LRU ASM_CONST(0x0020) +/* This indicates that the processor uses the ISA 2.06 server tlbie + * mnemonics + */ +#define MMU_FTR_TLBIE_206 ASM_CONST(0x0040) + #ifndef __ASSEMBLY__ #include asm/cputable.h Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h @@ -45,10 +45,12 @@ #define PPC_INST_STSWX 0x7c00052a #define PPC_INST_TLBILX0x7c24 #define PPC_INST_WAIT 0x7c7c +#define PPC_INST_TLBIE 0x7c000264 /* macros to insert fields into opcodes */ #define __PPC_RA(a)(((a) 0x1f) 16) #define __PPC_RB(b)(((b) 0x1f) 11) +#define __PPC_RS(s)(((s) 0x1f) 21) #define __PPC_XS(s)s) 0x1f) 21) | (((s) 0x20) 5)) #define __PPC_T_TLB(t) (((t) 0x3) 21) #define __PPC_WC(w)(((w) 0x3) 21) @@ -70,6 +72,8 @@ #define PPC_TLBILX_VA(a, b)PPC_TLBILX(3, a, b) #define PPC_WAIT(w)stringify_in_c(.long PPC_INST_WAIT | \ __PPC_WC(w)) +#define PPC_TLBIE(lp,a)stringify_in_c(.long PPC_INST_TLBIE | \ + __PPC_RB(a) | __PPC_RS(lp)) /* * Define what the VSX XX1 form instructions will look like, then add Index: linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c === --- linux-2.6-ozlabs.orig/arch/powerpc/kernel/cputable.c +++ linux-2.6-ozlabs/arch/powerpc/kernel/cputable.c @@ -425,7 +425,8 @@ static struct cpu_spec __initdata cpu_sp .cpu_name = POWER7 (architected), .cpu_features = CPU_FTRS_POWER7, .cpu_user_features = COMMON_USER_POWER7, - .mmu_features = MMU_FTR_HPTE_TABLE, + .mmu_features = MMU_FTR_HPTE_TABLE | + MMU_FTR_TLBIE_206, .icache_bsize = 128, .dcache_bsize = 128, .machine_check = machine_check_generic, @@ -438,7 +439,8 @@ static struct cpu_spec __initdata cpu_sp .cpu_name = POWER7 (raw), .cpu_features = CPU_FTRS_POWER7, .cpu_user_features = COMMON_USER_POWER7, - .mmu_features = MMU_FTR_HPTE_TABLE, + .mmu_features = MMU_FTR_HPTE_TABLE | + MMU_FTR_TLBIE_206, .icache_bsize = 128, .dcache_bsize = 128, .num_pmcs = 6, Index: linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c === --- linux-2.6-ozlabs.orig/arch/powerpc/mm/hash_native_64.c +++ linux-2.6-ozlabs/arch/powerpc/mm/hash_native_64.c @@ -27,6 +27,7 @@ #include asm/cputable.h #include asm/udbg.h #include asm/kexec.h +#include asm/ppc-opcode.h #ifdef DEBUG_LOW #define DBG_LOW(fmt...) udbg_printf(fmt) @@ -49,14 +50,21 @@ static inline void __tlbie(unsigned long case MMU_PAGE_4K: va = ~0xffful; va |= ssize 8; - asm volatile(tlbie %0,0 : : r (va) : memory); + asm volatile(ASM_MMU_FTR_IFCLR(tlbie %0,0, PPC_TLBIE(%1,%0), + %2) +: : r (va), r(0), i (MMU_FTR_TLBIE_206) +: memory); break; default: penc = mmu_psize_defs[psize].penc; va = ~((1ul mmu_psize_defs[psize].shift) - 1); va |= penc 12; va |= ssize 8; - asm volatile(tlbie %0,1 : : r (va) : memory); + va |= 1; /* L */ + asm volatile(ASM_MMU_FTR_IFCLR(tlbie %0,1, PPC_TLBIE(%1,%0), + %2) +: : r (va), r(0), i
Re: [PATCH] powerpc: Update MPC5xxx and Xilinx Virtex maintainer entries
Grant Likely wrote: From: Grant Likely grant.lik...@secretlab.ca - Add git tree URLs - Drop Sylvain from the 5xxx maintainers list. He hasn't been active for a while now. Signed-off-by: Grant Likely grant.lik...@secretlab.ca Confirmed. --- MAINTAINERS |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index ef03abe..4a8d367 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3434,11 +3434,10 @@ L:linuxppc-dev@ozlabs.org S: Maintained LINUX FOR POWERPC EMBEDDED MPC5XXX -P: Sylvain Munaut -M: t...@246tnt.com P: Grant Likely M: grant.lik...@secretlab.ca L: linuxppc-dev@ozlabs.org +T: git git://git.secretlab.ca/git/linux-2.6.git S: Maintained LINUX FOR POWERPC EMBEDDED PPC4XX @@ -3456,6 +3455,7 @@ P: Grant Likely M: grant.lik...@secretlab.ca W: http://wiki.secretlab.ca/index.php/Linux_on_Xilinx_Virtex L: linuxppc-dev@ozlabs.org +T: git git://git.secretlab.ca/git/linux-2.6.git S: Maintained LINUX FOR POWERPC EMBEDDED PPC8XX ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: bug in drivers/edac/mpc85xx_edac.c:mpc85xx_mc_check()
Let's cc the suitable people. On Tue, 28 Apr 2009 18:23:42 -0700 Jeff Haran jha...@brocade.com wrote: Hi, Recent versions of this function contain the following snippets: if (err_detect DDR_EDE_SBE) edac_mc_handle_ce(mci, pfn, err_addr PAGE_MASK, syndrome, row_index, 0, mci-ctl_name); if (err_detect DDR_EDE_MBE) edac_mc_handle_ue(mci, pfn, err_addr PAGE_MASK, row_index, mci-ctl_name); I am pretty sure the references to PAGE_MASK should be proceeded by a tilda, as in: if (err_detect DDR_EDE_SBE) edac_mc_handle_ce(mci, pfn, err_addr ~PAGE_MASK, syndrome, row_index, 0, mci-ctl_name); if (err_detect DDR_EDE_MBE) edac_mc_handle_ue(mci, pfn, err_addr ~PAGE_MASK, row_index, mci-ctl_name); Could well be. PAGE_MASK is very easy to get wrong. I've _never_ trusted my own memory of it and I always have to go back to the definition when reviewing code :( Much as I would like to submit a tested patch like the rest of the world, I find myself in the situation where the only Freescale target system I have to test on is running a 3 year old kernel (2.6.14), which preceeds the introduction of EDAC driver support, at least for Freescale. So the best I can do is borrow from the new EDAC driver and backport it to the old kernel. But I have learned a few things in this process and can thus share what I've learned as it may be of help to the EDAC driver developers: 1) Before you read the Freescale 8548 CAPTURE_ADDRESS register, you want to read CAPTURE_ATTRIBUTES first and make sure the VLD bit (least significant bit in the register) is set or else the data in CAPTURE_ADDRESS may not be yet valid. 2) When you are done scrubbing the memory with the single bit error, you want to write 0 to CAPTURE_ATTRIBUTES so as to clear VLD and thus setup the ECC capture logic to capture the next single bit error. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] [MTD] ofpart: Partitions at same address cannot have thesame name v3
Hello Segher Thanks for your comments. Your special partition isn't really a partition then, is it. Because of that, device nodes to represent your partitions doesn't work very well. I think that they work pretty well. Unfortunately, since 4b08e149c0e02e97ec49c2a31d14a0d3a02f8074 all the partiton must be named partition You really want to use something else, a partition table on the flash itself for example. Or maybe the (platform? MTD?) code should create a Linux device for the full device. This wont be very flexible. With the device tree aproach we can define partitions not only for the full flash, but also for two partitions merged, a partition inside a partition Because two nodes of a device tree cannot have the same name, This isn't true. Are you sure? This is what I get if I try to compile a device tree with two partitions with the same name starting at the same address. $ arch/powerpc/boot/dtc -O dtb -b 0 -p 1024 arch/powerpc/boot/dts/q5-avnet.dts -o /tmp/kk DTC: dts-dtb on file arch/powerpc/boot/dts/q5-avnet.dts ERROR (duplicate_node_names): Duplicate node name /p...@0/fl...@ff00/partit...@ff00 ERROR: Input tree has errors, aborting (use -f to force output) but all the partitions must be named partition, Bad binding, no cookie for you! Sorry, I dont understand want you want to say here. You cannot claim a name as generic as partition for this. Pick something else if you really must do things this way. You choose :) Best regards -- Ricardo Ribalda http://www.eps.uam.es/~rribalda/ ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
FSL Driver load issues with OF
Hi there, Since the progressive migration of some PPC drivers to use of_platform bus (typically migrating OF parsing from fsl_soc.c to the device probe/init functions), I'm experiencing driver load issues. Actually, I'm not longer able to load of these drivers as the probe() function is never called. Everything goes fine if I put code back to fsl_soc.c with the arch_initcall() command. Example of drivers that do no longer load for me: gianfar, talitos ... Is there something obvious that I've missed ? Ben ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Next April 28: boot failure on PowerPC with SLQB
On Tue, Apr 28, 2009 at 02:22:06PM +0300, Pekka Enberg wrote:
Nick,
Here's another one. I think we need to either fix these rather quickly
or make SLUB the defaut for linux-next again so we don't interfere
with other testing.
Pekka
On Tue, Apr 28, 2009 at 2:10 PM, Sachin Sant sach...@in.ibm.com wrote:
Today's next tree fails to boot on variety of powerpc boxes (Power5, power6)
Memory: 3882624k/4194304k available (8384k kernel code, 311680k reserved,
2048k data, 4285k bss, 512k init)
Kernel panic - not syncing: kmem_cache_create(): failed to create slab
`kmalloc'
Call Trace:
[c0a33c30] [c0011668] .show_stack+0x6c/0x16c (unreliable)
[c0a33ce0] [c0563c8c] .panic+0x80/0x1a8
[c0a33d70] [c01410d8] .kmem_cache_open+0x4e8/0x51c
[c0a33e20] [c07d90b8] .kmem_cache_init+0x264/0x35c
[c0a33ee0] [c07b0b68] .start_kernel+0x404/0x51c
[c0a33f90] [c00083d8] .start_here_common+0x1c/0x44
OK I think the problem is that with 64K pages you get a default MAX_ORDER
of 9, and slqb is trying to create slabs which exceed that size..
Does this help?
---
SLQB: fix slab calculation
SLQB didn't consider MAX_ORDER when defining which sizes of kmalloc
slabs to create. It panics at boot if it tries to create a cache
which exceeds MAX_ORDER-1.
Signed-off-by: Nick Piggin npig...@suse.de
---
Index: linux-2.6/include/linux/slqb_def.h
===
--- linux-2.6.orig/include/linux/slqb_def.h 2009-04-29 21:27:30.0
+1000
+++ linux-2.6/include/linux/slqb_def.h 2009-04-29 21:28:13.0 +1000
@@ -172,7 +172,8 @@ struct kmem_cache {
#endif
#define KMALLOC_SHIFT_LOW ilog2(KMALLOC_MIN_SIZE)
-#define KMALLOC_SHIFT_SLQB_HIGH (PAGE_SHIFT + 9)
+#define KMALLOC_SHIFT_SLQB_HIGH ((PAGE_SHIFT + 9) MAX_ORDER ? \
+ (PAGE_SHIFT + 9) : (MAX_ORDER - 1))
extern struct kmem_cache kmalloc_caches[KMALLOC_SHIFT_SLQB_HIGH + 1];
extern struct kmem_cache kmalloc_caches_dma[KMALLOC_SHIFT_SLQB_HIGH + 1];
___
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Re: [PATCH 1/6] powerpc: Move #ifdef'ed body of do_IRQ() into a separate function
On Tue, Apr 28, 2009 at 10:49:07AM +1000, Michael Ellerman wrote: On Sat, 2009-04-25 at 20:18 +0200, Christoph Hellwig wrote: On Thu, Apr 23, 2009 at 11:31:37AM +1000, Michael Ellerman wrote: +#ifdef CONFIG_IRQSTACKS Wasn't there a plan to make CONFIG_IRQSTACKS the unconditional default? Not sure. Looks like the 64-bit configs all turn it on, and all but one or two of the 32-bit configs don't. Yeah, but do they have a reason not to turn it on? Having irqstacks is a lot safer than no having it because the stack useage is a lot more predictable. And not having to maintain two codepathes is also a benefit all by itself. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] therm_windtunnel: Convert to a new-style i2c driver
On Thu, 16 Apr 2009 23:01:01 +0200, Jean Delvare wrote:
The legacy i2c binding model is going away soon, so convert the ppc
therm_windtunnel driver to the new model or it will break.
Signed-off-by: Jean Delvare kh...@linux-fr.org
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
---
Can someone please test this patch for me? I could only build-test it.
Remember that you need this patch applied:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=935298696f469c0e07c73be687bd055878074ce0
Paul, any progress on this?
Thanks.
drivers/macintosh/therm_windtunnel.c | 126
--
1 file changed, 60 insertions(+), 66 deletions(-)
--- linux-2.6.30-rc2.orig/drivers/macintosh/therm_windtunnel.c
2009-03-24 13:40:47.0 +0100
+++ linux-2.6.30-rc2/drivers/macintosh/therm_windtunnel.c 2009-04-16
22:56:39.0 +0200
@@ -48,16 +48,6 @@
#define LOG_TEMP 0 /* continously log
temperature */
-static int do_probe( struct i2c_adapter *adapter, int
addr, int kind);
-
-/* scan 0x48-0x4f (DS1775) and 0x2c-2x2f (ADM1030) */
-static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b,
- 0x4c, 0x4d, 0x4e, 0x4f,
- 0x2c, 0x2d, 0x2e, 0x2f,
- I2C_CLIENT_END };
-
-I2C_CLIENT_INSMOD;
-
static struct {
volatile intrunning;
struct task_struct *poll_task;
@@ -315,53 +305,54 @@ static int control_loop(void *dummy)
static int
do_attach( struct i2c_adapter *adapter )
{
- int ret = 0;
+ /* scan 0x48-0x4f (DS1775) and 0x2c-2x2f (ADM1030) */
+ static const unsigned short scan_ds1775[] = {
+ 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
+ I2C_CLIENT_END
+ };
+ static const unsigned short scan_adm1030[] = {
+ 0x2c, 0x2d, 0x2e, 0x2f,
+ I2C_CLIENT_END
+ };
if( strncmp(adapter-name, uni-n, 5) )
return 0;
if( !x.running ) {
- ret = i2c_probe( adapter, addr_data, do_probe );
+ struct i2c_board_info info;
+
+ memset(info, 0, sizeof(struct i2c_board_info));
+ strlcpy(info.type, therm_ds1775, I2C_NAME_SIZE);
+ i2c_new_probed_device(adapter, info, scan_ds1775);
+
+ strlcpy(info.type, therm_adm1030, I2C_NAME_SIZE);
+ i2c_new_probed_device(adapter, info, scan_adm1030);
+
if( x.thermostat x.fan ) {
x.running = 1;
x.poll_task = kthread_run(control_loop, NULL, g4fand);
}
}
- return ret;
+ return 0;
}
static int
-do_detach( struct i2c_client *client )
+do_remove(struct i2c_client *client)
{
- int err;
-
- if( (err=i2c_detach_client(client)) )
- printk(KERN_ERR failed to detach thermostat client\n);
- else {
- if( x.running ) {
- x.running = 0;
- kthread_stop(x.poll_task);
- x.poll_task = NULL;
- }
- if( client == x.thermostat )
- x.thermostat = NULL;
- else if( client == x.fan )
- x.fan = NULL;
- else {
- printk(KERN_ERR g4fan: bad client\n);
- }
- kfree( client );
+ if (x.running) {
+ x.running = 0;
+ kthread_stop(x.poll_task);
+ x.poll_task = NULL;
}
- return err;
-}
+ if (client == x.thermostat)
+ x.thermostat = NULL;
+ else if (client == x.fan)
+ x.fan = NULL;
+ else
+ printk(KERN_ERR g4fan: bad client\n);
-static struct i2c_driver g4fan_driver = {
- .driver = {
- .name = therm_windtunnel,
- },
- .attach_adapter = do_attach,
- .detach_client = do_detach,
-};
+ return 0;
+}
static int
attach_fan( struct i2c_client *cl )
@@ -374,13 +365,8 @@ attach_fan( struct i2c_client *cl )
goto out;
printk(ADM1030 fan controller [...@%02x]\n, cl-addr );
- strlcpy( cl-name, ADM1030 fan controller, sizeof(cl-name) );
-
- if( !i2c_attach_client(cl) )
- x.fan = cl;
+ x.fan = cl;
out:
- if( cl != x.fan )
- kfree( cl );
return 0;
}
@@ -412,39 +398,47 @@ attach_thermostat( struct i2c_client *cl
x.temp = temp;
x.overheat_temp = os_temp;
x.overheat_hyst = hyst_temp;
-
- strlcpy( cl-name, DS1775 thermostat, sizeof(cl-name) );
-
- if( !i2c_attach_client(cl) )
- x.thermostat = cl;
+ x.thermostat = cl;
out:
- if( cl !=
Re: [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
On Apr 29, 2009, at 2:20 AM, Michael Neuling wrote: Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h @@ -49,6 +49,7 @@ /* macros to insert fields into opcodes */ #define __PPC_RA(a) (((a) 0x1f) 16) #define __PPC_RB(b) (((b) 0x1f) 11) +#define __PPC_XS(s)s) 0x1f) 21) | (((s) 0x20) 5)) #define __PPC_T_TLB(t) (((t) 0x3) 21) #define __PPC_WC(w) (((w) 0x3) 21) @@ -70,4 +71,12 @@ #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ __PPC_WC(w)) +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b)) +#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b))) +#define LXVD2X(s, a, b).long (0x7c000698 | VSX_XX1((s), (a), (b))) + previous gripe of matching style of file for the .long 0x7c000798 - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Keep track of emulated instructions
On Mon, 6 Apr 2009, Geert Uytterhoeven wrote: On Fri, 3 Apr 2009, Kumar Gala wrote: On Apr 3, 2009, at 7:08 AM, Geert Uytterhoeven wrote: Finally (after ca. 1.5 years), he're an updated version of my patch to keep track of emulated instructions. In the light of Kumar's `Emulate enough of SPE instructions to make gcc happy' patch, he probably also wants to keep track of the actual runtime overhead. Changes since last version: - arch/powerpc/kernel/sysfs.c is now compiled on ppc32, so we can provide counters in sysfs on ppc32, too, - WARN_EMULATED() is a no-op if CONFIG_SYSCTL is disabled, - Add warnings for altivec, - Add warnings for recently introduced emulation of vsx and isel instructions. pretty cool. Do we think counters should be sysfs or debugfs? What do you prefer? On MIPS, unaligned exception handling control is in debugfs. And probably debugfs is better, so it's disabled on production systems. But I would drop the per-CPU counters, and keep global counters only, for simplicity. Also it would be nice to be able to zero out the counters. By writing to the individual counters, or by writing to a global `clear' file? With debugfs, it's quite easy to make them writable, so you can easily clear them by writing zeroes to the virtual files. If people agree, I'll find a time hole and start updating the code... With kind regards, Geert Uytterhoeven Software Architect Techsoft Centre Technology and Software Centre Europe The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium Phone:+32 (0)2 700 8453 Fax: +32 (0)2 700 8622 E-mail: geert.uytterhoe...@sonycom.com Internet: http://www.sony-europe.com/ A division of Sony Europe (Belgium) N.V. VAT BE 0413.825.160 · RPR Brussels Fortis · BIC GEBABEBB · IBAN BE41293037680010 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: bug in drivers/edac/mpc85xx_edac.c:mpc85xx_mc_check()
On Apr 29, 2009, at 2:37 AM, Andrew Morton wrote: Let's cc the suitable people. On Tue, 28 Apr 2009 18:23:42 -0700 Jeff Haran jha...@brocade.com wrote: Hi, Recent versions of this function contain the following snippets: if (err_detect DDR_EDE_SBE) edac_mc_handle_ce(mci, pfn, err_addr PAGE_MASK, syndrome, row_index, 0, mci-ctl_name); if (err_detect DDR_EDE_MBE) edac_mc_handle_ue(mci, pfn, err_addr PAGE_MASK, row_index, mci-ctl_name); I am pretty sure the references to PAGE_MASK should be proceeded by a tilda, as in: if (err_detect DDR_EDE_SBE) edac_mc_handle_ce(mci, pfn, err_addr ~PAGE_MASK, syndrome, row_index, 0, mci-ctl_name); if (err_detect DDR_EDE_MBE) edac_mc_handle_ue(mci, pfn, err_addr ~PAGE_MASK, row_index, mci-ctl_name); Could well be. PAGE_MASK is very easy to get wrong. I've _never_ trusted my own memory of it and I always have to go back to the definition when reviewing code :( This should ~PAGE_MASK to get the offset into the page. Much as I would like to submit a tested patch like the rest of the world, I find myself in the situation where the only Freescale target system I have to test on is running a 3 year old kernel (2.6.14), which preceeds the introduction of EDAC driver support, at least for Freescale. So the best I can do is borrow from the new EDAC driver and backport it to the old kernel. But I have learned a few things in this process and can thus share what I've learned as it may be of help to the EDAC driver developers: 1) Before you read the Freescale 8548 CAPTURE_ADDRESS register, you want to read CAPTURE_ATTRIBUTES first and make sure the VLD bit (least significant bit in the register) is set or else the data in CAPTURE_ADDRESS may not be yet valid. 2) When you are done scrubbing the memory with the single bit error, you want to write 0 to CAPTURE_ATTRIBUTES so as to clear VLD and thus setup the ECC capture logic to capture the next single bit error. This is a correct description based on how FSL error HW works. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/6] powerpc: Move #ifdef'ed body of do_IRQ() into a separate function
On Apr 29, 2009, at 6:44 AM, Christoph Hellwig wrote: On Tue, Apr 28, 2009 at 10:49:07AM +1000, Michael Ellerman wrote: On Sat, 2009-04-25 at 20:18 +0200, Christoph Hellwig wrote: On Thu, Apr 23, 2009 at 11:31:37AM +1000, Michael Ellerman wrote: +#ifdef CONFIG_IRQSTACKS Wasn't there a plan to make CONFIG_IRQSTACKS the unconditional default? Not sure. Looks like the 64-bit configs all turn it on, and all but one or two of the 32-bit configs don't. Yeah, but do they have a reason not to turn it on? Having irqstacks is a lot safer than no having it because the stack useage is a lot more predictable. And not having to maintain two codepathes is also a benefit all by itself. I think Ben, Paul and I had discussed just universally enabling it. Can't remember why Ben hadn't done that yet. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH v6] powerpc/85xx: Add P2020DS board support
The P2020 is a dual e500v2 core based SOC with:
* 3 PCIe controllers
* 2 General purpose DMA controllers
* 2 sRIO controllers
* 3 eTSECS
* USB 2.0
* SDHC
* SPI, I2C, DUART
* enhanced localbus
* and optional Security (P2020E) security w/XOR acceleration
The p2020 DS reference board is pretty similar to the existing MPC85xx
DS boards and has a ULI 1575 connected on one of the PCIe controllers.
Signed-off-by: Ted Peters ted.pet...@freescale.com
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
* Added new ecm bindings
* sorted soc node by address
* added gpio, espi, and sdhci nodes
- k
arch/powerpc/boot/dts/p2020ds.dts| 704 ++
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 43 ++-
arch/powerpc/platforms/fsl_uli1575.c |1 +
arch/powerpc/sysdev/fsl_pci.c|2 +
include/linux/pci_ids.h |2 +
5 files changed, 747 insertions(+), 5 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p2020ds.dts
diff --git a/arch/powerpc/boot/dts/p2020ds.dts
b/arch/powerpc/boot/dts/p2020ds.dts
new file mode 100644
index 000..9982c19
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -0,0 +1,704 @@
+/*
+ * P2020 DS Device Tree Source
+ *
+ * Copyright 2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+ model = fsl,P2020;
+ compatible = fsl,P2020DS;
+ #address-cells = 2;
+ #size-cells = 2;
+
+ aliases {
+ ethernet0 = enet0;
+ ethernet1 = enet1;
+ ethernet2 = enet2;
+ serial0 = serial0;
+ serial1 = serial1;
+ pci0 = pci0;
+ pci1 = pci1;
+ pci2 = pci2;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,p2...@0 {
+ device_type = cpu;
+ reg = 0x0;
+ next-level-cache = L2;
+ };
+
+ PowerPC,p2...@1 {
+ device_type = cpu;
+ reg = 0x1;
+ next-level-cache = L2;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ };
+
+ local...@ffe05000 {
+ #address-cells = 2;
+ #size-cells = 1;
+ compatible = fsl,elbc, simple-bus;
+ reg = 0 0xffe05000 0 0x1000;
+ interrupts = 19 2;
+ interrupt-parent = mpic;
+
+ ranges = 0x0 0x0 0x0 0xe800 0x0800
+ 0x1 0x0 0x0 0xe000 0x0800
+ 0x2 0x0 0x0 0xffa0 0x0004
+ 0x3 0x0 0x0 0xffdf 0x8000
+ 0x4 0x0 0x0 0xffa4 0x0004
+ 0x5 0x0 0x0 0xffa8 0x0004
+ 0x6 0x0 0x0 0xffac 0x0004;
+
+ n...@0,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = cfi-flash;
+ reg = 0x0 0x0 0x800;
+ bank-width = 2;
+ device-width = 1;
+
+ ramd...@0 {
+ reg = 0x0 0x0300;
+ read-only;
+ };
+
+ diagnos...@300 {
+ reg = 0x0300 0x00e0;
+ read-only;
+ };
+
+ d...@3e0 {
+ reg = 0x03e0 0x0020;
+ read-only;
+ };
+
+ ker...@400 {
+ reg = 0x0400 0x0040;
+ read-only;
+ };
+
+ jf...@440 {
+ reg = 0x0440 0x03b0;
+ };
+
+ d...@7f0 {
+ reg = 0x07f0 0x0008;
+ read-only;
+ };
+
+ u-b...@7f8 {
+ reg = 0x07f8 0x0008;
+ read-only;
+ };
+ };
+
+ n...@2,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,elbc-fcm-nand;
+ reg = 0x2 0x0 0x4;
+
+ u-b...@0 {
+ reg = 0x0 0x0200;
+
Re: [PATCH] powerpc: Update MPC5xxx and Xilinx Virtex maintainer entries
On Wed, Apr 29, 2009 at 1:28 AM, Sylvain Munaut t...@246tnt.com wrote: Grant Likely wrote: From: Grant Likely grant.lik...@secretlab.ca - Add git tree URLs - Drop Sylvain from the 5xxx maintainers list. He hasn't been active for a while now. Signed-off-by: Grant Likely grant.lik...@secretlab.ca Confirmed. Thanks Sylvain. g. --- MAINTAINERS | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index ef03abe..4a8d367 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3434,11 +3434,10 @@ L: linuxppc-...@ozlabs.org S: Maintained LINUX FOR POWERPC EMBEDDED MPC5XXX -P: Sylvain Munaut -M: t...@246tnt.com P: Grant Likely M: grant.lik...@secretlab.ca L: linuxppc-dev@ozlabs.org +T: git git://git.secretlab.ca/git/linux-2.6.git S: Maintained LINUX FOR POWERPC EMBEDDED PPC4XX @@ -3456,6 +3455,7 @@ P: Grant Likely M: grant.lik...@secretlab.ca W: http://wiki.secretlab.ca/index.php/Linux_on_Xilinx_Virtex L: linuxppc-dev@ozlabs.org +T: git git://git.secretlab.ca/git/linux-2.6.git S: Maintained LINUX FOR POWERPC EMBEDDED PPC8XX -- Grant Likely, B.Sc., P.Eng. Secret Lab Technologies Ltd. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] i2c-cpm: Pass dev ptr to dma_*_coherent rather than NULL
On Apr 22, 2009, at 4:56 PM, Ben Dooks wrote: On Tue, Apr 21, 2009 at 10:11:51AM -0500, Kumar Gala wrote: On Apr 21, 2009, at 7:49 AM, Mark Ware wrote: Recent DMA changes result in a BUG() when NULL is passed to dma_alloc_coherent in place of a device. Signed-off-by: Mark Ware mw...@elphinstone.net --- This patch fixes the BUG() during boot that has appeared during the 2.6.30 window. It has been tested and appears correct on my 8280 based board. Sent to both linuxppc-dev and linux-i2c, since I'm not sure where it belongs. drivers/i2c/busses/i2c-cpm.c | 14 -- 1 files changed, 8 insertions(+), 6 deletions(-) Acked-by: Kumar Gala ga...@kernel.crashing.org Ben, I'm expecting you to pick this up unless you tell me otherwise. Yes. This go in yet? - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Next April 28: boot failure on PowerPC with SLQB
Nick Piggin wrote: Does this help? --- With the patch the machine boots past the failure point, but panics immediately with the following trace... Unable to handle kernel paging request for data at address 0x0010 Faulting instruction address: 0xc07d03ec Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=1024 DEBUG_PAGEALLOC NUMA pSeries Modules linked in: NIP: c07d03ec LR: c07b0bbc CTR: 00136f8c REGS: c0a23bd0 TRAP: 0300 Not tainted (2.6.30-rc3-next-20090429) MSR: 80009032 EE,ME,IR,DR CR: 2884 XER: 0010 DAR: 0010, DSISR: 4000 TASK = c0955fc0[0] 'swapper' THREAD: c0a2 CPU: 0 GPR00: 0001 c0a23e50 c0a17650 001f GPR04: 0077a4b9 8c9b2cc0 GPR08: 0010 c095b0f8 GPR12: 2882 c0af2400 c07f3200 c0705c32 GPR16: 014f3138 c07f3138 02f1fc90 GPR20: c07f3150 c0725d11 007bb8e4 02f1fc90 GPR24: 02f1fc90 c07f31f0 00d0 c0b73b10 GPR28: c07f0440 c095db00 c098d5f0 03c9 NIP [c07d03ec] .pidmap_init+0x28/0x88 LR [c07b0bbc] .start_kernel+0x458/0x51c Call Trace: [c0a23e50] [c0a23ee0] init_thread_union+0x3ee0/0x4000 (unreliable) [c0a23ee0] [c07b0bbc] .start_kernel+0x458/0x51c [c0a23f90] [c00083d8] .start_here_common+0x1c/0x44 Instruction dump: ebc1fff0 4e800020 fbc1fff0 ebc2b1a8 39200010 7c0802a6 fba1ffe8 f8010010 3801 ebbe8008 f821ff71 f93d0010 7d6048a8 7d6b0378 7d6049ad 40c2fff4 ---[ end trace 31fd0ba7d8756001 ]--- Kernel panic - not syncing: Attempted to kill the idle task! Call Trace: [c0a23820] [c0011700] .show_stack+0x6c/0x16c (unreliable) [c0a238d0] [c0561f1c] .panic+0x80/0x1a8 [c0a23960] [c008dfa4] .do_exit+0x98/0x73c [c0a23a40] [c00293f4] .die+0x280/0x284 [c0a23ae0] [c0032700] .bad_page_fault+0xb8/0xd4 [c0a23b60] [c0005798] handle_page_fault+0x3c/0x5c --- Exception: 300 at .pidmap_init+0x28/0x88 LR = .start_kernel+0x458/0x51c [c0a23e50] [c0a23ee0] init_thread_union+0x3ee0/0x4000 (unreliable) [c0a23ee0] [c07b0bbc] .start_kernel+0x458/0x51c [c0a23f90] [c00083d8] .start_here_common+0x1c/0x44 Rebooting in 180 seconds.. The page size is 64K. Config DEBUG_PAGEALLOC is enabled. Let me know if i can provide any more information. Thanks -Sachin -- - Sachin Sant IBM Linux Technology Center India Systems and Technology Labs Bangalore, India - ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 5/6] net/ucc_geth: Assign six threads to Rx for UEC
when there are 46 snums defined in device tree. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- drivers/net/ucc_geth.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 3e003fe..1f6529f 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c @@ -3709,7 +3709,10 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma ug_info-uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; ug_info-uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; ug_info-numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; - ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; + if (qe_get_num_of_snums() == 46) + ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_6; + else + ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; } if (netif_msg_probe(debug)) -- 1.6.0.2 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH 4/6] powerpc/qe: update QE Serial Number
The latest QE chip may have more Serial Number(SNUM)s of thread to use. We will
get the number of SNUMs from device tree by reading the new property num-snums
, and set 28 as the default number of SNUMs so that it is compatible with the
old QE chips' device trees which don't have this new property.
The macro QE_NUM_OF_SNUM is defined as the maximum number in QE snum table which
is 256.
Also we update the snum_init[] array with 18 more new SNUMs which are
confirmed to be useful on new chip.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
.../powerpc/dts-bindings/fsl/cpm_qe/qe.txt |1 +
arch/powerpc/include/asm/qe.h |3 +-
arch/powerpc/sysdev/qe_lib/qe.c| 47 ++--
3 files changed, 46 insertions(+), 5 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
index b6ea613..9f7df90 100644
--- a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
@@ -22,6 +22,7 @@ Recommended properties
- brg-frequency : the internal clock source frequency for baud-rate
generators in Hz.
- num-riscs: define how many RISC engines the QE has.
+- num-snums: define how many serial number(SNUM) the QE can use for the
threads.
Example:
q...@e010 {
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 60314ef..e0faf33 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -22,7 +22,7 @@
#include asm/cpm.h
#include asm/immap_qe.h
-#define QE_NUM_OF_SNUM 28
+#define QE_NUM_OF_SNUM 256 /* There are 256 serial number in QE */
#define QE_NUM_OF_BRGS 16
#define QE_NUM_OF_PORTS1024
@@ -153,6 +153,7 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate,
unsigned int multiplier);
int qe_get_snum(void);
void qe_put_snum(u8 snum);
unsigned int qe_get_num_of_risc(void);
+unsigned int qe_get_num_of_snums(void);
/* we actually use cpm_muram implementation, define this for convenience */
#define qe_muram_init cpm_muram_init
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 31a3bb1..69116d9 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -61,6 +61,7 @@ struct qe_immap __iomem *qe_immr;
EXPORT_SYMBOL(qe_immr);
static struct qe_snum snums[QE_NUM_OF_SNUM]; /* Dynamically allocated SNUMs
*/
+static unsigned int qe_num_of_snum;
static phys_addr_t qebase = -1;
@@ -264,10 +265,14 @@ static void qe_snums_init(void)
0x04, 0x05, 0x0C, 0x0D, 0x14, 0x15, 0x1C, 0x1D,
0x24, 0x25, 0x2C, 0x2D, 0x34, 0x35, 0x88, 0x89,
0x98, 0x99, 0xA8, 0xA9, 0xB8, 0xB9, 0xC8, 0xC9,
- 0xD8, 0xD9, 0xE8, 0xE9,
+ 0xD8, 0xD9, 0xE8, 0xE9, 0x08, 0x09, 0x18, 0x19,
+ 0x28, 0x29, 0x38, 0x39, 0x48, 0x49, 0x58, 0x59,
+ 0x68, 0x69, 0x78, 0x79, 0x80, 0x81,
};
- for (i = 0; i QE_NUM_OF_SNUM; i++) {
+ qe_num_of_snum = qe_get_num_of_snums();
+
+ for (i = 0; i qe_num_of_snum; i++) {
snums[i].num = snum_init[i];
snums[i].state = QE_SNUM_STATE_FREE;
}
@@ -280,7 +285,7 @@ int qe_get_snum(void)
int i;
spin_lock_irqsave(qe_lock, flags);
- for (i = 0; i QE_NUM_OF_SNUM; i++) {
+ for (i = 0; i qe_num_of_snum; i++) {
if (snums[i].state == QE_SNUM_STATE_FREE) {
snums[i].state = QE_SNUM_STATE_USED;
snum = snums[i].num;
@@ -297,7 +302,7 @@ void qe_put_snum(u8 snum)
{
int i;
- for (i = 0; i QE_NUM_OF_SNUM; i++) {
+ for (i = 0; i qe_num_of_snum; i++) {
if (snums[i].num == snum) {
snums[i].state = QE_SNUM_STATE_FREE;
break;
@@ -603,3 +608,37 @@ unsigned int qe_get_num_of_risc(void)
}
EXPORT_SYMBOL(qe_get_num_of_risc);
+unsigned int qe_get_num_of_snums(void)
+{
+ struct device_node *qe;
+ int size;
+ unsigned int num_of_snums;
+ const u32 *prop;
+
+ num_of_snums = 28; /* The default number of snum for threads is 28 */
+ qe = of_find_compatible_node(NULL, NULL, fsl,qe);
+ if (!qe) {
+ /* Older devices trees did not have an fsl,qe
+* compatible property, so we need to look for
+* the QE node by name.
+*/
+ qe = of_find_node_by_type(NULL, qe);
+ if (!qe)
+ return num_of_snums;
+ }
+
+ prop = of_get_property(qe, num-snums, size);
+ if (prop size == sizeof(*prop)) {
+ num_of_snums = *prop;
+ if ((num_of_snums 28) || (num_of_snums QE_NUM_OF_SNUM)) {
+ /* No QE ever has fewer than 28 SNUMs */
+ pr_err(QE: number of snum
[PATCH 1/6] powerpc/85xx: clean up for mpc8568_mds name
Keep an unique machine def for the MPC8568 MDS board to handle some
subtle differences between the future MDS board. Also set the bcsrs in
setup_arch() only for mpc8568_mds because other mds has different bcsr settings.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 29 +++--
1 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 7dd0290..d34d29a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -206,23 +206,24 @@ static void __init mpc85xx_mds_setup_arch(void)
}
if (bcsr_regs) {
+ if (machine_is(mpc8568_mds)) {
#define BCSR_UCC1_GETH_EN (0x1 7)
#define BCSR_UCC2_GETH_EN (0x1 7)
#define BCSR_UCC1_MODE_MSK (0x3 4)
#define BCSR_UCC2_MODE_MSK (0x3 0)
- /* Turn off UCC1 UCC2 */
- clrbits8(bcsr_regs[8], BCSR_UCC1_GETH_EN);
- clrbits8(bcsr_regs[9], BCSR_UCC2_GETH_EN);
+ /* Turn off UCC1 UCC2 */
+ clrbits8(bcsr_regs[8], BCSR_UCC1_GETH_EN);
+ clrbits8(bcsr_regs[9], BCSR_UCC2_GETH_EN);
- /* Mode is RGMII, all bits clear */
- clrbits8(bcsr_regs[11], BCSR_UCC1_MODE_MSK |
-BCSR_UCC2_MODE_MSK);
-
- /* Turn UCC1 UCC2 on */
- setbits8(bcsr_regs[8], BCSR_UCC1_GETH_EN);
- setbits8(bcsr_regs[9], BCSR_UCC2_GETH_EN);
+ /* Mode is RGMII, all bits clear */
+ clrbits8(bcsr_regs[11], BCSR_UCC1_MODE_MSK |
+BCSR_UCC2_MODE_MSK);
+ /* Turn UCC1 UCC2 on */
+ setbits8(bcsr_regs[8], BCSR_UCC1_GETH_EN);
+ setbits8(bcsr_regs[9], BCSR_UCC2_GETH_EN);
+ }
iounmap(bcsr_regs);
}
#endif /* CONFIG_QUICC_ENGINE */
@@ -257,7 +258,7 @@ static int __init board_fixups(void)
return 0;
}
-machine_arch_initcall(mpc85xx_mds, board_fixups);
+machine_arch_initcall(mpc8568_mds, board_fixups);
static struct of_device_id mpc85xx_ids[] = {
{ .type = soc, },
@@ -276,7 +277,7 @@ static int __init mpc85xx_publish_devices(void)
return 0;
}
-machine_device_initcall(mpc85xx_mds, mpc85xx_publish_devices);
+machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
static void __init mpc85xx_mds_pic_init(void)
{
@@ -321,8 +322,8 @@ static int __init mpc85xx_mds_probe(void)
return of_flat_dt_is_compatible(root, MPC85xxMDS);
}
-define_machine(mpc85xx_mds) {
- .name = MPC85xx MDS,
+define_machine(mpc8568_mds) {
+ .name = MPC8568 MDS,
.probe = mpc85xx_mds_probe,
.setup_arch = mpc85xx_mds_setup_arch,
.init_IRQ = mpc85xx_mds_pic_init,
--
1.6.0.2
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[PATCH 6/6] powerpc/85xx: Add MPC8569MDS board support
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
arch/powerpc/boot/dts/mpc8569mds.dts | 514 +
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 23 ++
2 files changed, 537 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc8569mds.dts
diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts
b/arch/powerpc/boot/dts/mpc8569mds.dts
new file mode 100644
index 000..3ddd8c3
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -0,0 +1,514 @@
+/*
+ * MPC8569E MDS Device Tree Source
+ *
+ * Copyright (C) 2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = MPC8569EMDS;
+ compatible = fsl,MPC8569EMDS;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ aliases {
+ serial0 = serial0;
+ serial1 = serial1;
+ ethernet0 = enet0;
+ ethernet1 = enet1;
+ ethernet2 = enet2;
+ ethernet3 = enet3;
+ pci1 = pci1;
+ };
+
+ cpus {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ PowerPC,8...@0 {
+ device_type = cpu;
+ reg = 0x0;
+ d-cache-line-size = 32; // 32 bytes
+ i-cache-line-size = 32; // 32 bytes
+ d-cache-size = 0x8000;// L1, 32K
+ i-cache-size = 0x8000;// L1, 32K
+ timebase-frequency = 0;
+ bus-frequency = 0;
+ clock-frequency = 0;
+ next-level-cache = L2;
+ };
+ };
+
+ memory {
+ device_type = memory;
+ };
+
+ local...@e0005000 {
+ #address-cells = 2;
+ #size-cells = 1;
+ compatible = fsl,mpc8569-elbc, fsl,elbc, simple-bus;
+ reg = 0 0xe0005000 0 0x1000;
+ interrupt = 19 2;
+ interrupt-parent = mpic;
+
+ ranges = 0x0 0x0 0xfe00 0x0200
+ 0x1 0x0 0xf800 0x8000
+ 0x2 0x0 0xf000 0x0400
+ 0x4 0x0 0xf8008000 0x8000
+ 0x5 0x0 0xf801 0x8000;
+
+ n...@0,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = cfi-flash;
+ reg = 0x0 0x0 0x0200;
+ bank-width = 2;
+ device-width = 1;
+ };
+
+ b...@1,0 {
+ compatible = fsl,mpc8569mds-bcsr;
+ reg = 1 0 0x8000;
+ };
+
+ p...@4,0 {
+ compatible = fsl,mpc8569mds-pib;
+ reg = 4 0 0x8000;
+ };
+
+ p...@5,0 {
+ compatible = fsl,mpc8569mds-pib;
+ reg = 5 0 0x8000;
+ };
+ };
+
+ s...@e000 {
+ #address-cells = 1;
+ #size-cells = 1;
+ device_type = soc;
+ compatible = fsl,mpc8569-immr, simple-bus;
+ ranges = 0x0 0xe000 0x10;
+ reg = 0xe000 0x1000;
+ bus-frequency = 0;
+
+ ecm-...@0 {
+ compatible = fsl,ecm-law;
+ reg = 0x0 0x1000;
+ fsl,num-laws = 10;
+ };
+
+ e...@1000 {
+ compatible = fsl,mpc8569-ecm, fsl,ecm;
+ reg = 0x1000 0x1000;
+ interrupts = 17 2;
+ interrupt-parent = mpic;
+ };
+
+ memory-control...@2000 {
+ compatible = fsl,mpc8569-memory-controller;
+ reg = 0x2000 0x1000;
+ interrupt-parent = mpic;
+ interrupts = 18 2;
+ };
+
+ i...@3000 {
+ #address-cells = 1;
+ #size-cells = 0;
+ cell-index = 0;
+ compatible = fsl-i2c;
+ reg = 0x3000 0x100;
+ interrupts = 43 2;
+ interrupt-parent = mpic;
+ dfsrr;
+
+ r...@68 {
+ compatible = dallas,ds1374;
+ reg = 0x68;
+ };
+ };
+
+ i...@3100 {
+
[PATCH 2/6] powerpc/qe: update risc allocation for QE
Change the RISC allocation to macros instead of enum, add function to read the
number of risc engines from the new property num-riscs under qe node in dts.
Add new property num-riscs description in qe.txt
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
.../powerpc/dts-bindings/fsl/cpm_qe/qe.txt |1 +
arch/powerpc/include/asm/qe.h | 18
arch/powerpc/sysdev/qe_lib/qe.c| 28
3 files changed, 41 insertions(+), 6 deletions(-)
diff --git a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
index 78790d5..b6ea613 100644
--- a/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
+++ b/Documentation/powerpc/dts-bindings/fsl/cpm_qe/qe.txt
@@ -21,6 +21,7 @@ Required properties:
Recommended properties
- brg-frequency : the internal clock source frequency for baud-rate
generators in Hz.
+- num-riscs: define how many RISC engines the QE has.
Example:
q...@e010 {
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 2701753..60314ef 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -152,6 +152,8 @@ unsigned int qe_get_brg_clk(void);
int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
int qe_get_snum(void);
void qe_put_snum(u8 snum);
+unsigned int qe_get_num_of_risc(void);
+
/* we actually use cpm_muram implementation, define this for convenience */
#define qe_muram_init cpm_muram_init
#define qe_muram_alloc cpm_muram_alloc
@@ -231,12 +233,16 @@ struct qe_bd {
#define QE_ALIGNMENT_OF_PRAM 64
/* RISC allocation */
-enum qe_risc_allocation {
- QE_RISC_ALLOCATION_RISC1 = 1, /* RISC 1 */
- QE_RISC_ALLOCATION_RISC2 = 2, /* RISC 2 */
- QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* Dynamically choose
- RISC 1 or RISC 2 */
-};
+#define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */
+#define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */
+#define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */
+#define QE_RISC_ALLOCATION_RISC4 0x8 /* RISC 4 */
+#define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \
+QE_RISC_ALLOCATION_RISC2)
+#define QE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \
+QE_RISC_ALLOCATION_RISC2 | \
+QE_RISC_ALLOCATION_RISC3 | \
+QE_RISC_ALLOCATION_RISC4)
/* QE extended filtering Table Lookup Key Size */
enum qe_fltr_tbl_lookup_key_size {
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 01bce37..31a3bb1 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -575,3 +575,31 @@ struct qe_firmware_info *qe_get_firmware_info(void)
}
EXPORT_SYMBOL(qe_get_firmware_info);
+unsigned int qe_get_num_of_risc(void)
+{
+ struct device_node *qe;
+ int size;
+ unsigned int num_of_risc = 0;
+ const u32 *prop;
+
+ qe = of_find_compatible_node(NULL, NULL, fsl,qe);
+ if (!qe) {
+ /* Older devices trees did not have an fsl,qe
+* compatible property, so we need to look for
+* the QE node by name.
+*/
+ qe = of_find_node_by_type(NULL, qe);
+ if (!qe)
+ return num_of_risc;
+ }
+
+ prop = of_get_property(qe, num-riscs, size);
+ if (prop size == sizeof(*prop))
+ num_of_risc = *prop;
+
+ of_node_put(qe);
+
+ return num_of_risc;
+}
+EXPORT_SYMBOL(qe_get_num_of_risc);
+
--
1.6.0.2
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[PATCH 3/6] net/ucc_geth: update riscTx and riscRx in ucc_geth
Change the definition of riscTx and riscRx to unsigned integer instead of enum,
and change their values to support 4 risc allocation if the qe has 4 RISC
engines.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/net/ucc_geth.c | 14 +++---
drivers/net/ucc_geth.h |4 ++--
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index d3f39e8..3e003fe 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -270,7 +270,7 @@ static int fill_init_enet_entries(struct ucc_geth_private
*ugeth,
u8 num_entries,
u32 thread_size,
u32 thread_alignment,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -307,7 +307,7 @@ static int fill_init_enet_entries(struct ucc_geth_private
*ugeth,
static int return_init_enet_entries(struct ucc_geth_private *ugeth,
u32 *p_start,
u8 num_entries,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -342,7 +342,7 @@ static int dump_init_enet_entries(struct ucc_geth_private
*ugeth,
u32 __iomem *p_start,
u8 num_entries,
u32 thread_size,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -2134,6 +2134,14 @@ static int ucc_struct_init(struct ucc_geth_private
*ugeth)
return -ENOMEM;
}
+ /* read the number of risc engines, update the riscTx and riscRx
+* if there are 4 riscs in QE
+*/
+ if (qe_get_num_of_risc() == 4) {
+ ug_info-riscTx = QE_RISC_ALLOCATION_FOUR_RISCS;
+ ug_info-riscRx = QE_RISC_ALLOCATION_FOUR_RISCS;
+ }
+
ugeth-ug_regs = ioremap(uf_info-regs, sizeof(*ugeth-ug_regs));
if (!ugeth-ug_regs) {
if (netif_msg_probe(ugeth))
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 2f8ee7c..46bb1d2 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1120,8 +1120,8 @@ struct ucc_geth_info {
enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc;
enum ucc_geth_num_of_threads numThreadsTx;
enum ucc_geth_num_of_threads numThreadsRx;
- enum qe_risc_allocation riscTx;
- enum qe_risc_allocation riscRx;
+ unsigned int riscTx;
+ unsigned int riscRx;
};
/* structure representing UCC GETH */
--
1.6.0.2
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Re: [PATCH 1/6] powerpc: Move #ifdef'ed body of do_IRQ() into a separate function
On Wed, 2009-04-29 at 07:48 -0500, Kumar Gala wrote: I think Ben, Paul and I had discussed just universally enabling it. Can't remember why Ben hadn't done that yet. Slipped between the cracks. Patch welcome. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/6] net/ucc_geth: update riscTx and riscRx in ucc_geth
On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote:
Change the definition of riscTx and riscRx to unsigned integer
instead of enum,
and change their values to support 4 risc allocation if the qe has 4
RISC
engines.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
Dave, if you can ack this it is probably easier if this goes via the
powerpc tree as it had some dependancies.
- k
drivers/net/ucc_geth.c | 14 +++---
drivers/net/ucc_geth.h |4 ++--
2 files changed, 13 insertions(+), 5 deletions(-)
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index d3f39e8..3e003fe 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -270,7 +270,7 @@ static int fill_init_enet_entries(struct
ucc_geth_private *ugeth,
u8 num_entries,
u32 thread_size,
u32 thread_alignment,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -307,7 +307,7 @@ static int fill_init_enet_entries(struct
ucc_geth_private *ugeth,
static int return_init_enet_entries(struct ucc_geth_private *ugeth,
u32 *p_start,
u8 num_entries,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -342,7 +342,7 @@ static int dump_init_enet_entries(struct
ucc_geth_private *ugeth,
u32 __iomem *p_start,
u8 num_entries,
u32 thread_size,
- enum qe_risc_allocation risc,
+ unsigned int risc,
int skip_page_for_first_entry)
{
u32 init_enet_offset;
@@ -2134,6 +2134,14 @@ static int ucc_struct_init(struct
ucc_geth_private *ugeth)
return -ENOMEM;
}
+ /* read the number of risc engines, update the riscTx and riscRx
+* if there are 4 riscs in QE
+*/
+ if (qe_get_num_of_risc() == 4) {
+ ug_info-riscTx = QE_RISC_ALLOCATION_FOUR_RISCS;
+ ug_info-riscRx = QE_RISC_ALLOCATION_FOUR_RISCS;
+ }
+
ugeth-ug_regs = ioremap(uf_info-regs, sizeof(*ugeth-ug_regs));
if (!ugeth-ug_regs) {
if (netif_msg_probe(ugeth))
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 2f8ee7c..46bb1d2 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1120,8 +1120,8 @@ struct ucc_geth_info {
enum ucc_geth_maccfg2_pad_and_crc_mode padAndCrc;
enum ucc_geth_num_of_threads numThreadsTx;
enum ucc_geth_num_of_threads numThreadsRx;
- enum qe_risc_allocation riscTx;
- enum qe_risc_allocation riscRx;
+ unsigned int riscTx;
+ unsigned int riscRx;
};
/* structure representing UCC GETH */
--
1.6.0.2
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Re: [PATCH 5/6] net/ucc_geth: Assign six threads to Rx for UEC
On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote: when there are 46 snums defined in device tree. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- drivers/net/ucc_geth.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) Can you be a bit more explicit in the commit message about the detection of 46 snums. How is it that 46 snums equates to 6 threads? - k diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 3e003fe..1f6529f 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c @@ -3709,7 +3709,10 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma ug_info-uf_info.utfet = UCC_GETH_UTFET_GIGA_INIT; ug_info-uf_info.utftt = UCC_GETH_UTFTT_GIGA_INIT; ug_info-numThreadsTx = UCC_GETH_NUM_OF_THREADS_4; - ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; + if (qe_get_num_of_snums() == 46) + ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_6; + else + ug_info-numThreadsRx = UCC_GETH_NUM_OF_THREADS_4; } if (netif_msg_probe(debug)) -- 1.6.0.2 ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] powerpc adjust oprofile_cpu_type version 3 resend
Oprofile is changing the naming it is using for the compatibility modes.
Instead of having compat-powerx, oprofile will go to family naming
convention and use ibm-compat-vx. Currently only ibm-compat-v1 will
be defined.
The notion of compatibility events just started with POWER6. So there is
no way that any other tool could exist that is using these
oprofile_cpu_type strings we want to change.
Signed-off-by: Mike Wolf m...@linux.vnet.ibm.com
--- mainline.orig/arch/powerpc/kernel/cputable.c2009-04-16
09:47:49.0 -0500
+++ mainline/arch/powerpc/kernel/cputable.c 2009-04-27 10:28:03.0
-0500
@@ -382,7 +382,8 @@
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
- .oprofile_cpu_type = ppc64/compat-power5+,
+ .oprofile_cpu_type = ppc64/ibm-compat-v1,
+ .oprofile_type = PPC_OPROFILE_POWER4,
.platform = power5+,
},
{ /* Power6 */
@@ -416,7 +417,8 @@
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
- .oprofile_cpu_type = ppc64/compat-power6,
+ .oprofile_cpu_type = ppc64/ibm-compat-v1,
+ .oprofile_type = PPC_OPROFILE_POWER4,
.platform = power6,
},
{ /* 2.06-compliant processor, i.e. Power7 architected mode */
@@ -429,7 +431,8 @@
.icache_bsize = 128,
.dcache_bsize = 128,
.machine_check = machine_check_generic,
- .oprofile_cpu_type = ppc64/compat-power7,
+ .oprofile_type = PPC_OPROFILE_POWER4,
+ .oprofile_cpu_type = ppc64/ibm-compat-v1,
.platform = power7,
},
{ /* Power7 */
@@ -1833,8 +1836,10 @@
* and, in that case, keep the current value for
* oprofile_cpu_type.
*/
- if (old.oprofile_cpu_type == NULL)
+ if (old.oprofile_cpu_type == NULL) {
t-oprofile_cpu_type = s-oprofile_cpu_type;
+ t-oprofile_type = s-oprofile_type;
+ }
}
*PTRRELOC(cur_cpu_spec) = the_cpu_spec;
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[RFC][PATCH] powerpc/pci: Pull ppc32 code we need in ppc64
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
Ben,
My question is if we think fake_pci_bus will always get a valid hose().
The users of EARLY_PCI_OP are fsl/8xxx, 4xx, and pmac. I verified that
fsl/8xxx 4xx pass a valid hose. Do we think pmac does?
- k
arch/powerpc/include/asm/machdep.h|6 +-
arch/powerpc/include/asm/pci-bridge.h | 35 +++-
arch/powerpc/kernel/pci-common.c | 70
arch/powerpc/kernel/pci_32.c | 71 -
4 files changed, 89 insertions(+), 93 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h
b/arch/powerpc/include/asm/machdep.h
index 0efdb1d..1b389ff 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -205,14 +205,14 @@ struct machdep_calls {
/*
* optional PCI hooks
*/
- /* Called in indirect_* to avoid touching devices */
- int (*pci_exclude_device)(struct pci_controller *, unsigned char,
unsigned char);
-
/* Called at then very end of pcibios_init() */
void (*pcibios_after_init)(void);
#endif /* CONFIG_PPC32 */
+ /* Called in indirect_* to avoid touching devices */
+ int (*pci_exclude_device)(struct pci_controller *, unsigned char,
unsigned char);
+
/* Called after PPC generic resource fixup to perform
machine specific fixups */
void (*pcibios_fixup_resources)(struct pci_dev *);
diff --git a/arch/powerpc/include/asm/pci-bridge.h
b/arch/powerpc/include/asm/pci-bridge.h
index 48f58aa..8b371df 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -77,9 +77,7 @@ struct pci_controller {
int first_busno;
int last_busno;
-#ifndef CONFIG_PPC64
int self_busno;
-#endif
void __iomem *io_base_virt;
#ifdef CONFIG_PPC64
@@ -104,7 +102,6 @@ struct pci_controller {
unsigned int __iomem *cfg_addr;
void __iomem *cfg_data;
-#ifndef CONFIG_PPC64
/*
* Used for variants of PCI indirect handling and possible quirks:
* SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
@@ -128,7 +125,6 @@ struct pci_controller {
#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x0010
#define PPC_INDIRECT_TYPE_BROKEN_MRM 0x0020
u32 indirect_type;
-#endif /* !CONFIG_PPC64 */
/* Currently, we limit ourselves to 1 IO range and 3 mem
* ranges since the common pci_bus structure can't handle more
*/
@@ -146,21 +142,6 @@ struct pci_controller {
#endif /* CONFIG_PPC64 */
};
-#ifndef CONFIG_PPC64
-
-static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
-{
- return bus-sysdata;
-}
-
-static inline int isa_vaddr_is_ioport(void __iomem *address)
-{
- /* No specific ISA handling on ppc32 at this stage, it
-* all goes through PCI
-*/
- return 0;
-}
-
/* These are used for config access before all the PCI probing
has been done. */
extern int early_read_config_byte(struct pci_controller *hose, int bus,
@@ -182,6 +163,22 @@ extern int early_find_capability(struct pci_controller
*hose, int bus,
extern void setup_indirect_pci(struct pci_controller* hose,
resource_size_t cfg_addr,
resource_size_t cfg_data, u32 flags);
+
+#ifndef CONFIG_PPC64
+
+static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
+{
+ return bus-sysdata;
+}
+
+static inline int isa_vaddr_is_ioport(void __iomem *address)
+{
+ /* No specific ISA handling on ppc32 at this stage, it
+* all goes through PCI
+*/
+ return 0;
+}
+
#else /* CONFIG_PPC64 */
/*
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 9c69e7e..cae4ee1 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1620,3 +1620,73 @@ void __devinit pcibios_setup_phb_resources(struct
pci_controller *hose)
}
+/*
+ * Null PCI config access functions, for the case when we can't
+ * find a hose.
+ */
+#define NULL_PCI_OP(rw, size, type)\
+static int \
+null_##rw##_config_##size(struct pci_dev *dev, int offset, type val) \
+{ \
+ return PCIBIOS_DEVICE_NOT_FOUND;\
+}
+
+static int
+null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+int len, u32 *val)
+{
+ return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static int
+null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+ int len, u32 val)
+{
+ return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static struct pci_ops null_pci_ops =
+{
+ .read = null_read_config,
+ .write = null_write_config,
+};
+
[PATCH 2/2] Added AMCC 460EX Canyonlands SATA support.
Signed-off-by: Feng Kan f...@amcc.com
---
arch/powerpc/boot/dts/canyonlands.dts |8 ++
arch/powerpc/platforms/44x/Makefile|4 +
arch/powerpc/platforms/44x/amcc-sata.c | 125
3 files changed, 137 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/amcc-sata.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index 5fd1ad0..b536223 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -163,6 +163,14 @@
interrupts = 0x1e 4;
};
+SATA0: s...@bffd1000 {
+compatible = amcc,sata-460ex;
+ reg = 4 0xbffd1000 0x800 4 0xbffd0800 0x400;
+interrupt-parent = UIC3;
+interrupts = 0 4 /* SATA */
+ 5 4; /* AHBDMA */
+};
+
POB0: opb {
compatible = ibm,opb-460ex, ibm,opb;
#address-cells = 1;
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 01f51da..fa0a999 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -4,3 +4,7 @@ obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_SAM440EP) += sam440ep.o
obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
+ifeq ($(CONFIG_SATA_DWC),y)
+obj-$(CONFIG_CANYONLANDS) += amcc-sata.o
+endif
+
diff --git a/arch/powerpc/platforms/44x/amcc-sata.c
b/arch/powerpc/platforms/44x/amcc-sata.c
new file mode 100644
index 000..fdda917
--- /dev/null
+++ b/arch/powerpc/platforms/44x/amcc-sata.c
@@ -0,0 +1,125 @@
+/*
+ * AMCC Canyonlands SATA wrapper
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese s...@denx.de
+ *
+ * Extract the resources (MEM IRQ) from the dts file and put them
+ * into the platform-device struct for usage in the platform-device
+ * SATA driver.
+ *
+ */
+
+#include linux/platform_device.h
+#include linux/of_platform.h
+
+/*
+ * Resource template will be filled dynamically with the values
+ * extracted from the dts file
+ */
+static struct resource sata_resources[] = {
+ [0] = {
+ /* 460EX SATA registers */
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ /* 460EX AHBDMA registers */
+ .flags = IORESOURCE_MEM,
+ },
+ [2] = {
+ /* 460EX SATA IRQ */
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ /* 460EX AHBDMA IRQ */
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 dma_mask = 0xULL;
+
+static struct platform_device sata_device = {
+ .name = sata-dwc,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(sata_resources),
+ .resource = sata_resources,
+ .dev = {
+ .dma_mask = dma_mask,
+ .coherent_dma_mask = 0xULL,
+ }
+};
+
+static struct platform_device *ppc460ex_devs[] __initdata = {
+ sata_device,
+};
+
+static int __devinit ppc460ex_sata_probe(struct of_device *ofdev,
+const struct of_device_id *match)
+{
+ struct device_node *np = ofdev-node;
+ struct resource res;
+ const char *val;
+
+ /*
+* Check if device is enabled
+*/
+ val = of_get_property(np, status, NULL);
+ if (val !strcmp(val, disabled)) {
+ printk(KERN_INFO SATA port disabled via device-tree\n);
+ return 0;
+ }
+
+ /*
+* Extract register address reange from device tree and put it into
+* the platform device structure
+*/
+ if (of_address_to_resource(np, 0, res)) {
+ printk(KERN_ERR %s: Can't get SATA register address\n,
+ __func__);
+ return -ENOMEM;
+ }
+ sata_resources[0].start = res.start;
+ sata_resources[0].end = res.end;
+
+ if (of_address_to_resource(np, 1, res)) {
+ printk(KERN_ERR %s: Can't get AHBDMA register address\n,
+ __func__);
+ return -ENOMEM;
+ }
+ sata_resources[1].start = res.start;
+ sata_resources[1].end = res.end;
+
+ /*
+* Extract IRQ number(s) from device tree and put them into
+* the platform device structure
+*/
+ sata_resources[2].start = sata_resources[2].end =
+ irq_of_parse_and_map(np, 0);
+ sata_resources[3].start = sata_resources[3].end =
+ irq_of_parse_and_map(np, 1);
+
+ return platform_add_devices(ppc460ex_devs, ARRAY_SIZE(ppc460ex_devs));
+}
+
+static int __devexit ppc460ex_sata_remove(struct of_device *ofdev)
+{
+ /* Nothing to do here */
+ return 0;
+}
+
+static const struct of_device_id
Re: [PATCH 1/2] Add support for Designware SATA controller driver
On Apr 29, 2009, at 4:42 PM, Feng Kan wrote: Signed-off-by: Feng Kan f...@amcc.com --- drivers/ata/Kconfig| 76 +- drivers/ata/Makefile |1 + drivers/ata/sata_dwc.c | 2047 +++ + 3 files changed, 2091 insertions(+), 33 deletions(-) create mode 100644 drivers/ata/sata_dwc.c you should copy Jeff linux-...@vger.kernel.org on SATA drivers. - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 3/6] net/ucc_geth: update riscTx and riscRx in ucc_geth
From: Kumar Gala ga...@kernel.crashing.org Date: Wed, 29 Apr 2009 15:23:21 -0500 On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote: Change the definition of riscTx and riscRx to unsigned integer instead of enum, and change their values to support 4 risc allocation if the qe has 4 RISC engines. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- Dave, if you can ack this it is probably easier if this goes via the powerpc tree as it had some dependancies. Fair enough: Acked-by: David S. Miller da...@davemloft.net ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH v6] introduce macro spin_event_timeout()
On Mon, Apr 27, 2009 at 2:05 PM, Timur Tabi ti...@freescale.com wrote: The macro spin_event_timeout() takes a condition and timeout value (in microseconds) as parameters. It spins until either the condition is true or the timeout expires. It returns the result of the condition when the loop was terminated. This primary purpose of this macro is to poll on a hardware register until a status bit changes. The timeout ensures that the loop still terminates if the bit doesn't change as expected. This macro makes it easier for driver developers to perform this kind of operation properly. Any comments on this patch? I'd like to see this macro added to 2.6.31. -- Timur Tabi Linux kernel developer at Freescale ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 1/2] Add support for Designware SATA controller driver
Dear Feng Kan,
In message 1241042419-19774-1-git-send-email-f...@amcc.com you wrote:
Signed-off-by: Feng Kan f...@amcc.com
---
drivers/ata/Kconfig| 76 +-
drivers/ata/Makefile |1 +
drivers/ata/sata_dwc.c | 2047
3 files changed, 2091 insertions(+), 33 deletions(-)
create mode 100644 drivers/ata/sata_dwc.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 0bcf264..5321e47 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -72,56 +72,66 @@ config SATA_FSL
If unsure, say N.
-config ATA_SFF
- bool ATA SFF support
- default y
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
help
- This option adds support for ATA controllers with SFF
- compliant or similar programming interface.
+ This option enables support for the Synopsys DesignWare Cores SATA
+ controller.
+ It can be found on the AMCC 460EX.
- SFF is the legacy IDE interface that has been around since
- the dawn of time. Almost all PATA controllers have an
- SFF interface. Many SATA controllers have an SFF interface
- when configured into a legacy compatibility mode.
+ If unsure, say N.
- For users with exclusively modern controllers like AHCI,
- Silicon Image 3124, or Marvell 6440, you may choose to
- disable this uneeded SFF support.
+config ATA_SFF
+bool ATA SFF support
+default y
+help
+ This option adds support for ATA controllers with SFF
+ compliant or similar programming interface.
- If unsure, say Y.
+ SFF is the legacy IDE interface that has been around since
+ the dawn of time. Almost all PATA controllers have an
+ SFF interface. Many SATA controllers have an SFF interface
+ when configured into a legacy compatibility mode.
+
+ For users with exclusively modern controllers like AHCI,
+ Silicon Image 3124, or Marvell 6440, you may choose to
+ disable this uneeded SFF support.
+
+ If unsure, say Y.
Why are you reformatting exiting, correct help text, into brokenness?
...
+static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
+{
...
+ dev_dbg(ap-dev, %s non-NCQ cmd interrupt, protocol: %s\n,
+ __func__, prot_2_txt(qc-tf.protocol));
+DRVSTILLBUSY:
...
+PROCESS: /* process completed commands */
^^^
...
+STILLBUSY:
^
...
+DONE:
etc. Please do not use all-caps identifier names (not even for
labels).
...
+/***
+ * Function : sata_dwc_port_start
+ * arguments : struct ata_ioports *port
+ * Return value : returns 0 if success, error code otherwise
+ * This function allocates the scatter gather LLI table for AHB DMA
+
**/
Here and elsewhere: incorrect multiline comment style.
...
+
+MODULE_LICENSE(GPL);
+MODULE_AUTHOR(Mark Miesfeld mmiesf...@amcc.com);
Should not Mark add his Signed-off-by: line, too?
Best regards,
Wolfgang Denk
--
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
Conscious is when you are aware of something, and conscience is when
you wish you weren't.
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Re: [PATCH 1/2] Add support for Designware SATA controller driver
Feng,
Can you just insert my Signed off by line, using Mark Miesfeld
miesf...@gmail.com
I always goof up the formatting. If that is okay with you and meets
your ethical standards.
--
Mark Miesfeld
miesf...@gmail.com
On Wed, Apr 29, 2009 at 4:28 PM, Wolfgang Denk w...@denx.de wrote:
Dear Feng Kan,
In message 1241042419-19774-1-git-send-email-f...@amcc.com you wrote:
Signed-off-by: Feng Kan f...@amcc.com
---
drivers/ata/Kconfig | 76 +-
drivers/ata/Makefile | 1 +
drivers/ata/sata_dwc.c | 2047
3 files changed, 2091 insertions(+), 33 deletions(-)
create mode 100644 drivers/ata/sata_dwc.c
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 0bcf264..5321e47 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -72,56 +72,66 @@ config SATA_FSL
If unsure, say N.
-config ATA_SFF
- bool ATA SFF support
- default y
+config SATA_DWC
+ tristate DesignWare Cores SATA support
+ depends on 460EX
help
- This option adds support for ATA controllers with SFF
- compliant or similar programming interface.
+ This option enables support for the Synopsys DesignWare Cores SATA
+ controller.
+ It can be found on the AMCC 460EX.
- SFF is the legacy IDE interface that has been around since
- the dawn of time. Almost all PATA controllers have an
- SFF interface. Many SATA controllers have an SFF interface
- when configured into a legacy compatibility mode.
+ If unsure, say N.
- For users with exclusively modern controllers like AHCI,
- Silicon Image 3124, or Marvell 6440, you may choose to
- disable this uneeded SFF support.
+config ATA_SFF
+bool ATA SFF support
+default y
+help
+ This option adds support for ATA controllers with SFF
+ compliant or similar programming interface.
- If unsure, say Y.
+ SFF is the legacy IDE interface that has been around since
+ the dawn of time. Almost all PATA controllers have an
+ SFF interface. Many SATA controllers have an SFF interface
+ when configured into a legacy compatibility mode.
+
+ For users with exclusively modern controllers like AHCI,
+ Silicon Image 3124, or Marvell 6440, you may choose to
+ disable this uneeded SFF support.
+
+ If unsure, say Y.
Why are you reformatting exiting, correct help text, into brokenness?
...
+static irqreturn_t sata_dwc_isr(int irq, void *dev_instance)
+{
...
+ dev_dbg(ap-dev, %s non-NCQ cmd interrupt, protocol: %s\n,
+ __func__, prot_2_txt(qc-tf.protocol));
+DRVSTILLBUSY:
...
+PROCESS: /* process completed commands */
^^^
...
+STILLBUSY:
^
...
+DONE:
etc. Please do not use all-caps identifier names (not even for
labels).
...
+/***
+ * Function : sata_dwc_port_start
+ * arguments : struct ata_ioports *port
+ * Return value : returns 0 if success, error code otherwise
+ * This function allocates the scatter gather LLI table for AHB DMA
+
**/
Here and elsewhere: incorrect multiline comment style.
...
+
+MODULE_LICENSE(GPL);
+MODULE_AUTHOR(Mark Miesfeld mmiesf...@amcc.com);
Should not Mark add his Signed-off-by: line, too?
Best regards,
Wolfgang Denk
--
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Need a patch tested on a windtunnel powermac
Does anyone here still have a windtunnel powermac (PowerMac3,6) machine running Linux? We need someone to test Jean Delvare's patch to the therm_windtunnel driver. The patch is at: http://patchwork.ozlabs.org/patch/26095/ I don't have a windtunnel machine myself - I have a PowerMac3,5 but not a PowerMac3,6. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/2] powerpc: Move VSX load/stores into ppc-opcode.h
Index: linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h === --- linux-2.6-ozlabs.orig/arch/powerpc/include/asm/ppc-opcode.h +++ linux-2.6-ozlabs/arch/powerpc/include/asm/ppc-opcode.h @@ -49,6 +49,7 @@ /* macros to insert fields into opcodes */ #define __PPC_RA(a) (((a) 0x1f) 16) #define __PPC_RB(b) (((b) 0x1f) 11) +#define __PPC_XS(s)s) 0x1f) 21) | (((s) 0x20) 5)) #define __PPC_T_TLB(t) (((t) 0x3) 21) #define __PPC_WC(w) (((w) 0x3) 21) @@ -70,4 +71,12 @@ #define PPC_WAIT(w) stringify_in_c(.long PPC_INST_WAIT | \ __PPC_WC(w)) +/* + * Define what the VSX XX1 form instructions will look like, then add + * the 128 bit load store instructions based on that. + */ +#define VSX_XX1(s, a, b) (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b)) +#define STXVD2X(s, a, b) .long (0x7c000798 | VSX_XX1((s), (a), (b))) +#define LXVD2X(s, a, b).long (0x7c000698 | VSX_XX1((s), (a), ( b))) + previous gripe of matching style of file for the .long 0x7c000798 Sorry, yes. I also didn't sort the PPC_INST_* alphabetically for the tlbie patch. Mikey ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Need a patch tested on a windtunnel powermac
On Thu, Apr 30, 2009 at 09:30:59AM +1000, Paul Mackerras wrote: Does anyone here still have a windtunnel powermac (PowerMac3,6) machine running Linux? We need someone to test Jean Delvare's patch to the therm_windtunnel driver. The patch is at: http://patchwork.ozlabs.org/patch/26095/ I don't have a windtunnel machine myself - I have a PowerMac3,5 but not a PowerMac3,6. I might have one. I'll pull the G4 I have out of it's box and check tomorrow. josh ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
RE: USB does not work on mpc8347
Hi Leo USB work on mpc8347 now. Thank you for your help. The cause was Clock signal was not connected to USB. And I have the other problem. I need to java run time environment on mpc8347. I do not know where i can get it. Could you tell me if you know. I have no particular knowledge about installing JRE on Linux. Google leads me to this link which might be helpful: http://openjdk.java.net/ - Leo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [v2 PATCH 1/3] EDAC: Add CPC925 Memory Controller driver
On Mon, 2009-04-13 at 14:05 +0800, Harry Ciao wrote:
Introduce IBM CPC925 EDAC driver, which makes use of ECC, CPU and
HyperTransport Link error detections and corrections on the IBM
CPC925 Bridge and Memory Controller.
Ah, fun ! I'm pretty sure I wrote a driver for that chipset a while
ago ... looks like I forgot to merge it :-)
I'll review in more details asap
Thanks,
Ben.
Signed-off-by: Harry Ciao qingtao@windriver.com
---
drivers/edac/Kconfig |9 +
drivers/edac/Makefile |1 +
drivers/edac/cpc925_edac.c | 1020
3 files changed, 1030 insertions(+), 0 deletions(-)
create mode 100644 drivers/edac/cpc925_edac.c
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 13ccec6..1a320b4 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -188,4 +188,13 @@ config EDAC_AMD8131
Support for error detection and correction on the
AMD8131 HyperTransport PCI-X Tunnel chip.
+config EDAC_CPC925
+ tristate IBM CPC925 Memory Controller (PPC970FX)
+ depends on EDAC_MM_EDAC PPC64
+ help
+ Support for error detection and correction on the
+ IBM CPC925 Bridge and Memory Controller, which is
+ a companion chip to the PowerPC 970 family of
+ processors.
+
endif # EDAC
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 407601f..b4e0d86 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -36,4 +36,5 @@ obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
obj-$(CONFIG_EDAC_CELL) += cell_edac.o
obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o
obj-$(CONFIG_EDAC_AMD8131) += amd8131_edac.o
+obj-$(CONFIG_EDAC_CPC925)+= cpc925_edac.o
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c
new file mode 100644
index 000..7236847
--- /dev/null
+++ b/drivers/edac/cpc925_edac.c
@@ -0,0 +1,1020 @@
+/*
+ * cpc925_edac.c, EDAC driver for IBM CPC925 Bridge and Memory Controller.
+ *
+ * Copyright (c) 2008 Wind River Systems, Inc.
+ *
+ * Authors: Cao Qingtao qingtao@windriver.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include linux/module.h
+#include linux/init.h
+#include linux/io.h
+#include linux/edac.h
+#include linux/of.h
+#include linux/platform_device.h
+
+#include edac_core.h
+#include edac_module.h
+
+#define CPC925_EDAC_REVISION Ver: 1.0.0 __DATE__
+#define CPC925_EDAC_MOD_STR cpc925_edac
+
+#define cpc925_printk(level, fmt, arg...) \
+ edac_printk(level, CPC925, fmt, ##arg)
+
+#define cpc925_mc_printk(mci, level, fmt, arg...) \
+ edac_mc_chipset_printk(mci, level, CPC925, fmt, ##arg)
+
+/*
+ * CPC925 registers are of 32 bits with bit0 defined at the
+ * most significant bit and bit31 at that of least significant.
+ */
+#define CPC925_BITS_PER_REG 32
+#define CPC925_BIT(nr) (1UL (CPC925_BITS_PER_REG - 1 - nr))
+
+/*
+ * EDAC device names for the error detections of
+ * CPU Interface and Hypertransport Link.
+ */
+#define CPC925_CPU_ERR_DEV cpu
+#define CPC925_HT_LINK_DEV htlink
+
+/* Suppose DDR Refresh cycle is 15.6 microsecond */
+#define CPC925_REF_FREQ 0xFA69
+#define CPC925_SCRUB_BLOCK_SIZE 64 /* bytes */
+#define CPC925_NR_CSROWS 8
+
+/*
+ * All registers and bits definitions are taken from
+ * CPC925 Bridge and Memory Controller User Manual, SA14-2761-02.
+ */
+
+/*
+ * CPU and Memory Controller Registers
+ */
+/
+ * Processor Interface Exception Mask Register (APIMASK)
+ /
+#define REG_APIMASK_OFFSET 0x30070
+enum apimask_bits {
+ APIMASK_DART= CPC925_BIT(0), /* DART Exception */
+ APIMASK_ADI0= CPC925_BIT(1), /* Handshake Error on PI0_ADI */
+ APIMASK_ADI1= CPC925_BIT(2), /* Handshake Error on PI1_ADI */
+ APIMASK_STAT= CPC925_BIT(3), /* Status Exception */
+ APIMASK_DERR= CPC925_BIT(4), /* Data Error Exception */
+ APIMASK_ADRS0 = CPC925_BIT(5), /* Addressing Exception on PI0 */
+ APIMASK_ADRS1 = CPC925_BIT(6), /* Addressing Exception on PI1 */
+ /* BIT(7) Reserved */
+
Re: [MTD] ofpart: Partitions at same address cannot have the same name
On Wed, 2009-04-22 at 10:05 +0200, Ricardo Ribalda Delgado wrote:
Sometimes, an special partition is included in the device tree including all
the
partitions. Like in:
partit...@ff00 {
reg = 0x00 0x80 ;
label = Root File System;
};
partit...@ff80 {
reg = 0x80 0x1a ;
label = Bitstream;
};
...
partition...@ff00 {
reg = 0x00 0x100 ;
label = Full FLASH;
};
Because two nodes of a device tree cannot have the same name, but all the
partitions must be named partition, this special partition is invalid.
This patch makes ofpart.c only check for the firt part of the name, and
ignore the rest, allowing this special partition.
I fail to see the point of this special partition in the first
place...
Things would make more sense if you had a full flash device
whose child nodes are the partitions.
Ben.
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Re: Next April 28: boot failure on PowerPC with SLQB
Hi Nick, On Wed, 29 Apr 2009 21:56:19 +0530 Sachin Sant sach...@in.ibm.com wrote: Nick Piggin wrote: Does this help? --- With the patch the machine boots past the failure point, but panics immediately with the following trace... That patch also changes the behaviour of my machine. I now get: calling .init_trace_printk+0x0/0x34 @ 1 initcall .init_trace_printk+0x0/0x34 returned 0 after 0 usecs Unable to handle kernel paging request for data at address 0x0030 Faulting instruction address: 0xc008ae7c Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=128 NUMA pSeries Modules linked in: NIP: c008ae7c LR: c02b0cb8 CTR: REGS: c000d6357910 TRAP: 0300 Not tainted (2.6.30-rc3-autokern1) MSR: 80009032 EE,ME,IR,DR CR: 2884 XER: 000f DAR: 0030, DSISR: 4200 TASK = c000fe368000[1] 'swapper' THREAD: c000d6354000 CPU: 0 GPR00: c000d6357b90 c0b04410 0028 GPR04: c06d7bd0 c0b95400 c000fe368980 GPR08: 004c 0291 0002 c12bfd5c GPR12: 4888 c0b53280 0210 GPR16: c06c8f50 c06c76c8 003d8800 GPR20: 028c6bb0 c07c6bb0 028c6e20 c07c6e20 GPR24: c06c89b8 0028 0003 c0b95400 GPR28: c06d7bd0 0010 c0a68708 0010 NIP [c008ae7c] .lockdep_init_map+0x3c/0x57c LR [c02b0cb8] .__spin_lock_init+0x44/0x90 Call Trace: [c000d6357b90] [c0a68708] klist_remove_waiters+0xe210/0x2e2e0 (unreliable) [c000d6357c50] [c02b0cb8] .__spin_lock_init+0x44/0x90 [c000d6357d00] [c054552c] .timer_cpu_notify+0xec/0x2c4 [c000d6357db0] [c0540bc0] .notifier_call_chain+0x5c/0xcc [c000d6357e50] [c0544ee0] .cpu_up+0xe8/0x1c4 [c000d6357f00] [c078fb94] .kernel_init+0xf8/0x220 [c000d6357f90] [c00262b8] .kernel_thread+0x54/0x70 Instruction dump: fbc1fff0 fbe1fff8 fae1ffb8 fb01ffc0 f8010010 fb41ffd0 fb61ffd8 fb81ffe0 f821ff41 ebc2b160 3800 7c791b78 f8030008 7cbf2b78 7cdd3378 e93e8138 ---[ end trace 31fd0ba7d8756001 ]--- Kernel panic - not syncing: Attempted to kill init! Call Trace: [c000d6357570] [c000fd58] .show_stack+0x70/0x184 (unreliable) [c000d6357620] [c005ed34] .panic+0x80/0x1b4 [c000d63576c0] [c006337c] .do_exit+0x84/0x6f0 [c000d6357780] [c0024350] .die+0x24c/0x27c [c000d6357820] [c002c1f4] .bad_page_fault+0xb8/0xd4 [c000d63578a0] [c000534c] handle_page_fault+0x3c/0x5c --- Exception: 300 at .lockdep_init_map+0x3c/0x57c LR = .__spin_lock_init+0x44/0x90 [c000d6357b90] [c0a68708] klist_remove_waiters+0xe210/0x2e2e0 (unreliable) [c000d6357c50] [c02b0cb8] .__spin_lock_init+0x44/0x90 [c000d6357d00] [c054552c] .timer_cpu_notify+0xec/0x2c4 [c000d6357db0] [c0540bc0] .notifier_call_chain+0x5c/0xcc [c000d6357e50] [c0544ee0] .cpu_up+0xe8/0x1c4 [c000d6357f00] [c078fb94] .kernel_init+0xf8/0x220 [c000d6357f90] [c00262b8] .kernel_thread+0x54/0x70 -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ pgpZK240B9Gwe.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Powerpc Port linux-2.6.29
Hello all I have a custom board with MPC8560 and 1GB DDR SDRAM. I am trying to port linux - 2.6.29 on this board. The U-BOOT is already ported on the board and is working. The OS uImage is stored in code flash at address 0xe000 and OS is booted by U-BOOT While OS do boot but after some prints weired errors start showing up. Rootfile system is NFS based . I have checked the register values with Hardware person using Trace32 emulator and they are as expected. FLASH: 32.5 MB L2:256 KB enabled In:serial Out: serial Err: serial Net: TSEC1, TSEC2 Hit any key to stop autoboot: 0 WARNING: adjusting available memory to 3000 ## Booting kernel from Legacy Image at e000 ... Image Name: Linux-2.6.29 Image Type: PowerPC Linux Kernel Image (gzip compressed) Data Size:1451400 Bytes = 1.4 MB Load Address: 0040 Entry Point: 004005a8 Verifying Checksum ... OK Uncompressing Kernel Image ... OK Using MPC85xx ADS machine description Memory CAM mapping: CAM0=256Mb, CAM1=256Mb, CAM2=256Mb residual: 256Mb Linux version 2.6.29 (dee...@localhost) (gcc version 3.4.3 (MontaVista 3.4.3-25.0.96.0600665 2006-05-179Found FSL PCI host bridge at 0xa0008000. Firmware bus number: 0-0 PCI host bridge /p...@a0008000 (primary) ranges: MEM 0x8000..0x9fff - 0x8000 IO 0xa200..0xa2ff - 0x Zone PFN ranges: DMA 0x - 0x0003 Normal 0x0003 - 0x0003 Movable zone start PFN for each node early_node_map[1] active PFN ranges 0: 0x - 0x0003 MMU: Allocated 1088 bytes of context maps for 255 contexts Built 1 zonelists in Zone order, mobility grouping on. Total pages: 195072 Kernel command line: console=ttyCPM0,9600 root=/dev/nfs rw nfsroot=rootpath ip=dhcp mpic: Setting up MPIC OpenPIC version 1.2 at a004, max 1 CPUs mpic: ISU size: 56, shift: 6, mask: 3f mpic: Initializing for 56 sources PID hash table entries: 4096 (order: 12, 16384 bytes) clocksource: timebase mult[79364d9] shift[22] registered console [ttyCPM0] enabled Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) BUG: Bad page state in process swapper pfn:2fc69 page:c0d0ed20 flags:(null) count:0 mapcount:-524288 mapping:(null) index:0 Call Trace: [c02dbef0] [c0007a84] show_stack+0x48/0x174 (unreliable) [c02dbf20] [c006fa14] bad_page+0x9c/0x160 [c02dbf40] [c0071564] __free_pages_ok+0x2c8/0x3a8 [c02dbf70] [c02a9788] free_all_bootmem_core+0x1a4/0x240 [c02dbfa0] [c02a4544] mem_init+0x64/0x178 [c02dbfc0] [c029a67c] start_kernel+0x1d0/0x2a8 [c02dbff0] [c3b4] skpinv+0x2dc/0x318 BUG: Bad page state in process swapper pfn:2fc8f page:c0d0f1e0 flags:(null) count:0 mapcount:7799008 mapping:(null) index:0 Call Trace: [c02dbef0] [c0007a84] show_stack+0x48/0x174 (unreliable) [c02dbf20] [c006fa14] bad_page+0x9c/0x160 [c02dbf40] [c0071564] __free_pages_ok+0x2c8/0x3a8 [c02dbf70] [c02a9788] free_all_bootmem_core+0x1a4/0x240 [c02dbfa0] [c02a4544] mem_init+0x64/0x178 [c02dbfc0] [c029a67c] start_kernel+0x1d0/0x2a8 [c02dbff0] [c3b4] skpinv+0x2dc/0x318 BUG: Bad page state in process swapper pfn:2fcc4 page:c0d0f880 flags:(null) count:0 mapcount:7799040 mapping:(null) index:0 Call Trace: [c02dbef0] [c0007a84] show_stack+0x48/0x174 (unreliable) [c02dbf20] [c006fa14] bad_page+0x9c/0x160 [c02dbf40] [c0071564] __free_pages_ok+0x2c8/0x3a8 [c02dbf70] [c02a9788] free_all_bootmem_core+0x1a4/0x240 [c02dbfa0] [c02a4544] mem_init+0x64/0x178 [c02dbfc0] [c029a67c] start_kernel+0x1d0/0x2a8 [c02dbff0] [c3b4] skpinv+0x2dc/0x318 BUG: Bad page state in process swapper pfn:2fce8 -- Can anyone kindly help me in understanding the issue. with regards, Deepak Gaur ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Next April 28: boot failure on PowerPC with SLQB
On Wed, Apr 29, 2009 at 09:56:19PM +0530, Sachin Sant wrote:
Nick Piggin wrote:
Does this help?
---
With the patch the machine boots past the failure point, but panics
immediately with the following trace...
OK good, that solves one problem.
Unable to handle kernel paging request for data at address 0x0010
Faulting instruction address: 0xc07d03ec
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=1024 DEBUG_PAGEALLOC NUMA pSeries
Modules linked in:
NIP: c07d03ec LR: c07b0bbc CTR: 00136f8c
REGS: c0a23bd0 TRAP: 0300 Not tainted (2.6.30-rc3-next-20090429)
MSR: 80009032 EE,ME,IR,DR CR: 2884 XER: 0010
DAR: 0010, DSISR: 4000
TASK = c0955fc0[0] 'swapper' THREAD: c0a2 CPU: 0
GPR00: 0001 c0a23e50 c0a17650 001f
GPR04: 0077a4b9 8c9b2cc0
GPR08: 0010 c095b0f8
GPR12: 2882 c0af2400 c07f3200 c0705c32
GPR16: 014f3138 c07f3138 02f1fc90
GPR20: c07f3150 c0725d11 007bb8e4 02f1fc90
GPR24: 02f1fc90 c07f31f0 00d0 c0b73b10
GPR28: c07f0440 c095db00 c098d5f0 03c9
NIP [c07d03ec] .pidmap_init+0x28/0x88
Well kmalloc is failing. It should not be though, even if the
current node is offline, it should be able to fall back to other
nodes. Stephen's trace indicates the same thing.
Could you try the following patch please, and capture the output
it generates?
Thanks,
Nick
---
mm/slqb.c | 40 ++--
1 file changed, 34 insertions(+), 6 deletions(-)
Index: linux-2.6/mm/slqb.c
===
--- linux-2.6.orig/mm/slqb.c
+++ linux-2.6/mm/slqb.c
@@ -1456,7 +1456,7 @@ static void *__remote_slab_alloc_node(st
}
static noinline void *__remote_slab_alloc(struct kmem_cache *s,
- gfp_t gfpflags, int node)
+ gfp_t gfpflags, int node, int trace)
{
void *object;
struct zonelist *zonelist;
@@ -1465,19 +1465,32 @@ static noinline void *__remote_slab_allo
enum zone_type high_zoneidx = gfp_zone(gfpflags);
object = __remote_slab_alloc_node(s, gfpflags, node);
+ if (trace !object)
+ printk(__remote_slab_alloc_node(node:%d) failed\n, node);
if (likely(object || (gfpflags __GFP_THISNODE)))
return object;
- zonelist = node_zonelist(slab_node(current-mempolicy), gfpflags);
+ node = slab_node(current-mempolicy);
+ if (trace)
+ printk(slab_node(current-mempolicy) = %d\n, node);
+
+ zonelist = node_zonelist(node, gfpflags);
for_each_zone_zonelist(zone, z, zonelist, high_zoneidx) {
- if (!cpuset_zone_allowed_hardwall(zone, gfpflags))
+ if (!cpuset_zone_allowed_hardwall(zone, gfpflags)) {
+ if (trace)
+ printk(cpuset not allowed node:%d\n,
zone_to_nid(zone));
continue;
+ }
node = zone_to_nid(zone);
object = __remote_slab_alloc_node(s, gfpflags, node);
if (likely(object))
return object;
+ if (trace)
+ printk(__remote_slab_alloc_node(node:%d) failed\n,
node);
}
+ if (trace)
+ printk(__remote_slab_alloc failed\n);
return NULL;
}
#endif
@@ -1488,7 +1501,7 @@ static noinline void *__remote_slab_allo
* Must be called with interrupts disabled.
*/
static __always_inline void *__slab_alloc(struct kmem_cache *s,
- gfp_t gfpflags, int node)
+ gfp_t gfpflags, int node, int trace)
{
void *object;
struct kmem_cache_cpu *c;
@@ -1497,7 +1510,7 @@ static __always_inline void *__slab_allo
#ifdef CONFIG_NUMA
if (unlikely(node != -1) unlikely(node != numa_node_id())) {
try_remote:
- return __remote_slab_alloc(s, gfpflags, node);
+ return __remote_slab_alloc(s, gfpflags, node, trace);
}
#endif
@@ -1509,6 +1522,8 @@ try_remote:
object = cache_list_get_page(s, l);
if (unlikely(!object)) {
object = __slab_alloc_page(s, gfpflags, node);
+ if (trace !object)
+ printk(__slab_alloc_page(node:%d) failed\n,
node);
#ifdef CONFIG_NUMA
if (unlikely(!object)) {
node = numa_node_id();
@@ -1532,10 +1547,11 @@ static __always_inline void *slab_alloc(
{
void *object;
unsigned long
Re: [PATCH 1/2] Add support for Designware SATA controller driver
On Wed, 29 Apr 2009 14:42:25 -0700 Feng Kan f...@amcc.com wrote: Signed-off-by: Feng Kan f...@amcc.com --- drivers/ata/Kconfig| 76 +- drivers/ata/Makefile |1 + drivers/ata/sata_dwc.c | 2047 3 files changed, 2091 insertions(+), 33 deletions(-) create mode 100644 drivers/ata/sata_dwc.c diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig index 0bcf264..5321e47 100644 --- a/drivers/ata/Kconfig +++ b/drivers/ata/Kconfig @@ -72,56 +72,66 @@ config SATA_FSL If unsure, say N. -config ATA_SFF - bool ATA SFF support - default y +config SATA_DWC + tristate DesignWare Cores SATA support + depends on 460EX help - This option adds support for ATA controllers with SFF - compliant or similar programming interface. + This option enables support for the Synopsys DesignWare Cores SATA + controller. + It can be found on the AMCC 460EX. - SFF is the legacy IDE interface that has been around since - the dawn of time. Almost all PATA controllers have an - SFF interface. Many SATA controllers have an SFF interface - when configured into a legacy compatibility mode. + If unsure, say N. - For users with exclusively modern controllers like AHCI, - Silicon Image 3124, or Marvell 6440, you may choose to - disable this uneeded SFF support. +config ATA_SFF +bool ATA SFF support +default y +help + This option adds support for ATA controllers with SFF + compliant or similar programming interface. You seem to have reformatted some of this file (hopefully) unintentionally ... And the linuxppc-embedded mailing list has gone away. -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ pgp8MAmR47RT1.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 2/6] powerpc/qe: update risc allocation for QE
On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote: Change the RISC allocation to macros instead of enum, add function to read the number of risc engines from the new property num-riscs under qe node in dts. Add new property num-riscs description in qe.txt Signed-off-by: Haiying Wang haiying.w...@freescale.com --- .../powerpc/dts-bindings/fsl/cpm_qe/qe.txt |1 + arch/powerpc/include/asm/qe.h | 18 arch/powerpc/sysdev/qe_lib/qe.c| 28 +++ + 3 files changed, 41 insertions(+), 6 deletions(-) This patch is fine, how about one that updates the exist device tree's w/QE for this new property - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH 4/6] powerpc/qe: update QE Serial Number
On Apr 29, 2009, at 1:14 PM, Haiying Wang wrote: The latest QE chip may have more Serial Number(SNUM)s of thread to use. We will get the number of SNUMs from device tree by reading the new property num-snums , and set 28 as the default number of SNUMs so that it is compatible with the old QE chips' device trees which don't have this new property. The macro QE_NUM_OF_SNUM is defined as the maximum number in QE snum table which is 256. Also we update the snum_init[] array with 18 more new SNUMs which are confirmed to be useful on new chip. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- .../powerpc/dts-bindings/fsl/cpm_qe/qe.txt |1 + arch/powerpc/include/asm/qe.h |3 +- arch/powerpc/sysdev/qe_lib/qe.c| 47 +++ +++-- 3 files changed, 46 insertions(+), 5 deletions(-) how about updating the existing .dts for this as well. (One patch w/ this and # riscs is fine). - k ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: [PATCH] rapidio: add common mapping APIs for RapidIO memory access
On Tue, Apr 28, 2009 at 7:39 PM, David Miller da...@davemloft.net wrote: Please number your patches. :-/ There is no way for anyone to be able to tell in what order your changes should be applied. Sorry for that. I thought I have added -n when doing the git-format-patch, but it turns out not the case. :( Will double check next time. - Leo ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
[PATCH] Move dtc and libfdt sources from arch/powerpc/boot to scripts/dtc
The powerpc kernel always requires an Open Firmware like device tree
to supply device information. On systems without OF, this comes from
a flattened device tree blob. This blob is usually generated by dtc,
a tool which compiles a text description of the device tree into the
flattened format used by the kernel. Sometimes, the bootwrapper makes
small changes to the pre-compiled device tree blob (e.g. filling in
the size of RAM). To do this it uses the libfdt library.
Because these are only used on powerpc, the code for both these tools
is included under arch/powerpc/boot (these were imported and are
periodically updated from the upstream dtc tree).
However, the microblaze architecture, currently being prepared for
merging to mainline also uses dtc to produce device tree blobs. A few
other archs have also mentioned some interest in using dtc.
Therefore, this patch moves dtc and libfdt from arch/powerpc into
scripts, where it can be used by any architecture.
The vast bulk of this patch is a literal move, the rest is adjusting
the various Makefiles to use dtc and libfdt correctly from their new
locations.
Signed-off-by: David Gibson da...@gibson.dropbear.id.au
---
arch/powerpc/Kconfig |4 +
arch/powerpc/boot/Makefile | 67 +++-
arch/powerpc/boot/simpleboot.c |2 +-
scripts/Makefile |1 +
scripts/dtc/Makefile | 54
.../boot/dtc-src = scripts/dtc}/Makefile.dtc |0
.../powerpc/boot/dtc-src = scripts/dtc}/checks.c |0
{arch/powerpc/boot/dtc-src = scripts/dtc}/data.c |0
.../boot/dtc-src = scripts/dtc}/dtc-lexer.l |0
.../dtc}/dtc-lexer.lex.c_shipped |0
.../dtc}/dtc-parser.tab.c_shipped |0
.../dtc}/dtc-parser.tab.h_shipped |0
.../boot/dtc-src = scripts/dtc}/dtc-parser.y |0
{arch/powerpc/boot/dtc-src = scripts/dtc}/dtc.c |0
{arch/powerpc/boot/dtc-src = scripts/dtc}/dtc.h |0
.../boot/dtc-src = scripts/dtc}/flattree.c|0
.../powerpc/boot/dtc-src = scripts/dtc}/fstree.c |0
.../boot = scripts/dtc}/libfdt/Makefile.libfdt|0
{arch/powerpc/boot = scripts/dtc}/libfdt/fdt.c|0
{arch/powerpc/boot = scripts/dtc}/libfdt/fdt.h|0
{arch/powerpc/boot = scripts/dtc}/libfdt/fdt_ro.c |0
{arch/powerpc/boot = scripts/dtc}/libfdt/fdt_rw.c |0
.../boot = scripts/dtc}/libfdt/fdt_strerror.c |0
{arch/powerpc/boot = scripts/dtc}/libfdt/fdt_sw.c |0
.../powerpc/boot = scripts/dtc}/libfdt/fdt_wip.c |0
{arch/powerpc/boot = scripts/dtc}/libfdt/libfdt.h |0
.../dtc-src = scripts/dtc/libfdt}/libfdt_env.h|0
.../boot = scripts/dtc}/libfdt/libfdt_internal.h |0
.../boot/dtc-src = scripts/dtc}/livetree.c|0
.../powerpc/boot/dtc-src = scripts/dtc}/srcpos.c |0
.../powerpc/boot/dtc-src = scripts/dtc}/srcpos.h |0
.../boot/dtc-src = scripts/dtc}/treesource.c |0
.../boot/dtc-src = scripts/dtc}/version_gen.h |0
33 files changed, 83 insertions(+), 45 deletions(-)
create mode 100644 scripts/dtc/Makefile
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/Makefile.dtc (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/checks.c (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/data.c (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc-lexer.l (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc-lexer.lex.c_shipped
(100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc-parser.tab.c_shipped
(100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc-parser.tab.h_shipped
(100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc-parser.y (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc.c (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/dtc.h (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/flattree.c (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/fstree.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/Makefile.libfdt (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt.h (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt_ro.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt_rw.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt_strerror.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt_sw.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/fdt_wip.c (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/libfdt.h (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc/libfdt}/libfdt_env.h (100%)
rename {arch/powerpc/boot = scripts/dtc}/libfdt/libfdt_internal.h (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/livetree.c (100%)
rename {arch/powerpc/boot/dtc-src = scripts/dtc}/srcpos.c (100%)
rename
Re: [MTD] ofpart: Partitions at same address cannot have the same name
On Thu, 2009-04-30 at 04:19 +0100, Benjamin Herrenschmidt wrote: I fail to see the point of this special partition in the first place... Things would make more sense if you had a full flash device whose child nodes are the partitions. That's the model I think I want to move to, and which I was toying with in http://git.infradead.org/users/dwmw2/mtd-sysfs.git (I haven't done it yet, but it's logically the next step after what I've already done). -- David WoodhouseOpen Source Technology Centre david.woodho...@intel.com Intel Corporation ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
Re: Next April 28: boot failure on PowerPC with SLQB
Nick Piggin wrote: Well kmalloc is failing. It should not be though, even if the current node is offline, it should be able to fall back to other nodes. Stephen's trace indicates the same thing. Could you try the following patch please, and capture the output it generates? With this patch i don't get any extra information other that what is already reported. Have attached the boot log captured using loglevel=8 mminit_loglevel=4 options. Thanks -Sachin -- - Sachin Sant IBM Linux Technology Center India Systems and Technology Labs Bangalore, India - Using 007bb8f8 bytes for initrd buffer Please wait, loading kernel... Allocated 0110 bytes for kernel @ 00d0 Elf64 kernel loaded... Loading ramdisk... ramdisk loaded 007bb8f8 @ 034d OF stdout device is: /vdevice/v...@3000 Preparing to boot Linux version 2.6.30-rc3-next-20090429-slqb (r...@llm62) (gcc version 4.3.2 [gcc-4_3-branch revision 141291] (SUSE Linux) ) #4 SMP Thu Apr 30 10:52:00 IST 2009 Calling ibm,client-architecture... done command line: root=/dev/sda5 sysrq=1 insmod=sym53c8xx insmod=ipr crashkernel=512M-:256M loglevel=8 mminit_loglevel=4 memory layout at init: alloc_bottom : 03c9 alloc_top: 0800 alloc_top_hi : 0800 rmo_top : 0800 ram_top : 0800 instantiating rtas at 0x074e... done boot cpu hw idx starting cpu hw idx 0002... done copying OF device tree... Building dt strings... Building dt structure... Device tree strings 0x03ca - 0x03ca15d3 Device tree struct 0x03cb - 0x03cd Calling quiesce... returning from prom_init Crash kernel location must be 0x200 Reserving 256MB of memory at 32MB for crashkernel (System RAM: 4096MB) Phyp-dump disabled at boot time Using pSeries machine description Page orders: linear mapping = 16, virtual = 16, io = 12 Using 1TB segments Found initrd at 0xc34d:0xc3c8b8f8 console [udbg0] enabled Partition configured for 4 cpus. CPU maps initialized for 2 threads per core (thread shift is 1) Starting Linux PPC64 #4 SMP Thu Apr 30 10:52:00 IST 2009 - ppc64_pft_size= 0x1a physicalMemorySize= 0x1 htab_hash_mask= 0x7 - Initializing cgroup subsys cpuset Initializing cgroup subsys cpu Linux version 2.6.30-rc3-next-20090429-slqb (r...@llm62) (gcc version 4.3.2 [gcc-4_3-branch revision 141291] (SUSE Linux) ) #4 SMP Thu Apr 30 10:52:00 IST 2009 [boot]0012 Setup Arch mminit::memory_register Entering add_active_range(0, 0x0, 0x800) 0 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x800, 0xc00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0xc00, 0x1000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x1000, 0x1400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x1400, 0x1800) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x1800, 0x1c00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x1c00, 0x2000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x2000, 0x2400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x2400, 0x2800) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x2800, 0x2c00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x2c00, 0x3000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x3000, 0x3400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x3400, 0x3800) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x3800, 0x3c00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x3c00, 0x4000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x4000, 0x4400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x4400, 0x4800) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x4800, 0x4c00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x4c00, 0x5000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x5000, 0x5400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x5400, 0x5800) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x5800, 0x5c00) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x5c00, 0x6000) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x6000, 0x6400) 1 entries of 256 used mminit::memory_register Entering add_active_range(0, 0x6400, 0x6800
[PATCH] powerpc: Fix setting of oprofile cpu type
commit 2657dd4e301d4841ed67a4fac7d145ad8f3e1b28 introduced a bug where we would now always override the real oprofile CPU type with the compatible one provided by a pseudo-PVR in the device-tree which is incorrect and breaks oprofile on all current configs since the compatible ones aren't yet recognized. This fixes it. Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org --- Bug hit 2.6.29 too. I'll send this to Linus and Greg tomorrow unless somebody thinks it's wrong. I've tested on POWER6 and verified the bug and the fix. arch/powerpc/kernel/cputable.c |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) --- linux-work.orig/arch/powerpc/kernel/cputable.c 2009-04-30 14:22:30.0 +1000 +++ linux-work/arch/powerpc/kernel/cputable.c 2009-04-30 14:22:41.0 +1000 @@ -1833,8 +1833,8 @@ static void __init setup_cpu_spec(unsign * and, in that case, keep the current value for * oprofile_cpu_type. */ - if (old.oprofile_cpu_type == NULL) - t-oprofile_cpu_type = s-oprofile_cpu_type; + if (old.oprofile_cpu_type != NULL) + t-oprofile_cpu_type = old.oprofile_cpu_type; } *PTRRELOC(cur_cpu_spec) = the_cpu_spec; ___ Linuxppc-dev mailing list Linuxppc-dev@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-dev
