[PATCH V2 0/3] Make 64-bit PCI device tree scanning code common

2009-08-25 Thread Grant Likely
Hi guys

Here's v2 of the PCI device tree scanning code.  This is tested and
working on 32bit.  It needs to be tested on 64 bit, but there shouldn't
be any behavioural changes.  It's mostly just a code move with a little
bit of fixups to merge code.  I'd like to see this go into .32 when the
merge window opens.

Changes in v2:
- Move scanning code into its own file: pci_of_scan.c

On Thu, Aug 20, 2009 at 11:30 PM, Grant Likely wrote:
> Ben and Kumar,
>
> Compile tested only.  I haven't even tried to boot this on real
> hardware, but I'm posting so that you guys can see what I'm up to.
> Basically, I want access to the device tree scanning in ppc32 land,
> and these patches start to get me there.  Please take a look and
> comment.  Tomorrow I'll actually try running this stuff and debugging
> the details.
>

--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.



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[PATCH V2 0/3] Make 64-bit PCI device tree scanning code common

2009-08-25 Thread Grant Likely
Hi guys

Here's v2 of the PCI device tree scanning code.  This is tested and
working on 32bit.  It needs to be tested on 64 bit, but there shouldn't
be any behavioural changes.  It's mostly just a code move with a little
bit of fixups to merge code.  I'd like to see this go into .32 when the
merge window opens.

Changes in v2:
- Move scanning code into its own file: pci_of_scan.c

On Thu, Aug 20, 2009 at 11:30 PM, Grant Likely wrote:
> Ben and Kumar,
>
> Compile tested only.  I haven't even tried to boot this on real
> hardware, but I'm posting so that you guys can see what I'm up to.
> Basically, I want access to the device tree scanning in ppc32 land,
> and these patches start to get me there.  Please take a look and
> comment.  Tomorrow I'll actually try running this stuff and debugging
> the details.
>

--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.



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[PATCH V2 3/3] powerpc/pci: Merge ppc32 and ppc64 versions of phb_scan()

2009-08-25 Thread Grant Likely
From: Grant Likely 

The two versions are doing almost exactly the same thing.  No need to
maintain them as separate files.  This patch also has the side effect
of making the PCI device tree scanning code available to 32 bit powerpc
machines, but no board ports actually make use of this feature at this
point.

Signed-off-by: Grant Likely 
---

 arch/powerpc/include/asm/pci.h   |2 ++
 arch/powerpc/kernel/pci-common.c |   48 ++
 arch/powerpc/kernel/pci_32.c |   25 ++--
 arch/powerpc/kernel/pci_64.c |   46 +---
 4 files changed, 58 insertions(+), 63 deletions(-)


diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 9ae2e3e..feebfed 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -233,6 +233,8 @@ extern void pci_resource_to_user(const struct pci_dev *dev, 
int bar,
 
 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
+extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
+extern void pcibios_scan_phb(struct pci_controller *hose, void *data);
 
 #endif /* __KERNEL__ */
 #endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 44497a8..8a16dbe 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1617,3 +1617,51 @@ void __devinit pcibios_setup_phb_resources(struct 
pci_controller *hose)
 (unsigned long)hose->io_base_virt - _IO_BASE);
 
 }
+
+/**
+ * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus
+ * @hose: Pointer to the PCI host controller instance structure
+ * @data: value to use for sysdata pointer.  ppc32 and ppc64 differ here
+ *
+ * Note: the 'data' pointer is a temporary measure.  As 32 and 64 bit
+ * pci code gets merged, this parameter should become unnecessary because
+ * both will use the same value.
+ */
+void __devinit pcibios_scan_phb(struct pci_controller *hose, void *data)
+{
+   struct pci_bus *bus;
+   struct device_node *node = hose->dn;
+   int mode;
+
+   pr_debug("PCI: Scanning PHB %s\n",
+node ? node->full_name : "");
+
+   /* Create an empty bus for the toplevel */
+   bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, data);
+   if (bus == NULL) {
+   pr_err("Failed to create bus for PCI domain %04x\n",
+   hose->global_number);
+   return;
+   }
+   bus->secondary = hose->first_busno;
+   hose->bus = bus;
+
+   /* Get some IO space for the new PHB */
+   pcibios_setup_phb_io_space(hose);
+
+   /* Wire up PHB bus resources */
+   pcibios_setup_phb_resources(hose);
+
+   /* Get probe mode and perform scan */
+   mode = PCI_PROBE_NORMAL;
+   if (node && ppc_md.pci_probe_mode)
+   mode = ppc_md.pci_probe_mode(bus);
+   pr_debug("probe mode: %d\n", mode);
+   if (mode == PCI_PROBE_DEVTREE) {
+   bus->subordinate = hose->last_busno;
+   of_scan_bus(node, bus);
+   }
+
+   if (mode == PCI_PROBE_NORMAL)
+   hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+}
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 1e807fe..4e415e1 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -354,36 +354,15 @@ pci_create_OF_bus_map(void)
}
 }
 
-static void __devinit pcibios_scan_phb(struct pci_controller *hose)
+void __devinit pcibios_setup_phb_io_space(struct pci_controller *hose)
 {
-   struct pci_bus *bus;
-   struct device_node *node = hose->dn;
unsigned long io_offset;
struct resource *res = &hose->io_resource;
 
-   pr_debug("PCI: Scanning PHB %s\n",
-node ? node->full_name : "");
-
-   /* Create an empty bus for the toplevel */
-   bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
-   if (bus == NULL) {
-   printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
-  hose->global_number);
-   return;
-   }
-   bus->secondary = hose->first_busno;
-   hose->bus = bus;
-
/* Fixup IO space offset */
io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
res->start = (res->start + io_offset) & 0xu;
res->end = (res->end + io_offset) & 0xu;
-
-   /* Wire up PHB bus resources */
-   pcibios_setup_phb_resources(hose);
-
-   /* Scan children */
-   hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
 }
 
 static int __init pcibios_init(void)
@@ -401,7 +380,7 @@ static int __init pcibios_init(void)
if (pci_assign_all_buses)
hose->first_busno = next_busno;
hose->last_busno = 0xff;
-   

[PATCH V2 2/3] powerpc/pci: move pci_64.c device tree scanning code into pci-common.c

2009-08-25 Thread Grant Likely
From: Grant Likely 

The PCI device tree scanning code in pci_64.c is some useful functionality.
It allows PCI devices to be described in the device tree instead of being
probed for, which in turn allows pci devices to use all of the device tree
facilities to describe complex PCI bus architectures like GPIO and IRQ
routing (perhaps not a common situation for desktop or server systems,
but useful for embedded systems with on-board PCI devices).

This patch moves the device tree scanning into pci-common.c so it is
available for 32-bit powerpc machines too.

Signed-off-by: Grant Likely 
---

 arch/powerpc/include/asm/pci-bridge.h |5 
 arch/powerpc/include/asm/pci.h|5 
 arch/powerpc/kernel/Makefile  |2 
 arch/powerpc/kernel/pci-common.c  |1 
 arch/powerpc/kernel/pci_64.c  |  289 ---
 arch/powerpc/kernel/pci_of_scan.c |  358 +
 6 files changed, 364 insertions(+), 296 deletions(-)
 create mode 100644 arch/powerpc/kernel/pci_of_scan.c


diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 4c61fa0..3faf575 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -284,11 +284,6 @@ static inline int isa_vaddr_is_ioport(void __iomem 
*address)
 extern int pcibios_unmap_io_space(struct pci_bus *bus);
 extern int pcibios_map_io_space(struct pci_bus *bus);
 
-/* Return values for ppc_md.pci_probe_mode function */
-#define PCI_PROBE_NONE -1  /* Don't look at this bus at all */
-#define PCI_PROBE_NORMAL   0   /* Do normal PCI probing */
-#define PCI_PROBE_DEVTREE  1   /* Instantiate from device tree */
-
 #ifdef CONFIG_NUMA
 #define PHB_SET_NODE(PHB, NODE)((PHB)->node = (NODE))
 #else
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index d9483c5..9ae2e3e 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -22,6 +22,11 @@
 
 #include 
 
+/* Return values for ppc_md.pci_probe_mode function */
+#define PCI_PROBE_NONE -1  /* Don't look at this bus at all */
+#define PCI_PROBE_NORMAL   0   /* Do normal PCI probing */
+#define PCI_PROBE_DEVTREE  1   /* Instantiate from device tree */
+
 #define PCIBIOS_MIN_IO 0x1000
 #define PCIBIOS_MIN_MEM0x1000
 
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index b73396b..3811062 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -88,7 +88,7 @@ obj-$(CONFIG_SWIOTLB) += dma-swiotlb.o
 
 pci64-$(CONFIG_PPC64)  += pci_dn.o isa-bridge.o
 obj-$(CONFIG_PCI)  += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
-  pci-common.o
+  pci-common.o pci_of_scan.o
 obj-$(CONFIG_PCI_MSI)  += msi.o
 obj-$(CONFIG_KEXEC)+= machine_kexec.o crash.o \
   machine_kexec_$(CONFIG_WORD_SIZE).o
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 23eeb3e..44497a8 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1617,4 +1617,3 @@ void __devinit pcibios_setup_phb_resources(struct 
pci_controller *hose)
 (unsigned long)hose->io_base_virt - _IO_BASE);
 
 }
-
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 9e8902f..4d5b4ce 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -43,295 +43,6 @@ unsigned long pci_probe_only = 1;
 unsigned long pci_io_base = ISA_IO_BASE;
 EXPORT_SYMBOL(pci_io_base);
 
-static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
-{
-   const u32 *prop;
-   int len;
-
-   prop = of_get_property(np, name, &len);
-   if (prop && len >= 4)
-   return *prop;
-   return def;
-}
-
-static unsigned int pci_parse_of_flags(u32 addr0, int bridge)
-{
-   unsigned int flags = 0;
-
-   if (addr0 & 0x0200) {
-   flags = IORESOURCE_MEM | PCI_BASE_ADDRESS_SPACE_MEMORY;
-   flags |= (addr0 >> 22) & PCI_BASE_ADDRESS_MEM_TYPE_64;
-   flags |= (addr0 >> 28) & PCI_BASE_ADDRESS_MEM_TYPE_1M;
-   if (addr0 & 0x4000)
-   flags |= IORESOURCE_PREFETCH
-| PCI_BASE_ADDRESS_MEM_PREFETCH;
-   /* Note: We don't know whether the ROM has been left enabled
-* by the firmware or not. We mark it as disabled (ie, we do
-* not set the IORESOURCE_ROM_ENABLE flag) for now rather than
-* do a config space read, it will be force-enabled if needed
-*/
-   if (!bridge && (addr0 & 0xff) == 0x30)
-   flags |= IORESOURCE_READONLY;
-   } else if (addr0 & 0x0100)
-   flags = IORESOURCE

[PATCH V2 1/3] powerpc/pci: Remove dead checks for CONFIG_PPC_OF

2009-08-25 Thread Grant Likely
From: Grant Likely 

PPC_OF is always selected for arch/powerpc.  This patch removes the stale
#defines

Signed-off-by: Grant Likely 
Acked-by: Stephen Rothwell 
Acked-by: Kumar Gala 
---

 arch/powerpc/kernel/pci-common.c |8 
 arch/powerpc/kernel/pci_32.c |9 -
 2 files changed, 0 insertions(+), 17 deletions(-)


diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 5a56e97..23eeb3e 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -176,8 +176,6 @@ int pci_domain_nr(struct pci_bus *bus)
 }
 EXPORT_SYMBOL(pci_domain_nr);
 
-#ifdef CONFIG_PPC_OF
-
 /* This routine is meant to be used early during boot, when the
  * PCI bus numbers have not yet been assigned, and you need to
  * issue PCI config cycles to an OF device.
@@ -210,17 +208,11 @@ static ssize_t pci_show_devspec(struct device *dev,
return sprintf(buf, "%s", np->full_name);
 }
 static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-#endif /* CONFIG_PPC_OF */
 
 /* Add sysfs properties */
 int pcibios_add_platform_entries(struct pci_dev *pdev)
 {
-#ifdef CONFIG_PPC_OF
return device_create_file(&pdev->dev, &dev_attr_devspec);
-#else
-   return 0;
-#endif /* CONFIG_PPC_OF */
-
 }
 
 char __devinit *pcibios_setup(char *str)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 3ae1c66..1e807fe 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -34,9 +34,7 @@ int pcibios_assign_bus_offset = 1;
 void pcibios_make_OF_bus_map(void);
 
 static void fixup_cpc710_pci64(struct pci_dev* dev);
-#ifdef CONFIG_PPC_OF
 static u8* pci_to_OF_bus_map;
-#endif
 
 /* By default, we don't re-assign bus numbers. We do this only on
  * some pmacs
@@ -83,7 +81,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
 }
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM,PCI_DEVICE_ID_IBM_CPC710_PCI64, 
fixup_cpc710_pci64);
 
-#ifdef CONFIG_PPC_OF
 /*
  * Functions below are used on OpenFirmware machines.
  */
@@ -357,12 +354,6 @@ pci_create_OF_bus_map(void)
}
 }
 
-#else /* CONFIG_PPC_OF */
-void pcibios_make_OF_bus_map(void)
-{
-}
-#endif /* CONFIG_PPC_OF */
-
 static void __devinit pcibios_scan_phb(struct pci_controller *hose)
 {
struct pci_bus *bus;

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Re: [PATCH] powerpc/pci: Pull ppc32 PCI features into common

2009-08-25 Thread Grant Likely
On Tue, Aug 25, 2009 at 8:20 PM, Kumar Gala wrote:
> Some of the PCI features we have in ppc32 we will need on ppc64
> platforms in the future.  These include support for:
>
> * ppc_md.pci_exclude_device
> * indirect config cycles
> * early config cycles
>
> We also simplified the logic in fake_pci_bus() to assume it will always
> get a valid pci_controller.  Since all current callers seem to pass it
> one.
>
> Signed-off-by: Kumar Gala 

Looks okay to me.

Acked-by: Grant Likely 

g.
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Re: [PATCH] powerpc/pci: Pull ppc32 PCI features into common

2009-08-25 Thread Kumar Gala


On Aug 25, 2009, at 9:20 PM, Kumar Gala wrote:


Some of the PCI features we have in ppc32 we will need on ppc64
platforms in the future.  These include support for:

* ppc_md.pci_exclude_device
* indirect config cycles
* early config cycles

We also simplified the logic in fake_pci_bus() to assume it will  
always

get a valid pci_controller.  Since all current callers seem to pass it
one.

Signed-off-by: Kumar Gala 
---
arch/powerpc/include/asm/machdep.h|6 +-
arch/powerpc/include/asm/pci-bridge.h |   35 +++-
arch/powerpc/kernel/pci-common.c  |   70  

arch/powerpc/kernel/pci_32.c  |   71  
-

4 files changed, 89 insertions(+), 93 deletions(-)


Ben, Grant

This should just be a refresh of the patch mentioned here:

http://patchwork.ozlabs.org/patch/26648/

with the commit message cleaned up and rebased on 'next'.

- k
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[PATCH] powerpc/pci: Pull ppc32 PCI features into common

2009-08-25 Thread Kumar Gala
Some of the PCI features we have in ppc32 we will need on ppc64
platforms in the future.  These include support for:

* ppc_md.pci_exclude_device
* indirect config cycles
* early config cycles

We also simplified the logic in fake_pci_bus() to assume it will always
get a valid pci_controller.  Since all current callers seem to pass it
one.

Signed-off-by: Kumar Gala 
---
 arch/powerpc/include/asm/machdep.h|6 +-
 arch/powerpc/include/asm/pci-bridge.h |   35 +++-
 arch/powerpc/kernel/pci-common.c  |   70 
 arch/powerpc/kernel/pci_32.c  |   71 -
 4 files changed, 89 insertions(+), 93 deletions(-)

diff --git a/arch/powerpc/include/asm/machdep.h 
b/arch/powerpc/include/asm/machdep.h
index 11d1fc3..9efa2be 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -209,14 +209,14 @@ struct machdep_calls {
/*
 * optional PCI "hooks"
 */
-   /* Called in indirect_* to avoid touching devices */
-   int (*pci_exclude_device)(struct pci_controller *, unsigned char, 
unsigned char);
-
/* Called at then very end of pcibios_init() */
void (*pcibios_after_init)(void);
 
 #endif /* CONFIG_PPC32 */
 
+   /* Called in indirect_* to avoid touching devices */
+   int (*pci_exclude_device)(struct pci_controller *, unsigned char, 
unsigned char);
+
/* Called after PPC generic resource fixup to perform
   machine specific fixups */
void (*pcibios_fixup_resources)(struct pci_dev *);
diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 4c61fa0..e074420 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -77,9 +77,7 @@ struct pci_controller {
 
int first_busno;
int last_busno;
-#ifndef CONFIG_PPC64
int self_busno;
-#endif
 
void __iomem *io_base_virt;
 #ifdef CONFIG_PPC64
@@ -104,7 +102,6 @@ struct pci_controller {
unsigned int __iomem *cfg_addr;
void __iomem *cfg_data;
 
-#ifndef CONFIG_PPC64
/*
 * Used for variants of PCI indirect handling and possible quirks:
 *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
@@ -128,7 +125,6 @@ struct pci_controller {
 #define PPC_INDIRECT_TYPE_BIG_ENDIAN   0x0010
 #define PPC_INDIRECT_TYPE_BROKEN_MRM   0x0020
u32 indirect_type;
-#endif /* !CONFIG_PPC64 */
/* Currently, we limit ourselves to 1 IO range and 3 mem
 * ranges since the common pci_bus structure can't handle more
 */
@@ -146,21 +142,6 @@ struct pci_controller {
 #endif /* CONFIG_PPC64 */
 };
 
-#ifndef CONFIG_PPC64
-
-static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
-{
-   return bus->sysdata;
-}
-
-static inline int isa_vaddr_is_ioport(void __iomem *address)
-{
-   /* No specific ISA handling on ppc32 at this stage, it
-* all goes through PCI
-*/
-   return 0;
-}
-
 /* These are used for config access before all the PCI probing
has been done. */
 extern int early_read_config_byte(struct pci_controller *hose, int bus,
@@ -182,6 +163,22 @@ extern int early_find_capability(struct pci_controller 
*hose, int bus,
 extern void setup_indirect_pci(struct pci_controller* hose,
   resource_size_t cfg_addr,
   resource_size_t cfg_data, u32 flags);
+
+#ifndef CONFIG_PPC64
+
+static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
+{
+   return bus->sysdata;
+}
+
+static inline int isa_vaddr_is_ioport(void __iomem *address)
+{
+   /* No specific ISA handling on ppc32 at this stage, it
+* all goes through PCI
+*/
+   return 0;
+}
+
 #else  /* CONFIG_PPC64 */
 
 /*
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 5a56e97..6357f2b 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1626,3 +1626,73 @@ void __devinit pcibios_setup_phb_resources(struct 
pci_controller *hose)
 
 }
 
+/*
+ * Null PCI config access functions, for the case when we can't
+ * find a hose.
+ */
+#define NULL_PCI_OP(rw, size, type)\
+static int \
+null_##rw##_config_##size(struct pci_dev *dev, int offset, type val)   \
+{  \
+   return PCIBIOS_DEVICE_NOT_FOUND;\
+}
+
+static int
+null_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
+int len, u32 *val)
+{
+   return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+static int
+null_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
+ int len, u32 val)
+{
+   return PCIBIOS_DEVICE_NOT_FOUND;
+}
+
+s

Please pull from my 'next' branch

2009-08-25 Thread Kumar Gala
Please pull from 'next' branch of

master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git next

to receive the following updates:

 arch/powerpc/boot/dts/mpc8272ads.dts|8
 arch/powerpc/boot/dts/mpc8536ds.dts |8
 arch/powerpc/boot/dts/mpc8536ds_36b.dts |8
 arch/powerpc/boot/dts/mpc8569mds.dts|   45 ++
 arch/powerpc/boot/dts/p2020rdb.dts  |  586 
 arch/powerpc/boot/dts/sbc8349.dts   |   60 ++
 arch/powerpc/boot/dts/sbc8560.dts   |1
 arch/powerpc/configs/83xx/sbc834x_defconfig |  320 ++-
 arch/powerpc/configs/mgcoge_defconfig   |   86 +++-
 arch/powerpc/configs/mpc85xx_defconfig  |1
 arch/powerpc/include/asm/mmu-book3e.h   |   12
 arch/powerpc/include/asm/reg_booke.h|6
 arch/powerpc/mm/tlb_nohash_low.S|2
 arch/powerpc/platforms/82xx/mpc8272_ads.c   |   22 +
 arch/powerpc/platforms/85xx/Kconfig |9
 arch/powerpc/platforms/85xx/Makefile|3
 arch/powerpc/platforms/85xx/mpc85xx_mds.c   |4
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c   |  141 ++
 arch/powerpc/platforms/85xx/sbc8560.c   |   39 +
 arch/powerpc/sysdev/fsl_soc.c   |6
 arch/powerpc/sysdev/qe_lib/gpio.c   |4
 21 files changed, 1321 insertions(+), 50 deletions(-)

Anton Vorontsov (4):
  powerpc/85xx: Add eSDHC support for MPC8536DS boards
  powerpc/82xx: Fix BCSR bits for MPC8272ADS boards
  powerpc/82xx: Add CPM USB Gadget support for MPC8272ADS boards
  powerpc/85xx: Add QE USB support for MPC8569E-MDS boards

Heiko Schocher (1):
  powerpc/82xx: mgcoge - updated defconfig

Kumar Gala (1):
  powerpc/booke: Move MMUCSR definition into mmu-book3e.h

Liang Li (4):
  powerpc/83xx: Remove second USB node from SBC834x DTS
  powerpc/83xx: Add localbus node and MTD partitions for SBC834x
  powerpc/83xx: Fix incorrect PCI interrupt map in SBC834x DTS
  powerpc/85xx: sbc8560 - Fix warm reboot with board specific reset function

Michael Barkowski (1):
  powerpc/qe_lib: Set gpio data before changing the direction to output

Paul Gortmaker (3):
  powerpc/83xx: sbc8349 - update defconfig, enable MTD, USB storage
  powerpc/85xx: issue fsl_soc reboot warning only when applicable
  powerpc/85xx: sbc8560 - remove "has-rstcr" from global utilities block

Poonam Aggrwal (1):
  powerpc/85xx: Add support for P2020RDB board

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[patch v2] powerpc/ps3: Update ps3_defconfig

2009-08-25 Thread Geoff Levand
Update ps3_defconfig.

 o Refresh for 2.6.31.
 o Remove MTD support.
 o Add more HID drivers.

Signed-off-by: Geoff Levand 
---
 arch/powerpc/configs/ps3_defconfig |  211 +
 1 file changed, 75 insertions(+), 136 deletions(-)

--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -1,13 +1,14 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc5
-# Fri May 15 10:37:00 2009
+# Linux kernel version: 2.6.31-rc7
+# Mon Aug 24 17:38:50 2009
 #
 CONFIG_PPC64=y
 
 #
 # Processor support
 #
+CONFIG_PPC_BOOK3S_64=y
 CONFIG_PPC_BOOK3S=y
 # CONFIG_POWER4_ONLY is not set
 CONFIG_POWER3=y
@@ -20,6 +21,7 @@ CONFIG_PPC_STD_MMU=y
 CONFIG_PPC_STD_MMU_64=y
 CONFIG_PPC_MM_SLICES=y
 CONFIG_VIRT_CPU_ACCOUNTING=y
+CONFIG_PPC_HAVE_PMU_SUPPORT=y
 CONFIG_SMP=y
 CONFIG_NR_CPUS=2
 CONFIG_64BIT=y
@@ -31,6 +33,7 @@ CONFIG_GENERIC_TIME=y
 CONFIG_GENERIC_TIME_VSYSCALL=y
 CONFIG_GENERIC_CLOCKEVENTS=y
 CONFIG_GENERIC_HARDIRQS=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_HAVE_SETUP_PER_CPU_AREA=y
 CONFIG_IRQ_PER_CPU=y
 CONFIG_STACKTRACE_SUPPORT=y
@@ -41,7 +44,6 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_ARCH_HAS_ILOG2_U32=y
 CONFIG_ARCH_HAS_ILOG2_U64=y
 CONFIG_GENERIC_HWEIGHT=y
-CONFIG_GENERIC_CALIBRATE_DELAY=y
 CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_ARCH_NO_VIRT_TO_BUS=y
 CONFIG_PPC=y
@@ -62,6 +64,7 @@ CONFIG_DTC=y
 # CONFIG_PPC_DCR_MMIO is not set
 CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 
 #
 # General setup
@@ -113,7 +116,6 @@ CONFIG_SYSCTL_SYSCALL=y
 CONFIG_KALLSYMS=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
-# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -126,7 +128,14 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+CONFIG_HAVE_PERF_COUNTERS=y
+
+#
+# Performance Counters
+#
+# CONFIG_PERF_COUNTERS is not set
 CONFIG_VM_EVENT_COUNTERS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 # CONFIG_COMPAT_BRK is not set
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
@@ -145,6 +154,11 @@ CONFIG_HAVE_KRETPROBES=y
 CONFIG_HAVE_ARCH_TRACEHOOK=y
 CONFIG_HAVE_DMA_ATTRS=y
 CONFIG_USE_GENERIC_SMP_HELPERS=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_GCOV_KERNEL is not set
 # CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
@@ -210,7 +224,7 @@ CONFIG_PPC_CELL=y
 #
 # Cell Broadband Engine options
 #
-CONFIG_SPU_FS=y
+CONFIG_SPU_FS=m
 CONFIG_SPU_FS_64K_LS=y
 # CONFIG_SPU_TRACE is not set
 CONFIG_SPU_BASE=y
@@ -255,6 +269,7 @@ CONFIG_BINFMT_MISC=y
 CONFIG_HUGETLB_PAGE_SIZE_VARIABLE=y
 # CONFIG_IOMMU_VMERGE is not set
 CONFIG_IOMMU_HELPER=y
+# CONFIG_SWIOTLB is not set
 CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
 CONFIG_ARCH_HAS_WALK_MEMORY=y
 CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
@@ -285,9 +300,9 @@ CONFIG_MIGRATION=y
 CONFIG_PHYS_ADDR_T_64BIT=y
 CONFIG_ZONE_DMA_FLAG=1
 CONFIG_BOUNCE=y
-CONFIG_UNEVICTABLE_LRU=y
 CONFIG_HAVE_MLOCK=y
 CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
 CONFIG_ARCH_MEMORY_PROBE=y
 CONFIG_PPC_HAS_HASH_64K=y
 CONFIG_PPC_4K_PAGES=y
@@ -399,6 +414,7 @@ CONFIG_IPV6_NDISC_NODETYPE=y
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
 
@@ -433,11 +449,14 @@ CONFIG_BT_HCIBTUSB=m
 CONFIG_WIRELESS=y
 CONFIG_CFG80211=m
 # CONFIG_CFG80211_REG_DEBUG is not set
+# CONFIG_CFG80211_DEBUGFS is not set
 # CONFIG_WIRELESS_OLD_REGULATORY is not set
 CONFIG_WIRELESS_EXT=y
 # CONFIG_WIRELESS_EXT_SYSFS is not set
 # CONFIG_LIB80211 is not set
 CONFIG_MAC80211=m
+CONFIG_MAC80211_DEFAULT_PS=y
+CONFIG_MAC80211_DEFAULT_PS_VALUE=1
 
 #
 # Rate control algorithm selection
@@ -447,7 +466,6 @@ CONFIG_MAC80211_RC_PID=y
 CONFIG_MAC80211_RC_DEFAULT_PID=y
 # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set
 CONFIG_MAC80211_RC_DEFAULT="pid"
-# CONFIG_MAC80211_MESH is not set
 # CONFIG_MAC80211_LEDS is not set
 # CONFIG_MAC80211_DEBUGFS is not set
 # CONFIG_MAC80211_DEBUG_MENU is not set
@@ -472,77 +490,7 @@ CONFIG_EXTRA_FIRMWARE=""
 # CONFIG_DEBUG_DEVRES is not set
 # CONFIG_SYS_HYPERVISOR is not set
 # CONFIG_CONNECTOR is not set
-CONFIG_MTD=y
-CONFIG_MTD_DEBUG=y
-CONFIG_MTD_DEBUG_VERBOSE=0
-# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_PARTITIONS is not set
-# CONFIG_MTD_TESTS is not set
-
-#
-# User Modules And Translation Layers
-#
-# CONFIG_MTD_CHAR is not set
-CONFIG_MTD_BLKDEVS=y
-CONFIG_MTD_BLOCK=y
-# CONFIG_FTL is not set
-# CONFIG_NFTL is not set
-# CONFIG_INFTL is not set
-# CONFIG_RFD_FTL is not set
-# CONFIG_SSFDC is not set
-# CONFIG_MTD_OOPS is not set
-
-#
-# RAM/ROM/Flash chip drivers
-#
-# CONFIG_MTD_CFI is not set
-# CONFIG_MTD_JEDECPROBE is not set
-CONFIG_MTD_MAP_BANK_WIDTH_1=y
-CONFIG_MTD_MAP_BANK_WIDTH_2=y
-CONFIG_MTD_MAP_BANK_WIDTH_4=y
-# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
-# CONFIG_MTD_MAP_BANK_WIDTH_16 is n

Re: [patch] powerpc/ps3: Update ps3_defconfig

2009-08-25 Thread Geoff Levand
On 08/24/2009 10:20 PM, Michael Neuling wrote:
>> Signed-off-by: Geoff Levand 
>> ---
>> Hi Ben,
>> 
>> Please send upstream if it is not too late.
> 
> Is the current one broken?  Maybe a commit message would be nice :-P

The current one is fine.  The main change are:

 o Refresh for 2.6.31.
 o Remove MTD support.
 o Add more HID drivers.

-Geoff

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Re: gianfar.c: Unwanted VLAN tagging on TX frames

2009-08-25 Thread Torsten Fleischer
On Tuesday 25 August 2009 at 01:32:18, Andy Fleming wrote:

>
> Hmmmhow have you tested this?  This looks like it has a bad race
> condition.  The TCTRL register applies to all packets, which means if you
> send a packet with VLAN tags, followed by one without, or visa versa,
> there's a reasonable chance that the second packet's VLAN tags (or lack
> thereof) will take precedence.
>
> Without speaking for the company, I suspect that this is just how the eTSEC
> works with VLAN -- all, or nothing.
>
> Andy

Hi Andy,

I have tested it by sending a single ping to a station within the VLAN 
followed by a ping to a station thats not in a VLAN.
OK, thats not really a significant test, because I did not send a VLAN tagged 
frame immediately followed by one without a tag.
You are right, this code can enable/disable VLAN  tagging before the previous 
packet is processed.

Torsten

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Re:[PATCH 1/2] powerpc: add kexec support on FSL-Book-E

2009-08-25 Thread wilbur.chan
2009/8/5, Sebastian Andrzej Siewior :

> There is no SMP support. The other CPUs are not halted/resumed. At the
> time of writing it I did not have a SMP machine so I did not implement
> it.
> Sebastian
>
Hi  Sebastian,

Recently I've implemented  non-SMP kexec on MPC8572 and P2020ds(2G ram).



I modified your

misc_32.S that , I setuped  two '1G' entries  after the "rfi"
instruction, so that I did

not  need to setup  mapping for instruction address.

As for SMP supporting,I tried to close one of the CPUs in
default_machine_kexec,

and found that , when cpu1  closed  ,and if the second kernel is NON-

SMP,everything went well.so I added some code in

kexec-tools, to make sure the 'kexec' process was running on CPU 0.


So, there left one problem, I can not start the second SMP-kernel,
even if I  closed

CPU1.  Any suggestions?


PTW:

no-smp ---> no-smp.OK
no-smp --->smp...OK

smp(with cpu1 closed)>no-smp..OK
smpw(with cpu1 closed)>smp FAILED


regards,

wilbur
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[PATCH] powerpc/booke: Move MMUCSR definition into mmu-book3e.h

2009-08-25 Thread Kumar Gala
The MMUCSR is now defined as part of the Book-3E architecture so we
can move it into mmu-book3e.h and add some of the additional bits
defined by the architecture specs.

Signed-off-by: Kumar Gala 
---
 arch/powerpc/include/asm/mmu-book3e.h |   12 
 arch/powerpc/include/asm/reg_booke.h  |6 --
 arch/powerpc/mm/tlb_nohash_low.S  |2 --
 3 files changed, 12 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/mmu-book3e.h 
b/arch/powerpc/include/asm/mmu-book3e.h
index d745804..7469581 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -114,6 +114,18 @@
 
 #define MAS7_RPN   0x
 
+/* Bit definitions for MMUCSR0 */
+#define MMUCSR0_TLB1FI 0x0002  /* TLB1 Flash invalidate */
+#define MMUCSR0_TLB0FI 0x0004  /* TLB0 Flash invalidate */
+#define MMUCSR0_TLB2FI 0x0040  /* TLB2 Flash invalidate */
+#define MMUCSR0_TLB3FI 0x0020  /* TLB3 Flash invalidate */
+#define MMUCSR0_TLBFI  (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
+MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
+#define MMUCSR0_TLB0PS 0x0780  /* TLB0 Page Size */
+#define MMUCSR0_TLB1PS 0x7800  /* TLB1 Page Size */
+#define MMUCSR0_TLB2PS 0x00078000  /* TLB2 Page Size */
+#define MMUCSR0_TLB3PS 0x0078  /* TLB3 Page Size */
+
 /* TLBnCFG encoding */
 #define TLBnCFG_N_ENTRY0x0fff  /* number of entries */
 #define TLBnCFG_HES0x2000  /* HW select supported */
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index 2c9c706..9bb81d9 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -430,12 +430,6 @@
 #define L2CSR0_L2LOA   0x0080  /* L2 Cache Lock Overflow Allocate */
 #define L2CSR0_L2LO0x0020  /* L2 Cache Lock Overflow */
 
-/* Bit definitions for MMUCSR0 */
-#define MMUCSR0_TLB1FI 0x0002  /* TLB1 Flash invalidate */
-#define MMUCSR0_TLB0FI 0x0004  /* TLB0 Flash invalidate */
-#define MMUCSR0_TLB2FI 0x0040  /* TLB2 Flash invalidate */
-#define MMUCSR0_TLB3FI 0x0020  /* TLB3 Flash invalidate */
-
 /* Bit definitions for SGR. */
 #define SGR_NORMAL 0   /* Speculative fetching allowed. */
 #define SGR_GUARDED1   /* Speculative fetching disallowed. */
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 7bcd9fb..bbdc5b5 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -124,8 +124,6 @@ _GLOBAL(_tlbil_pid)
  * to have the larger code path before the _SECTION_ELSE
  */
 
-#define MMUCSR0_TLBFI  (MMUCSR0_TLB0FI | MMUCSR0_TLB1FI | \
-MMUCSR0_TLB2FI | MMUCSR0_TLB3FI)
 /*
  * Flush MMU TLB on the local processor
  */
-- 
1.6.0.6

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Re: [PATCH v2] powerpc/85xx: Add eSDHC support for MPC8536DS boards

2009-08-25 Thread Kumar Gala


On Aug 18, 2009, at 6:38 PM, Anton Vorontsov wrote:


This patch simply adds sdhci node to the device tree.

We specify clock-frequency manually, so that eSDHC will work without
upgrading U-Boot. Though, that'll only work for default setup (1500
MHz) on new board revisions. For non-default setups, it's recommended
to upgrade U-Boot, since it will fixup clock-frequency automatically.

Signed-off-by: Anton Vorontsov 
---

On Tue, Aug 11, 2009 at 08:48:32AM -0500, Kumar Gala wrote:

On Aug 7, 2009, at 2:58 PM, Anton Vorontsov wrote:

This patch simply adds sdhci node to the device tree.

We specify clock-frequency manually, so that eSDHC will work without
upgrading U-Boot. Though, that'll only work for default setup (1500
MHz) on new board revisions. For non-default setups, it's  
recommended
to upgrade U-Boot, since it will fixup clock-frequency  
automatically.


Signed-off-by: Anton Vorontsov 
---
arch/powerpc/boot/dts/mpc8536ds.dts |8 
1 files changed, 8 insertions(+), 0 deletions(-)


Can you update the mpc8536ds_36b.dts as well (its in my next branch)


Sure thing.

arch/powerpc/boot/dts/mpc8536ds.dts |8 
arch/powerpc/boot/dts/mpc8536ds_36b.dts |8 
2 files changed, 16 insertions(+), 0 deletions(-)


applied to next.

- k

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Re: [PATCH v2] qe_lib: Set gpio data before changing the direction to output

2009-08-25 Thread Kumar Gala


On Aug 18, 2009, at 4:20 PM, Michael Barkowski wrote:


This avoids having a short glitch if the desired initial value is not
the same as what was previously in the data register.

Signed-off-by: Michael Barkowski 
---
Anton Vorontsov wrote:

There is a recursive locking bug: _set() takes the same spinlock.
So you'd better move this call two lines upper. Otherwise the
patch looks OK.

Thanks!


Thanks - here is v2.

arch/powerpc/sysdev/qe_lib/gpio.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)



applied to next.

- k
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Re: [PATCH 3/3] powerpc/85xx: Add QE USB support for MPC8569E-MDS boards

2009-08-25 Thread Kumar Gala


On Aug 18, 2009, at 6:28 PM, Anton Vorontsov wrote:


- Add gpio-controller node for BCSR17, it is used to control USB
 speed and VBUS;
- Add timer node for QE GTM, needed for USB host;
- Add usb node itself;
- Add some probing code for BCSR GPIOs.

NOTE: QE USB doesn't work on prototype boards, but should work on
 pilot boards if specs and schematics are correct, though we
 don't have the pilot boards to actually test it.

Signed-off-by: Anton Vorontsov 
---
arch/powerpc/boot/dts/mpc8569mds.dts  |   45  
+

arch/powerpc/platforms/85xx/mpc85xx_mds.c |4 ++
2 files changed, 49 insertions(+), 0 deletions(-)



applied to next.

- k
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Re: [PATCH 2/3] powerpc/82xx: Add CPM USB Gadget support for MPC8272ADS boards

2009-08-25 Thread Kumar Gala


On Aug 18, 2009, at 6:28 PM, Anton Vorontsov wrote:


- Add usb node;
- Configure pins and clocks;
- Enable USB function in BCSR.

The support was successfully tested using serial and ethernet gadget
drivers.

Signed-off-by: Anton Vorontsov 
---
arch/powerpc/boot/dts/mpc8272ads.dts  |8 
arch/powerpc/platforms/82xx/mpc8272_ads.c |   14 ++
2 files changed, 22 insertions(+), 0 deletions(-)



applied to next.

- k
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Re: [PATCH 1/3] powerpc/82xx: Fix BCSR bits for MPC8272ADS boards

2009-08-25 Thread Kumar Gala


On Aug 18, 2009, at 6:28 PM, Anton Vorontsov wrote:


mpc8272_ads.c is using BCSR bits definitions from pq2ads.h, but
according to User's Guide the bits are wrong for MPC8272ADS boards
(I guess definitions from pq2ads should only be used for PQ2FADS
boards).

So, let's introduce our own definitions for MPC8272ADS, and don't
include pq2ads.h.

Signed-off-by: Anton Vorontsov 
---
arch/powerpc/platforms/82xx/mpc8272_ads.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)



applied to next.

- k
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Re: [PATCH v2 0/6] Device table matching for SPI subsystem

2009-08-25 Thread Artem Bityutskiy
On Wed, 2009-08-19 at 01:44 +0400, Anton Vorontsov wrote:
> On Mon, Aug 10, 2009 at 10:35:23AM +0300, Artem Bityutskiy wrote:
> > On Fri, 2009-07-31 at 04:39 +0400, Anton Vorontsov wrote:
> > > Andrew,
> > > 
> > > This new patch set overwrites following patches:
> > > 
> > >   hwmon-lm70-convert-to-device-table-matching.patch
> > >   hwmon-adxx-convert-to-device-table-matching.patch
> > >   spi-merge-probe-and-probe_id-callbacks.patch
> > >   spi-prefix-modalias-with-spi.patch
> > >   of-remove-stmm25p40-alias.patch
> > >   mtd-m25p80-convert-to-device-table-matching.patch
> > >   spi-add-support-for-device-table-matching.patch
> > 
> > Are you going to send v3 and address David's comments?
> 
> No v3, but I'm going to address David's comments in a follow up
> patch set where I'll change the probing code anyway.
> 
> > Do you want some of these patches to go via the MTD tree or
> > they better go as a series via some other tree?
> 
> Um.. The MTD patches depend on SPI subsystem changes... If
> David and Andrew are OK with SPI patches going through MTD tree,
> then I'm fine with it as well.

If you are not sure, then I suggest to make these go through something
else (not MTD tree).

-- 
Best Regards,
Artem Bityutskiy (Артём Битюцкий)

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Re: [PATCH] MTD ofpart: Check availability of reg property instead of name property

2009-08-25 Thread Kumar Gala


On Aug 25, 2009, at 8:52 AM, Benjamin Krill wrote:

The previous implementation breaks the dts binding "mtd- 
physmap.txt". This

implementation fixes the issue by checking the availability of the reg
property instead of the name property.

Signed-off-by: Benjamin Krill 
---
drivers/mtd/ofpart.c |   21 ++---
1 files changed, 10 insertions(+), 11 deletions(-)


David,

Can you look at pushing this for .31 if possible.  We have a # of  
device trees in the kernel which have "broken" functionality because  
of this.


- k
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[PATCH][v2] powerpc/85xx: P1020RDB Support Added

2009-08-25 Thread Poonam Aggrwal
P1020 is another member of Freescale QorIQ series of processors.
It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences from P2020:
- 533MHz - 800MHz core frequency.
- 256Kbyte L2 cache
- Ethernet controllers with classification capabilities(new controller).
>From board perspective P1020RDB is same as P2020RDB.

* This code adds the basic basic platform support for P1020RDB.

Signed-off-by: Poonam Aggrwal 
---
- based on http://www.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
- branch->next
- The patch does not contain ethernet support because P1020 contains new eTSEC
  controller. The support will be added in the following patches.
- changes over v1- few changes in interrupt numbers. 
 arch/powerpc/boot/dts/p1020rdb.dts|  477 +
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c |   24 ++
 2 files changed, 501 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p1020rdb.dts

diff --git a/arch/powerpc/boot/dts/p1020rdb.dts 
b/arch/powerpc/boot/dts/p1020rdb.dts
new file mode 100644
index 000..1e0e850
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -0,0 +1,477 @@
+/*
+ * P1020 RDB Device Tree Source
+ *
+ * Copyright 2009 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+/ {
+   model = "fsl,P1020";
+   compatible = "fsl,P1020RDB";
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   aliases {
+   serial0 = &serial0;
+   serial1 = &serial1;
+   pci0 = &pci0;
+   pci1 = &pci1;
+   };
+
+   cpus {
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   PowerPC,p1...@0 {
+   device_type = "cpu";
+   reg = <0x0>;
+   next-level-cache = <&L2>;
+   };
+
+   PowerPC,p1...@1 {
+   device_type = "cpu";
+   reg = <0x1>;
+   next-level-cache = <&L2>;
+   };
+   };
+
+   memory {
+   device_type = "memory";
+   };
+
+   local...@ffe05000 {
+   #address-cells = <2>;
+   #size-cells = <1>;
+   compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
+   reg = <0 0xffe05000 0 0x1000>;
+   interrupts = <16 2>;
+   interrupt-parent = <&mpic>;
+
+   /* NOR and NAND Flashes */
+   ranges = <0x0 0x0 0x0 0xef00 0x0100
+ 0x1 0x0 0x0 0xffa0 0x0004
+ 0x2 0x0 0x0 0xffb0 0x0002>;
+
+   n...@0,0 {
+   #address-cells = <1>;
+   #size-cells = <1>;
+   compatible = "cfi-flash";
+   reg = <0x0 0x0 0x100>;
+   bank-width = <2>;
+   device-width = <1>;
+
+   partit...@0 {
+   /* This location must not be altered  */
+   /* 256KB for Vitesse 7385 Switch firmware */
+   reg = <0x0 0x0004>;
+   label = "NOR (RO) Vitesse-7385 Firmware";
+   read-only;
+   };
+
+   partit...@4 {
+   /* 256KB for DTB Image */
+   reg = <0x0004 0x0004>;
+   label = "NOR (RO) DTB Image";
+   read-only;
+   };
+
+   partit...@8 {
+   /* 3.5 MB for Linux Kernel Image */
+   reg = <0x0008 0x0038>;
+   label = "NOR (RO) Linux Kernel Image";
+   read-only;
+   };
+
+   partit...@40 {
+   /* 11MB for JFFS2 based Root file System */
+   reg = <0x0040 0x00b0>;
+   label = "NOR (RW) JFFS2 Root File System";
+   };
+
+   partit...@f0 {
+   /* This location must not be altered  */
+   /* 512KB for u-boot Bootloader Image */
+   /* 512KB for u-boot Environment Variables */
+   reg = <0x00f0 0x0010>;
+   label = "NOR (RO) U-Boot Image";
+   read-only;
+   };
+ 

[PATCH] MTD ofpart: Check availability of reg property instead of name property

2009-08-25 Thread Benjamin Krill
The previous implementation breaks the dts binding "mtd-physmap.txt". This
implementation fixes the issue by checking the availability of the reg
property instead of the name property.

Signed-off-by: Benjamin Krill 
---
 drivers/mtd/ofpart.c |   21 ++---
 1 files changed, 10 insertions(+), 11 deletions(-)

diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c
index 3e164f0..62d6a78 100644
--- a/drivers/mtd/ofpart.c
+++ b/drivers/mtd/ofpart.c
@@ -46,21 +46,12 @@ int __devinit of_mtd_parse_partitions(struct device *dev,
const u32 *reg;
int len;
 
-   /* check if this is a partition node */
-   partname = of_get_property(pp, "name", &len);
-   if (strcmp(partname, "partition") != 0) {
+   reg = of_get_property(pp, "reg", &len);
+   if (!reg) {
nr_parts--;
continue;
}
 
-   reg = of_get_property(pp, "reg", &len);
-   if (!reg || (len != 2 * sizeof(u32))) {
-   of_node_put(pp);
-   dev_err(dev, "Invalid 'reg' on %s\n", node->full_name);
-   kfree(*pparts);
-   *pparts = NULL;
-   return -EINVAL;
-   }
(*pparts)[i].offset = reg[0];
(*pparts)[i].size = reg[1];
 
@@ -75,6 +66,14 @@ int __devinit of_mtd_parse_partitions(struct device *dev,
i++;
}
 
+   if (!i) {
+   of_node_put(pp);
+   dev_err(dev, "No valid partition found on %s\n", 
node->full_name);
+   kfree(*pparts);
+   *pparts = NULL;
+   return -EINVAL;
+   }
+
return nr_parts;
 }
 EXPORT_SYMBOL(of_mtd_parse_partitions);
-- 
1.5.4.5

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