RE: [PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
On Fri, 2010-11-26 at 21:02 +0530, Rupjyoti Sarmah wrote: > Hi Wolfgang, > > >> This results in a mix of "amcc," and "apm," strings. > >> Are there any plans to unify this? > We can make all as apm, but right now I believe there is no plan to do so. > > >>Earlier versions of the patch included a delay after the clrbits8() > >>call as well. Is it intentional that you dropped this now? > It is dropped intentionally. > > Rest of your suggestions, I will modify and resubmit. Thanks. I think this should remain consistent within the platform and stick to "amcc". Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
Hi Wolfgang, >> This results in a mix of "amcc," and "apm," strings. >> Are there any plans to unify this? We can make all as apm, but right now I believe there is no plan to do so. >>Earlier versions of the patch included a delay after the clrbits8() >>call as well. Is it intentional that you dropped this now? It is dropped intentionally. Rest of your suggestions, I will modify and resubmit. Thanks. Regards, Rup ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
Dear Rupjyoti Sarmah,
In message <201011261110.oaqbanzl012...@amcc.com> you wrote:
>
> + c...@2,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "apm,ppc460ex-bcsr";
This results in a mix of "amcc," and "apm," strings.
Are there any plans to unify this?
> diff --git a/arch/powerpc/platforms/44x/canyonlands.c
> b/arch/powerpc/platforms/44x/canyonlands.c
> new file mode 100644
> index 000..61e80ce
> --- /dev/null
> +++ b/arch/powerpc/platforms/44x/canyonlands.c
> @@ -0,0 +1,120 @@
> +/*
> + * This contain platform specific code for Canyonlands board based on
> + * APM ppc44x series of processors.
Canyonlands is always PPC460EX, or does it ever come with other
processors as well?
> +static int __init ppc44x_probe(void)
> +{
> + unsigned long root = of_get_flat_dt_root();
> + if (of_flat_dt_is_compatible(root, "amcc,canyonlands")) {
> + ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
> + return 1;
> + }
> + return 0;
> +}
Bad indentation.
> + /* Disable USB, through the BCSR7 bits */
> + setbits8(&bcsr[7], BCSR_USB_EN);
> +
> + /* Wait for a while after reset */
> + msleep(100);
> +
> + /* Enable USB here */
> + clrbits8(&bcsr[7], BCSR_USB_EN);
> +
> + /*
> + * Configure multiplexed gpio16 and gpio19 as alternate1 output
> + * source after USB reset.This configuration is done through GPIO0_TSRH
> + * and GPIO0_OSRH bits 0:1 and 6:7.
> + */
Earlier versions of the patch included a delay after the clrbits8()
call as well. Is it intentional that you dropped this now?
Best regards,
Wolfgang Denk
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HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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program can be reduced to one instruction which doesn't work.
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[PATCH v3] ppc44x:PHY fixup for USB on canyonlands board
This fix is a reset for USB PHY that requires some amount of time for power to
be stable on Canyonlands.
Signed-off-by: Rupjyoti Sarmah
---
changes from previous version:
- moved a Macro from header file to the source file
- corrected & updated comments
- replaced the out_be32 calls by setbits32 calls
- bootup delay reduced, udelay is replaced by msleep
arch/powerpc/boot/dts/canyonlands.dts | 13 +++
arch/powerpc/platforms/44x/44x.h |4 +
arch/powerpc/platforms/44x/Makefile|1 +
arch/powerpc/platforms/44x/canyonlands.c | 120
arch/powerpc/platforms/44x/ppc44x_simple.c |1 -
5 files changed, 138 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/44x/canyonlands.c
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts
index a303703..a9f7538 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -224,6 +224,13 @@
};
};
+ c...@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "apm,ppc460ex-bcsr";
+ reg = <2 0x0 0x9>;
+ };
+
n...@3,0 {
compatible = "ibm,ndfc";
reg = <0x0003 0x
0x2000>;
@@ -320,6 +327,12 @@
interrupts = <0x3 0x4>;
};
+ GPIO0: g...@ef600b00 {
+ compatible = "ibm,ppc4xx-gpio";
+ reg = <0xef600b00 0x0048>;
+ gpio-controller;
+ };
+
ZMII0: emac-z...@ef600d00 {
compatible = "ibm,zmii-460ex", "ibm,zmii";
reg = <0xef600d00 0x000c>;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b..63f703e 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH 0xC
+#define GPIO0_TSRH 0x14
+#define GPIO0_ISR1H0x34
+
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Makefile
b/arch/powerpc/platforms/44x/Makefile
index 82ff326..6854e73 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_WARP) += warp.o
obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
obj-$(CONFIG_ISS4xx) += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c
b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000..61e80ce
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,120 @@
+/*
+ * This contain platform specific code for Canyonlands board based on
+ * APM ppc44x series of processors.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "44x.h"
+
+#define BCSR_USB_EN0x11
+
+static __initdata struct of_device_id ppc44x_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init ppc44x_device_probe(void)
+{
+ of_platform_bus_probe(NULL, ppc44x_of_bus, NULL);
+
+ return 0;
+}
+machine_device_initcall(canyonlands, ppc44x_device_probe);
+
+/* Using this code only for the Canyonlands board. */
+
+static int __init ppc44x_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ if (of_flat_dt_is_compatible(root, "amcc,canyonlands")) {
+
[PATCH] ucc_geth: fix ucc halt problem in half duplex mode
In commit 58933c64(ucc_geth: Fix the wrong the Rx/Tx FIFO size),
the UCC_GETH_UTFTT_INIT is set to 512 based on the recommendation
of the QE Reference Manual. But that will sometimes cause tx halt
while working in half duplex mode.
According to errata draft QE_GENERAL-A003(High Tx Virtual FIFO
threshold size can cause UCC to halt), setting UTFTT less than
[(UTFS x (M - 8)/M) - 128] will prevent this from happening
(M is the minimum buffer size).
The patch changes UTFTT back to 256.
Signed-off-by: Li Yang
Cc: Jean-Denis Boyer
Cc: Andreas Schmitz
Cc: Anton Vorontsov
---
drivers/net/ucc_geth.h |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 05a9558..a78b9c0 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -899,7 +899,8 @@ struct ucc_geth_hardware_statistics {
#define UCC_GETH_UTFS_INIT 512/* Tx virtual FIFO size
*/
#define UCC_GETH_UTFET_INIT 256/* 1/2 utfs */
-#define UCC_GETH_UTFTT_INIT 512
+#define UCC_GETH_UTFTT_INIT 256/* 1/2 utfs
+ due to errata */
/* Gigabit Ethernet (1000 Mbps) */
#define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual
FIFO size */
--
1.6.6-rc1.GIT
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