Re: PCIe end-point on FPGA doesn't show up on PCI bus when configured

2011-01-30 Thread tiejun.chen
Stijn Devriendt wrote:
 As far as I know, you're violating PCIe spec.
 PCIe base spec (rev1.0a) states that a device must start link training
 within 80ms
 after a fundamental reset and that each device must be ready to accept config
 requests within 100ms after fundamental reset.

Nope.

From this scenario I only doubts this problem is issued like some Freescale PCIe
errata. From that chip errata you can find this easily, This sequence resets
the PCI Express controllers only., and so these codes are used definitely on
u-boot.

Tiejun

 
 Regards,
 Stijn
 
 On Sun, Jan 30, 2011 at 4:07 AM, tiejun.chen tiejun.c...@windriver.com 
 wrote:
 Elie De Brauwer wrote:
 On 01/28/11 19:37, Matias Garcia wrote:
 I'm running a vanilla linux 2.6.37 kernel on a Freescale P2020 dual-core
 processor, and have the following conundrum: I configure the FPGA which
 brings up a PCIe interface to the processor. I scan both PCI buses on
 the system (I believe the second bus is behind the Freescale integrated
 bridge on the first), and it doesn't show up. I initiate a reset on the
 processor, and both U-boot and Linux now see the FPGA PCI device at
 :01:00.00. I've noticed some of the memory mappings in the PCI
 bridge windows are different between the two boot sequences. I've tried
 all manner of pci calls (including the pcibios_fixup routines) on the
 bridge device (including removing and re-scanning it), and on bus 1,
 which is otherwise empty, to no avail. Following are some debug listings
 from dmesg; any help/ideas in tracking down the problem (hardware or
 software) is greatly appreciated.

 #Boot without FPGA configured:
 snip
 Found FSL PCI host bridge at 0x0008ff70a000. Firmware bus number:
 0-255
 PCI host bridge /pcie@8ff70a000 ranges:
 MEM 0x00088000..0x00088fff - 0x8000
 IO 0x0008a000..0x0008a000 - 0x
 /pcie@8ff70a000: PCICSRBAR @ 0xfff0
 /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
 Adjusting the memory map could reduce unnecessary bounce buffering.
 /pcie@8ff70a000: DMA window size is 0x8000
 MPC85xx RDB board from Freescale Semiconductor
 ...
 PCI: Probing PCI hardware
 pci :00:00.0: [1957:0070] type 1 class 0x000b20
 pci :00:00.0: ignoring class b20 (doesn't match header type 01)
 pci :00:00.0: supports D1 D2
 pci :00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
 pci :00:00.0: PME# disabled
 pci :00:00.0: PCI bridge to [bus 01-ff]
 pci :00:00.0: bridge window [io 0x-0x] (disabled)
 pci :00:00.0: bridge window [mem 0x-0x000f] (disabled)
 pci :00:00.0: bridge window [mem 0x-0x000f pref]
 (disabled)
 PCI :00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
 pci :00:00.0: PCI bridge to [bus 01-01]
 pci :00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
 pci :00:00.0: bridge window [mem 0x88000-0x88fff]
 pci :00:00.0: bridge window [mem pref disabled]
 pci :00:00.0: enabling device (0106 - 0107)
 pci_bus :00: resource 0 [io 0xffbed000-0xffbfcfff]
 pci_bus :00: resource 1 [mem 0x88000-0x88fff]
 pci_bus :01: resource 0 [io 0xffbed000-0xffbfcfff]
 pci_bus :01: resource 1 [mem 0x88000-0x88fff]

 #Reset with FPGA configured:
 snip
 Found FSL PCI host bridge at 0x0008ff70a000. Firmware bus number:
 0-255
 PCI host bridge /pcie@8ff70a000 ranges:
 MEM 0x00088000..0x00088fff - 0x8000
 IO 0x0008a000..0x0008a000 - 0x
 /pcie@8ff70a000: PCICSRBAR @ 0xfff0
 /pcie@8ff70a000: WARNING: Outbound window cfg leaves gaps in memory map.
 Adjusting the memory map could reduce unnecessary bounce buffering.
 /pcie@8ff70a000: DMA window size is 0x8000
 MPC85xx RDB board from Freescale Semiconductor
 ...
 PCI: Probing PCI hardware
 pci :00:00.0: [1957:0070] type 1 class 0x000b20
 pci :00:00.0: ignoring class b20 (doesn't match header type 01)
 pci :00:00.0: supports D1 D2
 pci :00:00.0: PME# supported from D0 D1 D2 D3hot D3cold
 pci :00:00.0: PME# disabled
 pci :01:00.0: [1172:0004] type 0 class 0x001000
 pci :01:00.0: reg 10: [mem 0x8000-0x80ff]
 pci :01:00.0: reg 14: [mem 0x8100-0x81ff]
 pci :01:00.0: reg 18: [mem 0x8200-0x82ff]
 pci :00:00.0: PCI bridge to [bus 01-ff]
 pci :00:00.0: bridge window [io 0x-0x] (disabled)
 pci :00:00.0: bridge window [mem 0x8000-0x82ff]
 pci :00:00.0: bridge window [mem 0x1000-0x000f pref]
 (disabled)
 irq: irq 0 on host /soc@8ff70/pic@4 mapped to virtual irq 16
 PCI :00 Cannot reserve Legacy IO [io 0xffbed000-0xffbedfff]
 pci :00:00.0: PCI bridge to [bus 01-01]
 pci :00:00.0: bridge window [io 0xffbed000-0xffbfcfff]
 pci :00:00.0: bridge window [mem 0x88000-0x88fff]
 pci :00:00.0: bridge window [mem pref disabled]
 pci :00:00.0: enabling device (0106 - 0107)
 

State of suspend-to-ram?

2011-01-30 Thread Mathias Krause
Hi all!

First of all: Sorry, this is the wrong mailing list, but I searched a lot and 
found none that would fit to PPC user-related problems -- linux-ppc would have 
been one but this one seems to be dead since 2004?!

I've a G4 based Mac mini and would like to suspend it to RAM, though the 
vanilla kernel doesn't allow me to do this (/sys/power/state mentions only 
disk). The reason for this is my platform is marked as PMAC_MB_MAY_SLEEP 
instead of PMAC_MB_CAN_SLEEP in arch/powerpc/platforms/powermac/feature.c. So I 
changed that to be PMAC_MB_CAN_SLEEP and was able to suspend the system using 
the pm-suspend script from the pm-utils suite. The LED on the front was pulsing 
like it is when suspended under MacOS X. After pushing the power button the 
system started to resume but just got stuck. I see no messages on the console, 
nothing in syslog. So I assume the system panics pretty early in the resume 
path. Because the system has no serial console the debug capabilities are 
fairly limited. Any hints why this doesn't work or how to debug this any 
further?

Some system information:

mk@maxi:~$ cat /proc/cpuinfo 
processor   : 0
cpu : 7447A, altivec supported
clock   : 1416.61MHz
revision: 1.2 (pvr 8003 0102)
bogomips: 83.24
timebase: 41620997
platform: PowerMac
model   : PowerMac10,1
machine : PowerMac10,1
motherboard : PowerMac10,1 MacRISC3 Power Macintosh 
detected as : 287 (Mac mini)
pmac flags  : 0001
L2 cache: 512K unified
pmac-generation : NewWorld
Memory  : 1024 MB
mk@maxi:~$ uname -a 
Linux maxi 2.6.37+ #2 Mon Jan 24 08:56:01 CET 2011 ppc GNU/Linux

Regards,
Mathias

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Re: State of suspend-to-ram?

2011-01-30 Thread Benjamin Herrenschmidt
On Sun, 2011-01-30 at 12:03 +0100, Mathias Krause wrote:
 Hi all!
 
 First of all: Sorry, this is the wrong mailing list, but I searched a
 lot and found none that would fit to PPC user-related problems --
 linux-ppc would have been one but this one seems to be dead since
 2004?

 .../

The matter is mostly to get the video chip back. It gets powered down
during suspend and we don't have the black magic formula to
re-initialize it.

I've reverse-engineered that for other similar chips, but not that one.
If you think you're up to the task, let me know privately and I'll point
you to some tools that can help spying what the MacOS driver does, which
you can then use to find the right sequence. But beware, it's nasty :-)

Cheers,
Ben.

 I've a G4 based Mac mini and would like to suspend it to RAM, though
 the vanilla kernel doesn't allow me to do this (/sys/power/state
 mentions only disk). The reason for this is my platform is marked as
 PMAC_MB_MAY_SLEEP instead of PMAC_MB_CAN_SLEEP in
 arch/powerpc/platforms/powermac/feature.c. So I changed that to be
 PMAC_MB_CAN_SLEEP and was able to suspend the system using the
 pm-suspend script from the pm-utils suite. The LED on the front was
 pulsing like it is when suspended under MacOS X. After pushing the
 power button the system started to resume but just got stuck. I see no
 messages on the console, nothing in syslog. So I assume the system
 panics pretty early in the resume path. Because the system has no
 serial console the debug capabilities are fairly limited. Any hints
 why this doesn't work or how to debug this any further?
 
 Some system information:
 
 mk@maxi:~$ cat /proc/cpuinfo 
 processor : 0
 cpu   : 7447A, altivec supported
 clock : 1416.61MHz
 revision  : 1.2 (pvr 8003 0102)
 bogomips  : 83.24
 timebase  : 41620997
 platform  : PowerMac
 model : PowerMac10,1
 machine   : PowerMac10,1
 motherboard   : PowerMac10,1 MacRISC3 Power Macintosh 
 detected as   : 287 (Mac mini)
 pmac flags: 0001
 L2 cache  : 512K unified
 pmac-generation   : NewWorld
 Memory: 1024 MB
 mk@maxi:~$ uname -a 
 Linux maxi 2.6.37+ #2 Mon Jan 24 08:56:01 CET 2011 ppc GNU/Linux
 
 Regards,
 Mathias
 
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linux-next: build failure after merge of the final tree

2011-01-30 Thread Stephen Rothwell
Hi all,

After merging the final tree, today's linux-next build (powerpc
allyesconfig) failed like this:

arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:989: Error: attempt to move .org backwards
arch/powerpc/kernel/exceptions-64s.S:999: Error: attempt to move .org backwards
arch/powerpc/kernel/exceptions-64s.S:1008: Error: attempt to move .org backwards

So something has added a bit of bloat in there.  I have left this broken
for now.
-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/


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[PATCH 0/3] dt: documentation reorganization

2011-01-30 Thread Grant Likely
This series reorganizes and cleans up the device tree documentation
to make the directory useful for non-powerpc users.

Patch 3 of this series adds some documentation about the ARM device
tree boot interface, but I'm posting this one for RFC only at the
moment.  I'll not merge this until dt support for ARM is also merged.

g.

---

Grant Likely (3):
  dt: Move device tree documentation out of powerpc directory
  dt: Remove obsolete description of powerpc boot interface
  dt: add documentation of ARM dt boot interface


 Documentation/devicetree/bindings/ata/fsl-sata.txt |0 
 Documentation/devicetree/bindings/eeprom.txt   |0 
 .../devicetree/bindings/gpio/8xxx_gpio.txt |0 
 Documentation/devicetree/bindings/gpio/gpio.txt|0 
 Documentation/devicetree/bindings/gpio/led.txt |0 
 Documentation/devicetree/bindings/i2c/fsl-i2c.txt  |0 
 Documentation/devicetree/bindings/marvell.txt  |0 
 .../devicetree/bindings/mmc/fsl-esdhc.txt  |0 
 .../devicetree/bindings/mmc/mmc-spi-slot.txt   |0 
 .../devicetree/bindings/mtd/fsl-upm-nand.txt   |0 
 .../devicetree/bindings/mtd/mtd-physmap.txt|0 
 .../devicetree/bindings/net/can/mpc5xxx-mscan.txt  |0 
 .../devicetree/bindings/net/can/sja1000.txt|0 
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |0 
 .../devicetree/bindings/net/mdio-gpio.txt  |0 
 Documentation/devicetree/bindings/net/phy.txt  |0 
 .../devicetree/bindings/pci/83xx-512x-pci.txt  |0 
 .../devicetree/bindings/powerpc/4xx/cpm.txt|0 
 .../devicetree/bindings/powerpc/4xx/emac.txt   |0 
 .../devicetree/bindings/powerpc/4xx/ndfc.txt   |0 
 .../bindings/powerpc/4xx/ppc440spe-adma.txt|0 
 .../devicetree/bindings/powerpc/4xx/reboot.txt |0 
 .../devicetree/bindings/powerpc/fsl/board.txt  |0 
 .../devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/brg.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/pic.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/usb.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/gpio.txt   |0 
 .../bindings/powerpc/fsl/cpm_qe/network.txt|0 
 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/firmware.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/qe/par_io.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/ucc.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/usb.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/serial.txt |0 
 .../devicetree/bindings/powerpc/fsl/diu.txt|0 
 .../devicetree/bindings/powerpc/fsl/dma.txt|0 
 .../devicetree/bindings/powerpc/fsl/ecm.txt|0 
 .../devicetree/bindings/powerpc/fsl/gtm.txt|0 
 .../devicetree/bindings/powerpc/fsl/guts.txt   |0 
 .../devicetree/bindings/powerpc/fsl/lbc.txt|0 
 .../devicetree/bindings/powerpc/fsl/mcm.txt|0 
 .../bindings/powerpc/fsl/mcu-mpc8349emitx.txt  |0 
 .../bindings/powerpc/fsl/mpc5121-psc.txt   |0 
 .../devicetree/bindings/powerpc/fsl/mpc5200.txt|0 
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |0 
 .../devicetree/bindings/powerpc/fsl/msi-pic.txt|0 
 .../devicetree/bindings/powerpc/fsl/pmc.txt|0 
 .../devicetree/bindings/powerpc/fsl/sec.txt|0 
 .../devicetree/bindings/powerpc/fsl/ssi.txt|0 
 .../bindings/powerpc/nintendo/gamecube.txt |0 
 .../devicetree/bindings/powerpc/nintendo/wii.txt   |0 
 Documentation/devicetree/bindings/spi/fsl-spi.txt  |0 
 Documentation/devicetree/bindings/spi/spi-bus.txt  |0 
 Documentation/devicetree/bindings/usb/fsl-usb.txt  |0 
 Documentation/devicetree/bindings/usb/usb-ehci.txt |0 
 Documentation/devicetree/bindings/xilinx.txt   |0 
 Documentation/devicetree/booting-without-of.txt|   86 +---
 60 files changed, 40 insertions(+), 46 deletions(-)
 rename Documentation/{powerpc/dts-bindings/fsl/sata.txt = 
devicetree/bindings/ata/fsl-sata.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/eeprom.txt = 
devicetree/bindings/eeprom.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/8xxx_gpio.txt = 
devicetree/bindings/gpio/8xxx_gpio.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/gpio/gpio.txt = 
devicetree/bindings/gpio/gpio.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/gpio/led.txt = 
devicetree/bindings/gpio/led.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/i2c.txt = 
devicetree/bindings/i2c/fsl-i2c.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/marvell.txt = 
devicetree/bindings/marvell.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/esdhc.txt = 

[PATCH 1/3] dt: Move device tree documentation out of powerpc directory

2011-01-30 Thread Grant Likely
The device tree is used by more than just PowerPC.  Make the documentation
directory available to all.

v2: reorganized files while moving to create arch and driver specific
directories.

Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
 Documentation/devicetree/bindings/ata/fsl-sata.txt |0 
 Documentation/devicetree/bindings/eeprom.txt   |0 
 .../devicetree/bindings/gpio/8xxx_gpio.txt |0 
 Documentation/devicetree/bindings/gpio/gpio.txt|0 
 Documentation/devicetree/bindings/gpio/led.txt |0 
 Documentation/devicetree/bindings/i2c/fsl-i2c.txt  |0 
 Documentation/devicetree/bindings/marvell.txt  |0 
 .../devicetree/bindings/mmc/fsl-esdhc.txt  |0 
 .../devicetree/bindings/mmc/mmc-spi-slot.txt   |0 
 .../devicetree/bindings/mtd/fsl-upm-nand.txt   |0 
 .../devicetree/bindings/mtd/mtd-physmap.txt|0 
 .../devicetree/bindings/net/can/mpc5xxx-mscan.txt  |0 
 .../devicetree/bindings/net/can/sja1000.txt|0 
 .../devicetree/bindings/net/fsl-tsec-phy.txt   |0 
 .../devicetree/bindings/net/mdio-gpio.txt  |0 
 Documentation/devicetree/bindings/net/phy.txt  |0 
 .../devicetree/bindings/pci/83xx-512x-pci.txt  |0 
 .../devicetree/bindings/powerpc/4xx/cpm.txt|0 
 .../devicetree/bindings/powerpc/4xx/emac.txt   |0 
 .../devicetree/bindings/powerpc/4xx/ndfc.txt   |0 
 .../bindings/powerpc/4xx/ppc440spe-adma.txt|0 
 .../devicetree/bindings/powerpc/4xx/reboot.txt |0 
 .../devicetree/bindings/powerpc/fsl/board.txt  |0 
 .../devicetree/bindings/powerpc/fsl/cpm_qe/cpm.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/brg.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/i2c.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/pic.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/cpm/usb.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/gpio.txt   |0 
 .../bindings/powerpc/fsl/cpm_qe/network.txt|0 
 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/firmware.txt|0 
 .../bindings/powerpc/fsl/cpm_qe/qe/par_io.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/pincfg.txt  |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/ucc.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/qe/usb.txt |0 
 .../bindings/powerpc/fsl/cpm_qe/serial.txt |0 
 .../devicetree/bindings/powerpc/fsl/diu.txt|0 
 .../devicetree/bindings/powerpc/fsl/dma.txt|0 
 .../devicetree/bindings/powerpc/fsl/ecm.txt|0 
 .../devicetree/bindings/powerpc/fsl/gtm.txt|0 
 .../devicetree/bindings/powerpc/fsl/guts.txt   |0 
 .../devicetree/bindings/powerpc/fsl/lbc.txt|0 
 .../devicetree/bindings/powerpc/fsl/mcm.txt|0 
 .../bindings/powerpc/fsl/mcu-mpc8349emitx.txt  |0 
 .../bindings/powerpc/fsl/mpc5121-psc.txt   |0 
 .../devicetree/bindings/powerpc/fsl/mpc5200.txt|0 
 .../devicetree/bindings/powerpc/fsl/mpic.txt   |0 
 .../devicetree/bindings/powerpc/fsl/msi-pic.txt|0 
 .../devicetree/bindings/powerpc/fsl/pmc.txt|0 
 .../devicetree/bindings/powerpc/fsl/sec.txt|0 
 .../devicetree/bindings/powerpc/fsl/ssi.txt|0 
 .../bindings/powerpc/nintendo/gamecube.txt |0 
 .../devicetree/bindings/powerpc/nintendo/wii.txt   |0 
 Documentation/devicetree/bindings/spi/fsl-spi.txt  |0 
 Documentation/devicetree/bindings/spi/spi-bus.txt  |0 
 Documentation/devicetree/bindings/usb/fsl-usb.txt  |0 
 Documentation/devicetree/bindings/usb/usb-ehci.txt |0 
 Documentation/devicetree/bindings/xilinx.txt   |0 
 Documentation/devicetree/booting-without-of.txt|0 
 60 files changed, 0 insertions(+), 0 deletions(-)
 rename Documentation/{powerpc/dts-bindings/fsl/sata.txt = 
devicetree/bindings/ata/fsl-sata.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/eeprom.txt = 
devicetree/bindings/eeprom.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/8xxx_gpio.txt = 
devicetree/bindings/gpio/8xxx_gpio.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/gpio/gpio.txt = 
devicetree/bindings/gpio/gpio.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/gpio/led.txt = 
devicetree/bindings/gpio/led.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/i2c.txt = 
devicetree/bindings/i2c/fsl-i2c.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/marvell.txt = 
devicetree/bindings/marvell.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/esdhc.txt = 
devicetree/bindings/mmc/fsl-esdhc.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/mmc-spi-slot.txt = 
devicetree/bindings/mmc/mmc-spi-slot.txt} (100%)
 rename Documentation/{powerpc/dts-bindings/fsl/upm-nand.txt = 
devicetree/bindings/mtd/fsl-upm-nand.txt} (100%)
 rename 

[PATCH 2/3] dt: Remove obsolete description of powerpc boot interface

2011-01-30 Thread Grant Likely
32 and 64 bit powerpc support has been merged for a while now, but
the booting-without-of.txt document still describes 32 bit as not
supporting multiplatform, which is no longer true.  This patch fixes
the documentation.

Also remove references to powerpc-specific details outside of section
I in preparation to add details for other architectures.

Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---
 Documentation/devicetree/booting-without-of.txt |   60 +++
 1 files changed, 8 insertions(+), 52 deletions(-)

diff --git a/Documentation/devicetree/booting-without-of.txt 
b/Documentation/devicetree/booting-without-of.txt
index 7400d75..6bca668 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -13,7 +13,6 @@ Table of Contents
 
   I - Introduction
 1) Entry point for arch/powerpc
-2) Board support
 
   II - The DT block format
 1) Header
@@ -123,7 +122,7 @@ Revision Information
 I - Introduction
 
 
-During the recent development of the Linux/ppc64 kernel, and more
+During the development of the Linux/ppc64 kernel, and more
 specifically, the addition of new platform types outside of the old
 IBM pSeries/iSeries pair, it was decided to enforce some strict rules
 regarding the kernel entry and bootloader - kernel interfaces, in
@@ -146,7 +145,7 @@ section III, but, for example, the kernel does not require 
you to
 create a node for every PCI device in the system. It is a requirement
 to have a node for PCI host bridges in order to provide interrupt
 routing informations and memory/IO ranges, among others. It is also
-recommended to define nodes for on chip devices and other busses that
+recommended to define nodes for on chip devices and other buses that
 don't specifically fit in an existing OF specification. This creates a
 great flexibility in the way the kernel can then probe those and match
 drivers to device, without having to hard code all sorts of tables. It
@@ -210,12 +209,6 @@ it with special cases.
 with all CPUs. The way to do that with method b) will be
 described in a later revision of this document.
 
-
-2) Board support
-
-
-64-bit kernels:
-
Board supports (platforms) are not exclusive config options. An
arbitrary set of board supports can be built in a single kernel
image. The kernel will know what set of functions to use for a
@@ -234,48 +227,11 @@ it with special cases.
 containing the various callbacks that the generic code will
 use to get to your platform specific code
 
-c) Add a reference to your ppc_md structure in the
-machines table in arch/powerpc/kernel/setup_64.c if you are
-a 64-bit platform.
-
-d) request and get assigned a platform number (see PLATFORM_*
-constants in arch/powerpc/include/asm/processor.h
-
-32-bit embedded kernels:
-
-  Currently, board support is essentially an exclusive config option.
-  The kernel is configured for a single platform.  Part of the reason
-  for this is to keep kernels on embedded systems small and efficient;
-  part of this is due to the fact the code is already that way. In the
-  future, a kernel may support multiple platforms, but only if the
+  A kernel image may support multiple platforms, but only if the
   platforms feature the same core architecture.  A single kernel build
   cannot support both configurations with Book E and configurations
   with classic Powerpc architectures.
 
-  32-bit embedded platforms that are moved into arch/powerpc using a
-  flattened device tree should adopt the merged tree practice of
-  setting ppc_md up dynamically, even though the kernel is currently
-  built with support for only a single platform at a time.  This allows
-  unification of the setup code, and will make it easier to go to a
-  multiple-platform-support model in the future.
-
-NOTE: I believe the above will be true once Ben's done with the merge
-of the boot sequences someone speak up if this is wrong!
-
-  To add a 32-bit embedded platform support, follow the instructions
-  for 64-bit platforms above, with the exception that the Kconfig
-  option should be set up such that the kernel builds exclusively for
-  the platform selected.  The processor type for the platform should
-  enable another config option to select the specific board
-  supported.
-
-NOTE: If Ben doesn't merge the setup files, may need to change this to
-point to setup_32.c
-
-
-   I will describe later the boot process and various callbacks that
-   your platform should implement.
-
 
 II - The DT block format
 
@@ -300,8 +256,8 @@ the block to RAM before passing it to the kernel.
 1) Header
 -
 
-   The kernel is entered with r3 pointing to an area of memory that is
-   roughly described in arch/powerpc/include/asm/prom.h by the structure
+   The kernel is passed the physical address pointing to an area of 

[PATCH 3/3 RFC] dt: add documentation of ARM dt boot interface

2011-01-30 Thread Grant Likely
Signed-off-by: Grant Likely grant.lik...@secretlab.ca
---

For RFC only.  I do not plan to merge this change yet.

g.

 Documentation/devicetree/booting-without-of.txt |   40 +++
 1 files changed, 40 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/booting-without-of.txt 
b/Documentation/devicetree/booting-without-of.txt
index 6bca668..3950aea 100644
--- a/Documentation/devicetree/booting-without-of.txt
+++ b/Documentation/devicetree/booting-without-of.txt
@@ -13,6 +13,7 @@ Table of Contents
 
   I - Introduction
 1) Entry point for arch/powerpc
+2) Entry point for arch/arm
 
   II - The DT block format
 1) Header
@@ -232,6 +233,45 @@ it with special cases.
   cannot support both configurations with Book E and configurations
   with classic Powerpc architectures.
 
+2) Entry point for arch/arm
+---
+
+   There is one and one single entry point to the kernel, at the start
+   of the kernel image. That entry point supports two calling
+   conventions.  A summary of the interface is described here.  A full
+   description of the boot requirements is documented in
+   Documentation/arm/Booting
+
+a) ATAGS interface.  Minimal information is passed from firmware
+to the kernel with a tagged list of predefined parameters.
+
+r0 : 0
+
+r1 : Machine type number
+
+r2 : Physical address of tagged list in system RAM
+
+b) Entry with a flattened device-tree block.  Firmware loads the
+physical address of the flattened device tree block (dtb) into r2,
+r1 is not used, but it is considered good practise to use a valid
+machine number as described in Documentation/arm/Booting.
+
+r0 : 0
+
+r1 : Valid machine type number.  When using a device tree,
+a single machine type number will often be assigned to
+represent a class or family of SoCs.
+
+r2 : physical pointer to the device-tree block
+(defined in chapter II) in RAM.  Device tree can be located
+anywhere in system RAM, but it should be aligned on a 32 bit
+boundary.
+
+   The kernel will differentiate between ATAGS and device tree booting by
+   reading the memory pointed to by r1 and looking for either the flattened
+   device tree block magic value (0xd00dfeed) or the ATAG_CORE value at
+   offset 0x4 from r2 (0x54410001).
+
 
 II - The DT block format
 

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