Re: Add support for the currituck 476 platform from IBM (v2)
On Thu, Dec 01, 2011 at 06:39:16PM +1100, Tony Breeds wrote: > Patches 1 to 3 > Modify the 44x PCI code to work with 476fpe/currituck. > Patch 4 > Is an old patch by Christoph Egger that fell through the cracks > somehow. > Patches 5 and 6 > Modify the bootwrapper to handle 476fpe/currituck > Patch 7 > The SoC support. > Patch 8 > The currituck board support. Sorry I forgot the diffstat arch/powerpc/boot/Makefile |5 +- arch/powerpc/boot/dcr.h |6 + arch/powerpc/boot/div64.S| 52 ++ arch/powerpc/boot/dts/currituck.dts | 237 ++ arch/powerpc/boot/treeboot-currituck.c | 119 + arch/powerpc/boot/wrapper|3 + arch/powerpc/configs/44x/currituck_defconfig | 110 arch/powerpc/include/asm/reg.h |1 + arch/powerpc/kernel/cputable.c | 14 ++ arch/powerpc/kernel/head_44x.S |2 + arch/powerpc/mm/44x_mmu.c|4 - arch/powerpc/platforms/44x/Kconfig | 14 ++ arch/powerpc/platforms/44x/Makefile |1 + arch/powerpc/platforms/44x/currituck.c | 204 ++ arch/powerpc/sysdev/ppc4xx_pci.c | 85 +- arch/powerpc/sysdev/ppc4xx_pci.h |7 + 16 files changed, 851 insertions(+), 13 deletions(-) Yours Tony pgp7bANgvympg.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 8/8] 44x/currituck: Add support for the new IBM currituck platform
Based on original work by David 'Shaggy' Kliekamp.
Signed-off-by: Tony Breeds
---
arch/powerpc/boot/Makefile |5 +-
arch/powerpc/boot/dts/currituck.dts | 237 ++
arch/powerpc/boot/treeboot-currituck.c | 119 +
arch/powerpc/boot/wrapper|3 +
arch/powerpc/configs/44x/currituck_defconfig | 110
arch/powerpc/platforms/44x/Kconfig | 10 +
arch/powerpc/platforms/44x/Makefile |1 +
arch/powerpc/platforms/44x/currituck.c | 204 ++
8 files changed, 688 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/boot/dts/currituck.dts
create mode 100644 arch/powerpc/boot/treeboot-currituck.c
create mode 100644 arch/powerpc/configs/44x/currituck_defconfig
create mode 100644 arch/powerpc/platforms/44x/currituck.c
Much of the currituck.c code could go into ppc44x_simple.c but that makes
finding a home for the quirk code harder. We can always move it there later.
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 72ee8c1..ff0057f 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -45,6 +45,7 @@ $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
+$(obj)/treeboot-currituck.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
@@ -79,7 +80,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c
cuboot-85xx.c holly.c
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c
\
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
- gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c
+ gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \
+ treeboot-currituck.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -212,6 +214,7 @@ image-$(CONFIG_WARP)+= cuImage.warp
image-$(CONFIG_YOSEMITE) += cuImage.yosemite
image-$(CONFIG_ISS4xx) += treeImage.iss4xx \
treeImage.iss4xx-mpic
+image-$(CONFIG_CURRITUCK) += treeImage.currituck
# Board ports in arch/powerpc/platform/8xx/Kconfig
image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads
diff --git a/arch/powerpc/boot/dts/currituck.dts
b/arch/powerpc/boot/dts/currituck.dts
new file mode 100644
index 000..b801dd0
--- /dev/null
+++ b/arch/powerpc/boot/dts/currituck.dts
@@ -0,0 +1,237 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright © 2011 Tony Breeds IBM Corporation
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f0 0x0010;// spin table
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ model = "ibm,currituck";
+ compatible = "ibm,currituck";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ serial0 = &UART0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,476";
+ reg = <0>;
+ clock-frequency = <16>; // 1.6 GHz
+ timebase-frequency = <1>; // 100Mhz
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "ok";
+ };
+ cpu@1 {
+ device_type = "cpu";
+ model = "PowerPC,476";
+ reg = <1>;
+ clock-frequency = <16>; // 1.6 GHz
+ timebase-frequency = <1>; // 100Mhz
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0x01f0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg
[PATCH 7/8] 44x/476fpe: Add 476fpe SoC code
Based on original work by David 'Shaggy' Kliekamp.
Signed-off-by: Tony Breeds
---
arch/powerpc/include/asm/reg.h |1 +
arch/powerpc/kernel/cputable.c | 14 +
arch/powerpc/kernel/head_44x.S |2 +
arch/powerpc/platforms/44x/Kconfig |4 ++
arch/powerpc/sysdev/ppc4xx_pci.c | 57 +++-
arch/powerpc/sysdev/ppc4xx_pci.h |7
6 files changed, 84 insertions(+), 1 deletions(-)
I wimped out on doing the mask and test opperations in head_44x.S for the
generic 476 PVR.
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 559da19..7fdc2c0 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -951,6 +951,7 @@
#define PVR_403GCX 0x00201400
#define PVR_405GP 0x4011
#define PVR_4760x11a52000
+#define PVR_476FPE 0x7ff5
#define PVR_STB03XXX 0x4031
#define PVR_NP405H 0x4141
#define PVR_NP405L 0x4161
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index edae5bb..7797ae2 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1830,6 +1830,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_47x,
.platform = "ppc470",
},
+ { /* 476fpe */
+ .pvr_mask = 0x,
+ .pvr_value = 0x7ff5,
+ .cpu_name = "476fpe",
+ .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_FPU,
+ .mmu_features = MMU_FTR_TYPE_47x |
+ MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
+ .icache_bsize = 32,
+ .dcache_bsize = 128,
+ .machine_check = machine_check_47x,
+ .platform = "ppc470",
+ },
{ /* 476 iss */
.pvr_mask = 0x,
.pvr_value = 0x0005,
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index b725dab..bb7a9c7 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -732,6 +732,8 @@ _GLOBAL(init_cpu_state)
/* We use the PVR to differenciate 44x cores from 476 */
mfspr r3,SPRN_PVR
srwir3,r3,16
+ cmplwi cr0,r3,PVR_476FPE@h
+ beq head_start_47x
cmplwi cr0,r3,PVR_476@h
beq head_start_47x
cmplwi cr0,r3,PVR_476_ISS@h
diff --git a/arch/powerpc/platforms/44x/Kconfig
b/arch/powerpc/platforms/44x/Kconfig
index 762322c..f0be6e0 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -308,6 +308,10 @@ config 460SX
select IBM_EMAC_ZMII
select IBM_EMAC_TAH
+config 476FPE
+ bool
+ select PPC_FPU
+
config APM821xx
bool
select PPC_FPU
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 45148ef..ae15e6f 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -1296,6 +1296,52 @@ static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops
__initdata =
#endif /* CONFIG_40x */
+#ifdef CONFIG_476FPE
+static int __init ppc_476fpe_pciex_core_init(struct device_node *np)
+{
+ return 4;
+}
+
+static void __init ppc_476fpe_pciex_check_link(struct ppc4xx_pciex_port *port)
+{
+ u32 timeout_ms = 20;
+ u32 val = 0, mask = (PECFG_TLDLP_LNKUP|PECFG_TLDLP_PRESENT);
+ void __iomem *mbase = ioremap(port->cfg_space.start + 0x1000,
+ 0x1000);
+
+ printk(KERN_INFO "PCIE%d: Checking link...\n", port->index);
+
+ if (mbase == NULL) {
+ printk(KERN_WARNING "PCIE%d: failed to get cfg space\n",
+ port->index);
+ return;
+ }
+
+ while (timeout_ms--) {
+ val = in_le32(mbase + PECFG_TLDLP);
+
+ if ((val & mask) == mask)
+ break;
+ msleep(10);
+ }
+
+ if (val & PECFG_TLDLP_PRESENT) {
+ printk(KERN_INFO "PCIE%d: link is up !\n", port->index);
+ port->link = 1;
+ } else
+ printk(KERN_WARNING "PCIE%d: Link up failed\n", port->index);
+
+ iounmap(mbase);
+ return;
+}
+
+static struct ppc4xx_pciex_hwops ppc_476fpe_pcie_hwops __initdata =
+{
+ .core_init = ppc_476fpe_pciex_core_init,
+ .check_link = ppc_476fpe_pciex_check_link,
+};
+#endif /* CONFIG_476FPE */
+
/* Check that the core has been initied and if not, do it */
static int __init ppc4xx_pciex_check_core_init(struct device_node *np)
{
@@ -1321,6 +1367,10 @@
[PATCH 6/8] powerpc/boot: Add mfdcrx
Needed for currituck support.
Signed-off-by: Tony Breeds
---
arch/powerpc/boot/dcr.h |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
I chose to use a #define to keep with the style of m[tf]dcr in the same file.
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 645a7c9..cc73f7a 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -9,6 +9,12 @@
})
#define mtdcr(rn, val) \
asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
+#define mfdcrx(rn) \
+ ({ \
+ unsigned long rval; \
+ asm volatile("mfdcrx %0,%1" : "=r"(rval) : "r"(rn)); \
+ rval; \
+ })
/* 440GP/440GX SDRAM controller DCRs */
#define DCRN_SDRAM0_CFGADDR0x010
--
1.7.6.4
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[PATCH 5/8] powerpc/boot: Add extended precision shifts to the boot wrapper.
The upcomming currituck patches will need to do 64-bit shifts which will fail with undefined symbol without this patch. I looked at linking against libgcc but we can't guarantee that libgcc was compiled with soft-float. Also Using ../lib/div64.S or ../kernel/misc_32.S, this will break the build as the .o's need to be built with different flags for the bootwrapper vs the kernel. So for now the easyest option is to just copy code from arch/powerpc/kernel/misc_32.S I don't think this code changes too often ;P Signed-off-by: Tony Breeds --- arch/powerpc/boot/div64.S | 52 + 1 files changed, 52 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/boot/div64.S b/arch/powerpc/boot/div64.S index d271ab5..bbcb8a4 100644 --- a/arch/powerpc/boot/div64.S +++ b/arch/powerpc/boot/div64.S @@ -57,3 +57,55 @@ __div64_32: stw r8,4(r3) mr r3,r6 # return the remainder in r3 blr + +/* + * Extended precision shifts. + * + * Updated to be valid for shift counts from 0 to 63 inclusive. + * -- Gabriel + * + * R3/R4 has 64 bit value + * R5has shift count + * result in R3/R4 + * + * ashrdi3: arithmetic right shift (sign propagation) + * lshrdi3: logical right shift + * ashldi3: left shift + */ + .globl __ashrdi3 +__ashrdi3: + subfic r6,r5,32 + srw r4,r4,r5# LSW = count > 31 ? 0 : LSW >> count + addir7,r5,32# could be xori, or addi with -32 + slw r6,r3,r6# t1 = count > 31 ? 0 : MSW << (32-count) + rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0 + srawr7,r3,r7# t2 = MSW >> (count-32) + or r4,r4,r6# LSW |= t1 + slw r7,r7,r8# t2 = (count < 32) ? 0 : t2 + srawr3,r3,r5# MSW = MSW >> count + or r4,r4,r7# LSW |= t2 + blr + + .globl __ashldi3 +__ashldi3: + subfic r6,r5,32 + slw r3,r3,r5# MSW = count > 31 ? 0 : MSW << count + addir7,r5,32# could be xori, or addi with -32 + srw r6,r4,r6# t1 = count > 31 ? 0 : LSW >> (32-count) + slw r7,r4,r7# t2 = count < 32 ? 0 : LSW << (count-32) + or r3,r3,r6# MSW |= t1 + slw r4,r4,r5# LSW = LSW << count + or r3,r3,r7# MSW |= t2 + blr + + .globl __lshrdi3 +__lshrdi3: + subfic r6,r5,32 + srw r4,r4,r5# LSW = count > 31 ? 0 : LSW >> count + addir7,r5,32# could be xori, or addi with -32 + slw r6,r3,r6# t1 = count > 31 ? 0 : MSW << (32-count) + srw r7,r3,r7# t2 = count < 32 ? 0 : MSW >> (count-32) + or r4,r4,r6# LSW |= t1 + srw r3,r3,r5# MSW = MSW >> count + or r4,r4,r7# LSW |= t2 + blr -- 1.7.6.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 4/8] 44x: Removing dead CONFIG_PPC47x
From: Christoph Egger CONFIG_PPC47x doesn't exist in Kconfig and no 476 processor calls this function ppc44x_pin_tlb() as it has it's own ppc47x_pin_tlb(). This code is probably an artifact of the original 476 code that shouldn't have made it upstream. Signed-off-by: Christoph Egger Signed-off-by: Tony Breeds --- arch/powerpc/mm/44x_mmu.c |4 1 files changed, 0 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c index f60e006..5d4e3ff 100644 --- a/arch/powerpc/mm/44x_mmu.c +++ b/arch/powerpc/mm/44x_mmu.c @@ -78,11 +78,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) "tlbwe %1,%3,%5\n" "tlbwe %0,%3,%6\n" : -#ifdef CONFIG_PPC47x - : "r" (PPC47x_TLB2_S_RWX), -#else : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), -#endif "r" (phys), "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M), "r" (entry), -- 1.7.6.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 3/8] 44x/pci: Setup the dma_window properties for each pci_controller
Needed if you want to use swiotlb, harmless otherwise. Signed-off-by: Tony Breeds --- arch/powerpc/sysdev/ppc4xx_pci.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index ab3293a..45148ef 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -185,9 +185,15 @@ static int __init ppc4xx_parse_dma_ranges(struct pci_controller *hose, out: dma_offset_set = 1; pci_dram_offset = res->start; + hose->dma_window_base_cur = res->start; + hose->dma_window_size = resource_size(res); printk(KERN_INFO "4xx PCI DMA offset set to 0x%08lx\n", pci_dram_offset); + printk(KERN_INFO "4xx PCI DMA window base to 0x%016llx\n", + (unsigned long long)hose->dma_window_base_cur); + printk(KERN_INFO "DMA window size 0x%016llx\n", + (unsigned long long)hose->dma_window_size); return 0; } -- 1.7.6.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/8] 44x/pci: Add a want_sdr flag into ppc4xx_pciex_hwops
Currituck doesn't need nor use SDR so aborting the pci setup if there is
no sdr-base would be bad.
Add a flag to ppc4xx_pciex_hwops for the backends to state if they need
SDR and then only complain and abort if they do and it's not found in
the device tree.
Signed-off-by: Tony Breeds
---
arch/powerpc/sysdev/ppc4xx_pci.c | 20 ++--
1 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 16f5eba..ab3293a 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -647,6 +647,7 @@ static unsigned int ppc4xx_pciex_port_count;
struct ppc4xx_pciex_hwops
{
+ bool want_sdr;
int (*core_init)(struct device_node *np);
int (*port_init_hw)(struct ppc4xx_pciex_port *port);
int (*setup_utl)(struct ppc4xx_pciex_port *port);
@@ -916,6 +917,7 @@ static int ppc440speB_pciex_init_utl(struct
ppc4xx_pciex_port *port)
static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops __initdata =
{
+ .want_sdr = true,
.core_init = ppc440spe_pciex_core_init,
.port_init_hw = ppc440speA_pciex_init_port_hw,
.setup_utl = ppc440speA_pciex_init_utl,
@@ -924,6 +926,7 @@ static struct ppc4xx_pciex_hwops ppc440speA_pcie_hwops
__initdata =
static struct ppc4xx_pciex_hwops ppc440speB_pcie_hwops __initdata =
{
+ .want_sdr = true,
.core_init = ppc440spe_pciex_core_init,
.port_init_hw = ppc440speB_pciex_init_port_hw,
.setup_utl = ppc440speB_pciex_init_utl,
@@ -1034,6 +1037,7 @@ static int ppc460ex_pciex_init_utl(struct
ppc4xx_pciex_port *port)
static struct ppc4xx_pciex_hwops ppc460ex_pcie_hwops __initdata =
{
+ .want_sdr = true,
.core_init = ppc460ex_pciex_core_init,
.port_init_hw = ppc460ex_pciex_init_port_hw,
.setup_utl = ppc460ex_pciex_init_utl,
@@ -1181,6 +1185,7 @@ done:
}
static struct ppc4xx_pciex_hwops ppc460sx_pcie_hwops __initdata = {
+ .want_sdr = true,
.core_init = ppc460sx_pciex_core_init,
.port_init_hw = ppc460sx_pciex_init_port_hw,
.setup_utl = ppc460sx_pciex_init_utl,
@@ -1276,6 +1281,7 @@ static int ppc405ex_pciex_init_utl(struct
ppc4xx_pciex_port *port)
static struct ppc4xx_pciex_hwops ppc405ex_pcie_hwops __initdata =
{
+ .want_sdr = true,
.core_init = ppc405ex_pciex_core_init,
.port_init_hw = ppc405ex_pciex_init_port_hw,
.setup_utl = ppc405ex_pciex_init_utl,
@@ -1972,13 +1978,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct
device_node *np)
}
port->node = of_node_get(np);
- pval = of_get_property(np, "sdr-base", NULL);
- if (pval == NULL) {
- printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
- np->full_name);
- return;
+ if (ppc4xx_pciex_hwops->want_sdr == true) {
+ pval = of_get_property(np, "sdr-base", NULL);
+ if (pval == NULL) {
+ printk(KERN_ERR "PCIE: missing sdr-base for %s\n",
+ np->full_name);
+ return;
+ }
+ port->sdr_base = *pval;
}
- port->sdr_base = *pval;
/* Check if device_type property is set to "pci" or "pci-endpoint".
* Resulting from this setup this PCIe port will be configured
--
1.7.6.4
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[PATCH 1/8] 44x/pci: Use PCI_BASE_ADDRESS_MEM_PREFETCH rather than magic value.
Signed-off-by: Tony Breeds --- arch/powerpc/sysdev/ppc4xx_pci.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) This patch was somehow missed from the original series. diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 862f11b..16f5eba 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c @@ -1739,7 +1739,7 @@ static void __init ppc4xx_configure_pciex_PIMs(struct ppc4xx_pciex_port *port, /* Calculate window size */ sa = (0xull << ilog2(size)); if (res->flags & IORESOURCE_PREFETCH) - sa |= 0x8; + sa |= PCI_BASE_ADDRESS_MEM_PREFETCH; if (of_device_is_compatible(port->node, "ibm,plb-pciex-460sx")) sa |= PCI_BASE_ADDRESS_MEM_TYPE_64; -- 1.7.6.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Add support for the currituck 476 platform from IBM (v2)
Patches 1 to 3 Modify the 44x PCI code to work with 476fpe/currituck. Patch 4 Is an old patch by Christoph Egger that fell through the cracks somehow. Patches 5 and 6 Modify the bootwrapper to handle 476fpe/currituck Patch 7 The SoC support. Patch 8 The currituck board support. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 10/10] powerpc/mpic: Add in-core support for cascaded MPICs
On Tue, 2011-11-29 at 13:58 -0500, Kyle Moffett wrote: > diff --git a/arch/powerpc/platforms/cell/setup.c > b/arch/powerpc/platforms/cell/setup.c > index cd00ca8..a0f5d28 100644 > --- a/arch/powerpc/platforms/cell/setup.c > +++ b/arch/powerpc/platforms/cell/setup.c > @@ -215,15 +202,6 @@ static void __init mpic_init_IRQ(void) > if (mpic == NULL) > continue; > mpic_init(mpic); > - > - virq = irq_of_parse_and_map(dn, 0); > - if (virq == NO_IRQ) > - continue; > - > - printk(KERN_INFO "%s : hooking up to IRQ %d\n", > -dn->full_name, virq); > - irq_set_handler_data(virq, mpic); > - irq_set_chained_handler(virq, cell_mpic_cascade); > } > } This leaves virq unused, which breaks the build. cheers -- ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 07/10] powerpc/mpic: Don't open-code dcr_resource_start
On Tue, 2011-11-29 at 13:58 -0500, Kyle Moffett wrote:
> Don't open-code the OpenFirmware "dcr-reg" property lookup trying to map
> DCR resources. This makes the code a bit easier to read.
>
> Signed-off-by: Kyle Moffett
> ---
> arch/powerpc/sysdev/mpic.c |7 ++-
> 1 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index e0216ff..6916ba5 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -319,11 +319,8 @@ static void _mpic_map_dcr(struct mpic *mpic, struct
> device_node *node,
> struct mpic_reg_bank *rb,
> unsigned int offset, unsigned int size)
> {
> - const u32 *dbasep;
> -
> - dbasep = of_get_property(node, "dcr-reg", NULL);
> -
> - rb->dhost = dcr_map(node, *dbasep + offset, size);
> + phys_addr_t phys_addr = dcr_resource_start(node);
Gives me:
arch/powerpc/sysdev/mpic.c:321: error: too few arguments to function
'dcr_resource_start'
Because you're missing index:
unsigned int dcr_resource_start(const struct device_node *np, unsigned int
index)
cheers
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[PATCH] powerpc/fsl-pci: Allow 64-bit PCIe devices to DMA to any memory address
There is an issue on FSL-BookE 64-bit devices (P5020) in which PCIe
devices that are capable of doing 64-bit DMAs (like an Intel e1000) do
not function and crash the kernel if we have >4G of memory in the system.
The reason is that the existing code only sets up one inbound window for
access to system memory across PCIe. That window is limited to a 32-bit
address space. So on systems we'll end up utilizing SWIOTLB for dma
mappings. However SWIOTLB dma ops implement dma_alloc_coherent() as
dma_direct_alloc_coherent(). Thus we can end up with dma addresses that
are not accessible because of the inbound window limitation.
We could possibly set the SWIOTLB alloc_coherent op to
swiotlb_alloc_coherent() however that does not address the issue since
the swiotlb_alloc_coherent() will behave almost identical to
dma_direct_alloc_coherent() since the devices coherent_dma_mask will be
greater than any address allocated by swiotlb_alloc_coherent() and thus
we'll never bounce buffer it into a range that would be dma-able.
The easiest and best solution is to just make it so that a 64-bit
capable device is able to DMA to any internal system address.
We accomplish this by opening up a second inbound window that maps all
of memory above the internal SoC address width so we can set it up to
access all of the internal SoC address space if needed.
We than fixup the dma_ops and dma_offset for PCIe devices with a dma
mask greater than the maximum internal SoC address.
Signed-off-by: Kumar Gala
---
arch/powerpc/sysdev/fsl_pci.c | 55 +
1 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4ce547e..8f92446 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -65,6 +65,30 @@ static int __init fsl_pcie_check_link(struct pci_controller
*hose)
}
#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+
+#define MAX_PHYS_ADDR_BITS 40
+static u64 pci64_dma_offset = 1ull << MAX_PHYS_ADDR_BITS;
+
+static int fsl_pci_dma_set_mask(struct device *dev, u64 dma_mask)
+{
+ if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+ return -EIO;
+
+ /*
+* Fixup PCI devices that are able to DMA to above the physical
+* address width of the SoC such that we can address any internal
+* SoC address from across PCI if needed
+*/
+ if ((dev->bus == &pci_bus_type) &&
+ dma_mask >= DMA_BIT_MASK(MAX_PHYS_ADDR_BITS)) {
+ set_dma_ops(dev, &dma_direct_ops);
+ set_dma_offset(dev, pci64_dma_offset);
+ }
+
+ *dev->dma_mask = dma_mask;
+ return 0;
+}
+
static int __init setup_one_atmu(struct ccsr_pci __iomem *pci,
unsigned int index, const struct resource *res,
resource_size_t offset)
@@ -228,6 +252,37 @@ static void __init setup_pci_atmu(struct pci_controller
*hose,
hose->dma_window_base_cur = 0x;
hose->dma_window_size = (resource_size_t)sz;
+
+ /*
+* if we have >4G of memory setup second PCI inbound window to
+* let devices that are 64-bit address capable to work w/o
+* SWIOTLB and access the full range of memory
+*/
+ if (sz != mem) {
+ mem_log = __ilog2_u64(mem);
+
+ /* Size window up if we dont fit in exact power-of-2 */
+ if ((1ull << mem_log) != mem)
+ mem_log++;
+
+ piwar = (piwar & ~PIWAR_SZ_MASK) | (mem_log - 1);
+
+ /* Setup inbound memory window */
+ out_be32(&pci->piw[win_idx].pitar, 0x);
+ out_be32(&pci->piw[win_idx].piwbear,
+ pci64_dma_offset >> 44);
+ out_be32(&pci->piw[win_idx].piwbar,
+ pci64_dma_offset >> 12);
+ out_be32(&pci->piw[win_idx].piwar, piwar);
+
+ /*
+* install our own dma_set_mask handler to fixup dma_ops
+* and dma_offset
+*/
+ ppc_md.dma_set_mask = fsl_pci_dma_set_mask;
+
+ pr_info("%s: Setup 64-bit PCI DMA window\n", name);
+ }
} else {
u64 paddr = 0;
--
1.7.3.4
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ppc4xx simple vs SoC's
Hi Josh ! I was helping Tony with some of the Currituck stuff when I noticed an oddity... So we have various "SoC" config symbols such as 440EP, 460SX, etc... that in turn select various bits & pieces that enable support for that SoC (such as EMAC4 support or FPU support). Those only act as "enables" for compiling of the code, there is still going to be a runtime check of course. Those SoC config symbols are not user selectable, they are meant to be themselves select'ed by the board Kconfig entries. However, the entry for ppc44x_simple doesn't select any of these, meaning for example, AFAIK, that you don't get EMAC4 etc... I'm surprised things work at all ! What am I missing ? Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 6/6] 44x/currituck: Add support for the new IBM currituck platform
On Thu, Dec 01, 2011 at 03:05:24PM +1100, Tony Breeds wrote:
> On Wed, Nov 30, 2011 at 05:20:22PM +1100, Benjamin Herrenschmidt wrote:
> > On Wed, 2011-11-30 at 16:24 +1100, Tony Breeds wrote:
> > > +void platform_init(void)
> > > +{
> > > + /* Cap the zImage to 512MB */
> >
> > Any reason ? If yes, please document it a bit more.
>
> XXX
Where 'XXX' means come back and anser this point /before/ hitting send.
Basically is was lazyness.
Now that I know the memsize I'll allow the zImage to use it all but
512MB should be enought for anywone right?
Yours Tony
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Re: lmb_alloc() and page memory overlap
> > This should have been fixed in memblock in recent kernel, at least I > > believe it is. It looks like this is caused by overlapping lmb_reserve() > > at boot (or lmb_reserve() overlapping an lmb_alloc'ated region which > > boils down to the same thing). > > > > Old lmb didn't deal with that well at all and that lead to corruption of > > the lmb list. We fixed that in > > > > 8f7a66051b7523108c5aefb08c6a637e54aedc47 > > > >mm/memblock: properly handle overlaps and fix error path > > > > Which got merged in 2.6.39. > > > > If you absolutely need to stick to 2.6.30, you can try backporting the > > fix to lmb. > > > > Cheers, > > Ben. > > > > I need to stick to 2.6.30, will try backporting the fix. Is this the same > thing > which is causing the wrong page (already allocated memory) allocation? I can't say for sure but it looks like it could be. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: lmb_alloc() and page memory overlap
On Thu, Dec 1, 2011 at 9:30 AM, Benjamin Herrenschmidt
wrote:
> On Tue, 2011-11-29 at 18:51 +0530, Prashant Bhole wrote:
>> Hi,
>> I am using custom 460ex board with kernel version 2.6.30.
>> I noticed that page_alloc() is returning a page whose memory
>> is already allocated by lmb_alloc() while unflattening the device
>> tree. As per my knowledge the memory allocated by lmb_alloc()
>> should be reserved till the end, right?
>
> This should have been fixed in memblock in recent kernel, at least I
> believe it is. It looks like this is caused by overlapping lmb_reserve()
> at boot (or lmb_reserve() overlapping an lmb_alloc'ated region which
> boils down to the same thing).
>
> Old lmb didn't deal with that well at all and that lead to corruption of
> the lmb list. We fixed that in
>
> 8f7a66051b7523108c5aefb08c6a637e54aedc47
>
> mm/memblock: properly handle overlaps and fix error path
>
> Which got merged in 2.6.39.
>
> If you absolutely need to stick to 2.6.30, you can try backporting the
> fix to lmb.
>
> Cheers,
> Ben.
>
I need to stick to 2.6.30, will try backporting the fix. Is this the same thing
which is causing the wrong page (already allocated memory) allocation?
>> Some more explanation of what I observed:
>>
>> unflatten_device_tree() allocates memory, which will be used
>> for "struct node" objects in the device tree. I obtained base
>> address of allocated memory in "unsigned long base_mem"
>>
>> Now I executed the following code after the kernel booted properly.
>>
>> ---
>> extern unsigned long mem; // lmb_alloc() memory
>> struct page *test_page = virt_to_page(mem);
>> struct page *new_page = NULL;
>>
>> while(1)
>> {
>> new_page = NULL;
>> new_page = alloc_page(GFP_KERNEL);
>> if(!new_page)
>> {
>> printk("Allocation failed\n");
>> while(1);
>> }
>> if(test_page == new_page)
>> {
>> printk("Memory already allocated by lmb_alloc\n");
>> while(1);
>> }
>> }
>> ---
>>
>> After many page allocations, I always hit the condition (test_page ==
>> new_page).
>> Am I doing anything wrong here?
>> Has anybody faced this kind of problem before?
>>
>>
>> I also noticed that lmb_dump_all() shows 2 regions overlapping (last two):
>>
>> LMB configuration:
>> rmo_size = 0x3000
>> memory.size = 0x3000
>> memory.cnt = 0x1
>> memory[0x0] 0x - 0x2fff, 0x3000 bytes
>> reserved.cnt = 0x6
>> reserved[0x0] 0x - 0x006b, 0x6c bytes
>> reserved[0x1] 0x00ffa000 - 0x00ffcfff, 0x3000 bytes
>> reserved[0x2] 0x2fdd - 0x2fdd, 0x1 bytes
>> reserved[0x3] 0x2fde4000 - 0x2fde9fff, 0x6000 bytes
>> reserved[0x4] 0x2fdeb060 - 0x2768, 0x214709 bytes
>> reserved[0x5] 0x2fdee000 - 0x2769, 0x21176a bytes
>>
>>
>> Thanks,
>> Prashant
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>
>
Thanks,
Prashant
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Re: [PATCH 6/6] 44x/currituck: Add support for the new IBM currituck platform
On Wed, Nov 30, 2011 at 07:23:40AM -0600, Kumar Gala wrote: > Split the board support patches from the SoC support. Will do, as I said to Ben I was confused. > This seems like it should be PVR_476FPE Yup. Fixed. Yours Tony pgpmujvrlooRf.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 6/6] 44x/currituck: Add support for the new IBM currituck platform
On Wed, Nov 30, 2011 at 05:20:22PM +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2011-11-30 at 16:24 +1100, Tony Breeds wrote:
> > + plb {
> > + compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6,
> > doesn't matter */
>
> Then make it plb6 and add it to the probe list. Might have to whack it's
> configuration registers one day etc...
Done.
> > +* XXX: 1 TB address space, do we really care past
> > +* 4 GB and should we expand cell width?
> > +*/
>
> For OPB probably not :-)
Fixed.
> That doesn't seem like a very useful pair of statements or useful debug
> message
All the DBG cruft is gone.
> > + for(i = 0; i < MAX_RANKS; i++){
> > + reg = mfdcrx(DDR3_MR0CF + i);
> > + printf("%s: reg=0x%08x\r\n", __func__, reg);
>
> All that debug is pretty gross, keep it if you wish but make it a bit
> neater and/or wrap it in DBG
Yeah that was an oversight.
> > + if (reg & 0x01) {
>
> if (!(reg & 1))
> continue;
>
> avoids too much indent
Done.
> > + dt_fixup_memory(0x0ULL, ibm_currituck_memsize);
>
> Ok, I see why the global... I'd still prefer if the detect function just
> returned the value and the caller whacks the global.
Fixed.
> > + while ((devp = find_node_by_devtype(devp, "pci"))) {
> > + if (getprop(devp, "dma-ranges", &dma_ranges[0],
> > sizeof(dma_ranges)) < 0) {
>
> Can't you replace &dma_ranges[0] with just dma_ranges ?
Yes, Fixed.
> > +#define SPRN_PIR 0x11E /* Processor Indentification Register */
>
> That should go elsewhere along with the other SPR definitions.
There isn't a std. place in the bootwrapper.
>
> > +void platform_init(void)
> > +{
> > + /* Cap the zImage to 512MB */
>
> Any reason ? If yes, please document it a bit more.
XXX
> > + node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type",
> > +"cpu", sizeof("cpu"));
> > + if (!node)
> > + fatal("Cannot find cpu node\n");
>
> The above will return -a- CPU node... you have several and you don't
> know which one. You should probably iterate accross all of them.
I'm just trying to get the timebase-frequency, this willbe the same on
all CPUs (at least I hope so ;P) so I don't really care which CPU node I
get.
> > + /* FIXME: Check this works */
Grr that comment shouldn't be there. It does work :)
> > +#define PVR_476CURRITUCK 0x7ff5
>
> My understanding is that the currituck was the platform, not the chip,
> and that the chip was called something like 476FPE, am I wrong ?
No you're correct, I was confused about the boundry between 476fpe and
currituck.
> > + cmplwi cr0,r3,PVR_476CURRITUCK@h
> > + beq head_start_47x
>
> So at some point, they gave us the magic foo to do with the PVR to
> identify any 476... I'll try to dig that out of my email archives.
Yeah I have that I'll work out the correct way to the the mask and
test.
> > +++ b/arch/powerpc/platforms/44x/ppc47x.c
>
> Call the file currituck.c
Sure.
> > +static void __devinit quirk_ppc_currituck_usb_fixup(struct pci_dev *dev)
> > +{
> > + pci_write_config_dword(dev, 0xe0, 0x0114231f);
> > + pci_write_config_dword(dev, 0xe4, 0x6c40);
> > +}
>
> Pleae document better what you are doing here and also test
> that you are indeed on the right platform so you don't end up
> whacking bits on USB controllers on other platforms that happen
> to be compiled in the same binary.
Sure, no problem.
> Ok, I'll have to fixup that vs. Kyle patches but the good thing is that
> it will make things even simpler.
Thanks.
> Now pretty much everything in this platform file is generic I believe.
> We could move it all to ppc44x_simple.c. The only things that are not
> are the USB quirk and the interrupt fixup.
>
> The USB quirk which should have a compatible test for the platform to
> make sure we don't run it on something else. For such a simple quirk, I
> think it's fine ot have it in ppc44x_simple.c or in drivers/pci/quirk.c
>
> For the interrupt fixup, we can probably address it entirely in the
> device-tree, though that means exposing a bunch of on-board bridges
> which is only midly annoying.
>
> Anyways, we can discuss that (or maybe an even better option)
> tomorrow :-)
Okay I look forward to it :)
> Again, you are mixing the SoC with the board here. afaik, currituck is
> the board, not the SoC.
Fixed.
Yours Tony
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Re: lmb_alloc() and page memory overlap
On Tue, 2011-11-29 at 18:51 +0530, Prashant Bhole wrote:
> Hi,
> I am using custom 460ex board with kernel version 2.6.30.
> I noticed that page_alloc() is returning a page whose memory
> is already allocated by lmb_alloc() while unflattening the device
> tree. As per my knowledge the memory allocated by lmb_alloc()
> should be reserved till the end, right?
This should have been fixed in memblock in recent kernel, at least I
believe it is. It looks like this is caused by overlapping lmb_reserve()
at boot (or lmb_reserve() overlapping an lmb_alloc'ated region which
boils down to the same thing).
Old lmb didn't deal with that well at all and that lead to corruption of
the lmb list. We fixed that in
8f7a66051b7523108c5aefb08c6a637e54aedc47
mm/memblock: properly handle overlaps and fix error path
Which got merged in 2.6.39.
If you absolutely need to stick to 2.6.30, you can try backporting the
fix to lmb.
Cheers,
Ben.
> Some more explanation of what I observed:
>
> unflatten_device_tree() allocates memory, which will be used
> for "struct node" objects in the device tree. I obtained base
> address of allocated memory in "unsigned long base_mem"
>
> Now I executed the following code after the kernel booted properly.
>
> ---
> extern unsigned long mem; // lmb_alloc() memory
> struct page *test_page = virt_to_page(mem);
> struct page *new_page = NULL;
>
> while(1)
> {
> new_page = NULL;
> new_page = alloc_page(GFP_KERNEL);
> if(!new_page)
> {
> printk("Allocation failed\n");
> while(1);
> }
> if(test_page == new_page)
> {
> printk("Memory already allocated by lmb_alloc\n");
> while(1);
> }
> }
> ---
>
> After many page allocations, I always hit the condition (test_page ==
> new_page).
> Am I doing anything wrong here?
> Has anybody faced this kind of problem before?
>
>
> I also noticed that lmb_dump_all() shows 2 regions overlapping (last two):
>
> LMB configuration:
> rmo_size= 0x3000
> memory.size = 0x3000
> memory.cnt = 0x1
> memory[0x0]0x - 0x2fff, 0x3000 bytes
> reserved.cnt = 0x6
> reserved[0x0] 0x - 0x006b, 0x6c bytes
> reserved[0x1] 0x00ffa000 - 0x00ffcfff, 0x3000 bytes
> reserved[0x2] 0x2fdd - 0x2fdd, 0x1 bytes
> reserved[0x3] 0x2fde4000 - 0x2fde9fff, 0x6000 bytes
> reserved[0x4] 0x2fdeb060 - 0x2768, 0x214709 bytes
> reserved[0x5] 0x2fdee000 - 0x2769, 0x21176a bytes
>
>
> Thanks,
> Prashant
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Re: [PATCH] powerpc/nvram: Add spinlock to oops_to_nvram to prevent oops in compression code.
Hi Ben, > How would we miss ? > > trylock does loop on stwcx. failure, it doesn't loop if the lock is > -taken-, so if the lock is only used for actually dealing with the > oops the only "miss" is because somebody already got it... or am I > missing something ? I'm thinking of two CPUs that enter at exactly the same time either through a system reset or an ugly bug (writing junk at 0x900 so the decrementer exception gets an oops). Probably unlikely enough that we don't care. Anton ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/nvram: Add spinlock to oops_to_nvram to prevent oops in compression code.
On Thu, 2011-12-01 at 12:46 +1100, Anton Blanchard wrote: > When issuing a system reset we almost always oops in the oops_to_nvram > code because multiple CPUs are using the deflate work area. Add a > spinlock to protect it. > > To play it safe I'm using trylock to avoid locking up if the NVRAM > code oopses. This means we might miss multiple CPUs oopsing at exactly > the same time but I think it's best to play it safe for now. Once we > are happy with the reliability we can change it to a full spinlock. How would we miss ? trylock does loop on stwcx. failure, it doesn't loop if the lock is -taken-, so if the lock is only used for actually dealing with the oops the only "miss" is because somebody already got it... or am I missing something ? Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/nvram: Add spinlock to oops_to_nvram to prevent oops in compression code.
When issuing a system reset we almost always oops in the oops_to_nvram
code because multiple CPUs are using the deflate work area. Add a
spinlock to protect it.
To play it safe I'm using trylock to avoid locking up if the NVRAM
code oopses. This means we might miss multiple CPUs oopsing at exactly
the same time but I think it's best to play it safe for now. Once we
are happy with the reliability we can change it to a full spinlock.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/nvram.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/nvram.c 2011-12-01
09:44:27.205568463 +1100
+++ linux-build/arch/powerpc/platforms/pseries/nvram.c 2011-12-01
12:36:49.334478156 +1100
@@ -634,6 +634,8 @@ static void oops_to_nvram(struct kmsg_du
{
static unsigned int oops_count = 0;
static bool panicking = false;
+ static DEFINE_SPINLOCK(lock);
+ unsigned long flags;
size_t text_len;
unsigned int err_type = ERR_TYPE_KERNEL_PANIC_GZ;
int rc = -1;
@@ -664,6 +666,9 @@ static void oops_to_nvram(struct kmsg_du
if (clobbering_unread_rtas_event())
return;
+ if (!spin_trylock_irqsave(&lock, flags))
+ return;
+
if (big_oops_buf) {
text_len = capture_last_msgs(old_msgs, old_len,
new_msgs, new_len, big_oops_buf, big_oops_buf_sz);
@@ -679,4 +684,6 @@ static void oops_to_nvram(struct kmsg_du
(void) nvram_write_os_partition(&oops_log_partition, oops_buf,
(int) (sizeof(*oops_len) + *oops_len), err_type, ++oops_count);
+
+ spin_unlock_irqrestore(&lock, flags);
}
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Re: [PATCH 1/6] 44x/pci: Continue pci setup even if there is no sdr-base in the device-tree
On Wed, Nov 30, 2011 at 04:46:13PM +1100, Benjamin Herrenschmidt wrote: > If you don't expect an sdr-base as part of the normal operations of that > bridge, don't bring a message that makes me think something is wrong :-) > > Just changing the severity isn't enough. you should just remove the > message and later on, print/warn/error out if you decide you actually > need an sdr-base (such as in the backend). Okay no problem. Yours Tony pgpn98I1ey49s.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 02/10] powerpc: Consolidate mpic_alloc() OF address translation
On Tue, Nov 29, 2011 at 01:58:29PM -0500, Kyle Moffett wrote:
> diff --git a/arch/powerpc/platforms/powermac/pic.c
> b/arch/powerpc/platforms/powermac/pic.c
> index 901bfbd..44f9774 100644
> --- a/arch/powerpc/platforms/powermac/pic.c
> +++ b/arch/powerpc/platforms/powermac/pic.c
> @@ -498,15 +498,10 @@ static struct mpic * __init pmac_setup_one_mpic(struct
> device_node *np,
> int master)
> {
> const char *name = master ? " MPIC 1 " : " MPIC 2 ";
> - struct resource r;
> struct mpic *mpic;
> unsigned int flags = master ? MPIC_PRIMARY : 0;
> int rc;
>
> - rc = of_address_to_resource(np, 0, &r);
> - if (rc)
> - return NULL;
> -
This gets me an unused variable warning, which because we compile
arch/powerpc with -Werror is fatal:
CC arch/powerpc/platforms/powermac/pic.o
/home/paulus/kernel/kvm-merge/arch/powerpc/platforms/powermac/pic.c: In
function ‘pmac_setup_one_mpic’:
/home/paulus/kernel/kvm-merge/arch/powerpc/platforms/powermac/pic.c:491:6:
error: unused variable ‘rc’ [-Werror=unused-variable]
cc1: all warnings being treated as errors
Need to remove the declaration of rc as well.
Paul.
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Re: Please pull 'next' branch of new 4xx tree
Hi Josh, On Wed, 30 Nov 2011 10:14:52 -0500 Josh Boyer wrote: > > Stephen, can you switch the linux-next tree to use this instead? > > are available in the git repository at: > git://git.infradead.org/users/jwboyer/powerpc-4xx.git next I have switched to that now. -- Cheers, Stephen Rothwells...@canb.auug.org.au http://www.canb.auug.org.au/~sfr/ pgpgA8O5ZzbsI.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 5/6] powerpc/boot: Add mfdcrx
On Thu, Dec 01, 2011 at 10:30:27AM +1100, Tony Breeds wrote: > Okay I'll change it to "i", mostly I used a #define to match the style Of course I menat "r" here. Yours Tony pgp2a2sFjknsb.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 5/6] powerpc/boot: Add mfdcrx
On Wed, Nov 30, 2011 at 02:09:20PM +0100, Segher Boessenkool wrote:
> >+#define mfdcrx(rn) \
> >+({ \
> >+unsigned long rval; \
> >+asm volatile("mfdcrx %0,%1" : "=r"(rval) : "g"(rn)); \
> >+rval; \
> >+})
>
> "g" is never correct on PowerPC, you want "r" here. You can write
> this as a static inline btw, you only need the #define stuff when
> there is an "i" constraint involved.
Okay I'll change it to "i", mostly I used a #define to match the style
of m[tf]dcr. To be honnest I didn't know about the issue with "i"
constraints and static inlines.
Yours Tony
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Re: [PATCH 4/6] powerpc/boot: Add extended precision shifts to the boot wrapper.
On Wed, Nov 30, 2011 at 06:45:37AM -0500, Josh Boyer wrote: > However, adding this code and wonderful and all but why do we need to > add it? Changelog should say why. Okay changelog updated to: powerpc/boot: Add extended precision shifts to the boot wrapper. The upcoming currituck patches will need to do 64-bit shifts which will fail with undefined symbol without this patch. I looked at linking against libgcc but we can't guarantee that libgcc was compiled with soft-float. Also Using ../lib/div64.S or ../kernel/misc_32.S, this will break the build as the .o's need to be built with different flags for the bootwrapper vs the kernel. So for now the easiest option is to just copy code from arch/powerpc/kernel/misc_32.S I don't think this code changes too often ;P Yours Tony pgpyIaX4m7k31.pgp Description: PGP signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc/40x: Add APM8018X SOC support
On Wed, Nov 30, 2011 at 4:03 PM, Benjamin Herrenschmidt wrote: > On Tue, 2011-11-29 at 12:31 +0530, Tanmay Inamdar wrote: >> The AppliedMicro APM8018X embedded processor targets embedded applications >> that >> require low power and a small footprint. It features a PowerPC 405 processor >> core built in a 65nm low-power CMOS process with a five-stage pipeline >> executing >> up to one instruction per cycle. The family has 128-kbytes of on-chip memory, >> a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface. > > Thanks, looks much better. Yes, agreed. So much better I already sent it to Ben in a pull request. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc/40x: Add APM8018X SOC support
On Tue, 2011-11-29 at 12:31 +0530, Tanmay Inamdar wrote: > The AppliedMicro APM8018X embedded processor targets embedded applications > that > require low power and a small footprint. It features a PowerPC 405 processor > core built in a 65nm low-power CMOS process with a five-stage pipeline > executing > up to one instruction per cycle. The family has 128-kbytes of on-chip memory, > a 128-bit local bus and on-chip DDR2 SDRAM controller with 16-bit interface. Thanks, looks much better. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [BUG?]3.0-rc4+ftrace+kprobe: set kprobe at instruction 'stwu' lead to system crash/freeze
On Wed, 2011-11-30 at 19:06 +0800, tiejun.chen wrote: > > - Copy the exception frame we're about to unwind to just -below- the > > new r1 value we want to write to. Then perform the write, and change > > r1 to point to that copy of the frame. > > > > - Branch to restore: which will unwind everything from that copy of > > the frame, and eventually set r1 to GPR(1) in the copy which contains > > the new value of r1. > > We still can't restore this there. Yes, we can since we have copied the pt_regs down to -below- where we are going to write to. That's the whole trick. We copy the pt_regs somewhere "safe" and restore from there. > I mean we have to do that real restore here. So I'm really not sure if its a > good way to add such a codes including check TIF/copy-get new r1/restore > operation here since this is so deep for the exception return code. No. Re-read my explanation. In the do_work case (so when things are still easy), we copy the pt_regs of the return frame to a safe place (right below where we want to write to typically), and change r1 to point to this "new" frame which we use to restore from. Then we do the store which is now safe and go to an unmodified "restore" exit path. > > This is the less intrusive approach and should work just fine, it's also > > more robust than anything I've been able to think of and the approach > > would work for 32 and 64-bit similarily. > > > > (***) Above comment about a bug: If you look at entry_64.S version of > > ret_from_except_lite you'll notice that in the !preempt case, after > > we've checked MSR_PR we test for any TIF flag in _TIF_USER_WORK_MASK to > > decide whether to go to do_work or not. However, in the preempt case, we > > do a convoluted trick to test SIGPENDING only if PR was set and always > > test NEED_RESCHED ... but we forget to test any other bit of > > _TIF_USER_WORK_MASK !!! So that means that with preempt, we completely > > fail to test for things like single step, syscall tracing, etc... > > > > This is another problem we should address. > > > I think this should be fixed at the same time, by simplifying the code > > by doing: > > > > - Test PR. If set, go to test_work_user, else continue (or the other > > way around and call it test_work_kernel) > > > > - In test_work_user, always test for _TIF_USER_WORK_MASK to decide to > > go to do_work, maybe call it do_user_work > > > > - In test_work_kernel, test for _TIF_KERNEL_WORK_MASK which is set to > > our new flag along with NEED_RESCHED if preempt is enabled and branch to > > do_kernel_work. > > > > do_user_work is basically the same as today's user_work > > > > do_kernel_work is basically the same as today preempt block with added > > code to handle the new flag as described above. > > > > Is anybody volunteering for fixing that ? I don't have the bandwidth > > I always use one specific kprobe stack to fix this for BOOKE and work well in > my > local tree :) Do you remember my v3 patch? I think its possible to extend this > for all PPC variants. > > Anyway, I'd like to be this volunteer with our last solution. So the second problem I exposed, for which you just volunteered (hint :-) is an orthogonal issue not related to kprobe or stacks which happen to be something I discovered yesterday while looking at the code. As for the solution to the emulation problem, re-read my explanation. The whole trick is that we can avoid a separate stack (which I really want to avoid) and we can avoid touching the low level restore code path. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 6/8] powerpc/ps3: Fix pr_debug build warnings
Hi Geoff,
On Wed, Nov 30, 2011 at 02:38, Geoff Levand wrote:
> Fix some PS3 build warnings when DEBUG is defined.
>
> Fixes warnings like these:
>
> format '%lx' expects type 'long unsigned int', but argument 7 has type 'u64'
>
> Signed-off-by: Geoff Levand
> ---
> arch/powerpc/platforms/ps3/repository.c | 14 --
> 1 files changed, 8 insertions(+), 6 deletions(-)
>
> diff --git a/arch/powerpc/platforms/ps3/repository.c
> b/arch/powerpc/platforms/ps3/repository.c
> index cb68729..2ce2782 100644
> --- a/arch/powerpc/platforms/ps3/repository.c
> +++ b/arch/powerpc/platforms/ps3/repository.c
> @@ -1050,7 +1050,7 @@ int ps3_repository_dump_resource_info(const struct
> ps3_repository_device *repo)
>
> pr_debug("%s:%d (%u:%u) reg_type %u, bus_addr %lxh, len
> %lxh\n",
> __func__, __LINE__, repo->bus_index, repo->dev_index,
> - reg_type, bus_addr, len);
> + reg_type, (unsigned long)bus_addr, (unsigned
> long)len);
> }
>
> pr_debug(" <- %s:%d\n", __func__, __LINE__);
The correct way to format u64 is using the "ll" length modifier. That way you
don't need casts.
The code above was originally written before the u64 uniformization, when ppc64
was still using "unsigned long" for u64.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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Re: [PATCH 4/6] powerpc/boot: Add extended precision shifts to the boot wrapper.
On 11/30/2011 02:21 PM, Benjamin Herrenschmidt wrote: > On Wed, 2011-11-30 at 06:45 -0500, Josh Boyer wrote: >> On Wed, Nov 30, 2011 at 12:48 AM, Benjamin Herrenschmidt >> wrote: >>> On Wed, 2011-11-30 at 16:23 +1100, Tony Breeds wrote: Code copied from arch/powerpc/kernel/misc_32.S Signed-off-by: Tony Breeds --- arch/powerpc/boot/div64.S | 52 + 1 files changed, 52 insertions(+), 0 deletions(-) >>> >>> Should we just link with libgcc ? :-) >> >> Please tell me you're joking. > > Only half... I wonder what it would look like. Wouldn't ld only pickup > what we use anyway ? We do it in U-Boot... Only problem I see is that it would need to be built as soft-float, and apparently that isn't supported by gcc on 64-bit ppc. Unfortunately there's isn't a "no float" mode. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 4/6] powerpc/boot: Add extended precision shifts to the boot wrapper.
On Wed, 2011-11-30 at 06:45 -0500, Josh Boyer wrote: > On Wed, Nov 30, 2011 at 12:48 AM, Benjamin Herrenschmidt > wrote: > > On Wed, 2011-11-30 at 16:23 +1100, Tony Breeds wrote: > >> Code copied from arch/powerpc/kernel/misc_32.S > >> > >> Signed-off-by: Tony Breeds > >> --- > >> arch/powerpc/boot/div64.S | 52 > >> + > >> 1 files changed, 52 insertions(+), 0 deletions(-) > > > > Should we just link with libgcc ? :-) > > Please tell me you're joking. Only half... I wonder what it would look like. Wouldn't ld only pickup what we use anyway ? > However, adding this code and wonderful and all but why do we need to > add it? Changelog should say why. Agreed. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/6] 44x: Removing dead CONFIG_PPC47x
On Wed, 2011-11-30 at 06:43 -0500, Josh Boyer wrote: > > That doesn't look right. The code is there doing something, why is it > just being removed? I would think the change would be to use > CONFIG_PPC_47x? > > Or if the code there isn't needed any longer, the changelog should say > why. Ah right, I tripped on this one too when reviewing then figured it out but I agree, the changelog should be clearer. If you notice, the original ifdef was in a function that is only ever used on 44x. There's a separate function that handles 47x. I suppose this is a leftover of the initial port which somebody forgot to remove. So the patch is fine, but yes, the changelog could be made clearer. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: scsi/ipr failed to initialize >=linux-3.0.9, >=linux-3.1.1
On Sun, 27 Nov 2011 14:37:52 +0100 acrux wrote: > > scsi subsystem with ipr driver fails to initialize with every kernel >=3.0.9 > and >=3.1.1 > Checked on YDL_Powerstation, IBM 9114-275, IBM 9123-710, > well, it seems this was already fixed by one of these two commits (only for linux-3.2): [SCSI] ipr: Stop reading adapter dump prematurely commit 41e9a69641fb3fa86fa9277a179f3ad261d072f7 [SCSI] ipr: Fix BUG on adapter dump timeout commit 4c647e909fceb9df8ec8f06016dd56244045a929 indeed YDL_Powerstation scsi ctrl has no issue with linux-3.2-rc3 . Thus i guess also other platforms can work fine. cheers, --nico -- acrux ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 5/6] powerpc/boot: Add mfdcrx
> > +#define mfdcrx(rn) \
> > + ({ \
> > + unsigned long rval; \
> > + asm volatile("mfdcrx %0,%1" : "=r"(rval) : "g"(rn)); \
> > + rval; \
> > + })
>
> "g" is never correct on PowerPC, you want "r" here. You can write
> this as a static inline btw, you only need the #define stuff when
> there is an "i" constraint involved.
I think you can still use static inlines even when a
constraint is one that requires a compile time constant.
eg (not ppc, but the "n" become part of the instruction
word):
static __inline__ uint32_t
custom_inic(const uint32_t op, uint32_t a, const uint32_t b)
{
uint32_t result;
__asm__ ( "custom\t%1, %0, %2, c%3"
: "=r" (result) : "n" (op), "r" (a), "n" (b));
return result;
}
David
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Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing spinlock use.
On Wed, Nov 30, 2011 at 09:57:47AM +, Shi Xuelin-B29237 wrote:
> Hello Ira,
>
> In drivers/dma/dmaengine.c, we have below tight loop to check DMA completion
> in mainline Linux:
>do {
> status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
> if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
> printk(KERN_ERR "dma_sync_wait_timeout!\n");
> return DMA_ERROR;
> }
> } while (status == DMA_IN_PROGRESS);
>
That is the body of dma_sync_wait(). It is mostly used in the raid code.
I understand that you don't want to change the raid code to use
callbacks.
In any case, I think we've strayed from the topic under consideration,
which is: can we remove this spinlock without introducing a bug.
I'm convinced that "smp_rmb()" is needed when removing the spinlock. As
noted, Documentation/memory-barriers.txt says that stores on one CPU can
be observed by another CPU in a different order.
Previously, there was an UNLOCK (in fsl_dma_tx_submit) followed by a
LOCK (in fsl_tx_status). This provided a "full barrier", forcing the
operations to complete correctly when viewed by the second CPU. From the
text:
> Therefore, from (1), (2) and (4) an UNLOCK followed by an unconditional LOCK
> is
> equivalent to a full barrier, but a LOCK followed by an UNLOCK is not.
Also, please read "EXAMPLES OF MEMORY BARRIER SEQUENCES" and "INTER-CPU
LOCKING BARRIER EFFECTS". Particularly, in "EXAMPLES OF MEMORY BARRIER
SEQUENCES", the text notes:
> Without intervention, CPU 2 may perceive the events on CPU 1 in some
> effectively random order, despite the write barrier issued by CPU 1:
>
> [snip diagram]
>
> And thirdly, a read barrier acts as a partial order on loads. Consider the
> following sequence of events:
>
> [snip diagram]
>
> Without intervention, CPU 2 may then choose to perceive the events on CPU 1 in
> some effectively random order, despite the write barrier issued by CPU 1:
>
> [snip diagram]
>
And so on. Please read this entire section in the document.
I can't give you an ACK on the proposed patch. To the best of my
understanding, I believe it introduces a bug. I've tried to provide as
much evidence for this belief as I can, in the form of documentation in
the kernel source tree. If you can cite some documentation that shows I
am wrong, I will happily change my mind!
Ira
> -Original Message-
> From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
> Sent: 2011年11月30日 1:26
> To: Li Yang-R58472
> Cc: Shi Xuelin-B29237; vinod.k...@intel.com; dan.j.willi...@intel.com;
> linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
> Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing
> spinlock use.
>
> On Tue, Nov 29, 2011 at 03:19:05AM +, Li Yang-R58472 wrote:
> > > Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by
> > > optimizing spinlock use.
> > >
> > > On Thu, Nov 24, 2011 at 08:12:25AM +, Shi Xuelin-B29237 wrote:
> > > > Hi Ira,
> > > >
> > > > Thanks for your review.
> > > >
> > > > After second thought, I think your scenario may not occur.
> > > > Because the cookie 20 we query must be returned by
> > > > fsl_dma_tx_submit(...) in
> > > practice.
> > > > We never query a cookie not returned by fsl_dma_tx_submit(...).
> > > >
> > >
> > > I agree about this part.
> > >
> > > > When we call fsl_tx_status(20), the chan->common.cookie is
> > > > definitely wrote as
> > > 20 and cpu2 could not read as 19.
> > > >
> > >
> > > This is what I don't agree about. However, I'm not an expert on CPU cache
> > > vs.
> > > memory accesses in an multi-processor system. The section titled
> > > "CACHE COHERENCY" in Documentation/memory-barriers.txt leads me to
> > > believe that the scenario I described is possible.
> >
> > For Freescale PowerPC, the chip automatically takes care of cache
> > coherency. Even if this is a concern, spinlock can't address it.
> >
> > >
> > > What happens if CPU1's write of chan->common.cookie only goes into
> > > CPU1's cache. It never makes it to main memory before CPU2 fetches the
> > > old value of 19.
> > >
> > > I don't think you should see any performance impact from the
> > > smp_mb() operation.
> >
> > Smp_mb() do have impact on performance if it's in the hot path. While it
> > might be safer having it, I doubt it is really necessary. If the CPU1
> > doesn't have the updated last_used, it's shouldn't have known there is a
> > cookie 20 existed either.
> >
>
> I believe that you are correct, for powerpc. However, anything outside of
> arch/powerpc shouldn't assume it only runs on powerpc. I wouldn't be
> surprised to see fsldma running on an iMX someday (ARM processor).
>
> My interpretation says that the change introduces the possibility that
> fsl_tx_status() returns the wrong answer for an extremely small time window,
> on SMP only, based on Documentation/memory-barriers.txt. But I can
[PATCH] powerpc/85xx: don't call of_platform_bus_probe() twice
Commit 46d026ac ("powerpc/85xx: consolidate of_platform_bus_probe calls")
replaced platform-specific of_device_id tables with a single function
that probes the most of the busses in 85xx device trees. If a specific
platform needed additional busses probed, then it could call
of_platform_bus_probe() again. Typically, the additional platform-specific
busses are children of existing busses that have already been probed.
of_platform_bus_probe() does not handle those child busses automatically.
Unfortunately, this doesn't actually work. The second (platform-specific)
call to of_platform_bus_probe() never finds any of the busses it's asked
to find.
To remedy this, the platform-specific of_device_id tables are eliminated,
and their entries are merged into mpc85xx_common_ids[], so that all busses
are probed at once.
Signed-off-by: Timur Tabi
---
arch/powerpc/platforms/85xx/common.c |6 ++
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 11 +--
arch/powerpc/platforms/85xx/p1022_ds.c| 13 +
3 files changed, 8 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/common.c
b/arch/powerpc/platforms/85xx/common.c
index 9fef530..67dac22 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] =
{
{ .compatible = "fsl,qe", },
{ .compatible = "fsl,cpm2", },
{ .compatible = "fsl,srio", },
+ /* So that the DMA channel nodes can be probed individually: */
+ { .compatible = "fsl,eloplus-dma", },
+ /* For the PMC driver */
+ { .compatible = "fsl,mpc8548-guts", },
+ /* Probably unnecessary? */
+ { .compatible = "gpio-leds", },
{},
};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 495cfd9..4a555ee 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -410,12 +410,6 @@ static int __init board_fixups(void)
machine_arch_initcall(mpc8568_mds, board_fixups);
machine_arch_initcall(mpc8569_mds, board_fixups);
-static struct of_device_id mpc85xx_ids[] = {
- { .compatible = "fsl,mpc8548-guts", },
- { .compatible = "gpio-leds", },
- {},
-};
-
static int __init mpc85xx_publish_devices(void)
{
if (machine_is(mpc8568_mds))
@@ -423,10 +417,7 @@ static int __init mpc85xx_publish_devices(void)
if (machine_is(mpc8569_mds))
simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
- mpc85xx_common_publish_devices();
- of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
-
- return 0;
+ return mpc85xx_common_publish_devices();
}
machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c
b/arch/powerpc/platforms/85xx/p1022_ds.c
index 2bf4342..ea6190b 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -326,18 +326,7 @@ static void __init p1022_ds_setup_arch(void)
pr_info("Freescale P1022 DS reference board\n");
}
-static struct of_device_id __initdata p1022_ds_ids[] = {
- /* So that the DMA channel nodes can be probed individually: */
- { .compatible = "fsl,eloplus-dma", },
- {},
-};
-
-static int __init p1022_ds_publish_devices(void)
-{
- mpc85xx_common_publish_devices();
- return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
-}
-machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
+machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
--
1.7.3.4
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Please pull 'next' branch of new 4xx tree
Hi Ben, I have a new 4xx tree setup now. Two small commits for the next branch are queued up. I'd like to get the patch series from Suzie and Tony included soon as well, but thought I'd start with these to get things rolling. Stephen, can you switch the linux-next tree to use this instead? josh The following changes since commit fa8cbaaf5a68f62db3f9a8444ecbb940b47984cb: powerpc+sparc64/mm: Remove hack in mmap randomize layout (2011-11-28 11:42:09 +1100) are available in the git repository at: git://git.infradead.org/users/jwboyer/powerpc-4xx.git next Josh Boyer (1): MAINTAINERS: Update PowerPC 4xx git tree Tanmay Inamdar (1): powerpc/40x: Add APM8018X SOC support MAINTAINERS |2 +- arch/powerpc/boot/dts/klondike.dts | 227 +++ arch/powerpc/configs/40x/klondike_defconfig | 55 +++ arch/powerpc/kernel/cputable.c | 13 ++ arch/powerpc/platforms/40x/Kconfig | 11 ++ arch/powerpc/platforms/40x/ppc40x_simple.c |1 + 6 files changed, 308 insertions(+), 1 deletions(-) create mode 100644 arch/powerpc/boot/dts/klondike.dts create mode 100644 arch/powerpc/configs/40x/klondike_defconfig ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 2/8] [booke] Rename mapping based RELOCATABLE to DYNAMIC_MEMSTART for BookE
On Mon, Nov 28, 2011 at 5:59 PM, Scott Wood wrote: > On 11/23/2011 10:47 AM, Josh Boyer wrote: >> On Mon, Nov 14, 2011 at 12:41 AM, Suzuki K. Poulose >> wrote: >>> The current implementation of CONFIG_RELOCATABLE in BookE is based >>> on mapping the page aligned kernel load address to KERNELBASE. This >>> approach however is not enough for platforms, where the TLB page size >>> is large (e.g, 256M on 44x). So we are renaming the RELOCATABLE used >>> currently in BookE to DYNAMIC_MEMSTART to reflect the actual method. > > Should reword the config help to make it clear what the alignment > restriction is, or where to find the information for a particular > platform. Someone reading "page aligned" without any context that we're > talking about special large pages is going to think 4K -- and on e500, > many large page sizes are supported, so the required alignment is found > in Linux init code rather than a CPU manual. > >>> >>> The CONFIG_RELOCATABLE for PPC32(BookE) based on processing of the >>> dynamic relocations will be introduced in the later in the patch series. >>> >>> This change would allow the use of the old method of RELOCATABLE for >>> platforms which can afford to enforce the page alignment (platforms with >>> smaller TLB size). >> >> I'm OK with the general direction, but this touches a lot of non-4xx >> code. I'd prefer it if Ben took this directly on whatever final >> solution is done. >> >>> I haven tested this change only on 440x. I don't have an FSL BookE to verify >>> the changes there. >>> >>> Scott, >>> Could you please test this patch on FSL and let me know the results ? >> >> Scott, did you ever get around to testing this? In my opinion, this >> shouldn't go in without a Tested-by: from someone that tried it on an >> FSL platform. > > Booted OK for me on e500v2 with RAM starting at 256M. > > Tested-by: Scott Wood > >> We add DYNAMIC_MEMSTART for 32-bit, and we have RELOCATABLE for >> 64-bit. Then throughout almost the rest of the patch, all we're doing >> is duplicating what RELOCATABLE already did (e.g. if ! either thing). >> It works, but it is kind of ugly. >> >> Instead, could we define a helper config variable that can be used in >> place of that construct? Something like: >> >> config NONSTATIC_KERNEL (or whatever) >> bool >> default n >> >> ... >> >> config DYNAMIC_MEMSTART >> >> select NONSTATIC_KERNEL >> >> ... >> >> config RELOCATABLE >> >> select NONSTATIC_KERNEL > > I agree. Suzie do you think you could respin this patch with the suggested changes and include Scott's Tested-by? The rest of the series looks fine and I'd like to get it included in my next branch. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[RFC PATCH v3 4/4] cpuidle: (POWER) Handle power_save=off
This patch makes pseries_idle_driver not to be registered when
power_save=off kernel boot option is specified. The
cpuidle_disable variable used here is similar to
its usage on x86. If cpuidle_disable is set then
sysfs entries for cpuidle framework are not created
and the required drivers are not loaded.
Signed-off-by: Deepthi Dharwar
Signed-off-by: Trinabh Gupta
Signed-off-by: Arun R Bharadwaj
---
arch/powerpc/include/asm/processor.h|1 +
arch/powerpc/platforms/pseries/processor_idle.c |3 +++
2 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 811b7e7..b585bff 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -382,6 +382,7 @@ static inline unsigned long get_clean_sp(struct pt_regs
*regs, int is_32)
}
#endif
+extern unsigned long cpuidle_disable;
enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c
b/arch/powerpc/platforms/pseries/processor_idle.c
index 352b78a..4f59af0 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -269,6 +269,9 @@ static int pseries_idle_probe(void)
if (!firmware_has_feature(FW_FEATURE_SPLPAR))
return -ENODEV;
+ if (cpuidle_disable != IDLE_NO_OVERRIDE)
+ return -ENODEV;
+
if (max_idle_state == 0) {
printk(KERN_DEBUG "pseries processor idle disabled.\n");
return -EPERM;
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Re: Kernel support for the Freescale P2020-MSC8156 AdvancedMC Reference Design
On Nov 29, 2011, at 11:34 PM, Daniel Ng2 wrote: > > Hi, > > Does anyone know of any kernel support for the Freescale P2020-MSC8156 AMC > board?- > > http://freescale.com.hk/webapp/sps/site/prod_summary.jsp?code=P2020-MSC8156AMCRD > > I am looking for platform-specific files ie. the ones that go in > arch/powerpc/platforms/85xx and DTS files if possible... > > Cheers, > Daniel There isn't any support for this board in the open source kernel. - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 6/6] 44x/currituck: Add support for the new IBM currituck platform
On Nov 29, 2011, at 11:24 PM, Tony Breeds wrote:
> Based on original work by David 'Shaggy' Kliekamp.
>
> Signed-off-by: Tony Breeds
> ---
> arch/powerpc/boot/Makefile |5 +-
> arch/powerpc/boot/dts/currituck.dts | 240 ++
> arch/powerpc/boot/treeboot-currituck.c | 129 ++
> arch/powerpc/boot/wrapper|3 +
> arch/powerpc/configs/44x/currituck_defconfig | 110
> arch/powerpc/include/asm/reg.h |1 +
> arch/powerpc/kernel/cputable.c | 14 ++
> arch/powerpc/kernel/head_44x.S |2 +
> arch/powerpc/platforms/44x/Kconfig | 10 +
> arch/powerpc/platforms/44x/Makefile |1 +
> arch/powerpc/platforms/44x/ppc47x.c | 198 +
> arch/powerpc/sysdev/ppc4xx_pci.c | 57 ++-
> arch/powerpc/sysdev/ppc4xx_pci.h |7 +
> 13 files changed, 775 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/currituck.dts
> create mode 100644 arch/powerpc/boot/treeboot-currituck.c
> create mode 100644 arch/powerpc/configs/44x/currituck_defconfig
> create mode 100644 arch/powerpc/platforms/44x/ppc47x.c
Split the board support patches from the SoC support.
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index 559da19..aa38de6 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -951,6 +951,7 @@
> #define PVR_403GCX0x00201400
> #define PVR_405GP 0x4011
> #define PVR_476 0x11a52000
> +#define PVR_476CURRITUCK 0x7ff5
This seems like it should be PVR_476FPE
> #define PVR_STB03XXX 0x4031
> #define PVR_NP405H0x4141
> #define PVR_NP405L0x4161
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index edae5bb..02e0749 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -1830,6 +1830,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
> .machine_check = machine_check_47x,
> .platform = "ppc470",
> },
> + { /* 476 core Currituck */
comment should probably be:
/* 476FPE */
> + .pvr_mask = 0x,
> + .pvr_value = 0x7ff5,
> + .cpu_name = "476",
should probably be "476FPE"
> + .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
> + .cpu_user_features = COMMON_USER_BOOKE |
> + PPC_FEATURE_HAS_FPU,
> + .mmu_features = MMU_FTR_TYPE_47x |
> + MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
> + .icache_bsize = 32,
> + .dcache_bsize = 128,
> + .machine_check = machine_check_47x,
> + .platform = "ppc470",
> + },
> { /* 476 iss */
> .pvr_mask = 0x,
> .pvr_value = 0x0005,
> diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
> index b725dab..3aca1e2 100644
> --- a/arch/powerpc/kernel/head_44x.S
> +++ b/arch/powerpc/kernel/head_44x.S
> @@ -732,6 +732,8 @@ _GLOBAL(init_cpu_state)
> /* We use the PVR to differenciate 44x cores from 476 */
> mfspr r3,SPRN_PVR
> srwir3,r3,16
> + cmplwi cr0,r3,PVR_476CURRITUCK@h
> + beq head_start_47x
> cmplwi cr0,r3,PVR_476@h
> beq head_start_47x
> cmplwi cr0,r3,PVR_476_ISS@h
- k
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Re: [PATCH 5/6] powerpc/boot: Add mfdcrx
+#define mfdcrx(rn) \
+ ({ \
+ unsigned long rval; \
+ asm volatile("mfdcrx %0,%1" : "=r"(rval) : "g"(rn)); \
+ rval; \
+ })
"g" is never correct on PowerPC, you want "r" here. You can write
this as a static inline btw, you only need the #define stuff when
there is an "i" constraint involved.
Segher
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[RFC PATCH v3 3/4] cpuidle: (POWER) Enable cpuidle and directly call cpuidle_idle_call() for pSeries
This patch enables cpuidle for pSeries and pSeries_idle is
directly called from the idle loop. As a result of pSeries_idle, cpuidle
driver registered with cpuidle subsystem comes into action. On
failure of loading of the driver or cpuidle framework default idle
is executed as part of the function. This patch
also removes the routines pseries_shared_idle_sleep and
pseries_dedicated_idle_sleep as they are now implemented as part of
pseries_idle cpuidle driver.
Signed-off-by: Deepthi Dharwar
Signed-off-by: Trinabh Gupta
Signed-off-by: Arun R Bharadwaj
---
arch/powerpc/platforms/Kconfig |6 ++
arch/powerpc/platforms/pseries/setup.c | 101 +---
include/linux/cpuidle.h|2 -
3 files changed, 23 insertions(+), 86 deletions(-)
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 3fe6d92..31e1ade 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -211,6 +211,12 @@ config PPC_PASEMI_CPUFREQ
endmenu
+menu "CPUIdle driver"
+
+source "drivers/cpuidle/Kconfig"
+
+endmenu
+
config PPC601_SYNC_FIX
bool "Workarounds for PPC601 bugs"
depends on 6xx && (PPC_PREP || PPC_PMAC)
diff --git a/arch/powerpc/platforms/pseries/setup.c
b/arch/powerpc/platforms/pseries/setup.c
index 9c6716a..f19fc52 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -39,6 +39,7 @@
#include
#include
#include
+#include
#include
#include
@@ -74,9 +75,6 @@ EXPORT_SYMBOL(CMO_PageSize);
int fwnmi_active; /* TRUE if an FWNMI handler is present */
-static void pseries_shared_idle_sleep(void);
-static void pseries_dedicated_idle_sleep(void);
-
static struct device_node *pSeries_mpic_node;
static void pSeries_show_cpuinfo(struct seq_file *m)
@@ -352,6 +350,21 @@ static int alloc_dispatch_log_kmem_cache(void)
}
early_initcall(alloc_dispatch_log_kmem_cache);
+static void pSeries_idle(void)
+{
+ /* This would call on the cpuidle framework, and the back-end pseries
+* driver to go to idle states
+*/
+ if (cpuidle_idle_call()) {
+ /* On error, execute default handler
+* to go into low thread priority and possibly
+* low power mode.
+*/
+ HMT_low();
+ HMT_very_low();
+ }
+}
+
static void __init pSeries_setup_arch(void)
{
/* Discover PIC type and setup ppc_md accordingly */
@@ -374,18 +387,9 @@ static void __init pSeries_setup_arch(void)
pSeries_nvram_init();
- /* Choose an idle loop */
if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
vpa_init(boot_cpuid);
- if (get_lppaca()->shared_proc) {
- printk(KERN_DEBUG "Using shared processor idle loop\n");
- ppc_md.power_save = pseries_shared_idle_sleep;
- } else {
- printk(KERN_DEBUG "Using dedicated idle loop\n");
- ppc_md.power_save = pseries_dedicated_idle_sleep;
- }
- } else {
- printk(KERN_DEBUG "Using default idle loop\n");
+ ppc_md.power_save = pSeries_idle;
}
if (firmware_has_feature(FW_FEATURE_LPAR))
@@ -586,77 +590,6 @@ static int __init pSeries_probe(void)
return 1;
}
-static void pseries_dedicated_idle_sleep(void)
-{
- unsigned int cpu = smp_processor_id();
- unsigned long start_snooze;
- unsigned long in_purr, out_purr;
- long snooze = __get_cpu_var(smt_snooze_delay);
-
- /*
-* Indicate to the HV that we are idle. Now would be
-* a good time to find other work to dispatch.
-*/
- get_lppaca()->idle = 1;
- get_lppaca()->donate_dedicated_cpu = 1;
- in_purr = mfspr(SPRN_PURR);
-
- /*
-* We come in with interrupts disabled, and need_resched()
-* has been checked recently. If we should poll for a little
-* while, do so.
-*/
- if (snooze) {
- start_snooze = get_tb() + snooze * tb_ticks_per_usec;
- local_irq_enable();
- set_thread_flag(TIF_POLLING_NRFLAG);
-
- while ((snooze < 0) || (get_tb() < start_snooze)) {
- if (need_resched() || cpu_is_offline(cpu))
- goto out;
- ppc64_runlatch_off();
- HMT_low();
- HMT_very_low();
- }
-
- HMT_medium();
- clear_thread_flag(TIF_POLLING_NRFLAG);
- smp_mb();
- local_irq_disable();
- if (need_resched() || cpu_is_offline(cpu))
- goto out;
- }
-
- cede_processor();
-
-out:
- HMT_medium();
- out_purr = mfspr(SPRN_PURR);
- get_lppaca()->wait_state_cycles += out_purr - in_purr;
-
[RFC PATCH v3 2/4] cpuidle: (POWER) cpuidle driver for pSeries
This patch implements a back-end cpuidle driver for pSeries
based on pseries_dedicated_idle_loop and pseries_shared_idle_loop
routines. The driver is built only if CONFIG_CPU_IDLE is set. This
cpuidle driver uses global registration of idle states and
not per-cpu.
Signed-off-by: Deepthi Dharwar
Signed-off-by: Trinabh Gupta
Signed-off-by: Arun R Bharadwaj
---
arch/powerpc/include/asm/system.h |8 +
arch/powerpc/kernel/sysfs.c |2
arch/powerpc/platforms/pseries/Kconfig |9 +
arch/powerpc/platforms/pseries/Makefile |1
arch/powerpc/platforms/pseries/processor_idle.c | 326 +++
arch/powerpc/platforms/pseries/pseries.h|3
arch/powerpc/platforms/pseries/setup.c |3
arch/powerpc/platforms/pseries/smp.c|1
8 files changed, 350 insertions(+), 3 deletions(-)
create mode 100644 arch/powerpc/platforms/pseries/processor_idle.c
diff --git a/arch/powerpc/include/asm/system.h
b/arch/powerpc/include/asm/system.h
index ff66680..f56a0a7 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -223,6 +223,14 @@ extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
extern int powersave_nap; /* set if nap mode can be used in idle loop */
void cpu_idle_wait(void);
+#ifdef CONFIG_PSERIES_IDLE
+extern void update_smt_snooze_delay(int snooze);
+extern int pseries_notify_cpuidle_add_cpu(int cpu);
+#else
+static inline void update_smt_snooze_delay(int snooze) {}
+static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
+#endif
+
/*
* Atomic exchange
*
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index ce035c1..ebe5d78 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -18,6 +18,7 @@
#include
#include
#include
+#include
#include "cacheinfo.h"
@@ -51,6 +52,7 @@ static ssize_t store_smt_snooze_delay(struct sys_device *dev,
return -EINVAL;
per_cpu(smt_snooze_delay, cpu->sysdev.id) = snooze;
+ update_smt_snooze_delay(snooze);
return count;
}
diff --git a/arch/powerpc/platforms/pseries/Kconfig
b/arch/powerpc/platforms/pseries/Kconfig
index c81f6bb..ae7b6d4 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -120,3 +120,12 @@ config DTL
which are accessible through a debugfs file.
Say N if you are unsure.
+
+config PSERIES_IDLE
+ tristate "Cpuidle driver for pSeries platforms"
+ depends on CPU_IDLE
+ depends on PPC_PSERIES
+ default y
+ help
+ Select this option to enable processor idle state management
+ through cpuidle subsystem.
diff --git a/arch/powerpc/platforms/pseries/Makefile
b/arch/powerpc/platforms/pseries/Makefile
index 3556e40..236db46 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -22,6 +22,7 @@ obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o
obj-$(CONFIG_CMM) += cmm.o
obj-$(CONFIG_DTL) += dtl.o
obj-$(CONFIG_IO_EVENT_IRQ) += io_event_irq.o
+obj-$(CONFIG_PSERIES_IDLE) += processor_idle.o
ifeq ($(CONFIG_PPC_PSERIES),y)
obj-$(CONFIG_SUSPEND) += suspend.o
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c
b/arch/powerpc/platforms/pseries/processor_idle.c
new file mode 100644
index 000..352b78a
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -0,0 +1,326 @@
+/*
+ * processor_idle - idle state cpuidle driver.
+ * Adapted from drivers/idle/intel_idle.c and
+ * drivers/acpi/processor_idle.c
+ *
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+
+#include
+#include
+#include
+#include
+#include
+
+#include "plpar_wrappers.h"
+#include "pseries.h"
+
+struct cpuidle_driver pseries_idle_driver = {
+ .name = "pseries_idle",
+ .owner =THIS_MODULE,
+};
+
+#define MAX_IDLE_STATE_COUNT 2
+
+static int max_idle_state = MAX_IDLE_STATE_COUNT - 1;
+static struct cpuidle_device __percpu *pseries_cpuidle_devices;
+static struct cpuidle_state *cpuidle_state_table;
+
+void update_smt_snooze_delay(int snooze)
+{
+ struct cpuidle_driver *drv = cpuidle_get_driver();
+ if (drv)
+ drv->states[0].target_residency = snooze;
+}
+
+static inline void idle_loop_prolog(unsigned long *in_purr, ktime_t *kt_before)
+{
+
+ *kt_before = ktime_get_real();
+ *in_purr = mfspr(SPRN_PURR);
+ /*
+* Indicate to the HV that we are idle. Now would be
+* a good time to find other work to dispatch.
+*/
+ get_lppaca()->idle = 1;
+}
+
+static inline s64 idle_loop_epilog(unsigned long in_purr, ktime_t kt_before)
+{
+ get_lppaca()->wait_state_cycles += mfspr(SPRN_PURR) - in_purr;
+ get_lppaca()->idle = 0;
+
+ return ktime_to_us(ktime_sub(ktime_get_real(), kt
[RFC PATCH v3 1/4] cpuidle: (powerpc) Add cpu_idle_wait() to allow switching of idle routines
This patch provides cpu_idle_wait() routine for the powerpc
platform which is required by the cpuidle subsystem. This
routine is required to change the idle handler on SMP systems.
The equivalent routine for x86 is in arch/x86/kernel/process.c
but the powerpc implementation is different.
cpuidle_disable variable is to enable/disable cpuidle
framework if power_save option is set during the boot
time.
Signed-off-by: Deepthi Dharwar
Signed-off-by: Trinabh Gupta
Signed-off-by: Arun R Bharadwaj
---
arch/powerpc/Kconfig |4
arch/powerpc/include/asm/processor.h |2 ++
arch/powerpc/include/asm/system.h|1 +
arch/powerpc/kernel/idle.c | 27 +++
4 files changed, 34 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 951e18f..bc7 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -87,6 +87,10 @@ config ARCH_HAS_ILOG2_U64
bool
default y if 64BIT
+config ARCH_HAS_CPU_IDLE_WAIT
+ bool
+ default y
+
config GENERIC_HWEIGHT
bool
default y
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index eb11a44..811b7e7 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -382,6 +382,8 @@ static inline unsigned long get_clean_sp(struct pt_regs
*regs, int is_32)
}
#endif
+enum idle_boot_override {IDLE_NO_OVERRIDE = 0, IDLE_POWERSAVE_OFF};
+
#endif /* __KERNEL__ */
#endif /* __ASSEMBLY__ */
#endif /* _ASM_POWERPC_PROCESSOR_H */
diff --git a/arch/powerpc/include/asm/system.h
b/arch/powerpc/include/asm/system.h
index e30a13d..ff66680 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -221,6 +221,7 @@ extern unsigned long klimit;
extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
extern int powersave_nap; /* set if nap mode can be used in idle loop */
+void cpu_idle_wait(void);
/*
* Atomic exchange
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index 39a2baa..8574b0e 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -39,9 +39,13 @@
#define cpu_should_die() 0
#endif
+unsigned long cpuidle_disable = IDLE_NO_OVERRIDE;
+EXPORT_SYMBOL(cpuidle_disable);
+
static int __init powersave_off(char *arg)
{
ppc_md.power_save = NULL;
+ cpuidle_disable = IDLE_POWERSAVE_OFF;
return 0;
}
__setup("powersave=off", powersave_off);
@@ -102,6 +106,29 @@ void cpu_idle(void)
}
}
+
+/*
+ * cpu_idle_wait - Used to ensure that all the CPUs come out of the old
+ * idle loop and start using the new idle loop.
+ * Required while changing idle handler on SMP systems.
+ * Caller must have changed idle handler to the new value before the call.
+ * This window may be larger on shared systems.
+ */
+void cpu_idle_wait(void)
+{
+ int cpu;
+ smp_mb();
+
+ /* kick all the CPUs so that they exit out of old idle routine */
+ get_online_cpus();
+ for_each_online_cpu(cpu) {
+ if (cpu != smp_processor_id())
+ smp_send_reschedule(cpu);
+ }
+ put_online_cpus();
+}
+EXPORT_SYMBOL_GPL(cpu_idle_wait);
+
int powersave_nap;
#ifdef CONFIG_SYSCTL
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[RFC PATCH v3 0/4] cpuidle: (POWER) cpuidle driver for pSeries
This patch series ports the cpuidle framework for ppc64 platform and
implements a cpuidle back-end driver for ppc64 (pSeries) platform.
Currently idle states are managed by pseries_{dedicated,shared}_idle_sleep()
routines in arch/powerpc/platforms/pseries/setup.c. There are
two idle states (snooze and cede) that are exploited by
these routines based on simple heuristics.
Moving the idle states over to cpuidle framework can take advantage of
the advanced heuristics, tunables, and features provided by cpuidle
framework. Additional idle states like extended cede with hints would be
included and exploited using the cpuidle framework. The statistics and
tracing infrastructure provided by the cpuidle framework also helps in
enabling power management related tools and help tune the system and
applications.
This series aims to maintain compatibility and functionality to
existing pSeries idle cpu management code. There are no new functions
or idle states added as part of this series.
The previous version of this patch can be found at
https://lkml.org/lkml/2011/11/17/127
Changes from the previous version (v2):
1] Rebased to latest 3.2-rc3
2] Incorporated the changes from the feedback provided by Ben
in the previous version of this series.
This patch series includes:
[1/4] - Provides arch specific cpu_idle_wait() function required by cpuidle
subsystem.
[2/4] - pseries_idle cpuidle driver
[3/4] - Enables cpuidle for pSeries and directly calls cpuidle_idle_call()
[4/4] - Handles powersave=off kernel boot parameter and disables registration
of pseries_idle cpuidle driver.
This series has been tested on ppc64 pSeries POWER7 system with the snooze
and cede states
--
arch/powerpc/Kconfig|4
arch/powerpc/include/asm/processor.h|3
arch/powerpc/include/asm/system.h |9 +
arch/powerpc/kernel/idle.c | 27 ++
arch/powerpc/kernel/sysfs.c |2
arch/powerpc/platforms/Kconfig |6
arch/powerpc/platforms/pseries/Kconfig |9 +
arch/powerpc/platforms/pseries/Makefile |1
arch/powerpc/platforms/pseries/processor_idle.c | 329 +++
arch/powerpc/platforms/pseries/pseries.h|3
arch/powerpc/platforms/pseries/setup.c | 104 +--
arch/powerpc/platforms/pseries/smp.c|1
include/linux/cpuidle.h |2
13 files changed, 411 insertions(+), 89 deletions(-)
create mode 100644 arch/powerpc/platforms/pseries/processor_idle.c
-Deepthi
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[PATCH net-next v5 3/4] can: cc770: add platform bus driver for the CC770 and AN82527
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by: Marc Kleine-Budde
---
.../devicetree/bindings/net/can/cc770.txt | 56
drivers/net/can/cc770/Kconfig |7 +
drivers/net/can/cc770/Makefile |1 +
drivers/net/can/cc770/cc770_platform.c | 273
4 files changed, 337 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
create mode 100644 drivers/net/can/cc770/cc770_platform.c
diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with "bugs" being fixed.
+
+Required properties:
+
+- compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
+ for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+ to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+ (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+ clock in Hz. Note that the internal clock frequency used by the
+ controller is half of that value. If not specified, a default
+ value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+ If not specified or if the specified value is 0, the CLKOUT pin
+ will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+ a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+ compatible = "bosch,cc770";
+ reg = <3 0x100 0x80>;
+ interrupts = <2 0>;
+ interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
connected to the ISA bus using I/O port, memory mapped or
indirect access.
+config CAN_CC770_PLATFORM
+ tristate "Generic Platform Bus based CC770 driver"
+ ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the "platform bus" (Linux abstraction for directly
+ to the processor attached devices).
+
endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
obj-$(CONFIG_CAN_CC770) += cc770.o
obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..fb87b22
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,273 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ * static struct cc770_platform_data myboard_cc770_pdata = {
+ * .osc_freq = 1600,
+ * .cir = 0x41,
+ * .cor = 0x20,
+ * .bcr = 0x40,
+ * };
+ *
+ * Please see include/linux/can/platform/cc770.h for description of
+ * above fields.
+ *
+ * If the device
[PATCH net-next v5 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19 ++-
arch/powerpc/boot/dts/tqm8548.dts | 19 ++-
arch/powerpc/boot/dts/tqm8xx.dts | 25 +
3 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = <
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
- 2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+ 2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
>;
@@ -393,18 +393,27 @@
};
/* Note: CAN support needs be enabled in U-Boot */
- can0@2,0 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,0 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x0 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
+ bosch,clock-out-frequency = <1600>;
};
- can1@2,100 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,100 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x100 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
};
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = <
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
- 2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+ 2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
>;
@@ -393,18 +393,27 @@
};
/* Note: CAN support needs be enabled in U-Boot */
- can0@2,0 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,0 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x0 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
+ bosch,clock-out-frequency = <1600>;
};
- can1@2,100 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,100 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x100 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
};
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
ranges = <
0x0 0x0 0x4000 0x80
+ 0x3 0x0 0xc000 0x200
>;
flash@0,0 {
@@ -67,
Re: [PATCH 4/6] powerpc/boot: Add extended precision shifts to the boot wrapper.
On Wed, Nov 30, 2011 at 12:48 AM, Benjamin Herrenschmidt wrote: > On Wed, 2011-11-30 at 16:23 +1100, Tony Breeds wrote: >> Code copied from arch/powerpc/kernel/misc_32.S >> >> Signed-off-by: Tony Breeds >> --- >> arch/powerpc/boot/div64.S | 52 >> + >> 1 files changed, 52 insertions(+), 0 deletions(-) > > Should we just link with libgcc ? :-) Please tell me you're joking. However, adding this code and wonderful and all but why do we need to add it? Changelog should say why. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/6] 44x: Removing dead CONFIG_PPC47x
On Wed, Nov 30, 2011 at 12:23 AM, Tony Breeds wrote: > From: Christoph Egger > > CONFIG_PPC47x doesn't exist in Kconfig, therefore removing all > references for it from the source code. > > Signed-off-by: Christoph Egger > --- > arch/powerpc/mm/44x_mmu.c | 4 > 1 files changed, 0 insertions(+), 4 deletions(-) > > diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c > index f60e006..5d4e3ff 100644 > --- a/arch/powerpc/mm/44x_mmu.c > +++ b/arch/powerpc/mm/44x_mmu.c > @@ -78,11 +78,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, > unsigned int phys) > "tlbwe %1,%3,%5\n" > "tlbwe %0,%3,%6\n" > : > -#ifdef CONFIG_PPC47x > - : "r" (PPC47x_TLB2_S_RWX), > -#else > : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), > -#endif That doesn't look right. The code is there doing something, why is it just being removed? I would think the change would be to use CONFIG_PPC_47x? Or if the code there isn't needed any longer, the changelog should say why. josh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [BUG?]3.0-rc4+ftrace+kprobe: set kprobe at instruction 'stwu' lead to system crash/freeze
Benjamin Herrenschmidt wrote: > On Fri, 2011-07-01 at 18:03 +0800, tiejun.chen wrote: >> Here emulate_step() is called to emulate 'stwu'. Actually this is equivalent >> to >> 1> update pr_regs->gpr[1] = mem(old r1 + (-A)) >> 2> 'stw , mem<(old r1 + (-A)) > >> >> You should notice the stack based on new r1 would be covered with mem> +(-A)>. So after this, the kernel exit from post_krpobe, something would be >> broken. This should depend on sizeof(-A). >> >> For kprobe show_interrupts, you can see pregs->nip is re-written violently so >> kernel issued. >> >> But sometimes we may only re-write some violate registers the kernel still >> alive. And so this is just why the kernel works well for some kprobed point >> after you change some kernel options/toolchains. >> >> If I'm correct its difficult to kprobe these stwu sp operation since the >> sizeof(-A) is undermined for the kernel. So we have to implement in-depend >> interrupt stack like PPC64. > > So I've spent a lot of time trying to find a better way to fix that bug > and I think I might have finally found one :-) I can understand what you mean in below since I remember you already clarified this way previously. > > - When you try to emulate stwcx on the kernel stack (and only there), I think it should be stwu/stdu. > don't actually perform the store. Set a TIF flag instead to indicate > special processing in the exception return path and store the address to > update somewhere either in a free slot of the stack frame itself of > somewhere in the thread struct (the former would be easier). You may as > well do some sanity checking on the value while at it to catch errors > early. > > - In the exception return code, we already test for various TIF flags > (*** see comment below, it's even buggy today for preempt ***), so we > add a test for that flag and go to do_work. > > - At the end of do_work, we check for this TIF flag. If it's not set or > any other flag is set, move on as usual. However, if it's the only flag > still set: > > - Copy the exception frame we're about to unwind to just -below- the > new r1 value we want to write to. Then perform the write, and change > r1 to point to that copy of the frame. > > - Branch to restore: which will unwind everything from that copy of > the frame, and eventually set r1 to GPR(1) in the copy which contains > the new value of r1. We still can't restore this there. As you know this emulated store instruction can touch any filed inside pt_regs. Sometimes nip would be involved for this problematic location. And unfortunately, this is just that we meet currently. So we have to go exc_exit_restart. .globl exc_exit_restart exc_exit_restart: lwz r11,_NIP(r1) lwz r12,_MSR(r1) I mean we have to do that real restore here. So I'm really not sure if its a good way to add such a codes including check TIF/copy-get new r1/restore operation here since this is so deep for the exception return code. exc_exit_start: mtspr SPRN_SRR0,r11 mtspr SPRN_SRR1,r12 > > This is the less intrusive approach and should work just fine, it's also > more robust than anything I've been able to think of and the approach > would work for 32 and 64-bit similarily. > > (***) Above comment about a bug: If you look at entry_64.S version of > ret_from_except_lite you'll notice that in the !preempt case, after > we've checked MSR_PR we test for any TIF flag in _TIF_USER_WORK_MASK to > decide whether to go to do_work or not. However, in the preempt case, we > do a convoluted trick to test SIGPENDING only if PR was set and always > test NEED_RESCHED ... but we forget to test any other bit of > _TIF_USER_WORK_MASK !!! So that means that with preempt, we completely > fail to test for things like single step, syscall tracing, etc... > This is another problem we should address. > I think this should be fixed at the same time, by simplifying the code > by doing: > > - Test PR. If set, go to test_work_user, else continue (or the other > way around and call it test_work_kernel) > > - In test_work_user, always test for _TIF_USER_WORK_MASK to decide to > go to do_work, maybe call it do_user_work > > - In test_work_kernel, test for _TIF_KERNEL_WORK_MASK which is set to > our new flag along with NEED_RESCHED if preempt is enabled and branch to > do_kernel_work. > > do_user_work is basically the same as today's user_work > > do_kernel_work is basically the same as today preempt block with added > code to handle the new flag as described above. > > Is anybody volunteering for fixing that ? I don't have the bandwidth I always use one specific kprobe stack to fix this for BOOKE and work well in my local tree :) Do you remember my v3 patch? I think its possible to extend this for all PPC variants. Anyway, I'd like to be this volunteer with our last solution. Tiejun > right now, but if nobody shows up I suppose I'll have to eventually deal > with it myself :-) > > Cheers, > Ben.
[PATCH] powerpc: Enable squashfs as a module
Most distros use it so we may as well enable it and get regular compile testing. Signed-off-by: Anton Blanchard --- Index: linux-powerpc/arch/powerpc/configs/ppc64_defconfig === --- linux-powerpc.orig/arch/powerpc/configs/ppc64_defconfig 2011-11-03 10:36:30.106405452 +1100 +++ linux-powerpc/arch/powerpc/configs/ppc64_defconfig 2011-11-03 10:49:15.731301312 +1100 @@ -390,6 +390,11 @@ CONFIG_HUGETLBFS=y CONFIG_HFS_FS=m CONFIG_HFSPLUS_FS=m CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y Index: linux-powerpc/arch/powerpc/configs/pseries_defconfig === --- linux-powerpc.orig/arch/powerpc/configs/pseries_defconfig 2011-11-03 10:36:30.130405855 +1100 +++ linux-powerpc/arch/powerpc/configs/pseries_defconfig2011-11-03 10:49:15.731301312 +1100 @@ -304,6 +304,11 @@ CONFIG_PROC_KCORE=y CONFIG_TMPFS=y CONFIG_HUGETLBFS=y CONFIG_CRAMFS=m +CONFIG_SQUASHFS=m +CONFIG_SQUASHFS_XATTR=y +CONFIG_SQUASHFS_ZLIB=y +CONFIG_SQUASHFS_LZO=y +CONFIG_SQUASHFS_XZ=y CONFIG_NFS_FS=y CONFIG_NFS_V3=y CONFIG_NFS_V3_ACL=y ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 9/9] powerpc/kdump: Only save CPU state first time through the secondary CPU capture code
We might enter the secondary CPU capture code twice, eg if we have to
unstick some CPUs with a system reset. In this case we don't want to
overwrite the state on CPUs that had made it into the capture code OK,
so use the cpus_state_saved cpumask for that and make it local to
crash_ipi_callback.
For controlling progress now use atomic_t cpus_in_crash to count how
many CPUs have made it into the kdump code, and time_to_dump to tell
everyone it's time to dump.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-30
07:38:35.131392789 +1100
+++ linux-build/arch/powerpc/kernel/crash.c 2011-11-30 21:22:18.790917413
+1100
@@ -46,7 +46,8 @@
/* This keeps a track of which one is the crashing cpu. */
int crashing_cpu = -1;
-static cpumask_t cpus_in_crash = CPU_MASK_NONE;
+static atomic_t cpus_in_crash;
+static int time_to_dump;
#define CRASH_HANDLER_MAX 3
/* NULL terminated list of shutdown handles */
@@ -67,21 +68,27 @@ static int handle_fault(struct pt_regs *
void crash_ipi_callback(struct pt_regs *regs)
{
+ static cpumask_t cpus_state_saved = CPU_MASK_NONE;
+
int cpu = smp_processor_id();
if (!cpu_online(cpu))
return;
hard_irq_disable();
- if (!cpumask_test_cpu(cpu, &cpus_in_crash))
+ if (!cpumask_test_cpu(cpu, &cpus_state_saved)) {
crash_save_cpu(regs, cpu);
- cpumask_set_cpu(cpu, &cpus_in_crash);
+ cpumask_set_cpu(cpu, &cpus_state_saved);
+ }
+
+ atomic_inc(&cpus_in_crash);
+ smp_mb__after_atomic_inc();
/*
* Starting the kdump boot.
* This barrier is needed to make sure that all CPUs are stopped.
*/
- while (!cpumask_test_cpu(crashing_cpu, &cpus_in_crash))
+ while (!time_to_dump)
cpu_relax();
if (ppc_md.kexec_cpu_down)
@@ -115,19 +122,18 @@ again:
* respond.
*/
msecs = IPI_TIMEOUT;
- while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
+ while ((atomic_read(&cpus_in_crash) < ncpus) && (--msecs > 0))
mdelay(1);
- }
/* Would it be better to replace the trap vector here? */
- if (cpumask_weight(&cpus_in_crash) >= ncpus) {
+ if (atomic_read(&cpus_in_crash) >= ncpus) {
printk(KERN_EMERG "IPI complete\n");
return;
}
printk(KERN_EMERG "ERROR: %d cpu(s) not responding\n",
- ncpus - cpumask_weight(&cpus_in_crash));
+ ncpus - atomic_read(&cpus_in_crash));
/*
* If we have a panic timeout set then we can't wait indefinitely
@@ -155,10 +161,10 @@ again:
* crash code again. We need to reset cpus_in_crash so we
* wait for everyone to do this.
*/
- cpus_in_crash = CPU_MASK_NONE;
+ atomic_set(&cpus_in_crash, 0);
smp_mb();
- while (cpumask_weight(&cpus_in_crash) < ncpus)
+ while (atomic_read(&cpus_in_crash) < ncpus)
cpu_relax();
}
@@ -316,7 +322,6 @@ void default_machine_crash_shutdown(stru
* such that another IPI will not be sent.
*/
crashing_cpu = smp_processor_id();
- crash_save_cpu(regs, crashing_cpu);
/*
* If we came in via system reset, wait a while for the secondary
@@ -326,7 +331,11 @@ void default_machine_crash_shutdown(stru
mdelay(PRIMARY_TIMEOUT);
crash_kexec_prepare_cpus(crashing_cpu);
- cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
+
+ crash_save_cpu(regs, crashing_cpu);
+
+ time_to_dump = 1;
+
crash_kexec_wait_realmode(crashing_cpu);
machine_kexec_mask_interrupts();
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[PATCH 8/9] powerpc/kdump: Delay before sending IPI on a system reset
If we enter the kdump code via system reset, wait a bit before
sending the IPI to capture all secondary CPUs. Without it we race
with the hypervisor that is issuing the system reset to each CPU.
If the IPI gets there first the system reset oops output then shows
the register state of the IPI handler which is not what we want.
I took the opportunity to add defines for all the various delays
we have. There's no need for cpu_relax when we are doing an mdelay,
so remove them too.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-28
11:44:42.222009861 +1100
+++ linux-build/arch/powerpc/kernel/crash.c 2011-11-28 14:01:58.033283718
+1100
@@ -30,6 +30,20 @@
#include
#include
+/*
+ * The primary CPU waits a while for all secondary CPUs to enter. This is to
+ * avoid sending an IPI if the secondary CPUs are entering
+ * crash_kexec_secondary on their own (eg via a system reset).
+ *
+ * The secondary timeout has to be longer than the primary. Both timeouts are
+ * in milliseconds.
+ */
+#define PRIMARY_TIMEOUT500
+#define SECONDARY_TIMEOUT 1000
+
+#define IPI_TIMEOUT1
+#define REAL_MODE_TIMEOUT 1
+
/* This keeps a track of which one is the crashing cpu. */
int crashing_cpu = -1;
static cpumask_t cpus_in_crash = CPU_MASK_NONE;
@@ -99,11 +113,9 @@ again:
* FIXME: Until we will have the way to stop other CPUs reliably,
* the crash CPU will send an IPI and wait for other CPUs to
* respond.
-* Delay of at least 10 seconds.
*/
- msecs = 1;
+ msecs = IPI_TIMEOUT;
while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
- cpu_relax();
mdelay(1);
}
@@ -163,11 +175,11 @@ again:
void crash_kexec_secondary(struct pt_regs *regs)
{
unsigned long flags;
- int msecs = 500;
+ int msecs = SECONDARY_TIMEOUT;
local_irq_save(flags);
- /* Wait 500ms for the primary crash CPU to signal its progress */
+ /* Wait for the primary crash CPU to signal its progress */
while (crashing_cpu < 0) {
if (--msecs < 0) {
/* No response, kdump image may not have been loaded */
@@ -176,7 +188,6 @@ void crash_kexec_secondary(struct pt_reg
}
mdelay(1);
- cpu_relax();
}
crash_ipi_callback(regs);
@@ -211,7 +222,7 @@ static void crash_kexec_wait_realmode(in
unsigned int msecs;
int i;
- msecs = 1;
+ msecs = REAL_MODE_TIMEOUT;
for (i=0; i < nr_cpu_ids && msecs > 0; i++) {
if (i == cpu)
continue;
@@ -306,6 +317,14 @@ void default_machine_crash_shutdown(stru
*/
crashing_cpu = smp_processor_id();
crash_save_cpu(regs, crashing_cpu);
+
+ /*
+* If we came in via system reset, wait a while for the secondary
+* CPUs to enter.
+*/
+ if (TRAP(regs) == 0x100)
+ mdelay(PRIMARY_TIMEOUT);
+
crash_kexec_prepare_cpus(crashing_cpu);
cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
crash_kexec_wait_realmode(crashing_cpu);
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[PATCH 7/9] powerpc/xics: Reset the CPPR if H_EOI fails
I have an intermittent kdump fail where the hypervisor fails an H_EOI.
As a result our CPPR is never reset to 0xff and we no longer accept
interrupts.
This patch calls icp_hv_set_cppr to reset the CPPR if H_EOI fails,
fixing the kdump fail.
Signed-off-by: Anton Blanchard
---
- I'm still trying to understand why the H_EOI is failing, perhaps it's
the code in machine_kexec_mask_interrupts that EOIs and masks interrupts.
- The patch is simpler than the diff output suggests, icp_hv_set_cppr
was moved above icp_hv_set_xirr and the call to icp_hv_set_cppr was
added.
Index: linux-build/arch/powerpc/sysdev/xics/icp-hv.c
===
--- linux-build.orig/arch/powerpc/sysdev/xics/icp-hv.c 2011-11-25
17:35:38.454558874 +1100
+++ linux-build/arch/powerpc/sysdev/xics/icp-hv.c 2011-11-25
20:15:06.169174037 +1100
@@ -41,23 +41,24 @@ static inline unsigned int icp_hv_get_xi
return ret;
}
-static inline void icp_hv_set_xirr(unsigned int value)
+static inline void icp_hv_set_cppr(u8 value)
{
- long rc = plpar_hcall_norets(H_EOI, value);
+ long rc = plpar_hcall_norets(H_CPPR, value);
if (rc != H_SUCCESS) {
- pr_err("%s: bad return code eoi xirr=0x%x returned %ld\n",
+ pr_err("%s: bad return code cppr cppr=0x%x returned %ld\n",
__func__, value, rc);
WARN_ON_ONCE(1);
}
}
-static inline void icp_hv_set_cppr(u8 value)
+static inline void icp_hv_set_xirr(unsigned int value)
{
- long rc = plpar_hcall_norets(H_CPPR, value);
+ long rc = plpar_hcall_norets(H_EOI, value);
if (rc != H_SUCCESS) {
- pr_err("%s: bad return code cppr cppr=0x%x returned %ld\n",
+ pr_err("%s: bad return code eoi xirr=0x%x returned %ld\n",
__func__, value, rc);
WARN_ON_ONCE(1);
+ icp_hv_set_cppr(value >> 24);
}
}
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[PATCH 6/9] powerpc: Reduce pseries panic timeout from 180s to 10s
We've had a 180 second panic timeout on ppc64 for as long as I
can remember. This patch reduces it to 10 seconds on pseries for a few
reasons:
- Almost all pseries machines have a hypervisor console so panic
output will be available in a scrollback buffer.
- The 180 seconds impacts our availability, users (other than
kernel hackers) just want the box to come back around so it
can continue its work.
- I spend a lot of my life staring at the 180 second panic timeout.
Many pseries machines take minutes to power cycle, so it's quicker
to sit through the 180 seconds than it is to power cycle.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/setup.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/setup.c 2011-11-08
11:41:51.84258 +1100
+++ linux-build/arch/powerpc/platforms/pseries/setup.c 2011-11-14
08:32:24.581252444 +1100
@@ -354,6 +354,8 @@ early_initcall(alloc_dispatch_log_kmem_c
static void __init pSeries_setup_arch(void)
{
+ panic_timeout = 10;
+
/* Discover PIC type and setup ppc_md accordingly */
pseries_discover_pic();
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[PATCH 5/9] powerpc: Rework die()
Our die() code was based off a very old x86 version. Update it to
mirror the current x86 code.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/traps.c
===
--- linux-build.orig/arch/powerpc/kernel/traps.c2011-11-14
08:31:02.111805931 +1100
+++ linux-build/arch/powerpc/kernel/traps.c 2011-11-14 08:32:21.185192875
+1100
@@ -98,18 +98,14 @@ static void pmac_backlight_unblank(void)
static inline void pmac_backlight_unblank(void) { }
#endif
-int die(const char *str, struct pt_regs *regs, long err)
+static arch_spinlock_t die_lock = __ARCH_SPIN_LOCK_UNLOCKED;
+static int die_owner = -1;
+static unsigned int die_nest_count;
+static int die_counter;
+
+static unsigned __kprobes long oops_begin(struct pt_regs *regs)
{
- static struct {
- raw_spinlock_t lock;
- u32 lock_owner;
- int lock_owner_depth;
- } die = {
- .lock = __RAW_SPIN_LOCK_UNLOCKED(die.lock),
- .lock_owner = -1,
- .lock_owner_depth = 0
- };
- static int die_counter;
+ int cpu;
unsigned long flags;
if (debugger(regs))
@@ -117,50 +113,37 @@ int die(const char *str, struct pt_regs
oops_enter();
- if (die.lock_owner != raw_smp_processor_id()) {
- console_verbose();
- raw_spin_lock_irqsave(&die.lock, flags);
- die.lock_owner = smp_processor_id();
- die.lock_owner_depth = 0;
- bust_spinlocks(1);
- if (machine_is(powermac))
- pmac_backlight_unblank();
- } else {
- local_save_flags(flags);
- }
-
- if (++die.lock_owner_depth < 3) {
- printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
-#ifdef CONFIG_PREEMPT
- printk("PREEMPT ");
-#endif
-#ifdef CONFIG_SMP
- printk("SMP NR_CPUS=%d ", NR_CPUS);
-#endif
-#ifdef CONFIG_DEBUG_PAGEALLOC
- printk("DEBUG_PAGEALLOC ");
-#endif
-#ifdef CONFIG_NUMA
- printk("NUMA ");
-#endif
- printk("%s\n", ppc_md.name ? ppc_md.name : "");
-
- if (notify_die(DIE_OOPS, str, regs, err, 255,
- SIGSEGV) == NOTIFY_STOP)
- return 1;
-
- print_modules();
- show_regs(regs);
- } else {
- printk("Recursive die() failure, output suppressed\n");
+ /* racy, but better than risking deadlock. */
+ raw_local_irq_save(flags);
+ cpu = smp_processor_id();
+ if (!arch_spin_trylock(&die_lock)) {
+ if (cpu == die_owner)
+ /* nested oops. should stop eventually */;
+ else
+ arch_spin_lock(&die_lock);
}
+ die_nest_count++;
+ die_owner = cpu;
+ console_verbose();
+ bust_spinlocks(1);
+ if (machine_is(powermac))
+ pmac_backlight_unblank();
+ return flags;
+}
+static void __kprobes oops_end(unsigned long flags, struct pt_regs *regs,
+ int signr)
+{
bust_spinlocks(0);
- die.lock_owner = -1;
+ die_owner = -1;
add_taint(TAINT_DIE);
+ die_nest_count--;
oops_exit();
printk("\n");
- raw_spin_unlock_irqrestore(&die.lock, flags);
+ if (!die_nest_count)
+ /* Nest count reaches zero, release the lock. */
+ arch_spin_unlock(&die_lock);
+ raw_local_irq_restore(flags);
/*
* A system reset (0x100) is a request to dump, so we always send
@@ -177,6 +160,9 @@ int die(const char *str, struct pt_regs
crash_kexec_secondary(regs);
}
+ if (!signr)
+ return;
+
/*
* While our oops output is serialised by a spinlock, output
* from panic() called below can race and corrupt it. If we
@@ -190,15 +176,46 @@ int die(const char *str, struct pt_regs
if (in_interrupt())
panic("Fatal exception in interrupt");
-
if (panic_on_oops)
panic("Fatal exception");
+ do_exit(signr);
+}
- do_exit(err);
+static int __kprobes __die(const char *str, struct pt_regs *regs, long err)
+{
+ printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
+#ifdef CONFIG_PREEMPT
+ printk("PREEMPT ");
+#endif
+#ifdef CONFIG_SMP
+ printk("SMP NR_CPUS=%d ", NR_CPUS);
+#endif
+#ifdef CONFIG_DEBUG_PAGEALLOC
+ printk("DEBUG_PAGEALLOC ");
+#endif
+#ifdef CONFIG_NUMA
+ printk("NUMA ");
+#endif
+ printk("%s\n", ppc_md.name ? ppc_md.name : "");
+
+ if (notify_die(DIE_OOPS, str, regs, err, 255, SIGSEGV) == NOTIFY_STOP)
+ return 1;
+
+ print_modules();
+ show_regs(regs);
return 0;
}
+void die(const
[PATCH 4/9] powerpc: Cleanup crash/kexec code
Remove some unnecessary defines and fix some spelling mistakes.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-25
16:42:11.554016696 +1100
+++ linux-build/arch/powerpc/kernel/crash.c 2011-11-25 16:42:37.110467611
+1100
@@ -10,41 +10,27 @@
*
*/
-#undef DEBUG
-
#include
#include
#include
#include
-#include
#include
#include
#include
-#include
-#include
#include
#include
#include
-#include
#include
#include
#include
#include
#include
-#include
#include
#include
#include
-#ifdef DEBUG
-#include
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
-
-/* This keeps a track of which one is crashing cpu. */
+/* This keeps a track of which one is the crashing cpu. */
int crashing_cpu = -1;
static cpumask_t cpus_in_crash = CPU_MASK_NONE;
@@ -201,7 +187,7 @@ void crash_kexec_secondary(struct pt_reg
static void crash_kexec_prepare_cpus(int cpu)
{
/*
-* move the secondarys to us so that we can copy
+* move the secondaries to us so that we can copy
* the new kernel 0-0x100 safely
*
* do this if kexec in setup.c ?
@@ -302,7 +288,6 @@ void default_machine_crash_shutdown(stru
unsigned int i;
int (*old_handler)(struct pt_regs *regs);
-
/*
* This function is only called after the system
* has panicked or is otherwise in a critical state.
@@ -328,7 +313,7 @@ void default_machine_crash_shutdown(stru
machine_kexec_mask_interrupts();
/*
-* Call registered shutdown routines savely. Swap out
+* Call registered shutdown routines safely. Swap out
* __debugger_fault_handler, and replace on exit.
*/
old_handler = __debugger_fault_handler;
Index: linux-build/arch/powerpc/include/asm/kexec.h
===
--- linux-build.orig/arch/powerpc/include/asm/kexec.h 2011-11-25
16:41:06.224864016 +1100
+++ linux-build/arch/powerpc/include/asm/kexec.h2011-11-25
16:42:37.110467611 +1100
@@ -49,7 +49,6 @@
#define KEXEC_STATE_REAL_MODE 2
#ifndef __ASSEMBLY__
-#include
#include
typedef void (*crash_shutdown_t)(void);
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[PATCH 3/9] powerpc/kdump: Use setjmp/longjmp to handle kdump and system reset recursion
We can handle recursion caused by system reset by reusing the crash
shutdown fault handler.
Since we don't have an OS triggerable NMI, if all CPUs don't make it
into kdump then we tell the user to issue a system reset. However if
we have a panic timeout set we cannot wait forever and must continue
the kdump.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-25
16:41:06.228864087 +1100
+++ linux-build/arch/powerpc/kernel/crash.c 2011-11-25 16:42:05.825915628
+1100
@@ -53,6 +53,16 @@ static cpumask_t cpus_in_crash = CPU_MAS
static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
static DEFINE_SPINLOCK(crash_handlers_lock);
+static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
+static int crash_shutdown_cpu = -1;
+
+static int handle_fault(struct pt_regs *regs)
+{
+ if (crash_shutdown_cpu == smp_processor_id())
+ longjmp(crash_shutdown_buf, 1);
+ return 0;
+}
+
#ifdef CONFIG_SMP
void crash_ipi_callback(struct pt_regs *regs)
@@ -89,14 +99,16 @@ void crash_ipi_callback(struct pt_regs *
static void crash_kexec_prepare_cpus(int cpu)
{
unsigned int msecs;
-
unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
+ int tries = 0;
+ int (*old_handler)(struct pt_regs *regs);
printk(KERN_EMERG "Sending IPI to other CPUs\n");
crash_send_ipi(crash_ipi_callback);
smp_wmb();
+again:
/*
* FIXME: Until we will have the way to stop other CPUs reliably,
* the crash CPU will send an IPI and wait for other CPUs to
@@ -111,12 +123,52 @@ static void crash_kexec_prepare_cpus(int
/* Would it be better to replace the trap vector here? */
- if (cpumask_weight(&cpus_in_crash) < ncpus) {
- printk(KERN_EMERG "ERROR: %d CPU(s) not responding\n",
- ncpus - cpumask_weight(&cpus_in_crash));
+ if (cpumask_weight(&cpus_in_crash) >= ncpus) {
+ printk(KERN_EMERG "IPI complete\n");
+ return;
+ }
+
+ printk(KERN_EMERG "ERROR: %d cpu(s) not responding\n",
+ ncpus - cpumask_weight(&cpus_in_crash));
+
+ /*
+* If we have a panic timeout set then we can't wait indefinitely
+* for someone to activate system reset. We also give up on the
+* second time through if system reset fail to work.
+*/
+ if ((panic_timeout > 0) || (tries > 0))
+ return;
+
+ /*
+* A system reset will cause all CPUs to take an 0x100 exception.
+* The primary CPU returns here via setjmp, and the secondary
+* CPUs reexecute the crash_kexec_secondary path.
+*/
+ old_handler = __debugger;
+ __debugger = handle_fault;
+ crash_shutdown_cpu = smp_processor_id();
+
+ if (setjmp(crash_shutdown_buf) == 0) {
+ printk(KERN_EMERG "Activate system reset (dumprestart) "
+ "to stop other cpu(s)\n");
+
+ /*
+* A system reset will force all CPUs to execute the
+* crash code again. We need to reset cpus_in_crash so we
+* wait for everyone to do this.
+*/
+ cpus_in_crash = CPU_MASK_NONE;
+ smp_mb();
+
+ while (cpumask_weight(&cpus_in_crash) < ncpus)
+ cpu_relax();
}
- printk(KERN_EMERG "IPI complete\n");
+ crash_shutdown_cpu = -1;
+ __debugger = old_handler;
+
+ tries++;
+ goto again;
}
/*
@@ -245,16 +297,6 @@ int crash_shutdown_unregister(crash_shut
}
EXPORT_SYMBOL(crash_shutdown_unregister);
-static unsigned long crash_shutdown_buf[JMP_BUF_LEN];
-static int crash_shutdown_cpu = -1;
-
-static int handle_fault(struct pt_regs *regs)
-{
- if (crash_shutdown_cpu == smp_processor_id())
- longjmp(crash_shutdown_buf, 1);
- return 0;
-}
-
void default_machine_crash_shutdown(struct pt_regs *regs)
{
unsigned int i;
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[PATCH 2/9] powerpc: Remove broken and complicated kdump system reset code
We have a lot of complicated logic that handles possible recursion between
kdump and a system reset exception. We can solve this in a much simpler
way using the same setjmp/longjmp tricks xmon does.
As a first step, this patch removes the old system reset code.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/kexec.h
===
--- linux-build.orig/arch/powerpc/include/asm/kexec.h 2011-11-09
16:27:35.918705307 +1100
+++ linux-build/arch/powerpc/include/asm/kexec.h2011-11-14
08:31:02.111805931 +1100
@@ -73,11 +73,6 @@ extern void kexec_smp_wait(void);/* get
master to copy new code to 0 */
extern int crashing_cpu;
extern void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *));
-extern cpumask_t cpus_in_sr;
-static inline int kexec_sr_activated(int cpu)
-{
- return cpumask_test_cpu(cpu, &cpus_in_sr);
-}
struct kimage;
struct pt_regs;
@@ -94,7 +89,6 @@ extern void reserve_crashkernel(void);
extern void machine_kexec_mask_interrupts(void);
#else /* !CONFIG_KEXEC */
-static inline int kexec_sr_activated(int cpu) { return 0; }
static inline void crash_kexec_secondary(struct pt_regs *regs) { }
static inline int overlaps_crashkernel(unsigned long start, unsigned long size)
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-09
16:27:35.950705892 +1100
+++ linux-build/arch/powerpc/kernel/crash.c 2011-11-14 08:31:02.111805931
+1100
@@ -47,7 +47,6 @@
/* This keeps a track of which one is crashing cpu. */
int crashing_cpu = -1;
static cpumask_t cpus_in_crash = CPU_MASK_NONE;
-cpumask_t cpus_in_sr = CPU_MASK_NONE;
#define CRASH_HANDLER_MAX 3
/* NULL terminated list of shutdown handles */
@@ -55,7 +54,6 @@ static crash_shutdown_t crash_shutdown_h
static DEFINE_SPINLOCK(crash_handlers_lock);
#ifdef CONFIG_SMP
-static atomic_t enter_on_soft_reset = ATOMIC_INIT(0);
void crash_ipi_callback(struct pt_regs *regs)
{
@@ -70,23 +68,8 @@ void crash_ipi_callback(struct pt_regs *
cpumask_set_cpu(cpu, &cpus_in_crash);
/*
-* Entered via soft-reset - could be the kdump
-* process is invoked using soft-reset or user activated
-* it if some CPU did not respond to an IPI.
-* For soft-reset, the secondary CPU can enter this func
-* twice. 1 - using IPI, and 2. soft-reset.
-* Tell the kexec CPU that entered via soft-reset and ready
-* to go down.
-*/
- if (cpumask_test_cpu(cpu, &cpus_in_sr)) {
- cpumask_clear_cpu(cpu, &cpus_in_sr);
- atomic_inc(&enter_on_soft_reset);
- }
-
- /*
* Starting the kdump boot.
* This barrier is needed to make sure that all CPUs are stopped.
-* If not, soft-reset will be invoked to bring other CPUs.
*/
while (!cpumask_test_cpu(crashing_cpu, &cpus_in_crash))
cpu_relax();
@@ -103,25 +86,14 @@ void crash_ipi_callback(struct pt_regs *
/* NOTREACHED */
}
-/*
- * Wait until all CPUs are entered via soft-reset.
- */
-static void crash_soft_reset_check(int cpu)
-{
- unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
-
- cpumask_clear_cpu(cpu, &cpus_in_sr);
- while (atomic_read(&enter_on_soft_reset) != ncpus)
- cpu_relax();
-}
-
-
static void crash_kexec_prepare_cpus(int cpu)
{
unsigned int msecs;
unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
+ printk(KERN_EMERG "Sending IPI to other CPUs\n");
+
crash_send_ipi(crash_ipi_callback);
smp_wmb();
@@ -131,7 +103,6 @@ static void crash_kexec_prepare_cpus(int
* respond.
* Delay of at least 10 seconds.
*/
- printk(KERN_EMERG "Sending IPI to other cpus...\n");
msecs = 1;
while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
cpu_relax();
@@ -140,69 +111,36 @@ static void crash_kexec_prepare_cpus(int
/* Would it be better to replace the trap vector here? */
- /*
-* FIXME: In case if we do not get all CPUs, one possibility: ask the
-* user to do soft reset such that we get all.
-* Soft-reset will be used until better mechanism is implemented.
-*/
if (cpumask_weight(&cpus_in_crash) < ncpus) {
- printk(KERN_EMERG "done waiting: %d cpu(s) not responding\n",
+ printk(KERN_EMERG "ERROR: %d CPU(s) not responding\n",
ncpus - cpumask_weight(&cpus_in_crash));
- printk(KERN_EMERG "Activate soft-reset to stop other cpu(s)\n");
- cpumask_clear(&cpus_in_sr);
- atomic_set(&enter_on_soft_reset, 0);
- while (cpumask_w
[PATCH 1/9] powerpc: Give us time to get all oopses out before panicking
I've been seeing truncated output when people send system reset info
to me. We should see a backtrace for every CPU, but the panic() code
takes the box down before they all make it out to the console. The
panic code runs unlocked so we also see corrupted console output.
If we are going to panic, then delay 1 second before calling into the
panic code. Move oops_exit inside the die lock and put a newline
between oopses for clarity.
Signed-off-by: Anton Blanchard
---
We should really rename kexec_should_crash() to something like
kernel_will_panic() and use it here. I'll work on that in a follow up
patch.
Index: linux-powerpc/arch/powerpc/kernel/traps.c
===
--- linux-powerpc.orig/arch/powerpc/kernel/traps.c 2011-07-05
14:21:44.017308041 +1000
+++ linux-powerpc/arch/powerpc/kernel/traps.c 2011-07-05 14:21:52.727459818
+1000
@@ -158,6 +158,8 @@ int die(const char *str, struct pt_regs
bust_spinlocks(0);
die.lock_owner = -1;
add_taint(TAINT_DIE);
+ oops_exit();
+ printk("\n");
raw_spin_unlock_irqrestore(&die.lock, flags);
if (kexec_should_crash(current) ||
@@ -165,13 +167,23 @@ int die(const char *str, struct pt_regs
crash_kexec(regs);
crash_kexec_secondary(regs);
+ /*
+* While our oops output is serialised by a spinlock, output
+* from panic() called below can race and corrupt it. If we
+* know we are going to panic, delay for 1 second so we have a
+* chance to get clean backtraces from all CPUs that are oopsing.
+*/
+ if (in_interrupt() || panic_on_oops || !current->pid ||
+ is_global_init(current)) {
+ mdelay(MSEC_PER_SEC);
+ }
+
if (in_interrupt())
panic("Fatal exception in interrupt");
if (panic_on_oops)
panic("Fatal exception");
- oops_exit();
do_exit(err);
return 0;
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[PATCH 0/9] oops and kdump patches
Here are a number of patches I've put together based on some rather strenuous testing of our oops and kdump paths. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc: use rwsem.h from generic location
As of commit dd472da38, rwsem.h was moved into asm-generic.
This patch removes the arch file and points the build at
its new location.
Signed-off-by: Richard Kuo
---
arch/powerpc/include/asm/Kbuild |2 +
arch/powerpc/include/asm/rwsem.h | 132 --
2 files changed, 2 insertions(+), 132 deletions(-)
delete mode 100644 arch/powerpc/include/asm/rwsem.h
diff --git a/arch/powerpc/include/asm/Kbuild b/arch/powerpc/include/asm/Kbuild
index d51df17..7e313f1 100644
--- a/arch/powerpc/include/asm/Kbuild
+++ b/arch/powerpc/include/asm/Kbuild
@@ -34,3 +34,5 @@ header-y += termios.h
header-y += types.h
header-y += ucontext.h
header-y += unistd.h
+
+generic-y += rwsem.h
diff --git a/arch/powerpc/include/asm/rwsem.h b/arch/powerpc/include/asm/rwsem.h
deleted file mode 100644
index bb1e2cd..000
--- a/arch/powerpc/include/asm/rwsem.h
+++ /dev/null
@@ -1,132 +0,0 @@
-#ifndef _ASM_POWERPC_RWSEM_H
-#define _ASM_POWERPC_RWSEM_H
-
-#ifndef _LINUX_RWSEM_H
-#error "Please don't include directly, use
instead."
-#endif
-
-#ifdef __KERNEL__
-
-/*
- * R/W semaphores for PPC using the stuff in lib/rwsem.c.
- * Adapted largely from include/asm-i386/rwsem.h
- * by Paul Mackerras .
- */
-
-/*
- * the semaphore definition
- */
-#ifdef CONFIG_PPC64
-# define RWSEM_ACTIVE_MASK 0xL
-#else
-# define RWSEM_ACTIVE_MASK 0xL
-#endif
-
-#define RWSEM_UNLOCKED_VALUE 0xL
-#define RWSEM_ACTIVE_BIAS 0x0001L
-#define RWSEM_WAITING_BIAS (-RWSEM_ACTIVE_MASK-1)
-#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
-#define RWSEM_ACTIVE_WRITE_BIAS(RWSEM_WAITING_BIAS +
RWSEM_ACTIVE_BIAS)
-
-/*
- * lock for reading
- */
-static inline void __down_read(struct rw_semaphore *sem)
-{
- if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))
- rwsem_down_read_failed(sem);
-}
-
-static inline int __down_read_trylock(struct rw_semaphore *sem)
-{
- long tmp;
-
- while ((tmp = sem->count) >= 0) {
- if (tmp == cmpxchg(&sem->count, tmp,
- tmp + RWSEM_ACTIVE_READ_BIAS)) {
- return 1;
- }
- }
- return 0;
-}
-
-/*
- * lock for writing
- */
-static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
-{
- long tmp;
-
- tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,
-(atomic_long_t *)&sem->count);
- if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))
- rwsem_down_write_failed(sem);
-}
-
-static inline void __down_write(struct rw_semaphore *sem)
-{
- __down_write_nested(sem, 0);
-}
-
-static inline int __down_write_trylock(struct rw_semaphore *sem)
-{
- long tmp;
-
- tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,
- RWSEM_ACTIVE_WRITE_BIAS);
- return tmp == RWSEM_UNLOCKED_VALUE;
-}
-
-/*
- * unlock after reading
- */
-static inline void __up_read(struct rw_semaphore *sem)
-{
- long tmp;
-
- tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);
- if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))
- rwsem_wake(sem);
-}
-
-/*
- * unlock after writing
- */
-static inline void __up_write(struct rw_semaphore *sem)
-{
- if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,
-(atomic_long_t *)&sem->count) < 0))
- rwsem_wake(sem);
-}
-
-/*
- * implement atomic add functionality
- */
-static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
-{
- atomic_long_add(delta, (atomic_long_t *)&sem->count);
-}
-
-/*
- * downgrade write lock to read lock
- */
-static inline void __downgrade_write(struct rw_semaphore *sem)
-{
- long tmp;
-
- tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,
-(atomic_long_t *)&sem->count);
- if (tmp < 0)
- rwsem_downgrade_wake(sem);
-}
-
-/*
- * implement exchange and add functionality
- */
-static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
-{
- return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
-}
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_POWERPC_RWSEM_H */
--
1.7.3
--
Sent by an employee of the Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum.
___
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RE: [PATCH][RFC] fsldma: fix performance degradation by optimizing spinlock use.
Hello Ira,
In drivers/dma/dmaengine.c, we have below tight loop to check DMA completion in
mainline Linux:
do {
status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
if (time_after_eq(jiffies, dma_sync_wait_timeout)) {
printk(KERN_ERR "dma_sync_wait_timeout!\n");
return DMA_ERROR;
}
} while (status == DMA_IN_PROGRESS);
Thanks,
Forrest
-Original Message-
From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
Sent: 2011年11月30日 1:26
To: Li Yang-R58472
Cc: Shi Xuelin-B29237; vinod.k...@intel.com; dan.j.willi...@intel.com;
linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org
Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing
spinlock use.
On Tue, Nov 29, 2011 at 03:19:05AM +, Li Yang-R58472 wrote:
> > Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by
> > optimizing spinlock use.
> >
> > On Thu, Nov 24, 2011 at 08:12:25AM +, Shi Xuelin-B29237 wrote:
> > > Hi Ira,
> > >
> > > Thanks for your review.
> > >
> > > After second thought, I think your scenario may not occur.
> > > Because the cookie 20 we query must be returned by
> > > fsl_dma_tx_submit(...) in
> > practice.
> > > We never query a cookie not returned by fsl_dma_tx_submit(...).
> > >
> >
> > I agree about this part.
> >
> > > When we call fsl_tx_status(20), the chan->common.cookie is
> > > definitely wrote as
> > 20 and cpu2 could not read as 19.
> > >
> >
> > This is what I don't agree about. However, I'm not an expert on CPU cache
> > vs.
> > memory accesses in an multi-processor system. The section titled
> > "CACHE COHERENCY" in Documentation/memory-barriers.txt leads me to
> > believe that the scenario I described is possible.
>
> For Freescale PowerPC, the chip automatically takes care of cache coherency.
> Even if this is a concern, spinlock can't address it.
>
> >
> > What happens if CPU1's write of chan->common.cookie only goes into
> > CPU1's cache. It never makes it to main memory before CPU2 fetches the old
> > value of 19.
> >
> > I don't think you should see any performance impact from the
> > smp_mb() operation.
>
> Smp_mb() do have impact on performance if it's in the hot path. While it
> might be safer having it, I doubt it is really necessary. If the CPU1
> doesn't have the updated last_used, it's shouldn't have known there is a
> cookie 20 existed either.
>
I believe that you are correct, for powerpc. However, anything outside of
arch/powerpc shouldn't assume it only runs on powerpc. I wouldn't be surprised
to see fsldma running on an iMX someday (ARM processor).
My interpretation says that the change introduces the possibility that
fsl_tx_status() returns the wrong answer for an extremely small time window, on
SMP only, based on Documentation/memory-barriers.txt. But I can't seem convince
you.
My real question is what code path is hitting this spinlock? Is it in mainline
Linux? Why is it polling rather than using callbacks to determine DMA
completion?
Thanks,
Ira
> > > -Original Message-
> > > From: Ira W. Snyder [mailto:i...@ovro.caltech.edu]
> > > Sent: 2011年11月23日 2:59
> > > To: Shi Xuelin-B29237
> > > Cc: dan.j.willi...@intel.com; Li Yang-R58472; z...@zh-kernel.org;
> > > vinod.k...@intel.com; linuxppc-dev@lists.ozlabs.org;
> > > linux-ker...@vger.kernel.org
> > > Subject: Re: [PATCH][RFC] fsldma: fix performance degradation by
> > > optimizing
> > spinlock use.
> > >
> > > On Tue, Nov 22, 2011 at 12:55:05PM +0800, b29...@freescale.com wrote:
> > > > From: Forrest Shi
> > > >
> > > > dma status check function fsl_tx_status is heavily called in
> > > > a tight loop and the desc lock in fsl_tx_status contended by
> > > > the dma status update function. this caused the dma performance
> > > > degrades much.
> > > >
> > > > this patch releases the lock in the fsl_tx_status function.
> > > > I believe it has no neglect impact on the following call of
> > > > dma_async_is_complete(...).
> > > >
> > > > we can see below three conditions will be identified as success
> > > > a) x < complete < use
> > > > b) x < complete+N < use+N
> > > > c) x < complete < use+N
> > > > here complete is the completed_cookie, use is the last_used
> > > > cookie, x is the querying cookie, N is MAX cookie
> > > >
> > > > when chan->completed_cookie is being read, the last_used may
> > > > be incresed. Anyway it has no neglect impact on the dma status
> > > > decision.
> > > >
> > > > Signed-off-by: Forrest Shi
> > > > ---
> > > > drivers/dma/fsldma.c |5 -
> > > > 1 files changed, 0 insertions(+), 5 deletions(-)
> > > >
> > > > diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c index
> > > > 8a78154..1dca56f 100644
> > > > --- a/drivers/dma/fsldma.c
> > > > +++ b/drivers/dma/fsldma.c
> > > > @@ -986,15 +986,10 @@ static enum dma_status
> >
Re: [PATCH v2] Integrated Flash Controller support
On Tue, 2011-11-29 at 19:47 -0600, Kumar Gala wrote: > As Scott said, I was more asking about the 2nd patch in the sequence > which did touch MTD. Since that one is dependent on this patch, > wondering how we wanted to handle them. I do not have time to review it, but it looks OK, so I'd suggest to merge it vie the same tree as the rest of the patches. -- Best Regards, Artem Bityutskiy signature.asc Description: This is a digitally signed message part ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH net-next v5 3/4] can: cc770: add platform bus driver for the CC770 and AN82527
This driver works with both, static platform data and device tree
bindings. It has been tested on a TQM855L board with two AN82527
CAN controllers on the local bus.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
Acked-by: Marc Kleine-Budde
---
.../devicetree/bindings/net/can/cc770.txt | 56
drivers/net/can/cc770/Kconfig |7 +
drivers/net/can/cc770/Makefile |1 +
drivers/net/can/cc770/cc770_platform.c | 273
4 files changed, 337 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/net/can/cc770.txt
create mode 100644 drivers/net/can/cc770/cc770_platform.c
diff --git a/Documentation/devicetree/bindings/net/can/cc770.txt
b/Documentation/devicetree/bindings/net/can/cc770.txt
new file mode 100644
index 000..01e282d
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/cc770.txt
@@ -0,0 +1,56 @@
+Memory mapped Bosch CC770 and Intel AN82527 CAN controller
+
+Note: The CC770 is a CAN controller from Bosch, which is 100%
+compatible with the old AN82527 from Intel, but with "bugs" being fixed.
+
+Required properties:
+
+- compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
+ for the AN82527.
+
+- reg : should specify the chip select, address offset and size required
+ to map the registers of the controller. The size is usually 0x80.
+
+- interrupts : property with a value describing the interrupt source
+ (number and sensitivity) required for the controller.
+
+Optional properties:
+
+- bosch,external-clock-frequency : frequency of the external oscillator
+ clock in Hz. Note that the internal clock frequency used by the
+ controller is half of that value. If not specified, a default
+ value of 1600 (16 MHz) is used.
+
+- bosch,clock-out-frequency : slock frequency in Hz on the CLKOUT pin.
+ If not specified or if the specified value is 0, the CLKOUT pin
+ will be disabled.
+
+- bosch,slew-rate : slew rate of the CLKOUT signal. If not specified,
+ a resonable value will be calculated.
+
+- bosch,disconnect-rx0-input : see data sheet.
+
+- bosch,disconnect-rx1-input : see data sheet.
+
+- bosch,disconnect-tx1-output : see data sheet.
+
+- bosch,polarity-dominant : see data sheet.
+
+- bosch,divide-memory-clock : see data sheet.
+
+- bosch,iso-low-speed-mux : see data sheet.
+
+For further information, please have a look to the CC770 or AN82527.
+
+Examples:
+
+can@3,100 {
+ compatible = "bosch,cc770";
+ reg = <3 0x100 0x80>;
+ interrupts = <2 0>;
+ interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+};
+
+
+
diff --git a/drivers/net/can/cc770/Kconfig b/drivers/net/can/cc770/Kconfig
index 28e4d48..22c07a8 100644
--- a/drivers/net/can/cc770/Kconfig
+++ b/drivers/net/can/cc770/Kconfig
@@ -11,4 +11,11 @@ config CAN_CC770_ISA
connected to the ISA bus using I/O port, memory mapped or
indirect access.
+config CAN_CC770_PLATFORM
+ tristate "Generic Platform Bus based CC770 driver"
+ ---help---
+ This driver adds support for the CC770 and AN82527 chips
+ connected to the "platform bus" (Linux abstraction for directly
+ to the processor attached devices).
+
endif
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 872ecff..9fb8321 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -4,5 +4,6 @@
obj-$(CONFIG_CAN_CC770) += cc770.o
obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
+obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/cc770_platform.c
b/drivers/net/can/cc770/cc770_platform.c
new file mode 100644
index 000..fb87b22
--- /dev/null
+++ b/drivers/net/can/cc770/cc770_platform.c
@@ -0,0 +1,273 @@
+/*
+ * Driver for CC770 and AN82527 CAN controllers on the platform bus
+ *
+ * Copyright (C) 2009, 2011 Wolfgang Grandegger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the version 2 of the GNU General Public License
+ * as published by the Free Software Foundation
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+/*
+ * If platform data are used you should have similar definitions
+ * in your board-specific code:
+ *
+ * static struct cc770_platform_data myboard_cc770_pdata = {
+ * .osc_freq = 1600,
+ * .cir = 0x41,
+ * .cor = 0x20,
+ * .bcr = 0x40,
+ * };
+ *
+ * Please see include/linux/can/platform/cc770.h for description of
+ * above fields.
+ *
+ * If the device
[PATCH net-next v5 4/4] powerpc: tqm8548/tqm8xx: add and update CAN device nodes
This patch enables or updates support for the CC770 and AN82527
CAN controller on the TQM8548 and TQM8xx boards.
CC: devicetree-disc...@lists.ozlabs.org
CC: linuxppc-...@ozlabs.org
CC: Kumar Gala
Signed-off-by: Wolfgang Grandegger
---
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 19 ++-
arch/powerpc/boot/dts/tqm8548.dts | 19 ++-
arch/powerpc/boot/dts/tqm8xx.dts | 25 +
3 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 9452c3c..d918752 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -352,7 +352,7 @@
ranges = <
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
- 2 0x0 0xa300 0x8000 // CAN (2 x i82527)
+ 2 0x0 0xa300 0x8000 // CAN (2 x CC770)
3 0x0 0xa301 0x8000 // NAND FLASH
>;
@@ -393,18 +393,27 @@
};
/* Note: CAN support needs be enabled in U-Boot */
- can0@2,0 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,0 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x0 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
+ bosch,clock-out-frequency = <1600>;
};
- can1@2,100 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,100 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x100 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
};
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8548.dts
b/arch/powerpc/boot/dts/tqm8548.dts
index 619776f..988d887 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -352,7 +352,7 @@
ranges = <
0 0x0 0xfc00 0x0400 // NOR FLASH bank 1
1 0x0 0xf800 0x0800 // NOR FLASH bank 0
- 2 0x0 0xe300 0x8000 // CAN (2 x i82527)
+ 2 0x0 0xe300 0x8000 // CAN (2 x CC770)
3 0x0 0xe301 0x8000 // NAND FLASH
>;
@@ -393,18 +393,27 @@
};
/* Note: CAN support needs be enabled in U-Boot */
- can0@2,0 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,0 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x0 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
+ bosch,clock-out-frequency = <1600>;
};
- can1@2,100 {
- compatible = "intel,82527"; // Bosch CC770
+ can@2,100 {
+ compatible = "bosch,cc770"; // Bosch CC770
reg = <2 0x100 0x100>;
interrupts = <4 1>;
interrupt-parent = <&mpic>;
+ bosch,external-clock-frequency = <1600>;
+ bosch,disconnect-rx1-input;
+ bosch,disconnect-tx1-output;
+ bosch,iso-low-speed-mux;
};
/* Note: NAND support needs to be enabled in U-Boot */
diff --git a/arch/powerpc/boot/dts/tqm8xx.dts b/arch/powerpc/boot/dts/tqm8xx.dts
index f6da7ec..c3dba25 100644
--- a/arch/powerpc/boot/dts/tqm8xx.dts
+++ b/arch/powerpc/boot/dts/tqm8xx.dts
@@ -57,6 +57,7 @@
ranges = <
0x0 0x0 0x4000 0x80
+ 0x3 0x0 0xc000 0x200
>;
flash@0,0 {
@@ -67,
