Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!

2012-08-10 Thread Michael Ellerman


Scott Wood  wrote:

>On 08/10/2012 04:00 AM, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>>> On Fri, 2012-08-10 at 09:43 +0200, 
>>> 
>>> Signed-off-by: Liu Yu 
>> 
>> And this address bounces, nice.
>
>He doesn't work here anymore.  We'll take care of the breakage.

Thanks. 

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Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Scott Wood

On 08/08/2012 10:52 PM, Jia Hongtao-B38951 wrote:
> 
> 
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Wednesday, August 08, 2012 11:54 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/07/2012 10:57 PM, Jia Hongtao-B38951 wrote:
>>>
>>>
 -Original Message-
 From: Wood Scott-B07421
 Sent: Tuesday, August 07, 2012 11:20 PM
 To: Jia Hongtao-B38951
 Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
 Yang-R58472
 Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
 initialization code

 On 08/07/2012 01:23 AM, Jia Hongtao-B38951 wrote:
>> -Original Message-
>> From: Wood Scott-B07421
>> Sent: Monday, August 06, 2012 11:16 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org;
>> Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/05/2012 09:39 PM, Jia Hongtao-B38951 wrote:
>>>
>>>
 -Original Message-
 From: Wood Scott-B07421
 Sent: Saturday, August 04, 2012 12:04 AM
 To: Jia Hongtao-B38951
 Cc: Kumar Gala; linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421;
 Li
 Yang-R58472
 Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
 initialization code

 On 08/02/2012 10:39 PM, Jia Hongtao-B38951 wrote:
>
>
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Thursday, August 02, 2012 8:24 PM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> You need to convert all boards to use fsl_pci_init before this
 patch.
>> Otherwise we'll end up with PCI getting initialized twice on
 boards.
>>
>> - k
>
> If we covert all boards with platform driver in this patch PCI
> will be initialized only once without converting all boards to
> use fsl_pci_init first.

 Then we'd have to pick apart core changes from board changes when
 reviewing.

> If we convert all boards to use fsl_pci_init before this patch
> and convert them to use platform driver again after this patch.
> Then between this patch and next pci will be initialized twice
>> too.

 Why?  That one patch should both create the platform driver and
 remove the init from fsl_pci_init() -- except things like primary
 bus
 detection which has to happen globally.

 -Scott
>>>
>>> "One patch both create the platform driver and remove the init
>>> from fsl_pci_init()" means we should create platform driver and
>>> applied to all boards. If so why not just directly convert all
>>> boards using platform driver?
>>
>> Because it's harder to review when you have a bunch of board code
>> in
 the
>> patch in addition to core changes.
>>
>> Because you might want people to actually test on the boards in
 question
>> when converting, especially given the change in how primary buses
>> are determined, and that some boards may need to provide their own
>> alternative.
>>
>> -Scott
>
> But if we separate the core changes and the boards update, between
> this
 two
> patches PCI will be initialized twice.

 As I said earlier, you can remove the initcall and require boards to
 manually call fsl_pci_init() until all boards are converted.

 -Scott
>>>
>>> As I said earlier, I can do this but it does not solve the twice-init
>> problem.
>>
>> I must have missed it.  Why does it not solve the problem?  If a board
>> doesn't call fsl_pci_init(), the platform driver doesn't get registered.
>>
>>> If I do this first and then add platform driver we also have to
>>> convert all boards using platform driver in the same patch.
>>>
>>> We finally using the platform driver so Why do you keep insisting on
>>> converting all boards using fsl_pci_init() first even it does no
>> improvement.
>>
>> What we're asking for is bisectability (don't have any intermediate
>> stages where PCI gets initialized twice), and the ability to have a
>> smooth transition where boards can be converted as people are able to
>> test them and look into their individual needs regarding primary bus.
>>
>> -Scott
> 
> In my patch there is no bisectability problem. If you don't think so could
> you please give more details?

You are registering the PCI platform d

Re: [PATCH 1/2] powerpc/85xx: add the Fman device tree template include files

2012-08-10 Thread Timur Tabi
Scott Wood wrote:
> Where's the binding document for all this?  Why isn't devicetree-discuss
> on CC?

Oops.  I don't even know if our existing documentation is up-to-date.
Ugh.  I'll dig it up and post a v2.

-- 
Timur Tabi
Linux kernel developer at Freescale

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Re: [PATCH 1/2] powerpc/85xx: add the Fman device tree template include files

2012-08-10 Thread Scott Wood
On 08/10/2012 05:31 PM, Timur Tabi wrote:
> Introduce the template include files for the Freecale Frame Manager (Fman).
> An SOC can have up to two Fman devices, and each Fman can have up to
> five 1G Ethernet MACs and one 10G Ethernet MAC.
> 
> Signed-off-by: Timur Tabi 
> ---
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi   |  140 
> +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi |   54 
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi  |   63 +
>  arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi   |  140 
> +
>  14 files changed, 1027 insertions(+), 0 deletions(-)

Where's the binding document for all this?  Why isn't devicetree-discuss
on CC?

-Scott


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[PATCH 1/2] powerpc/85xx: add the Fman device tree template include files

2012-08-10 Thread Timur Tabi
Introduce the template include files for the Freecale Frame Manager (Fman).
An SOC can have up to two Fman devices, and each Fman can have up to
five 1G Ethernet MACs and one 10G Ethernet MAC.

Signed-off-by: Timur Tabi 
---
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi   |  140 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi |   54 
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi  |   63 +
 arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi   |  140 +
 14 files changed, 1027 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi

diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
new file mode 100644
index 000..cc6bad3
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x40 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *   names of its contributors may be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of 
this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@40 {
+   fman0_10g_rx0: port@9 {
+   cell-index = <0>;
+   compatible = "fsl,fman-port-10g-rx";
+   reg = <0x9 0x1000>;
+   };
+
+   fman0_10g_tx0: port@b {
+   cell-index = <0>;
+   compatible = "fsl,fman-port-10g-tx";
+   reg = <0xb 0x1000>;
+   fsl,qman-channel-id = <0x40>;
+   };
+
+   ethernet@f {
+   cell-index = <0>;
+   compatible = "fsl,fman-10g-mac";
+   reg = <0xf 0x1000>;
+   fsl,port-handles = <&fman0_10g_rx0 &fman0_10g_t

[PATCH 2/2] powerpc/85xx: add Fman MDIO muxing support to the P4080DS

2012-08-10 Thread Timur Tabi
The Freescale P4080 SOC contains two Fman Ethernet controllers, each of
which contains four 1G Ethernet MACs and one 10G Ethernet MAC.  The
SerDes protocol determines how the MACs are routed to various RGMII,
SGMII, or XGMII PHYs on the board, so the P4080DS reference board
provides a MDIO bus multiplexing feature that is controlled via GPIOs.

This patch adds the basic Ethernet, MDIO, mdio-mux, and PHY nodes
necessary to get MDIO bus muxing working, using Cavium's mdio-mux-gpio
driver.  The remaining DPAA nodes (Qman, Bman, etc), as well as the
DPAA device drivers, are not included.

Signed-off-by: Timur Tabi 
---
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |   12 +
 arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi  |3 +
 arch/powerpc/boot/dts/p4080ds.dts   |  307 +++
 arch/powerpc/platforms/85xx/Kconfig |3 +
 arch/powerpc/platforms/85xx/corenet_ds.c|7 +
 5 files changed, 332 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c..1ce5056 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -347,4 +347,16 @@
 /include/ "qoriq-usb2-mph-0.dtsi"
 /include/ "qoriq-usb2-dr-0.dtsi"
 /include/ "qoriq-sec4.0-0.dtsi"
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
 };
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi 
b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index b9556ee..1be6360 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -69,6 +69,9 @@
rtic_c = &rtic_c;
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+
+   fman0 = &fman0;
+   fman1 = &fman1;
};
 
cpus {
diff --git a/arch/powerpc/boot/dts/p4080ds.dts 
b/arch/powerpc/boot/dts/p4080ds.dts
index 3e20460..68ae3bb 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -41,6 +41,44 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
 
+   aliases {
+   ethernet0 = &fm1_gb0;   // FM1@DTSEC1
+   ethernet1 = &fm1_gb1;   // FM1@DTSEC2
+   ethernet2 = &fm1_gb2;   // FM1@DTSEC3
+   ethernet3 = &fm1_gb3;   // FM1@DTSEC4
+   ethernet4 = &fm1_10g;   // FM1@TGEC1
+   ethernet5 = &fm2_gb0;   // FM2@DTSEC1
+   ethernet6 = &fm2_gb1;   // FM2@DTSEC2
+   ethernet7 = &fm2_gb2;   // FM2@DTSEC3
+   ethernet8 = &fm2_gb3;   // FM2@DTSEC4
+   ethernet9 = &fm2_10g;   // FM2@TGEC1
+
+   phy_rgmii = &phy_rgmii;
+
+   phy_sgmii_slot3_1c = &phy_sgmii_slot3_1c;
+   phy_sgmii_slot3_1d = &phy_sgmii_slot3_1d;
+   phy_sgmii_slot3_1e = &phy_sgmii_slot3_1e;
+   phy_sgmii_slot3_1f = &phy_sgmii_slot3_1f;
+
+   phy_sgmii_slot4_1c = &phy_sgmii_slot4_1c;
+   phy_sgmii_slot4_1d = &phy_sgmii_slot4_1d;
+   phy_sgmii_slot4_1e = &phy_sgmii_slot4_1e;
+   phy_sgmii_slot4_1f = &phy_sgmii_slot4_1f;
+
+   phy_sgmii_slot5_1c = &phy_sgmii_slot5_1c;
+   phy_sgmii_slot5_1d = &phy_sgmii_slot5_1d;
+   phy_sgmii_slot5_1e = &phy_sgmii_slot5_1e;
+   phy_sgmii_slot5_1f = &phy_sgmii_slot5_1f;
+
+   // Used by U-Boot to find the mdio-mux nodes
+   emi1_rgmii = &emi1_rgmii;
+   emi1_slot3 = &emi1_slot3;
+   emi1_slot4 = &emi1_slot4;
+   emi1_slot5 = &emi1_slot5;
+   emi2_slot4 = &emi2_slot4;
+   emi2_slot5 = &emi2_slot5;
+   };
+
memory {
device_type = "memory";
};
@@ -106,6 +144,117 @@
dr_mode = "host";
phy_type = "ulpi";
};
+
+   fman0: fman@40 {
+   fm1_gb0: ethernet@e {
+   tbi-handle = <&tbi0>;
+   phy-connection-type = "sgmii";
+   };
+
+   mdio0: mdio@e1120 {
+   tbi0: tbi-phy@8 {
+   reg = <0x8>;
+   device_type = "tbi-phy";
+   };
+   };
+
+   fm1_gb1: ethernet@e2000 {
+   tbi-handle = <&tbi1>;
+   phy-connection-type = "sgmii";
+ 

[PATCH] powerpc/epapr: export epapr_hypercall_start

2012-08-10 Thread Scott Wood
This fixes breakage introduced by the following commit:

  commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
  Author: Liu Yu-B13201 
  Date:   Tue Jul 3 05:48:56 2012 +

PPC: Don't use hardcoded opcode for ePAPR hcall invocation

when a driver that uses ePAPR hypercalls is built as a module.

Reported-by: Geert Uytterhoeven 
Signed-off-by: Scott Wood 
---
Sending to Alex even though this isn't KVM-specific since the commit it
fixes is still only in his tree (and linux-next).

 arch/powerpc/kernel/ppc_ksyms.c |5 +
 1 file changed, 5 insertions(+)

diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 3e40315..e597dde 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -43,6 +43,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_PPC32
 extern void transfer_to_handler(void);
@@ -192,3 +193,7 @@ EXPORT_SYMBOL(__arch_hweight64);
 #ifdef CONFIG_PPC_BOOK3S_64
 EXPORT_SYMBOL_GPL(mmu_psize_defs);
 #endif
+
+#ifdef CONFIG_EPAPR_PARAVIRT
+EXPORT_SYMBOL(epapr_hypercall_start);
+#endif
-- 
1.7.9.5

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Re: [PATCH v2 2/2] powerpc/mpic: add global timer support

2012-08-10 Thread Scott Wood
On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
> +static int group_get_freq(struct group_priv *priv)
> +{
> + if (priv->flags & FSL_GLOBAL_TIMER) {
> + ccbfreq = fsl_get_sys_freq();
> + priv->timerfreq = ccbfreq;
> + } else {
> + priv->timerfreq = in_be32(priv->group_tfrr);
> + }

FSL MPICs have TFRR too.  I'm not sure that the lack of fsl,mpic is a
good indication that TFRR is being set (e.g. we have old device trees
for FSL chips with U-Boot that are labelled as ordinary openpics).

> +
> + if (priv->timerfreq <= 0)
> + return -EINVAL;
> +
> + return 0;
> +}

timerfreq is unsigned.  It can never be < 0.

> +
> +static int group_init_regmap(struct device_node *np, struct group_priv *priv)
> +{
> + priv->group_tfrr = of_iomap(np, 0);
> + if (!priv->group_tfrr) {
> + pr_err("%s: cannot ioremap tfrr address.\n",
> + np->full_name);
> + return -EINVAL;
> + }
> +
> + priv->regs = of_iomap(np, 1);
> + if (!priv->regs) {
> + pr_err("%s: cannot ioremap timer register address.\n",
> + np->full_name);
> + return -EINVAL;
> + }
> +
> + if (!(priv->flags & FSL_GLOBAL_TIMER))
> + return 0;
> +
> + priv->group_tcr = of_iomap(np, 2);
> + if (!priv->group_tcr) {
> + pr_err("%s: cannot ioremap tcr address.\n", np->full_name);
> + return -EINVAL;
> + }

This is not compatible with existing mpic timer nodes.

> + p = of_get_property(np, "available-ranges", &len);
> + if (p && len % (2 * sizeof(u32)) != 0) {
> + pr_err("%s: malformed fsl,available-ranges property.\n",
> + np->full_name);
> + return -EINVAL;
> + }

You need to support fsl,available-ranges since that's in an accepted
binding and people could have partitioned setups already using it.

You also have a mismatch between the property you check and the error
string.

-Scott


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Re: [PATCH v2 2/2] powerpc/mpic: add global timer support

2012-08-10 Thread Gala Kumar-B11780

On Aug 10, 2012, at 2:40 PM, Scott Wood wrote:

> On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
>> +static const struct of_device_id mpic_timer_ids[] = {
>> +{ .compatible = "open-pic,global-timer", },
>> +{ .compatible = "fsl,global-timer", },
>> +{},
>> +};
>> +
>> +static int __init mpic_timer_init(void)
>> +{
>> +struct device_node *np = NULL;
>> +
>> +for_each_node_by_type(np, "open-pic")
>> +if (of_match_node(mpic_timer_ids, np))
>> +group_init(np);
>> +
>> +if (list_empty(&group_list))
>> +return -ENODEV;
>> +
>> +return 0;
>> +}
>> +arch_initcall(mpic_timer_init);
>> 
> 
> Where do you distinguish an FSL timer from an openpic timer?  I thought
> openpic timers didn't support cascading.

in group_init()

+   if (of_device_is_compatible(np, "fsl,global-timer"))
+   priv->flags |= FSL_GLOBAL_TIMER;
+

- k


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Re: [PATCH v2 2/2] powerpc/mpic: add global timer support

2012-08-10 Thread Scott Wood
On 08/10/2012 12:54 AM, dongsheng.w...@freescale.com wrote:
> +static const struct of_device_id mpic_timer_ids[] = {
> + { .compatible = "open-pic,global-timer", },
> + { .compatible = "fsl,global-timer", },
> + {},
> +};
> +
> +static int __init mpic_timer_init(void)
> +{
> + struct device_node *np = NULL;
> +
> + for_each_node_by_type(np, "open-pic")
> + if (of_match_node(mpic_timer_ids, np))
> + group_init(np);
> +
> + if (list_empty(&group_list))
> + return -ENODEV;
> +
> + return 0;
> +}
> +arch_initcall(mpic_timer_init);
> 

Where do you distinguish an FSL timer from an openpic timer?  I thought
openpic timers didn't support cascading.

Oh, and don't probe by device_type.

-Scott


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Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

2012-08-10 Thread Scott Wood
On 08/10/2012 12:53 AM, dongsheng.w...@freescale.com wrote:
> From: Wang Dongsheng 
> 
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
> 
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specification.
> 
> Signed-off-by: Wang Dongsheng 
> Signed-off-by: Li Yang 
> ---
>  Documentation/devicetree/bindings/open-pic.txt |   46 
> 
>  .../devicetree/bindings/powerpc/fsl/mpic-timer.txt |   21 +
>  arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi|7 ++-
>  arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|7 ++-
>  4 files changed, 66 insertions(+), 15 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/open-pic.txt 
> b/Documentation/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>  
>  * References
>  
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"

open-pic isn't a vendor (or software project that acts like a
pseudo-vendor) -- I'd go with "open-pic-global-timer".

> +- reg : Contains two regions.  The first is the timer frequency reporting
> +  register for the group.  The second is the main timer register bank
> +  (GTCCR, GTBCR, GTVPR, GTDR).

Why not just put clock-frequency in the node, instead of describing
TFRR?  I don't think U-Boot currently sets TFRR.

> +- available-ranges: use  style section to define which
> +  timer interrupts can be used.  This property is optional; without this,
> +  all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> +  with timer zero.  If available-ranges is present, only the interrupts
> +  that correspond to available timers shall be present.
> +
> +* Examples
> +
> +Example 1:
> +
> + /* Note that this requires #interrupt-cells to be 4 */
> + timer: timer@010f0 {

Unit addres shouldn't have leading zeroes.

> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";

Remove device_type.  Not only is it deprecated outside of real OF, it's
wrong -- this isn't an openpic, it's just a subset of it.

> + reg = <0x010f0 4 0x01100 0x100>;
> +
> + /* Another AMP partition is using timer */
> + available-ranges = <2 2>;
>
> +
> + interrupts = <2 0 3 0
> +   3 0 3 0>;
> + };
> +
> +Example 2:
> +
> + timer: timer@010f0 {
> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";
> + reg = <0x010f0 4 0x01100 0x100>;
> + interrupts = <0 0 3 0
> +   1 0 3 0
> +   2 0 3 0
> +   3 0 3 0>;
> + };

4-cell interrupt specifiers are specific to Freescale MPICs.  This means
there's no way to describe the timer interrupt on a non-Freescale
openpic.  Again, I suggest we not bother with this in the absence of an
actual need to support the timer on non-Freescale openpic in partitioned
scenarios.  The existing openpic node is sufficient to describe the
hardware in the absence of partitioning.   We could have an
"openpic-no-timer" property to indicate that we're describing it
separately, so that the absence of a timer node isn't ambiguous as to
whether it's an old tree or a partitioned scenario.  An fsl,mpic
compatible would imply openpic-no-timer.

Note that I believe many of the non-Freescale openpic nodes are going to
be found on systems with real Open Firmware, so we can't go changing the
device tree for them.

-Scott


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Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!

2012-08-10 Thread Scott Wood
On 08/10/2012 04:00 AM, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
>>> Sicne a few days, powerpc allmodconfig fails with:
>>>
>>> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
>>> make[2]: *** [__modpost] Error 1
>>> make[1]: *** [modules] Error 2
>>>
>>> http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
>>
>>
>> Yep, modular build is broken.
>>
>> Since this commit by the looks of it:
>>
>> commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
>> Author: Liu Yu-B13201 
>> Date:   Tue Jul 3 05:48:56 2012 +
>>
>> PPC: Don't use hardcoded opcode for ePAPR hcall invocation
>> 
>> Signed-off-by: Liu Yu 
> 
> And this address bounces, nice.

He doesn't work here anymore.  We'll take care of the breakage.

-Scott


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Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Scott Wood
On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote:
> 
> 
>> -Original Message-
>> From: Gala Kumar-B11780
>> Sent: Thursday, August 09, 2012 3:04 AM
>> To: Wood Scott-B07421
>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
>> d...@lists.ozlabs.org
>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
> As I explained before, this has to be done globally, not from
> the probe function, so we can assign a default primary bus if
> there
> isn't any ISA.
> There are bugs in the Linux PPC PCI code relating to not having
> any primary bus.
>
> -Scott

 In my way of searching ISA you can also assign a default primary
 bus in board specific files.
>>>
>>> That was meant for when the board file had an alternate way of
>>> searching for the primary bus (e.g. look for i8259), not as a
>>> replacement for the mechanism that guarantees there's a primary bus.
>>>
>>> You are causing a regression in the qemu_e500.c platform.
>>
>> Can we fix the qemu device tree to address the problem if we do
>> make it a rule to use the ISA node to indicate the primary bus?
>
> No.  There is no ISA, and we're not going to lie and say there is.

 But we can assign a default primary for qemu.
>>>
>>> Not in the device tree.  What other mechanism do you propose?  And why
>>> do you want to fix it only for QEMU and not other boards, where things
>>> happen to work but not as designed?
>>>
>>> Kumar, can you speak up here as maintainer so we can stop going back
>>> and forth endlessly?
>>
>> I'd rather we stick with the code that works for this purpose at this
>> point.  That would be Scott's current upstream code.  Lets get the other
>> aspects of this patchset closed (SWIOTLB, conversion to platform driver,
>> PM, etc.).  The primary bus code Scott wrote does NOT need to change at
>> this point.
>>
>> - k
> 
> 
> I just submitted a new version of PCI patch in which I improve the primary 
> part.
> The reasons I want to change the way of primary assignment listed below:
> 
> 1. This approach is functionally equivalent to the Scott's code. In my 
> approach
> there might be no primary assigned but it fixed by "quick fix" introduced by 
> Ben.
> Please refer to this link:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html

You might want to get Ben's input as to whether he actually wants to see
that "quick fix" applied.

> 2. Scott's and my way could not handle the situation that "the primary is not 
> the
> first PCI bus detected". I found that only ge_imp3a got this problem so I 
> fixed it
> by adding ISA node to its device tree. By adding this I think the solution is
> logically completed.

How did my approach not handle this case?  As I said, ge_imp3a platform
code needs to set fsl_pci_primary manually before PCI init runs.

Adding a node to the device tree is not the answer, since that will
break compatibility with old device trees.

> 3. The key advantage of my way is better unified for platform driver. If I use
> the Scott's way I have to make an routine and called in all boards code.

Only until all boards are converted, and this is *not* different with
your approach.

> The goal
> of my PCI patch is unifying all PCI initialization code and obviously primary
> determination is part of PCI code.
> 
> 4. The other advantage is efficiency. All my search for ISA node is just under
> PCI node instead of all device tree.

We do so many searches over the full device tree during boot that this
is meaningless.

Do you have benchmarks to show that device tree iteration is a
significant contributor to boot time?

-Scott


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Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

2012-08-10 Thread Kumar Gala

On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:

> when missing USB PHY clock, kernel booting up will hang during USB
> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> CPU hanging in this case.
> 
> Signed-off-by: Shengzhou Liu 
> ---
> drivers/usb/host/ehci-fsl.c |   63 ++
> drivers/usb/host/ehci-fsl.h |1 +
> 2 files changed, 46 insertions(+), 18 deletions(-)

I assume this should be considered a bug fix and be looked at for inclusion in 
v3.6?

- k
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Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document

2012-08-10 Thread Gala Kumar-B11780

On Aug 10, 2012, at 12:53 AM,  
 wrote:

> From: Wang Dongsheng 
> 
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
> 
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specification.
> 
> Signed-off-by: Wang Dongsheng 
> Signed-off-by: Li Yang 
> ---
> Documentation/devicetree/bindings/open-pic.txt |   46 

Let's separate out the open-pic.txt timer binding change into its own patch 
from the FSL timer binding & dtsi updates.

> .../devicetree/bindings/powerpc/fsl/mpic-timer.txt |   21 +
> arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi|7 ++-
> arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi|7 ++-
> 4 files changed, 66 insertions(+), 15 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/open-pic.txt 
> b/Documentation/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
> 
> * References
> 
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"
> +
> +- reg : Contains two regions.  The first is the timer frequency reporting
> +  register for the group.  The second is the main timer register bank
> +  (GTCCR, GTBCR, GTVPR, GTDR).
> +
> +- available-ranges: use  style section to define which
> +  timer interrupts can be used.  This property is optional; without this,
> +  all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> +  with timer zero.  If available-ranges is present, only the interrupts
> +  that correspond to available timers shall be present.
> +

If we are going to require device_type property it should be in the binding.

Based on the comments in ePAPR, I recommend dropping device_type from the timer 
binding.

> +* Examples
> +
> +Example 1:
> +
> + /* Note that this requires #interrupt-cells to be 4 */
> + timer: timer@010f0 {
> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";
> + reg = <0x010f0 4 0x01100 0x100>;
> +
> + /* Another AMP partition is using timer */
> + available-ranges = <2 2>;
> +
> + interrupts = <2 0 3 0
> +   3 0 3 0>;
> + };
> +
> +Example 2:
> +
> + timer: timer@010f0 {
> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";
> + reg = <0x010f0 4 0x01100 0x100>;
> + interrupts = <0 0 3 0
> +   1 0 3 0
> +   2 0 3 0
> +   3 0 3 0>;
> + };
> +
> [1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
> Requirements (ePAPR), Version 1.0, July 2008.
> (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.pdf)
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt 
> b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> index df41958..5aafca0 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> @@ -1,13 +1,14 @@
> * Freescale MPIC timers
> 
> Required properties:
> -- compatible: "fsl,mpic-global-timer"
> +- compatible: "fsl,global-timer"

Why are renaming?.. also use of fsl,global-timer is to generic of a name for 
the this.

> 
> -- reg : Contains two regions.  The first is the main timer register bank
> -  (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The second is the timer control
> +- reg : Contains three regions.  The first is the timer frequency reporting
> +  register (TFRRx) for the group.  The second is the main timer register
> +  bank (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx).  The third is the timer control
>   register (TCRx) for the group.
> 
> -- fsl,available-ranges: use  style section to define which
> +- available-ranges: use  style section to define which
>   timer interrupts can be used.  This property is optional; without this,
>   all timers within the group can be used.
> 
> @@ -18,19 +19,21 @@ Required properties:
> Example:
>   /* Note that this requires #interrupt-cells to be 4 */
>   timer0: timer@41100 {
> - compatible = "fsl,mpic-global-timer";
> - reg = <0x41100 0x100 0x41300 4>;
> + compatible = "fsl,global-timer";
> + device_type = "open-pic";
> + reg = <0x410f0 4 0x41100 0x100 0x41300 4>;
> 
>   /* Another AMP partition is using timers 0 and 1 */
> - fsl,available-ranges = <2 2>;
> + available-ranges = <2 2>;
> 
>   interrupts = <2 0 3 0
> 3 0 3 0>;
>   };
> 
>   time

Re: [PATCH v3 1/2] mmc: Move mmc_delay() to include/linux/mmc/core.h

2012-08-10 Thread Arnd Bergmann
On Friday 10 August 2012, Chunhe Lan wrote:

> +static inline void mmc_delay(unsigned int ms)
> +{
> + if (ms < 1000 / HZ) {
> + cond_resched();
> + mdelay(ms);
> + } else {
> + msleep(ms);
> + }
> +}

I would actually question the point in this function to start with: The
decision whether to call mdelay() or msleep() should only be based on
whether you are allowed to sleep in the caller context. The idea of


cond_resched();
mdelay(ms);

sets off alarm bells, and I would always replace that with msleep().

Arnd
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Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Kumar Gala

On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:

> We unified the Freescale pci/pcie initialization by changing the fsl_pci
> to a platform driver. In previous PCI code architecture the initialization
> routine is called at board_setup_arch stage. Now the initialization is done
> in probe function which is architectural better. Also It's convenient for
> adding PM support for PCI controller in later patch.
> 
> We also change the way of determining primary bus for fitting platform
> driver. Thanks to the proposal from Ben. Please refer to the link below:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
> 
> Now we registered pci controllers as platform devices. So we combine two
> initialization code as one platform driver.
> 
> Signed-off-by: Jia Hongtao 
> Signed-off-by: Li Yang 
> Signed-off-by: Chunhe Lan 
> ---
> Changes for V6:
> - Fix "isa_io_base could not be zero" bug. Thanks to Ben.
> 
> - Determining primary by looking for ISA node does not work for ge_imp3a.
>  It's fixed by adding ISA node to its devied tree.
> 
> arch/powerpc/boot/dts/ge_imp3a.dts |4 +
> arch/powerpc/kernel/pci-common.c   |2 +-
> arch/powerpc/platforms/85xx/common.c   |   10 +++
> arch/powerpc/platforms/85xx/corenet_ds.c   |   31 +
> arch/powerpc/platforms/85xx/ge_imp3a.c |   48 +
> arch/powerpc/platforms/85xx/mpc8536_ds.c   |   36 +-
> arch/powerpc/platforms/85xx/mpc85xx_ads.c  |9 +--
> arch/powerpc/platforms/85xx/mpc85xx_cds.c  |   14 +
> arch/powerpc/platforms/85xx/mpc85xx_ds.c   |   38 ++
> arch/powerpc/platforms/85xx/mpc85xx_mds.c  |   38 +-
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |   28 +++-
> arch/powerpc/platforms/85xx/p1010rdb.c |   14 +
> arch/powerpc/platforms/85xx/p1022_ds.c |   34 +-
> arch/powerpc/platforms/85xx/p1022_rdk.c|   34 +-
> arch/powerpc/platforms/85xx/p1023_rds.c|7 +--
> arch/powerpc/platforms/85xx/p2041_rdb.c|2 +-
> arch/powerpc/platforms/85xx/p3041_ds.c |2 +-
> arch/powerpc/platforms/85xx/p4080_ds.c |2 +-
> arch/powerpc/platforms/85xx/p5020_ds.c |2 +-
> arch/powerpc/platforms/85xx/p5040_ds.c |2 +-
> arch/powerpc/platforms/85xx/qemu_e500.c|3 +-
> arch/powerpc/platforms/85xx/sbc8548.c  |   19 +-
> arch/powerpc/platforms/85xx/socrates.c |   11 +---
> arch/powerpc/platforms/85xx/stx_gp3.c  |   11 +---
> arch/powerpc/platforms/85xx/tqm85xx.c  |   21 +--
> arch/powerpc/platforms/85xx/xes_mpc85xx.c  |   54 ++-
> arch/powerpc/platforms/86xx/gef_ppc9a.c|   10 +--
> arch/powerpc/platforms/86xx/gef_sbc310.c   |   11 +---
> arch/powerpc/platforms/86xx/gef_sbc610.c   |   10 +--
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c |   19 +
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |   40 +--
> arch/powerpc/platforms/86xx/sbc8641d.c |   12 +---
> arch/powerpc/sysdev/fsl_pci.c  |  102 +---
> arch/powerpc/sysdev/fsl_pci.h  |9 ++-
> drivers/edac/mpc85xx_edac.c|   43 +++-
> 35 files changed, 165 insertions(+), 567 deletions(-)
> 
> diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts 
> b/arch/powerpc/boot/dts/ge_imp3a.dts
> index fefae41..aa2c4b5 100644
> --- a/arch/powerpc/boot/dts/ge_imp3a.dts
> +++ b/arch/powerpc/boot/dts/ge_imp3a.dts
> @@ -248,6 +248,10 @@
> 0x100 0x0 0x0
> 0x100 0x0 0x0
> 0x0 0x1>;
> +
> + isa@1e {
> + device_type = "isa";
> + };
>   };
>   };
> };

Why are we adding an isa node to the ge_imp3a.dts?

If this is really needed it should be a separate patch as well.

- k

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Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Kumar Gala

On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:

> We unified the Freescale pci/pcie initialization by changing the fsl_pci
> to a platform driver. In previous PCI code architecture the initialization
> routine is called at board_setup_arch stage. Now the initialization is done
> in probe function which is architectural better. Also It's convenient for
> adding PM support for PCI controller in later patch.
> 
> We also change the way of determining primary bus for fitting platform
> driver. Thanks to the proposal from Ben. Please refer to the link below:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
> 
> Now we registered pci controllers as platform devices. So we combine two
> initialization code as one platform driver.
> 
> Signed-off-by: Jia Hongtao 
> Signed-off-by: Li Yang 
> Signed-off-by: Chunhe Lan 
> ---
> Changes for V6:
> - Fix "isa_io_base could not be zero" bug. Thanks to Ben.
> 
> - Determining primary by looking for ISA node does not work for ge_imp3a.
>  It's fixed by adding ISA node to its devied tree.
> 
> arch/powerpc/boot/dts/ge_imp3a.dts |4 +
> arch/powerpc/kernel/pci-common.c   |2 +-
> arch/powerpc/platforms/85xx/common.c   |   10 +++
> arch/powerpc/platforms/85xx/corenet_ds.c   |   31 +
> arch/powerpc/platforms/85xx/ge_imp3a.c |   48 +
> arch/powerpc/platforms/85xx/mpc8536_ds.c   |   36 +-
> arch/powerpc/platforms/85xx/mpc85xx_ads.c  |9 +--
> arch/powerpc/platforms/85xx/mpc85xx_cds.c  |   14 +
> arch/powerpc/platforms/85xx/mpc85xx_ds.c   |   38 ++
> arch/powerpc/platforms/85xx/mpc85xx_mds.c  |   38 +-
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |   28 +++-
> arch/powerpc/platforms/85xx/p1010rdb.c |   14 +
> arch/powerpc/platforms/85xx/p1022_ds.c |   34 +-
> arch/powerpc/platforms/85xx/p1022_rdk.c|   34 +-
> arch/powerpc/platforms/85xx/p1023_rds.c|7 +--
> arch/powerpc/platforms/85xx/p2041_rdb.c|2 +-
> arch/powerpc/platforms/85xx/p3041_ds.c |2 +-
> arch/powerpc/platforms/85xx/p4080_ds.c |2 +-
> arch/powerpc/platforms/85xx/p5020_ds.c |2 +-
> arch/powerpc/platforms/85xx/p5040_ds.c |2 +-
> arch/powerpc/platforms/85xx/qemu_e500.c|3 +-
> arch/powerpc/platforms/85xx/sbc8548.c  |   19 +-
> arch/powerpc/platforms/85xx/socrates.c |   11 +---
> arch/powerpc/platforms/85xx/stx_gp3.c  |   11 +---
> arch/powerpc/platforms/85xx/tqm85xx.c  |   21 +--
> arch/powerpc/platforms/85xx/xes_mpc85xx.c  |   54 ++-
> arch/powerpc/platforms/86xx/gef_ppc9a.c|   10 +--
> arch/powerpc/platforms/86xx/gef_sbc310.c   |   11 +---
> arch/powerpc/platforms/86xx/gef_sbc610.c   |   10 +--
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c |   19 +
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |   40 +--
> arch/powerpc/platforms/86xx/sbc8641d.c |   12 +---
> arch/powerpc/sysdev/fsl_pci.c  |  102 +---
> arch/powerpc/sysdev/fsl_pci.h  |9 ++-
> drivers/edac/mpc85xx_edac.c|   43 +++-
> 35 files changed, 165 insertions(+), 567 deletions(-)
> 

[ snip ]

> diff --git a/arch/powerpc/kernel/pci-common.c 
> b/arch/powerpc/kernel/pci-common.c
> index 0f75bd5..2a09aa5 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -734,7 +734,7 @@ void __devinit pci_process_bridge_OF_ranges(struct 
> pci_controller *hose,
>   hose->io_base_virt = ioremap(cpu_addr, size);
> 
>   /* Expect trouble if pci_addr is not 0 */
> - if (primary)
> + if (primary || !isa_io_base)
>   isa_io_base =
>   (unsigned long)hose->io_base_virt;
> #endif /* CONFIG_PPC32 */

Make this a separate patch.

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Re: [git pull] Please pull powerpc.git merge branch (updated)

2012-08-10 Thread Kumar Gala
Ben,

Two updates from last week (one dts bug fix, one minor defconfig update)

- k

The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:

  Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge

for you to fetch changes up to 09a3017a585eb8567a7de15b426bb1dfb548bf0f:

  powerpc/p4080ds: dts - add usb controller version info and port0 (2012-08-10 
07:47:02 -0500)


Jia Hongtao (1):
  powerpc/fsl-pci: Only scan PCI bus if configured as a host

Shengzhou Liu (1):
  powerpc/p4080ds: dts - add usb controller version info and port0

Zhao Chenhui (1):
  powerpc/85xx: mpc85xx_defconfig - add VIA PATA support for MPC85xxCDS

 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |7 +++
 arch/powerpc/configs/mpc85xx_defconfig  |1 +
 arch/powerpc/sysdev/fsl_pci.c   |   13 -
 3 files changed, 16 insertions(+), 5 deletions(-)

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Re: [PATCH 3/3, v2] powerpc/e5500: Add Power ISA properties to comply with ePAPR 1.1

2012-08-10 Thread Kumar Gala

On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:

> power-isa-version and power-isa-* are cpu node general properties defined in 
> ePAPR.
> 
> If the power-isa-version property exists, then for each category from the 
> Categories section of Book I of the Power ISA version indicated, the 
> existence of a property named power-isa-[CAT], where [CAT] is the 
> abbreviated category name with all uppercase letters converted to 
> lowercase, indicates that the category is supported by the implementation.
> 
> This patch update all the e5500 platforms.
> 
> Signed-off-by: Liu Yu 
> Signed-off-by: Olivia Yin 
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
> 
> arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi |   59 
> arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi |3 +
> 2 files changed, 62 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi

Added p5040si-pre.dtsi

applied to next

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Re: [PATCH 1/3, v2] powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1

2012-08-10 Thread Kumar Gala

On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:

> power-isa-version and power-isa-* are cpu node general properties defined in 
> ePAPR.
> 
> If the power-isa-version property exists, then for each category from the 
> Categories section of Book I of the Power ISA version indicated, the 
> existence of a property named power-isa-[CAT], where [CAT] is the 
> abbreviated category name with all uppercase letters converted to 
> lowercase, indicates that the category is supported by the implementation.
> 
> The patch update all e500v2 platforms.
> 
> Signed-off-by: Liu Yu 
> Signed-off-by: Olivia Yin 
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next

applied to next

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Re: [PATCH 2/3, v2] powerpc/e500mc: Add Power ISA properties to comply with ePAPR 1.1

2012-08-10 Thread Kumar Gala

On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:

> power-isa-version and power-isa-* are cpu node general properties defined in 
> ePAPR.
> 
> If the power-isa-version property exists, then for each category from the 
> Categories section of Book I of the Power ISA version indicated, the 
> existence of a property named power-isa-[CAT], where [CAT] is the 
> abbreviated category name with all uppercase letters converted to 
> lowercase, indicates that the category is supported by the implementation.
> 
> The patch update all the e500mc platforms.
> 
> Signed-off-by: Liu Yu 
> Signed-off-by: Olivia Yin 
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next
> 
> arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi |   58 +++
> arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi  |3 +
> arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi  |3 +
> arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi  |3 +
> 4 files changed, 67 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi

applied to next

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Re: [PATCH 1/3, v2] powerpc/e500v2: Add Power ISA properties to comply with ePAPR 1.1

2012-08-10 Thread Kumar Gala

On Aug 9, 2012, at 2:42 AM, Olivia Yin wrote:

> power-isa-version and power-isa-* are cpu node general properties defined in 
> ePAPR.
> 
> If the power-isa-version property exists, then for each category from the 
> Categories section of Book I of the Power ISA version indicated, the 
> existence of a property named power-isa-[CAT], where [CAT] is the 
> abbreviated category name with all uppercase letters converted to 
> lowercase, indicates that the category is supported by the implementation.
> 
> The patch update all e500v2 platforms.
> 
> Signed-off-by: Liu Yu 
> Signed-off-by: Olivia Yin 
> ---
> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
> branch: next

applied to next

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Re: [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary

2012-08-10 Thread Kumar Gala

On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote:

> Remove the dependency on PCI initialization for SWIOTLB initialization.
> So that PCI can be initialized at proper time.
> 
> SWIOTLB is partly determined by PCI inbound/outbound map which is assigned
> in PCI initialization. But swiotlb_init() should be done at the stage of
> mem_init() which is much earlier than PCI initialization. So we reserve the
> memory for SWIOTLB first and free it if not necessary.
> 
> All boards are converted to fit this change.
> 
> Signed-off-by: Jia Hongtao 
> Signed-off-by: Li Yang 
> ---
> arch/powerpc/include/asm/swiotlb.h   |6 ++
> arch/powerpc/kernel/dma-swiotlb.c|   20 
> arch/powerpc/mm/mem.c|3 +--
> arch/powerpc/platforms/44x/currituck.c   |   10 ++
> arch/powerpc/platforms/85xx/mpc85xx_ds.c |1 +
> arch/powerpc/platforms/85xx/qemu_e500.c  |1 +
> arch/powerpc/sysdev/fsl_pci.c|5 +
> 7 files changed, 32 insertions(+), 14 deletions(-)

applied to next

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Re: [PATCH 3/3 v5] powerpc/mpic: FSL MPIC error interrupt support.

2012-08-10 Thread Kumar Gala

On Aug 7, 2012, at 11:06 PM, Varun Sethi wrote:

> All SOC device error interrupts are muxed and delivered to the core
> as a single MPIC error interrupt. Currently all the device drivers
> requiring access to device errors have to register for the MPIC error
> interrupt as a shared interrupt.
> 
> With this patch we add interrupt demuxing capability in the mpic driver,
> allowing device drivers to register for their individual error interrupts.
> This is achieved by handling error interrupts in a cascaded fashion.
> 
> MPIC error interrupt is handled by the "error_int_handler", which
> subsequently demuxes it using the EISR and delivers it to the respective
> drivers. 
> 
> The error interrupt capability is dependent on the MPIC EIMR register,
> which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error
> interrupt demuxing capability is dependent on the MPIC version and can
> be used for versions >= 4.1.
> 
> Signed-off-by: Varun Sethi 
> Signed-off-by: Bogdan Hamciuc 
> [In the initial version of the patch we were using handle_simple_irq
> as the handler for cascaded error interrupts, this resulted
> in issues in case of threaded isrs (with RT kernel). This issue was
> debugged by Bogdan and decision was taken to use the handle_level_irq
> handler]
> ---
> arch/powerpc/include/asm/mpic.h|   14 
> arch/powerpc/sysdev/Makefile   |2 +-
> arch/powerpc/sysdev/fsl_mpic_err.c |  149 
> arch/powerpc/sysdev/mpic.c |   44 ++-
> arch/powerpc/sysdev/mpic.h |   22 +
> 5 files changed, 229 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_mpic_err.c

applied to next

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Re: [PATCH] mpc85xx_defconfig: add VIA PATA support for MPC85xxCDS

2012-08-10 Thread Kumar Gala

On Aug 7, 2012, at 4:12 AM, Zhao Chenhui wrote:

> Signed-off-by: Zhao Chenhui 
> ---
> Replace this patch "mpc85xx_defconfig: add IDE support for MPC85xxCDS".
> 
> arch/powerpc/configs/mpc85xx_defconfig |1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)

applied to merge

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Re: [PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0

2012-08-10 Thread Kumar Gala

On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:

> Add the missing usb controller version info and port0, which is
> required during setup usb phy.
> 
> Signed-off-by: Shengzhou Liu 
> ---
> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |7 +++
> 1 files changed, 7 insertions(+), 0 deletions(-)

applied to merge

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Re: [PATCH] powerpc/smp: Do not disable IPI interrupts during suspend

2012-08-10 Thread Kumar Gala

On Aug 2, 2012, at 5:04 AM, Zhao Chenhui wrote:

> On Sat, Jul 28, 2012 at 08:20:31AM +1000, Benjamin Herrenschmidt wrote:
>> On Fri, 2012-07-27 at 16:58 -0500, Kumar Gala wrote:
>>> On Jul 20, 2012, at 7:47 AM, Zhao Chenhui wrote:
>>> 
 During suspend, all interrupts including IPI will be disabled. In this 
 case,
 the suspend process will hang in SMP. To prevent this, pass the flag
 IRQF_NO_SUSPEND when requesting IPI irq.
 
 Signed-off-by: Zhao Chenhui 
 Signed-off-by: Li Yang 
 ---
 arch/powerpc/kernel/smp.c |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)
>>> 
>>> BenH,
>>> 
>>> Can you ack?
>> 
>> No I'll merge it but not until it's been in next for a bit unless you
>> have some strong emergency there, it's on my mental list of things to
>> shovel into next after rc1.
>> 
>> Curiosity: didn't we use to disable all non-boot CPUs on suspend ?
>> 
>> Cheers,
>> Ben.
> 
> Yes, we disabled all non-boot CPUs on suspend by calling 
> disable_nonboot_cpus().
> The disable_nonboot_cpus() needs IPIs to work. But prior to
> calling disable_nonboot_cpus(), the IPIs are disabled in dpm_suspend_noirq().
> 
> -Chenhui

Benh, Ack?

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[PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock

2012-08-10 Thread Shengzhou Liu
when missing USB PHY clock, kernel booting up will hang during USB
initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
CPU hanging in this case.

Signed-off-by: Shengzhou Liu 
---
 drivers/usb/host/ehci-fsl.c |   63 ++
 drivers/usb/host/ehci-fsl.h |1 +
 2 files changed, 46 insertions(+), 18 deletions(-)

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index b7451b2..aeb6d03 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -210,11 +210,11 @@ static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
usb_put_hcd(hcd);
 }
 
-static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
+static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
   enum fsl_usb2_phy_modes phy_mode,
   unsigned int port_offset)
 {
-   u32 portsc, temp;
+   u32 portsc, timeout;
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
void __iomem *non_ehci = hcd->regs;
struct device *dev = hcd->self.controller;
@@ -232,9 +232,15 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_ULPI:
if (pdata->controller_ver) {
/* controller version 1.6 or above */
-   temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-   out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
-   USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
+   setbits32(non_ehci + FSL_SOC_USB_CTRL,
+   ULPI_PHY_CLK_SEL);
+   /*
+* Due to controller issue of PHY_CLK_VALID in ULPI
+* mode, we set USB_CTRL_USB_EN before checking
+* PHY_CLK_VALID, otherwise PHY_CLK_VALID doesn't work.
+*/
+   clrsetbits_be32(non_ehci + FSL_SOC_USB_CTRL,
+   UTMI_PHY_EN, USB_CTRL_USB_EN);
}
portsc |= PORT_PTS_ULPI;
break;
@@ -247,9 +253,7 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_UTMI:
if (pdata->controller_ver) {
/* controller version 1.6 or above */
-   temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-   out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
-   UTMI_PHY_EN | USB_CTRL_USB_EN);
+   setbits32(non_ehci + FSL_SOC_USB_CTRL, UTMI_PHY_EN);
mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
become stable - 10ms*/
}
@@ -262,23 +266,39 @@ static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
case FSL_USB2_PHY_NONE:
break;
}
+
+   if ((pdata->controller_ver) && ((phy_mode == FSL_USB2_PHY_ULPI) ||
+   (phy_mode == FSL_USB2_PHY_UTMI))) {
+   for (timeout = 1000; timeout > 0; timeout--) {
+   /* check PHY_CLK_VALID to get phy clk valid */
+   if (in_be32(non_ehci + FSL_SOC_USB_CTRL)
+   & PHY_CLK_VALID)
+   break;
+   udelay(1);
+   }
+   if (timeout == 0) {
+   printk(KERN_WARNING "fsl-ehci: USB PHY clock 
invalid\n");
+   return -EINVAL;
+   }
+   }
+
ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
+
+   if (phy_mode != FSL_USB2_PHY_ULPI)
+   setbits32(non_ehci + FSL_SOC_USB_CTRL, USB_CTRL_USB_EN);
+
+   return 0;
 }
 
-static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
+static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 {
struct usb_hcd *hcd = ehci_to_hcd(ehci);
struct fsl_usb2_platform_data *pdata;
void __iomem *non_ehci = hcd->regs;
-   u32 temp;
 
pdata = hcd->self.controller->platform_data;
 
-   /* Enable PHY interface in the control reg. */
if (pdata->have_sysif_regs) {
-   temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
-   out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x0004);
-
/*
* Turn on cache snooping hardware, since some PowerPC platforms
* wholly rely on hardware to deal with cache coherent
@@ -293,7 +313,8 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
 
if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
(pdata->operating_mode == FSL_USB2_DR_OTG))
-   ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
+   if (ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0))
+   return -EINVAL;
 
if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
unsigned int chip, rev, sv

[PATCH 1/2] powerpc/p4080ds: dts - add usb controller version info and port0

2012-08-10 Thread Shengzhou Liu
Add the missing usb controller version info and port0, which is
required during setup usb phy.

Signed-off-by: Shengzhou Liu 
---
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi |7 +++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c..4f9c9f6 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -345,6 +345,13 @@
 /include/ "qoriq-duart-1.dtsi"
 /include/ "qoriq-gpio-0.dtsi"
 /include/ "qoriq-usb2-mph-0.dtsi"
+   usb@21 {
+   compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", 
"fsl-usb2-mph";
+   port0;
+   };
 /include/ "qoriq-usb2-dr-0.dtsi"
+   usb@211000 {
+   compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", 
"fsl-usb2-dr";
+   };
 /include/ "qoriq-sec4.0-0.dtsi"
 };
-- 
1.6.4


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Re: [PATCH v3 0/7] mv643xx.c: Add basic device tree support.

2012-08-10 Thread Arnd Bergmann
On Thursday 09 August 2012, Ian Molton wrote:
> >  I think showing one
> > parent device with children at address 0, 1 and 2 is ok.
> Is it acceptable for the child devices to directly access the
> parents register space? because there would be no other
> way for that to work.

Yes, I see no problem with that. As long as all the drivers
agree on who can access what.

> >  The driver
> > already knows all those offsets and they are always the same
> > for all variants of mv643xx, right?
> Yes, but its not clean. And no amount of refactoring is
> really going to make a nice driver that also fits the ancient
> (and badly thought out) OF bindings.

In what way is it badly though out, or not clean? The use of
underscores in the properties, and the way that the sram
is configured is problematic, I agree. But The way that
the three ports are addressed and how the PHY is found
seems quite clever.

> If we have to break things, we can at least go for a nice
> clean design, surely?
> 
> The ports arent really child devices of the MAC. The MAC
> just has 3 ports.

I don't see the difference between those two things.

> Luckily, it looks like the existing users don't actually use
> the device tree to set up the driver at all, preferring to
> translate their D-T bindings to calls to
> platform_device_register() so all we'd need to do to
> support them is completely ignore them.
> 
> We're going to have to maintain a legacy
> platform_device -> DT bindings hack somewhere anyway,
> at least until the remaining other users of the driver
> convert to D-T.

I don't understand why you describe the method used in
powerpc as a hack. It was the normal way to introduce
DT support for platform devices back when it was implemented.
It also had the advantage of not requiring any modifications
to the generic driver, because it was shared between one
architecture using DT (powerpc) and one that didn't (ARM).

Arnd
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[PATCH v3 2/2] mmc: Use mmc_delay() instead of mdelay() for time delay

2012-08-10 Thread Chunhe Lan
The mmc_delay() is a wrapper function for mdelay() and msleep().

o mdelay() -- block the system when busy-waiting.
o msleep() -- suspend the currently running task to enable CPU
  to process other tasks, so it is non-blocking
  regarding the whole system.

When the desired delay time is more than a period of timer interrupt,
just use msleep(). Change mdelay() to mmc_delay() to avoid chewing
CPU when busy wait.

Signed-off-by: Shengzhou Liu 
Signed-off-by: Chunhe Lan 
Signed-off-by: Kumar Gala 
Cc: Chris Ball 
---
 drivers/mmc/host/sdhci-esdhc.h |4 ++--
 drivers/mmc/host/sdhci.c   |   10 +-
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/mmc/host/sdhci-esdhc.h b/drivers/mmc/host/sdhci-esdhc.h
index b97b2f5..272cea0 100644
--- a/drivers/mmc/host/sdhci-esdhc.h
+++ b/drivers/mmc/host/sdhci-esdhc.h
@@ -1,7 +1,7 @@
 /*
  * Freescale eSDHC controller driver generics for OF and pltfm.
  *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2007, 2012 Freescale Semiconductor, Inc.
  * Copyright (c) 2009 MontaVista Software, Inc.
  * Copyright (c) 2010 Pengutronix e.K.
  *   Author: Wolfram Sang 
@@ -73,7 +73,7 @@ static inline void esdhc_set_clock(struct sdhci_host *host, 
unsigned int clock)
| (div << ESDHC_DIVIDER_SHIFT)
| (pre_div << ESDHC_PREDIV_SHIFT));
sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);
-   mdelay(1);
+   mmc_delay(1);
 out:
host->clock = clock;
 }
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 9a11dc3..6e67bc4 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -205,7 +205,7 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask)
return;
}
timeout--;
-   mdelay(1);
+   mmc_delay(1);
}
 
if (host->ops->platform_reset_exit)
@@ -997,7 +997,7 @@ static void sdhci_send_command(struct sdhci_host *host, 
struct mmc_command *cmd)
return;
}
timeout--;
-   mdelay(1);
+   mmc_delay(1);
}
 
mod_timer(&host->timer, jiffies + 10 * HZ);
@@ -1178,7 +1178,7 @@ static void sdhci_set_clock(struct sdhci_host *host, 
unsigned int clock)
return;
}
timeout--;
-   mdelay(1);
+   mmc_delay(1);
}
 
clk |= SDHCI_CLOCK_CARD_EN;
@@ -1243,7 +1243,7 @@ static int sdhci_set_power(struct sdhci_host *host, 
unsigned short power)
 * can apply clock after applying power
 */
if (host->quirks & SDHCI_QUIRK_DELAY_AFTER_POWER)
-   mdelay(10);
+   mmc_delay(10);
 
return power;
 }
@@ -1850,7 +1850,7 @@ static int sdhci_execute_tuning(struct mmc_host *mmc, u32 
opcode)
ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);
tuning_loop_counter--;
timeout--;
-   mdelay(1);
+   mmc_delay(1);
} while (ctrl & SDHCI_CTRL_EXEC_TUNING);
 
/*
-- 
1.7.6.5


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[PATCH v3 1/2] mmc: Move mmc_delay() to include/linux/mmc/core.h

2012-08-10 Thread Chunhe Lan
Move mmc_delay() from drivers/mmc/core/core.h to
include/linux/mmc/core.h. So when other functions
call it with include syntax using 
of absolute path rather than "../core/core.h" of
relative path.

Signed-off-by: Chunhe Lan 
Signed-off-by: Kumar Gala 
Cc: Chris Ball 
---
 drivers/mmc/core/core.h  |   12 
 include/linux/mmc/core.h |   11 +++
 2 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h
index 3bdafbc..5f63d00 100644
--- a/drivers/mmc/core/core.h
+++ b/drivers/mmc/core/core.h
@@ -11,8 +11,6 @@
 #ifndef _MMC_CORE_CORE_H
 #define _MMC_CORE_CORE_H
 
-#include 
-
 #define MMC_CMD_RETRIES3
 
 struct mmc_bus_ops {
@@ -46,16 +44,6 @@ void mmc_set_timing(struct mmc_host *host, unsigned int 
timing);
 void mmc_set_driver_type(struct mmc_host *host, unsigned int drv_type);
 void mmc_power_off(struct mmc_host *host);
 
-static inline void mmc_delay(unsigned int ms)
-{
-   if (ms < 1000 / HZ) {
-   cond_resched();
-   mdelay(ms);
-   } else {
-   msleep(ms);
-   }
-}
-
 void mmc_rescan(struct work_struct *work);
 void mmc_start_host(struct mmc_host *host);
 void mmc_stop_host(struct mmc_host *host);
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 1b431c7..7021658 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -10,6 +10,7 @@
 
 #include 
 #include 
+#include 
 
 struct request;
 struct mmc_data;
@@ -192,6 +193,16 @@ static inline void mmc_claim_host(struct mmc_host *host)
__mmc_claim_host(host, NULL);
 }
 
+static inline void mmc_delay(unsigned int ms)
+{
+   if (ms < 1000 / HZ) {
+   cond_resched();
+   mdelay(ms);
+   } else {
+   msleep(ms);
+   }
+}
+
 extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
 
 #endif /* LINUX_MMC_CORE_H */
-- 
1.7.6.5


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[PATCH v2 4/4] powerpc/85xx: add support to JOG feature using cpufreq interface

2012-08-10 Thread Zhao Chenhui
Some 85xx silicons like MPC8536 and P1022 have a JOG feature, which provides
a dynamic mechanism to lower or raise the CPU core clock at runtime.

This patch adds the support to change CPU frequency using the standard
cpufreq interface. The ratio CORE to CCB can be 1:1(except MPC8536), 3:2,
2:1, 5:2, 3:1, 7:2 and 4:1.

Two CPU cores on P1022 must not in the low power state during the frequency
transition. The driver uses a atomic counter to meet the requirement.

The jog mode frequency transition process on the MPC8536 is similar to
the deep sleep process. The driver need save the CPU state and restore
it after CPU warm reset.

Note:
 * The I/O peripherals such as PCIe and eTSEC may lose packets during
   the jog mode frequency transition.
 * The driver doesn't support MPC8536 Rev 1.0 due to a JOG erratum.
   Subsequent revisions of MPC8536 have corrected the erratum.

Signed-off-by: Dave Liu 
Signed-off-by: Li Yang 
Signed-off-by: Jerry Huang 
Signed-off-by: Zhao Chenhui 
CC: Scott Wood 
---
v2:
* use get/put_online_cpus() to disable/enable cpu hotplug.

 arch/powerpc/platforms/85xx/Makefile  |1 +
 arch/powerpc/platforms/85xx/cpufreq-jog.c |  388 +
 arch/powerpc/platforms/Kconfig|   11 +
 arch/powerpc/sysdev/fsl_pmc.c |3 +
 arch/powerpc/sysdev/fsl_soc.h |2 +
 5 files changed, 405 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/cpufreq-jog.c

diff --git a/arch/powerpc/platforms/85xx/Makefile 
b/arch/powerpc/platforms/85xx/Makefile
index 8a030a1..6156849 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SMP) += smp.o
 
 obj-y += common.o
 obj-$(CONFIG_FSL_PMC) += sleep.o
+obj-$(CONFIG_MPC85xx_CPUFREQ) += cpufreq-jog.o
 
 obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/cpufreq-jog.c 
b/arch/powerpc/platforms/85xx/cpufreq-jog.c
new file mode 100644
index 000..287987b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/cpufreq-jog.c
@@ -0,0 +1,388 @@
+/*
+ * Copyright (C) 2008-2012 Freescale Semiconductor, Inc.
+ * Author: Dave Liu 
+ * Modifier: Chenhui Zhao 
+ *
+ * The cpufreq driver is for Freescale 85xx processor,
+ * based on arch/powerpc/platforms/cell/cbe_cpufreq.c
+ * (C) Copyright IBM Deutschland Entwicklung GmbH 2005-2007
+ * Christian Krafft 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+static DEFINE_MUTEX(mpc85xx_switch_mutex);
+static void __iomem *guts;
+
+static u32 sysfreq;
+static unsigned int max_pll[2];
+static atomic_t in_jog_process;
+static struct cpufreq_frequency_table *mpc85xx_freqs;
+static int (*set_pll)(unsigned int cpu, unsigned int pll);
+
+static struct cpufreq_frequency_table mpc8536_freqs_table[] = {
+   {3, 0},
+   {4, 0},
+   {5, 0},
+   {6, 0},
+   {7, 0},
+   {8, 0},
+   {0, CPUFREQ_TABLE_END},
+};
+
+static struct cpufreq_frequency_table p1022_freqs_table[] = {
+   {2, 0},
+   {3, 0},
+   {4, 0},
+   {5, 0},
+   {6, 0},
+   {7, 0},
+   {8, 0},
+   {0, CPUFREQ_TABLE_END},
+};
+
+#define FREQ_500MHz5
+#define FREQ_800MHz8
+
+#define CORE_RATIO_STRIDE  8
+#define CORE_RATIO_MASK0x3f
+#define CORE_RATIO_SHIFT   16
+
+#define PORPLLSR   0x0 /* Power-On Reset PLL ratio status register */
+
+#define PMJCR  0x7c/* Power Management Jog Control Register */
+#define PMJCR_CORE0_SPD0x1000
+#define PMJCR_CORE_SPD 0x2000
+
+#define POWMGTCSR  0x80 /* Power management control and status register */
+#define POWMGTCSR_JOG  0x0020
+#define POWMGTCSR_INT_MASK 0x0f00
+
+static void spin_while_jogging(void *dummy)
+{
+   unsigned long flags;
+
+   local_irq_save(flags);
+
+   atomic_inc(&in_jog_process);
+
+   while (atomic_read(&in_jog_process) != 0)
+   barrier();
+
+   local_irq_restore(flags);
+}
+
+static int get_pll(int hw_cpu)
+{
+   int shift;
+   u32 val = in_be32(guts + POR

Re: [PATCH 3/4] cpu: export cpu hotplug disable/enable functions as global functions

2012-08-10 Thread Zhao Chenhui
On Tue, Aug 07, 2012 at 04:43:25PM +0800, Zhao Chenhui wrote:
> The cpufreq driver of mpc85xx will disable/enable cpu hotplug temporarily.
> Therefore, the related functions should be exported.
> 
> Signed-off-by: Zhao Chenhui 
> ---
>  include/linux/cpu.h |4 
>  1 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/include/linux/cpu.h b/include/linux/cpu.h
> index ce7a074..df8f73d 100644
> --- a/include/linux/cpu.h
> +++ b/include/linux/cpu.h
> @@ -146,6 +146,8 @@ void notify_cpu_starting(unsigned int cpu);
>  extern void cpu_maps_update_begin(void);
>  extern void cpu_maps_update_done(void);
>  
> +extern void cpu_hotplug_disable_before_freeze(void);
> +extern void cpu_hotplug_enable_after_thaw(void);
>  #else/* CONFIG_SMP */
>  
>  #define cpu_notifier(fn, pri)do { (void)(fn); } while (0)
> @@ -167,6 +169,8 @@ static inline void cpu_maps_update_done(void)
>  {
>  }
>  
> +static inline void cpu_hotplug_disable_before_freeze(void)   {}
> +static inline void cpu_hotplug_enable_after_thaw(void)   {}
>  #endif /* CONFIG_SMP */
>  extern struct bus_type cpu_subsys;
>  
> -- 
> 1.6.4.1
> 

Hi kumar,

I will not use these API in the 4/4 patch. please ignore this patch.

-Chenhui

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Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!

2012-08-10 Thread Michael Ellerman
On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> > Sicne a few days, powerpc allmodconfig fails with:
> > 
> > ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> > make[2]: *** [__modpost] Error 1
> > make[1]: *** [modules] Error 2
> > 
> > http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
> 
> 
> Yep, modular build is broken.
> 
> Since this commit by the looks of it:
> 
> commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
> Author: Liu Yu-B13201 
> Date:   Tue Jul 3 05:48:56 2012 +
> 
> PPC: Don't use hardcoded opcode for ePAPR hcall invocation
> 
> Signed-off-by: Liu Yu 

And this address bounces, nice.

cheers


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Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!

2012-08-10 Thread Michael Ellerman
On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
> Sicne a few days, powerpc allmodconfig fails with:
> 
> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
> make[2]: *** [__modpost] Error 1
> make[1]: *** [modules] Error 2
> 
> http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/


Yep, modular build is broken.

Since this commit by the looks of it:

commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
Author: Liu Yu-B13201 
Date:   Tue Jul 3 05:48:56 2012 +

PPC: Don't use hardcoded opcode for ePAPR hcall invocation

Signed-off-by: Liu Yu 
Signed-off-by: Stuart Yoder 
Signed-off-by: Alexander Graf 



cheers

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RE: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Jia Hongtao-B38951


> -Original Message-
> From: Gala Kumar-B11780
> Sent: Thursday, August 09, 2012 3:04 AM
> To: Wood Scott-B07421
> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
> d...@lists.ozlabs.org
> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
> initialization code
> 
> >>> As I explained before, this has to be done globally, not from
> >>> the probe function, so we can assign a default primary bus if
> >>> there
> >>> isn't any ISA.
> >>> There are bugs in the Linux PPC PCI code relating to not having
> >>> any primary bus.
> >>>
> >>> -Scott
> >>
> >> In my way of searching ISA you can also assign a default primary
> >> bus in board specific files.
> >
> > That was meant for when the board file had an alternate way of
> > searching for the primary bus (e.g. look for i8259), not as a
> > replacement for the mechanism that guarantees there's a primary bus.
> >
> > You are causing a regression in the qemu_e500.c platform.
> 
>  Can we fix the qemu device tree to address the problem if we do
>  make it a rule to use the ISA node to indicate the primary bus?
> >>>
> >>> No.  There is no ISA, and we're not going to lie and say there is.
> >>
> >> But we can assign a default primary for qemu.
> >
> > Not in the device tree.  What other mechanism do you propose?  And why
> > do you want to fix it only for QEMU and not other boards, where things
> > happen to work but not as designed?
> >
> > Kumar, can you speak up here as maintainer so we can stop going back
> > and forth endlessly?
> 
> I'd rather we stick with the code that works for this purpose at this
> point.  That would be Scott's current upstream code.  Lets get the other
> aspects of this patchset closed (SWIOTLB, conversion to platform driver,
> PM, etc.).  The primary bus code Scott wrote does NOT need to change at
> this point.
> 
> - k


I just submitted a new version of PCI patch in which I improve the primary part.
The reasons I want to change the way of primary assignment listed below:

1. This approach is functionally equivalent to the Scott's code. In my approach
there might be no primary assigned but it fixed by "quick fix" introduced by 
Ben.
Please refer to this link:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html

2. Scott's and my way could not handle the situation that "the primary is not 
the
first PCI bus detected". I found that only ge_imp3a got this problem so I fixed 
it
by adding ISA node to its device tree. By adding this I think the solution is
logically completed.

3. The key advantage of my way is better unified for platform driver. If I use
the Scott's way I have to make an routine and called in all boards code. The 
goal
of my PCI patch is unifying all PCI initialization code and obviously primary
determination is part of PCI code.

4. The other advantage is efficiency. All my search for ISA node is just under
PCI node instead of all device tree.

- Hongtao.

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[PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code

2012-08-10 Thread Jia Hongtao
We unified the Freescale pci/pcie initialization by changing the fsl_pci
to a platform driver. In previous PCI code architecture the initialization
routine is called at board_setup_arch stage. Now the initialization is done
in probe function which is architectural better. Also It's convenient for
adding PM support for PCI controller in later patch.

We also change the way of determining primary bus for fitting platform
driver. Thanks to the proposal from Ben. Please refer to the link below:
https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html

Now we registered pci controllers as platform devices. So we combine two
initialization code as one platform driver.

Signed-off-by: Jia Hongtao 
Signed-off-by: Li Yang 
Signed-off-by: Chunhe Lan 
---
Changes for V6:
- Fix "isa_io_base could not be zero" bug. Thanks to Ben.

- Determining primary by looking for ISA node does not work for ge_imp3a.
  It's fixed by adding ISA node to its devied tree.

 arch/powerpc/boot/dts/ge_imp3a.dts |4 +
 arch/powerpc/kernel/pci-common.c   |2 +-
 arch/powerpc/platforms/85xx/common.c   |   10 +++
 arch/powerpc/platforms/85xx/corenet_ds.c   |   31 +
 arch/powerpc/platforms/85xx/ge_imp3a.c |   48 +
 arch/powerpc/platforms/85xx/mpc8536_ds.c   |   36 +-
 arch/powerpc/platforms/85xx/mpc85xx_ads.c  |9 +--
 arch/powerpc/platforms/85xx/mpc85xx_cds.c  |   14 +
 arch/powerpc/platforms/85xx/mpc85xx_ds.c   |   38 ++
 arch/powerpc/platforms/85xx/mpc85xx_mds.c  |   38 +-
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c  |   28 +++-
 arch/powerpc/platforms/85xx/p1010rdb.c |   14 +
 arch/powerpc/platforms/85xx/p1022_ds.c |   34 +-
 arch/powerpc/platforms/85xx/p1022_rdk.c|   34 +-
 arch/powerpc/platforms/85xx/p1023_rds.c|7 +--
 arch/powerpc/platforms/85xx/p2041_rdb.c|2 +-
 arch/powerpc/platforms/85xx/p3041_ds.c |2 +-
 arch/powerpc/platforms/85xx/p4080_ds.c |2 +-
 arch/powerpc/platforms/85xx/p5020_ds.c |2 +-
 arch/powerpc/platforms/85xx/p5040_ds.c |2 +-
 arch/powerpc/platforms/85xx/qemu_e500.c|3 +-
 arch/powerpc/platforms/85xx/sbc8548.c  |   19 +-
 arch/powerpc/platforms/85xx/socrates.c |   11 +---
 arch/powerpc/platforms/85xx/stx_gp3.c  |   11 +---
 arch/powerpc/platforms/85xx/tqm85xx.c  |   21 +--
 arch/powerpc/platforms/85xx/xes_mpc85xx.c  |   54 ++-
 arch/powerpc/platforms/86xx/gef_ppc9a.c|   10 +--
 arch/powerpc/platforms/86xx/gef_sbc310.c   |   11 +---
 arch/powerpc/platforms/86xx/gef_sbc610.c   |   10 +--
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c |   19 +
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |   40 +--
 arch/powerpc/platforms/86xx/sbc8641d.c |   12 +---
 arch/powerpc/sysdev/fsl_pci.c  |  102 +---
 arch/powerpc/sysdev/fsl_pci.h  |9 ++-
 drivers/edac/mpc85xx_edac.c|   43 +++-
 35 files changed, 165 insertions(+), 567 deletions(-)

diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts 
b/arch/powerpc/boot/dts/ge_imp3a.dts
index fefae41..aa2c4b5 100644
--- a/arch/powerpc/boot/dts/ge_imp3a.dts
+++ b/arch/powerpc/boot/dts/ge_imp3a.dts
@@ -248,6 +248,10 @@
  0x100 0x0 0x0
  0x100 0x0 0x0
  0x0 0x1>;
+
+   isa@1e {
+   device_type = "isa";
+   };
};
};
 };
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 0f75bd5..2a09aa5 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -734,7 +734,7 @@ void __devinit pci_process_bridge_OF_ranges(struct 
pci_controller *hose,
hose->io_base_virt = ioremap(cpu_addr, size);
 
/* Expect trouble if pci_addr is not 0 */
-   if (primary)
+   if (primary || !isa_io_base)
isa_io_base =
(unsigned long)hose->io_base_virt;
 #endif /* CONFIG_PPC32 */
diff --git a/arch/powerpc/platforms/85xx/common.c 
b/arch/powerpc/platforms/85xx/common.c
index 67dac22..d0861a0 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = 
{
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+   /* For all PCI controllers */
+   { .compatible = "fsl,mpc8540-pci", },
+   { .compatible = "fsl,mpc8548-pcie", },
+   { .compatible = "fsl,p1022-pcie", },
+   { .compatible = "fsl,p1010-pcie", },
+   { .compatible = "fsl,p1023-pcie", },
+   { .compatible = "fsl,p4080-pcie", },
+   { .compatible = "fsl

[-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!

2012-08-10 Thread Geert Uytterhoeven
Sicne a few days, powerpc allmodconfig fails with:

ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
make[2]: *** [__modpost] Error 1
make[1]: *** [modules] Error 2

http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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Re: [PATCH V2 3/3] drivers/char/tpm: Add securityfs support for event log

2012-08-10 Thread Michael Ellerman
On Thu, 2012-08-09 at 18:13 -0500, Ashley Lai wrote:
> This patch retrieves the event log data from the device tree
> during file open. The event log data will then displayed through
> securityfs.

Hi Ashley,

Comments inline ..

> diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
> index 547509d..b53da57 100644
> --- a/drivers/char/tpm/Makefile
> +++ b/drivers/char/tpm/Makefile
> @@ -2,9 +2,15 @@
>  # Makefile for the kernel tpm device drivers.
>  #
>  obj-$(CONFIG_TCG_TPM) += tpm.o
> +obj-$(CONFIG_TCG_TPM) += tpm_bios.o
>  ifdef CONFIG_ACPI
> - obj-$(CONFIG_TCG_TPM) += tpm_bios.o
>   tpm_bios-objs += tpm_eventlog.o tpm_acpi.o
> +else
> +ifdef CONFIG_TCG_IBMVTPM
> + tpm_bios-objs += tpm_eventlog.o tpm_of.o
> +else
> + tpm_bios-objs += tpm_eventlog.o tpm_noeventlog.o

What does it mean to build tpm_eventlog and tpm_noeventlog ?



> diff --git a/drivers/char/tpm/tpm_eventlog.h b/drivers/char/tpm/tpm_eventlog.h
> index 8e23ccd..21ac6af 100644
> --- a/drivers/char/tpm/tpm_eventlog.h
> +++ b/drivers/char/tpm/tpm_eventlog.h
> @@ -68,4 +68,18 @@ enum tcpa_pc_event_ids {
>  };
>  
>  int read_log(struct tpm_bios_log *log);
> +
> +extern struct dentry **tpm_bios_log_setup(char *);
> +extern void tpm_bios_log_teardown(struct dentry **);
> +
> +#ifdef CONFIG_PPC64
> +#define TPM_NO_EVENT_LOG !of_find_node_by_name(NULL, "ibm,vtpm")
> +#else
> +#ifdef CONFIG_ACPI
> +#define TPM_NO_EVENT_LOG 0
> +#else
> +#define TPM_NO_EVENT_LOG 1
> +#endif
> +#endif

This should be a static inline, with the ifdefs inside.

How often is this called? of_find_node_by_name() is not particularly
efficient. It might be better to search once and save a flag indicating
whether you found it.

Also you must call of_node_put() on the result of
of_find_node_by_name(), so at the least you must do:

struct device_node *np;
np = of_find_node_by_name(NULL, "ibm,vtpm");
of_node_put(np);
return (np != NULL);

>  #endif
> diff --git a/drivers/char/tpm/tpm_noeventlog.c 
> b/drivers/char/tpm/tpm_noeventlog.c
> new file mode 100644
> index 000..f30a2bf
> --- /dev/null
> +++ b/drivers/char/tpm/tpm_noeventlog.c
> @@ -0,0 +1,21 @@
> +/*
> + * Copyright (C) 2012 IBM Corporation
^^
Don't use (C)

> + *
> + * Author: Ashley Lai 
> + *
> + * Maintained by: 
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + *
> + */
> +
> +#include 
> +#include "tpm_eventlog.h"
> +
> +int read_log(struct tpm_bios_log *log)
> +{
> + return -EINVAL;
> +}

Wouldn't it be simpler to put this in a header with the appropriate
ifdefs, and then you'd need less logic in the Makefile?


> diff --git a/drivers/char/tpm/tpm_of.c b/drivers/char/tpm/tpm_of.c
> new file mode 100644
> index 000..6d44adb
> --- /dev/null
> +++ b/drivers/char/tpm/tpm_of.c
> @@ -0,0 +1,68 @@
> +/*
> + * Copyright 2012 IBM Corporation
> + *
> + * Author: Ashley Lai 
> + *
> + * Maintained by: 
> + *
> + * Read the event log created by the firmware on PPC64
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + *
> + */
> +
> +#include 
> +#include 
> +
> +#include "tpm.h"
> +#include "tpm_eventlog.h"
> +
> +int read_log(struct tpm_bios_log *log)
> +{
> + struct device_node *np;
> + const u32 *sizep;
> + const __be64 *basep;
> +
> + if (log->bios_event_log != NULL) {
> + pr_err("%s: ERROR - Eventlog already initialized\n", __func__);
> + return -EFAULT;
> + }
> +
> + np = of_find_node_by_name(NULL, "ibm,vtpm");
> + if (!np) {
> + pr_err("%s: ERROR - IBMVTPM not supported\n", __func__);
> + return -ENODEV;
> + }

All your return paths below here must call of_node_put(np).

> + sizep = of_get_property(np, "linux,sml-size", NULL);
> + if (sizep == NULL) {
> + pr_err("%s: ERROR - SML size not found\n", __func__);
> + return -EIO;
> + }
> + if (*sizep == 0) {
> + pr_err("%s: ERROR - event log area empty\n", __func__);
> + return -EIO;
> + }
> +
> + basep = of_get_property(np, "linux,sml-base", NULL);
> + if (basep == NULL) {
> + pr_err(KERN_ERR "%s: ERROR - SML not found\n", __func__);
> + return -EIO;
> + }
> +
> + log->bios_event_log = kmalloc(*sizep, GFP_KERNEL);
> + if (!log->bios_event_log) {
> + pr_err("%s: ERROR - Not enough memory for BIOS measurements\n",
> +__func__);
> + return -ENOMEM;
> + }
> +
> + log->bios_event_log_end = log->bios_event_log + *sizep;
> +
> + memcpy(log