[PATCH] Added device tree binding for TDM and TDM phy
This controller is available on many Freescale SOCs like MPC8315, P1020, P1010
and P1022
Signed-off-by: Sandeep Singh
Signed-off-by: Poonam Aggrwal
---
.../devicetree/bindings/powerpc/fsl/fsl-tdm.txt| 63
.../devicetree/bindings/powerpc/fsl/tdm-phy.txt| 38
2 files changed, 101 insertions(+), 0 deletions(-)
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/fsl-tdm.txt
create mode 100644 Documentation/devicetree/bindings/powerpc/fsl/tdm-phy.txt
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/fsl-tdm.txt
b/Documentation/devicetree/bindings/powerpc/fsl/fsl-tdm.txt
new file mode 100644
index 000..ceb2ef1
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/fsl-tdm.txt
@@ -0,0 +1,63 @@
+TDM Device Tree Binding
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+TDM (Time Division Multiplexing)
+
+Description:
+
+The TDM is full duplex serial port designed to allow various devices including
+digital signal processors (DSPs) to communicate with a variety of serial
devices
+including industry standard framers, codecs, other DSPs and microprocessors.
+
+The below properties describe the device tree bindings for Freescale TDM
+controller. This TDM controller is available on various Freescale Processors
+like MPC8315, P1020, P1022 and P1010.
+
+Required properties:
+
+- compatible
+Value type:
+Definition: Should contain "fsl,tdm1.0".
+
+- reg
+Definition: A standard property. The first reg specifier describes the TDM
+registers, and the second describes the TDM DMAC registers.
+
+- tdm_tx_clk
+Value type:
+Definition: This specifies the value of transmit clock. It should not
+exceed 50Mhz.
+
+- tdm_rx_clk
+Value type:
+Definition: This specifies the value of receive clock. Its value could be
+zero, in which case tdm will operate in shared mode. Its value should not
+exceed 50Mhz.
+
+- interrupts
+Definition: Two interrupt specifiers. The first is TDM error, and the
+second is TDM DMAC.
+
+- phy-handle
+Value type:
+Definition: Phandle of the line controller node or framer node eg. SLIC,
+E1/T1 etc. (Refer
Documentation/devicetree/bindings/powerpc/fsl/tdm-phy.txt)
+
+- fsl,max-time-slots
+Value type:
+Definition: Maximum number of 8-bit time slots in one TDM frame. This is
+the maximum number which TDM hardware supports.
+
+Example:
+
+ tdm@16000 {
+ compatible = "fsl,tdm1.0";
+ reg = <0x16000 0x200 0x2c000 0x2000>;
+ tdm_tx_clk = <2048000>;
+ tdm_rx_clk = <0>;
+ interrupts = <16 8 62 8>;
+ phy-handle = <&tdm-phy>;
+ fsl,max-time-slots = <128>;
+ };
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/tdm-phy.txt
b/Documentation/devicetree/bindings/powerpc/fsl/tdm-phy.txt
new file mode 100644
index 000..2563934
--- /dev/null
+++ b/Documentation/devicetree/bindings/powerpc/fsl/tdm-phy.txt
@@ -0,0 +1,38 @@
+TDM PHY Device Tree Binding
+
+NOTE: The bindings described in this document are preliminary
+and subject to change.
+
+Description:
+TDM PHY is the terminal interface of TDM subsystem. It is typically a line
+control device like E1/T1 framer or SLIC. A TDM device can have multiple TDM
+PHYs.
+
+Required properties:
+
+- compatible
+Value type:
+Definition: Should contain generic compatibility like "tdm-phy-slic" or
+"tdm-phy-e1" or "tdm-phy-t1".
+
+- max-num-ports
+Value type:
+Definition: Defines the maximum number of ports supported by the SLIC
+device. Only required if the device is SLIC. For E1/T1 devices the number
+of ports are predefined i.e. (24 in case of T1 and 32 in case of E1).
+
+Apart from the above, there may be other properties required because of the
+bus/interface this device is connected on. It could be SPI/local bus, etc.
+
+Example:
+
+ tdm-phy@0 {
+ compatible = "zarlink,le88266","tdm-phy-slic";
+ reg = <0>;
+ max-num-ports = <4>;
+ spi-max-frequency = <800>;
+ };
+
+In the above example properties "reg" and "spi-max-frequency" are SPI specific
+as the SLIC device is connected on SPI interface. These properties might vary
+depending on the specific interface the device is using.
--
1.7.6.GIT
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Re: [PATCH v5 04/14] memory-hotplug: remove /sys/firmware/memmap/X sysfs
On Thu, 27 Dec 2012, Tang Chen wrote:
> On 12/26/2012 11:30 AM, Kamezawa Hiroyuki wrote:
> >> @@ -41,6 +42,7 @@ struct firmware_map_entry {
> >>const char *type; /* type of the memory range */
> >>struct list_headlist; /* entry for the linked list */
> >>struct kobject kobj; /* kobject for each entry */
> >> + unsigned intbootmem:1; /* allocated from bootmem */
> >>};
> >
> > Can't we detect from which the object is allocated from, slab or bootmem ?
> >
> > Hm, for example,
> >
> > PageReserved(virt_to_page(address_of_obj)) ?
> > PageSlab(virt_to_page(address_of_obj)) ?
> >
>
> Hi Kamezawa-san,
>
> I think we can detect it without a new member. I think bootmem:1 member
> is just for convenience. I think I can remove it. :)
Larger size slab allocations may fall back to the page allocator but then
the slabs do not track this allocation. That memory can be freed using the
page allocator.
If you see pageslab then you can always remove using the slab allocator.
Otherwise the page allocator should work (unless it was some
special case bootmem allocation).
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Re: [PATCH 2/5] perf: Make EVENT_ATTR and EVENT_PTR global
On Tue, Dec 18, 2012 at 11:28:02PM -0800, Sukadev Bhattiprolu wrote:
>
> Rename EVENT_ATTR() and EVENT_PTR() PMU_EVENT_ATTR() and PMU_EVENT_PTR().
> Make them global so they are available to all architectures.
>
> Further to allow architectures flexibility, have PMU_EVENT_PTR() pass in the
> variable name as a parameter.
>
hi,
the change looks ok apart from some nits below.
There' another version of the x86 event attributes change
I mentioned earlier:
http://marc.info/?l=linux-kernel&m=135601815224373&w=2
I'm not sure which one will make it in first, but you
guys need to sync ;-) CC-ing Andi and Stephane.
thanks,
jirka
> Signed-off-by: Sukadev Bhattiprolu
> ---
> arch/x86/kernel/cpu/perf_event.c | 17 +
> include/linux/perf_event.h | 13 +
> 2 files changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/perf_event.c
> b/arch/x86/kernel/cpu/perf_event.c
> index 4428fd1..24bc505 100644
> --- a/arch/x86/kernel/cpu/perf_event.c
> +++ b/arch/x86/kernel/cpu/perf_event.c
> @@ -1316,11 +1316,6 @@ static struct attribute_group x86_pmu_format_group = {
> .attrs = NULL,
> };
>
> -struct perf_pmu_events_attr {
> - struct device_attribute attr;
> - u64 id;
> -};
> -
> /*
> * Remove all undefined events (x86_pmu.event_map(id) == 0)
> * out of events_attr attributes.
> @@ -1351,14 +1346,12 @@ static ssize_t events_sysfs_show(struct device *dev,
> struct device_attribute *at
> return x86_pmu.events_sysfs_show(page, config);
> }
>
> -#define EVENT_VAR(_id) event_attr_##_id
> -#define EVENT_PTR(_id) &event_attr_##_id.attr.attr
> +#define EVENT_VAR(_id) event_attr_##_id
> +#define EVENT_ID(_id)PERF_COUNT_HW_##_id
> +#define EVENT_PTR(_id) PMU_EVENT_PTR(EVENT_VAR(_id))
>
> -#define EVENT_ATTR(_name, _id) \
> -static struct perf_pmu_events_attr EVENT_VAR(_id) = {\
> - .attr = __ATTR(_name, 0444, events_sysfs_show, NULL), \
> - .id = PERF_COUNT_HW_##_id, \
> -};
> +#define EVENT_ATTR(_name, _id)
> \
> + PMU_EVENT_ATTR(_name, EVENT_VAR(_id), EVENT_ID(_id), events_sysfs_show)
probably no need to define EVENT_ID macro if it's used on just one place
>
> EVENT_ATTR(cpu-cycles, CPU_CYCLES );
> EVENT_ATTR(instructions, INSTRUCTIONS);
> diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
> index 6bfb2fa..31692cb 100644
> --- a/include/linux/perf_event.h
> +++ b/include/linux/perf_event.h
> @@ -817,6 +817,19 @@ do {
> \
> } while (0)
>
>
> +struct perf_pmu_events_attr {
> + struct device_attribute attr;
> + u64 id;
> +};
> +
> +#define PMU_EVENT_PTR(_var) &_var.attr.attr
this one seems superfluous as well, could be replaced by '&'
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RE: [PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API implementation.
Hi Joerg, It's been a while since I submitted this patch. I have tried to address your comments regarding the subwindow attribute. I would really appreciate if I can get some feedback on this patch. Regards Varun > -Original Message- > From: Sethi Varun-B16395 > Sent: Friday, December 21, 2012 7:17 AM > To: 'Joerg Roedel' > Cc: Sethi Varun-B16395; joerg.roe...@amd.com; iommu@lists.linux- > foundation.org; linuxppc-dev@lists.ozlabs.org; linux- > ker...@vger.kernel.org; Tabi Timur-B04825; Wood Scott-B07421 > Subject: RE: [PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API > implementation. > > ping!! > > > -Original Message- > > From: Sethi Varun-B16395 > > Sent: Friday, December 14, 2012 7:22 PM > > To: joerg.roe...@amd.com; io...@lists.linux-foundation.org; linuxppc- > > d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Tabi Timur-B04825; > > Wood Scott-B07421 > > Cc: Sethi Varun-B16395 > > Subject: [PATCH 0/4] iommu/fsl: Freescale PAMU driver and IOMMU API > > implementation. > > > > This patchset provides the Freescale PAMU (Peripheral Access > > Management > > Unit) driver and the corresponding IOMMU API implementation. PAMU is > > the IOMMU present on Freescale QorIQ platforms. PAMU can authorize > > memory access, remap the memory address, and remap the I/O transaction > type. > > > > This set consists of the following patches: > > 1. Addition of new field in the device (powerpc) archdata structure > > for storing iommu domain information > >pointer. This pointer is stored when the device is attached to a > > particular iommu domain. > > 2. Add PAMU bypass enable register to the ccsr_guts structure. > > 3. Addition of domain attributes required by the PAMU driver IOMMU API. > > 4. PAMU driver and IOMMU API implementation. > > > > This patch set is based on the next branch of the iommu git tree > > maintained by Joerg. > > > > Varun Sethi (4): > > store iommu domain info in device arch data. > > add pamu bypass enable register to guts. > > Add iommu attributes for PAMU > > FSL PAMU driver. > > > > arch/powerpc/include/asm/device.h |4 + > > arch/powerpc/include/asm/fsl_guts.h |4 +- > > drivers/iommu/Kconfig |8 + > > drivers/iommu/Makefile |1 + > > drivers/iommu/fsl_pamu.c| 1152 > > +++ > > drivers/iommu/fsl_pamu.h| 398 > > drivers/iommu/fsl_pamu_domain.c | 1033 > > +++ > > drivers/iommu/fsl_pamu_domain.h | 96 +++ > > include/linux/iommu.h | 49 ++ > > 9 files changed, 2744 insertions(+), 1 deletions(-) create mode > > 100644 drivers/iommu/fsl_pamu.c create mode 100644 > > drivers/iommu/fsl_pamu.h create mode 100644 > > drivers/iommu/fsl_pamu_domain.c create mode 100644 > > drivers/iommu/fsl_pamu_domain.h > > > > -- > > 1.7.4.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[git pull] Please pull powerpc.git merge branch
Hi Linus ! Here are a couple of small powerpc fixes. They aren't new bugs (and they are both CCed to stable) but I didn't see the point of sitting on the fixes any longer. Oh and happy new year ! Cheers, Ben. The following changes since commit d1c3ed669a2d452cacfb48c2d171a1f364dae2ed: Linux 3.8-rc2 (2013-01-02 18:13:21 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git for you to fetch changes up to e6449c9b2d90c1bd9a5985bf05ddebfd1631cd6b: powerpc: Add missing NULL terminator to avoid boot panic on PPC40x (2013-01-03 16:45:52 +1100) Gabor Juhos (1): powerpc: Add missing NULL terminator to avoid boot panic on PPC40x Shan Hai (1): powerpc/vdso: Remove redundant locking in update_vsyscall_tz() arch/powerpc/kernel/time.c |5 - arch/powerpc/platforms/40x/ppc40x_simple.c |3 ++- 2 files changed, 2 insertions(+), 6 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [git pull] Please pull powerpc.git merge branch
On Thu, 2013-01-03 at 17:13 +1100, Benjamin Herrenschmidt wrote: > Hi Linus ! > > Here are a couple of small powerpc fixes. They aren't new bugs (and > they are both CCed to stable) but I didn't see the point of sitting > on the fixes any longer. Looks like I still need to fix my script to get the branch name right for when the mirrors haven't caught up... It's git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
