[PATCH] powerpc: remove two lines of dead code

[Paul Bolle]

Commit c1fb6816fb1b78dd94b673b0fdaa9a7a16e97bd1 ("powerpc: Add
relocation on exception vector handlers") added two lines of code that
depend on the macro CONFIG_HVC_SCOM. That macro doesn't exist. Perhaps
it was intended to use CONFIG_PPC_SCOM here. But since
"maintence_interrupt" is a typo and there's nothing in arch/powerpc that
looks like maintenance_interrupt it seems best to just delete these
lines.

Signed-off-by: Paul Bolle 
---
Untested, but low risk anyway.

 arch/powerpc/kernel/exceptions-64s.S | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S 
b/arch/powerpc/kernel/exceptions-64s.S
index 200afa5..9181353 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -870,10 +870,6 @@ tm_unavailable_relon_pSeries_1:
. = 0x5500
b   denorm_exception_hv
 #endif
-#ifdef CONFIG_HVC_SCOM
-   STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt)
-   KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600)
-#endif /* CONFIG_HVC_SCOM */
STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
 
/* Other future vectors */
-- 
1.7.11.7

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Re: [PATCH 1/2] cpufreq: Notify all policy->cpus in cpufreq_notify_transition()

[Viresh Kumar]

On 25 March 2013 22:18, Stephen Warren  wrote:
> On 03/24/2013 11:19 PM, Viresh Kumar wrote:
>> On 24 March 2013 19:18, Viresh Kumar  wrote:
>>> policy->cpus contains all online cpus that have single shared clock line. 
>>> And
>>> their frequencies are always updated together.
>>>
>>> Many SMP system's cpufreq drivers take care of this in individual drivers 
>>> but
>>> the best place for this code is in cpufreq core.
>>>
>>> This patch modifies cpufreq_notify_transition() to notify frequency change 
>>> for
>>> all cpus in policy->cpus and hence updates all users of this API.
>>
>> Another fixup for tegra:
>
> This series including this patch (although I had a devil of a time
> applying this fixup since all the TABs got converted to spaces when it
> was pasted into email)

So sorry for that, I keep pushing them here:

http://git.linaro.org/gitweb?p=people/vireshk/linux.git;a=shortlog;h=refs/heads/cpufreq-fix-notify
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Re: [PATCH 1/2] cpufreq: Notify all policy->cpus in cpufreq_notify_transition()

[Stephen Warren]

On 03/24/2013 11:19 PM, Viresh Kumar wrote:
> On 24 March 2013 19:18, Viresh Kumar  wrote:
>> policy->cpus contains all online cpus that have single shared clock line. And
>> their frequencies are always updated together.
>>
>> Many SMP system's cpufreq drivers take care of this in individual drivers but
>> the best place for this code is in cpufreq core.
>>
>> This patch modifies cpufreq_notify_transition() to notify frequency change 
>> for
>> all cpus in policy->cpus and hence updates all users of this API.
> 
> Another fixup for tegra:

This series including this patch (although I had a devil of a time
applying this fixup since all the TABs got converted to spaces when it
was pasted into email)

Acked-by: Stephen Warren 
Tested-by: Stephen Warren 
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[PATCH 9/9] powerpc: cpufreq: move cpufreq driver to drivers/cpufreq

[Viresh Kumar]

This patch moves cpufreq driver of powerpc platform to drivers/cpufreq.

Cc: Benjamin Herrenschmidt 
Cc: Paul Mackerras 
Cc: Olof Johansson 
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Viresh Kumar 
---
 arch/powerpc/platforms/Kconfig | 31 --
 arch/powerpc/platforms/pasemi/Makefile |  1 -
 arch/powerpc/platforms/powermac/Makefile   |  2 --
 drivers/cpufreq/Kconfig.powerpc| 26 ++
 drivers/cpufreq/Makefile   |  3 +++
 .../cpufreq.c => drivers/cpufreq/pasemi-cpufreq.c  |  0
 .../cpufreq/pmac32-cpufreq.c   |  0
 .../cpufreq/pmac64-cpufreq.c   |  0
 8 files changed, 29 insertions(+), 34 deletions(-)
 rename arch/powerpc/platforms/pasemi/cpufreq.c => 
drivers/cpufreq/pasemi-cpufreq.c (100%)
 rename arch/powerpc/platforms/powermac/cpufreq_32.c => 
drivers/cpufreq/pmac32-cpufreq.c (100%)
 rename arch/powerpc/platforms/powermac/cpufreq_64.c => 
drivers/cpufreq/pmac64-cpufreq.c (100%)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 52de8bc..46a223f 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -194,37 +194,6 @@ config PPC_IO_WORKAROUNDS
 
 source "drivers/cpufreq/Kconfig"
 
-menu "CPU Frequency drivers"
-   depends on CPU_FREQ
-
-config CPU_FREQ_PMAC
-   bool "Support for Apple PowerBooks"
-   depends on ADB_PMU && PPC32
-   select CPU_FREQ_TABLE
-   help
- This adds support for frequency switching on Apple PowerBooks,
- this currently includes some models of iBook & Titanium
- PowerBook.
-
-config CPU_FREQ_PMAC64
-   bool "Support for some Apple G5s"
-   depends on PPC_PMAC && PPC64
-   select CPU_FREQ_TABLE
-   help
- This adds support for frequency switching on Apple iMac G5,
- and some of the more recent desktop G5 machines as well.
-
-config PPC_PASEMI_CPUFREQ
-   bool "Support for PA Semi PWRficient"
-   depends on PPC_PASEMI
-   default y
-   select CPU_FREQ_TABLE
-   help
- This adds the support for frequency switching on PA Semi
- PWRficient processors.
-
-endmenu
-
 menu "CPUIdle driver"
 
 source "drivers/cpuidle/Kconfig"
diff --git a/arch/powerpc/platforms/pasemi/Makefile 
b/arch/powerpc/platforms/pasemi/Makefile
index ce6d789..8e8d4ca 100644
--- a/arch/powerpc/platforms/pasemi/Makefile
+++ b/arch/powerpc/platforms/pasemi/Makefile
@@ -1,3 +1,2 @@
 obj-y  += setup.o pci.o time.o idle.o powersave.o iommu.o dma_lib.o misc.o
 obj-$(CONFIG_PPC_PASEMI_MDIO)  += gpio_mdio.o
-obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += cpufreq.o
diff --git a/arch/powerpc/platforms/powermac/Makefile 
b/arch/powerpc/platforms/powermac/Makefile
index ea47df6..52c6ce1 100644
--- a/arch/powerpc/platforms/powermac/Makefile
+++ b/arch/powerpc/platforms/powermac/Makefile
@@ -9,8 +9,6 @@ obj-y   += pic.o setup.o time.o 
feature.o pci.o \
   sleep.o low_i2c.o cache.o pfunc_core.o \
   pfunc_base.o udbg_scc.o udbg_adb.o
 obj-$(CONFIG_PMAC_BACKLIGHT)   += backlight.o
-obj-$(CONFIG_CPU_FREQ_PMAC)+= cpufreq_32.o
-obj-$(CONFIG_CPU_FREQ_PMAC64)  += cpufreq_64.o
 # CONFIG_NVRAM is an arch. independent tristate symbol, for pmac32 we really
 # need this to be a bool.  Cheat here and pretend CONFIG_NVRAM=m is really
 # CONFIG_NVRAM=y
diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index e76992f..2e5a007 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc
@@ -5,3 +5,29 @@ config CPU_FREQ_MAPLE
help
  This adds support for frequency switching on Maple 970FX
  Evaluation Board and compatible boards (IBM JS2x blades).
+
+config CPU_FREQ_PMAC
+   bool "Support for Apple PowerBooks"
+   depends on ADB_PMU && PPC32
+   select CPU_FREQ_TABLE
+   help
+ This adds support for frequency switching on Apple PowerBooks,
+ this currently includes some models of iBook & Titanium
+ PowerBook.
+
+config CPU_FREQ_PMAC64
+   bool "Support for some Apple G5s"
+   depends on PPC_PMAC && PPC64
+   select CPU_FREQ_TABLE
+   help
+ This adds support for frequency switching on Apple iMac G5,
+ and some of the more recent desktop G5 machines as well.
+
+config PPC_PASEMI_CPUFREQ
+   bool "Support for PA Semi PWRficient"
+   depends on PPC_PASEMI
+   select CPU_FREQ_TABLE
+   default y
+   help
+ This adds the support for frequency switching on PA Semi
+ PWRficient processors.
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 0203a06..fa4b5f2 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -75,6 +75,9 @@ obj-$(CONFIG_ARCH_TEGRA)  += tegra-cpufreq.o
 
#

[PATCH v2 0/11] NUMA CPU Reconfiguration using PRRN

[Nathan Fontenot]

Newer firmware on Power systems can transparently reassign platform resources
(CPU and Memory) in use. For instance, if a processor or memory unit is
predicted to fail, the platform may transparently move the processing to an
equivalent unused processor or the memory state to an equivalent unused
memory unit. However, reassigning resources across NUMA boundaries may alter
the performance of the partition. When such reassignment is necessary, the
Platform Resource Reassignment Notification (PRRN) option provides a
mechanism to inform the Linux kernel of changes to the NUMA affinity of
its platform resources.

PRRN Events are RTAS events sent up through the event-scan mechanism on
Power. When these events are received the system needs can get the updated
device tree affinity information for the affected CPUs/memory via the
rtas update-nodes and update-properties calls. This information is then
used to update the NUMA affinity of the CPUs/Memory in the kernel.

This patch set adds the ability to recognize PRRN events, update the device
tree and kernel information for CPUs (memory will be handled in a later
patch), and add an interface to enable/disable toplogy updates from /proc.

Additionally, these updates solve an exisitng problem with the VPHN (Virtual
Processor Home Node) capability and allow us to re-enable this feature.

Nathan Fontenot

Updates for Version 2 of this patchset

- Merged the functionality of platform_has_feature into the existing
  firmware_has_feature routine.
- Corrected the new way certain bits in the architecture vector are
  defined based on config options.
---

 arch/powerpc/include/asm/firmware.h   |3 
 arch/powerpc/include/asm/prom.h   |   46 ++---
 arch/powerpc/include/asm/rtas.h   |2 
 arch/powerpc/kernel/prom_init.c   |   98 ++-
 arch/powerpc/kernel/rtasd.c   |   35 
 arch/powerpc/mm/numa.c|  183 ++
 arch/powerpc/platforms/pseries/firmware.c |1 
 powerpc/arch/powerpc/include/asm/firmware.h   |4 
 powerpc/arch/powerpc/include/asm/prom.h   |   73 
 powerpc/arch/powerpc/include/asm/rtas.h   |1 
 powerpc/arch/powerpc/include/asm/topology.h   |5 
 powerpc/arch/powerpc/kernel/prom_init.c   |2 
 powerpc/arch/powerpc/kernel/rtasd.c   |6 
 powerpc/arch/powerpc/mm/numa.c|   62 +++
 powerpc/arch/powerpc/platforms/pseries/firmware.c |   67 +++-
 powerpc/arch/powerpc/platforms/pseries/mobility.c |   21 +-
 powerpc/arch/powerpc/platforms/pseries/pseries.h  |5 
 powerpc/arch/powerpc/platforms/pseries/setup.c|   40 +++-
 18 files changed, 455 insertions(+), 199 deletions(-)

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[PATCH v2 1/11] Expose pseries devicetree_update()

[Nathan Fontenot]

From: Jesse Larrew 

Newer firmware on Power systems can transparently reassign platform resources
(CPU and Memory) in use. For instance, if a processor or memory unit is
predicted to fail, the platform may transparently move the processing to an
equivalent unused processor or the memory state to an equivalent unused
memory unit. However, reassigning resources across NUMA boundaries may alter
the performance of the partition. When such reassignment is necessary, the
Platform Resource Reassignment Notification (PRRN) option provides a
mechanism to inform the Linux kernel of changes to the NUMA affinity of
its platform resources.

When rtasd receives a PRRN event, it needs to make a series of RTAS
calls (ibm,update-nodes and ibm,update-properties) to retrieve the
updated device tree information. These calls are already handled in the
pseries_devtree_update() routine used in partition migration.

This patch simply exposes pseries_devicetree_update() so it can be
called by rtasd. pseries_devicetree_update() and supporting functions
are also modified to take a 32-bit 'scope' parameter. This parameter is
required by the ibm,update-nodes/ibm,update-properties RTAS calls, and
the appropriate value is contained within the RTAS event for PRRN
notifications. In pseries_devicetree_update() it was previously
hard-coded to 1, the scope value for partition migration.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/include/asm/rtas.h   |1 +
 arch/powerpc/platforms/pseries/mobility.c |   21 -
 2 files changed, 13 insertions(+), 9 deletions(-)

Index: powerpc/arch/powerpc/include/asm/rtas.h
===
--- powerpc.orig/arch/powerpc/include/asm/rtas.h2013-03-20 
08:24:15.0 -0500
+++ powerpc/arch/powerpc/include/asm/rtas.h 2013-03-20 08:51:59.0 
-0500
@@ -276,6 +276,7 @@
const char *uname, int depth, void *data);
 
 extern void pSeries_log_error(char *buf, unsigned int err_type, int fatal);
+extern int pseries_devicetree_update(s32 scope);
 
 #ifdef CONFIG_PPC_RTAS_DAEMON
 extern void rtas_cancel_event_scan(void);
Index: powerpc/arch/powerpc/platforms/pseries/mobility.c
===
--- powerpc.orig/arch/powerpc/platforms/pseries/mobility.c  2013-03-20 
08:24:15.0 -0500
+++ powerpc/arch/powerpc/platforms/pseries/mobility.c   2013-03-20 
08:51:59.0 -0500
@@ -37,14 +37,16 @@
 #define UPDATE_DT_NODE 0x0200
 #define ADD_DT_NODE0x0300
 
-static int mobility_rtas_call(int token, char *buf)
+#define MIGRATION_SCOPE(1)
+
+static int mobility_rtas_call(int token, char *buf, s32 scope)
 {
int rc;
 
spin_lock(&rtas_data_buf_lock);
 
memcpy(rtas_data_buf, buf, RTAS_DATA_BUF_SIZE);
-   rc = rtas_call(token, 2, 1, NULL, rtas_data_buf, 1);
+   rc = rtas_call(token, 2, 1, NULL, rtas_data_buf, scope);
memcpy(buf, rtas_data_buf, RTAS_DATA_BUF_SIZE);
 
spin_unlock(&rtas_data_buf_lock);
@@ -123,7 +125,7 @@
return 0;
 }
 
-static int update_dt_node(u32 phandle)
+static int update_dt_node(u32 phandle, s32 scope)
 {
struct update_props_workarea *upwa;
struct device_node *dn;
@@ -151,7 +153,8 @@
upwa->phandle = phandle;
 
do {
-   rc = mobility_rtas_call(update_properties_token, rtas_buf);
+   rc = mobility_rtas_call(update_properties_token, rtas_buf,
+   scope);
if (rc < 0)
break;
 
@@ -219,7 +222,7 @@
return rc;
 }
 
-static int pseries_devicetree_update(void)
+int pseries_devicetree_update(s32 scope)
 {
char *rtas_buf;
u32 *data;
@@ -235,7 +238,7 @@
return -ENOMEM;
 
do {
-   rc = mobility_rtas_call(update_nodes_token, rtas_buf);
+   rc = mobility_rtas_call(update_nodes_token, rtas_buf, scope);
if (rc && rc != 1)
break;
 
@@ -256,7 +259,7 @@
delete_dt_node(phandle);
break;
case UPDATE_DT_NODE:
-   update_dt_node(phandle);
+   update_dt_node(phandle, scope);
break;
case ADD_DT_NODE:
drc_index = *data++;
@@ -276,7 +279,7 @@
int rc;
int activate_fw_token;
 
-   rc = pseries_devicetree_update();
+   rc = pseries_devicetree_update(MIGRATION_SCOPE);
if (rc) {
printk(KERN_ERR "Initial post-mobility device tree update "
   "failed: %d\n", rc);
@@ -292,7 +295,7 @@
 
rc = rtas_call(activate_fw_token, 0, 1, NULL);
if (!rc) {
-   rc = pseries_devicetree_

[PATCH v2 2/11] Add PRRN Event Handler

[Nathan Fontenot]

From: Jesse Larrew 

A PRRN event is signaled via the RTAS event-scan mechanism, which
returns a Hot Plug Event message "fixed part" indicating "Platform
Resource Reassignment". In response to the Hot Plug Event message,
we must call ibm,update-nodes to determine which resources were
reassigned and then ibm,update-properties to obtain the new affinity
information about those resources.

The PRRN event-scan RTAS message contains only the "fixed part" with
the "Type" field set to the value 160 and no Extended Event Log. The
four-byte Extended Event Log Length field is repurposed (since no
Extended Event Log message is included) to pass the "scope" parameter
that causes the ibm,update-nodes to return the nodes affected by the
specific resource reassignment.

This patch adds a handler in rtasd for PRRN RTAS events. The function
pseries_devicetree_update() (from mobility.c) is used to make the
ibm,update-nodes/ibm,update-properties RTAS calls. Updating the NUMA maps
(handled by a subsequent patch) will require significant processing,
so pseries_devicetree_update() is called from an asynchronous workqueue
to allow rtasd to continue processing events. Since we flush all work
on the queue before handling any new work there should only be one event
in flight of being handled at a time.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/include/asm/rtas.h |2 ++
 arch/powerpc/kernel/rtasd.c |   35 ++-
 2 files changed, 36 insertions(+), 1 deletion(-)

Index: powerpc/arch/powerpc/include/asm/rtas.h
===
--- powerpc.orig/arch/powerpc/include/asm/rtas.h2013-03-20 
08:51:59.0 -0500
+++ powerpc/arch/powerpc/include/asm/rtas.h 2013-03-20 08:52:08.0 
-0500
@@ -143,6 +143,8 @@
 #define RTAS_TYPE_PMGM_TIME_ALARM  0x6f
 #define RTAS_TYPE_PMGM_CONFIG_CHANGE   0x70
 #define RTAS_TYPE_PMGM_SERVICE_PROC0x71
+/* Platform Resource Reassignment Notification */
+#define RTAS_TYPE_PRRN 0xA0
 
 /* RTAS check-exception vector offset */
 #define RTAS_VECTOR_EXTERNAL_INTERRUPT 0x500
Index: powerpc/arch/powerpc/kernel/rtasd.c
===
--- powerpc.orig/arch/powerpc/kernel/rtasd.c2013-03-20 08:24:14.0 
-0500
+++ powerpc/arch/powerpc/kernel/rtasd.c 2013-03-20 08:52:08.0 -0500
@@ -87,6 +87,8 @@
return "Resource Deallocation Event";
case RTAS_TYPE_DUMP:
return "Dump Notification Event";
+   case RTAS_TYPE_PRRN:
+   return "Platform Resource Reassignment Event";
}
 
return rtas_type[0];
@@ -265,7 +267,38 @@
spin_unlock_irqrestore(&rtasd_log_lock, s);
return;
}
+}
+
+static s32 update_scope;
+
+static void prrn_work_fn(struct work_struct *work)
+{
+   /*
+* For PRRN, we must pass the negative of the scope value in
+* the RTAS event.
+*/
+   pseries_devicetree_update(-update_scope);
+}
+static DECLARE_WORK(prrn_work, prrn_work_fn);
+
+void prrn_schedule_update(u32 scope)
+{
+   flush_work(&prrn_work);
+   update_scope = scope;
+   schedule_work(&prrn_work);
+}
+
+static void pseries_handle_event(const struct rtas_error_log *log)
+{
+   pSeries_log_error((char *)log, ERR_TYPE_RTAS_LOG, 0);
+
+   if (log->type == RTAS_TYPE_PRRN)
+   /* For PRRN Events the extended log length is used to denote
+* the scope for calling rtas update-nodes.
+*/
+   prrn_schedule_update(log->extended_log_length);
 
+   return;
 }
 
 static int rtas_log_open(struct inode * inode, struct file * file)
@@ -389,7 +422,7 @@
}
 
if (error == 0)
-   pSeries_log_error(logdata, ERR_TYPE_RTAS_LOG, 0);
+   pseries_handle_event((struct rtas_error_log *)logdata);
 
} while(error == 0);
 }

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[PATCH v2 3/11] Move architecture vector definitions to prom.h

[Nathan Fontenot]

As part of handling of hndling PRRN events we will need to check the
vector 5 portion of the architectire bits reported in the device tree
to ensure that PRRN event handling is enabled. In order to do this a
new platform_has_feature call is introduced (in a subsequent patch) to
make this check.  To avoid having to re-define bits in the architecture
vector the bits are moved to prom.h.

This patch is the first step in implementing the platform_has_feature
call by simply moving the bit definitions from prom_init.c to asm/prom.h.
There are no functional.

Signed-off-by: Nathan Fontenot 

---
 arch/powerpc/include/asm/prom.h |   73 ++
 arch/powerpc/kernel/prom_init.c |   75 +++-
 2 files changed, 79 insertions(+), 69 deletions(-)

Index: powerpc/arch/powerpc/include/asm/prom.h
===
--- powerpc.orig/arch/powerpc/include/asm/prom.h2013-03-20 
08:24:13.0 -0500
+++ powerpc/arch/powerpc/include/asm/prom.h 2013-03-20 08:52:59.0 
-0500
@@ -74,6 +74,79 @@
 #define DRCONF_MEM_AI_INVALID  0x0040
 #define DRCONF_MEM_RESERVED0x0080
 
+#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
+/*
+ * There are two methods for telling firmware what our capabilities are.
+ * Newer machines have an "ibm,client-architecture-support" method on the
+ * root node.  For older machines, we have to call the "process-elf-header"
+ * method in the /packages/elf-loader node, passing it a fake 32-bit
+ * ELF header containing a couple of PT_NOTE sections that contain
+ * structures that contain various information.
+ */
+
+/* New method - extensible architecture description vector. */
+
+/* Option vector bits - generic bits in byte 1 */
+#define OV_IGNORE  0x80/* ignore this vector */
+#define OV_CESSATION_POLICY0x40/* halt if unsupported option present*/
+
+/* Option vector 1: processor architectures supported */
+#define OV1_PPC_2_00   0x80/* set if we support PowerPC 2.00 */
+#define OV1_PPC_2_01   0x40/* set if we support PowerPC 2.01 */
+#define OV1_PPC_2_02   0x20/* set if we support PowerPC 2.02 */
+#define OV1_PPC_2_03   0x10/* set if we support PowerPC 2.03 */
+#define OV1_PPC_2_04   0x08/* set if we support PowerPC 2.04 */
+#define OV1_PPC_2_05   0x04/* set if we support PowerPC 2.05 */
+#define OV1_PPC_2_06   0x02/* set if we support PowerPC 2.06 */
+#define OV1_PPC_2_07   0x01/* set if we support PowerPC 2.07 */
+
+/* Option vector 2: Open Firmware options supported */
+#define OV2_REAL_MODE  0x20/* set if we want OF in real mode */
+
+/* Option vector 3: processor options supported */
+#define OV3_FP 0x80/* floating point */
+#define OV3_VMX0x40/* VMX/Altivec */
+#define OV3_DFP0x20/* decimal FP */
+
+/* Option vector 4: IBM PAPR implementation */
+#define OV4_MIN_ENT_CAP0x01/* minimum VP entitled capacity 
*/
+
+/* Option vector 5: PAPR/OF options supported */
+#define OV5_LPAR   0x80/* logical partitioning supported */
+#define OV5_SPLPAR 0x40/* shared-processor LPAR supported */
+/* ibm,dynamic-reconfiguration-memory property supported */
+#define OV5_DRCONF_MEMORY  0x20
+#define OV5_LARGE_PAGES0x10/* large pages supported */
+#define OV5_DONATE_DEDICATE_CPU0x02/* donate dedicated CPU support 
*/
+/* PCIe/MSI support.  Without MSI full PCIe is not supported */
+#ifdef CONFIG_PCI_MSI
+#define OV5_MSI0x01/* PCIe/MSI support */
+#else
+#define OV5_MSI0x00
+#endif /* CONFIG_PCI_MSI */
+#ifdef CONFIG_PPC_SMLPAR
+#define OV5_CMO0x80/* Cooperative Memory 
Overcommitment */
+#define OV5_XCMO   0x40/* Page Coalescing */
+#else
+#define OV5_CMO0x00
+#define OV5_XCMO   0x00
+#endif
+#define OV5_TYPE1_AFFINITY 0x80/* Type 1 NUMA affinity */
+#define OV5_PFO_HW_RNG 0x80/* PFO Random Number Generator */
+#define OV5_PFO_HW_842 0x40/* PFO Compression Accelerator */
+#define OV5_PFO_HW_ENCR0x20/* PFO Encryption Accelerator */
+#define OV5_SUB_PROCESSORS 0x01/* 1,2,or 4 Sub-Processors supported */
+
+/* Option Vector 6: IBM PAPR hints */
+#define OV6_LINUX  0x02/* Linux is our OS */
+
+/*
+ * The architecture vector has an array of PVR mask/value pairs,
+ * followed by # option vectors - 1, followed by the option vectors.
+ */
+extern unsigned char ibm_architecture_vec[];
+#endif
+
 /* These includes are put at the bottom because they may contain things
  * that are overridden by this file.  Ideally they shouldn't be included
  * by this file, but there are a bunch o

[PATCH v2 4/11] Update firmware_has_feature() to check architecture bits

[Nathan Fontenot]

The firmware_has_feature() function makes it easy to check for supported
features of the hypervisor. This patch extends the capability of the
firmware_has_feature() function to include checking for specified bits
in vector 5 of the architecture vector as is reported in the device tree.

As part of this the #defines used for the architecture vector are
moved to prom.h and re-defined such that the vector 5 options have the vector
index and the feature bits encoded into them. This makes for a much
simpler design to add bits from the architecture vector to be added to
the checking done in firmware_has_feature().

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/include/asm/firmware.h   |4 +
 arch/powerpc/include/asm/prom.h   |   45 +---
 arch/powerpc/kernel/prom_init.c   |   23 +++---
 arch/powerpc/platforms/pseries/firmware.c |   67 ++
 arch/powerpc/platforms/pseries/pseries.h  |5 +-
 arch/powerpc/platforms/pseries/setup.c|   40 -
 6 files changed, 131 insertions(+), 53 deletions(-)

Index: powerpc/arch/powerpc/include/asm/prom.h
===
--- powerpc.orig/arch/powerpc/include/asm/prom.h2013-03-25 
10:47:54.0 -0500
+++ powerpc/arch/powerpc/include/asm/prom.h 2013-03-25 11:07:56.0 
-0500
@@ -111,31 +111,27 @@
 /* Option vector 4: IBM PAPR implementation */
 #define OV4_MIN_ENT_CAP0x01/* minimum VP entitled capacity 
*/
 
-/* Option vector 5: PAPR/OF options supported */
-#define OV5_LPAR   0x80/* logical partitioning supported */
-#define OV5_SPLPAR 0x40/* shared-processor LPAR supported */
+/* Option vector 5: PAPR/OF options supported
+ * Thses bits are also used for the platform_has_feature() call so
+ * we encode the vector index in the define and use the OV5_FEAT()
+ * and OV5_INDX() macros to extract the desired information.
+ */
+#define OV5_FEAT(x)((x) & 0xff)
+#define OV5_INDX(x)((x) >> 8)
+#define OV5_LPAR   0x0280  /* logical partitioning supported */
+#define OV5_SPLPAR 0x0240  /* shared-processor LPAR supported */
 /* ibm,dynamic-reconfiguration-memory property supported */
-#define OV5_DRCONF_MEMORY  0x20
-#define OV5_LARGE_PAGES0x10/* large pages supported */
-#define OV5_DONATE_DEDICATE_CPU0x02/* donate dedicated CPU support 
*/
-/* PCIe/MSI support.  Without MSI full PCIe is not supported */
-#ifdef CONFIG_PCI_MSI
-#define OV5_MSI0x01/* PCIe/MSI support */
-#else
-#define OV5_MSI0x00
-#endif /* CONFIG_PCI_MSI */
-#ifdef CONFIG_PPC_SMLPAR
-#define OV5_CMO0x80/* Cooperative Memory 
Overcommitment */
-#define OV5_XCMO   0x40/* Page Coalescing */
-#else
-#define OV5_CMO0x00
-#define OV5_XCMO   0x00
-#endif
-#define OV5_TYPE1_AFFINITY 0x80/* Type 1 NUMA affinity */
-#define OV5_PFO_HW_RNG 0x80/* PFO Random Number Generator */
-#define OV5_PFO_HW_842 0x40/* PFO Compression Accelerator */
-#define OV5_PFO_HW_ENCR0x20/* PFO Encryption Accelerator */
-#define OV5_SUB_PROCESSORS 0x01/* 1,2,or 4 Sub-Processors supported */
+#define OV5_DRCONF_MEMORY  0x0220
+#define OV5_LARGE_PAGES0x0210  /* large pages supported */
+#define OV5_DONATE_DEDICATE_CPU0x0202  /* donate dedicated CPU support 
*/
+#define OV5_MSI0x0201  /* PCIe/MSI support */
+#define OV5_CMO0x0480  /* Cooperative Memory 
Overcommitment */
+#define OV5_XCMO   0x0440  /* Page Coalescing */
+#define OV5_TYPE1_AFFINITY 0x0580  /* Type 1 NUMA affinity */
+#define OV5_PFO_HW_RNG 0x0E80  /* PFO Random Number Generator */
+#define OV5_PFO_HW_842 0x0E40  /* PFO Compression Accelerator */
+#define OV5_PFO_HW_ENCR0x0E20  /* PFO Encryption Accelerator */
+#define OV5_SUB_PROCESSORS 0x0F01  /* 1,2,or 4 Sub-Processors supported */
 
 /* Option Vector 6: IBM PAPR hints */
 #define OV6_LINUX  0x02/* Linux is our OS */
@@ -145,6 +141,7 @@
  * followed by # option vectors - 1, followed by the option vectors.
  */
 extern unsigned char ibm_architecture_vec[];
+bool platform_has_feature(unsigned int);
 #endif
 
 /* These includes are put at the bottom because they may contain things
Index: powerpc/arch/powerpc/kernel/prom_init.c
===
--- powerpc.orig/arch/powerpc/kernel/prom_init.c2013-03-25 
10:47:54.0 -0500
+++ powerpc/arch/powerpc/kernel/prom_init.c 2013-03-25 11:07:56.0 
-0500
@@ -684,11 +684,21 @@
/* option vector 5: PAPR/OF options */
19 - 2, /* length */
0,  /* don

[PATCH v2 5/11] Update numa.c to use updated firmware_has_feature()

[Nathan Fontenot]

Update the numa code to use the updated firmware_has_feature() when checking
for type 1 affinity.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/mm/numa.c |   22 +++---
 1 file changed, 3 insertions(+), 19 deletions(-)

Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-20 12:25:42.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-20 12:26:29.0 -0500
@@ -291,9 +291,7 @@
 static int __init find_min_common_depth(void)
 {
int depth;
-   struct device_node *chosen;
struct device_node *root;
-   const char *vec5;
 
if (firmware_has_feature(FW_FEATURE_OPAL))
root = of_find_node_by_path("/ibm,opal");
@@ -325,24 +323,10 @@
 
distance_ref_points_depth /= sizeof(int);
 
-#define VEC5_AFFINITY_BYTE 5
-#define VEC5_AFFINITY  0x80
-
-   if (firmware_has_feature(FW_FEATURE_OPAL))
+   if (firmware_has_feature(FW_FEATURE_OPAL) ||
+   firmware_has_feature(FW_FEATURE_TYPE1_AFFINITY)) {
+   dbg("Using form 1 affinity\n");
form1_affinity = 1;
-   else {
-   chosen = of_find_node_by_path("/chosen");
-   if (chosen) {
-   vec5 = of_get_property(chosen,
-  "ibm,architecture-vec-5", NULL);
-   if (vec5 && (vec5[VEC5_AFFINITY_BYTE] &
-   VEC5_AFFINITY)) {
-   dbg("Using form 1 affinity\n");
-   form1_affinity = 1;
-   }
-
-   of_node_put(chosen);
-   }
}
 
if (form1_affinity) {

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[PATCH v2 6/11] Update CPU Maps

[Nathan Fontenot]

From: Jesse Larrew 

Platform events such as partition migration or the new PRRN firmware
feature can cause the NUMA characteristics of a CPU to change, and these
changes will be reflected in the device tree nodes for the affected
CPUs.

This patch registers a handler for Open Firmware device tree updates
and reconfigures the CPU and node maps whenever the associativity
changes. Currently, this is accomplished by marking the affected CPUs in
the cpu_associativity_changes_mask and allowing
arch_update_cpu_topology() to retrieve the new associativity information
using hcall_vphn().

Protecting the NUMA cpu maps from concurrent access during an update
operation will be addressed in a subsequent patch in this series.

Signed-off-by: Nathan Fontenot 
---

 arch/powerpc/include/asm/firmware.h   |3 
 arch/powerpc/include/asm/prom.h   |1 
 arch/powerpc/mm/numa.c|   99 ++
 arch/powerpc/platforms/pseries/firmware.c |1 
 4 files changed, 79 insertions(+), 25 deletions(-)

Index: powerpc/arch/powerpc/include/asm/prom.h
===
--- powerpc.orig/arch/powerpc/include/asm/prom.h2013-03-25 
11:07:56.0 -0500
+++ powerpc/arch/powerpc/include/asm/prom.h 2013-03-25 11:27:11.0 
-0500
@@ -128,6 +128,7 @@
 #define OV5_CMO0x0480  /* Cooperative Memory 
Overcommitment */
 #define OV5_XCMO   0x0440  /* Page Coalescing */
 #define OV5_TYPE1_AFFINITY 0x0580  /* Type 1 NUMA affinity */
+#define OV5_PRRN   0x0540  /* Platform Resource Reassignment */
 #define OV5_PFO_HW_RNG 0x0E80  /* PFO Random Number Generator */
 #define OV5_PFO_HW_842 0x0E40  /* PFO Compression Accelerator */
 #define OV5_PFO_HW_ENCR0x0E20  /* PFO Encryption Accelerator */
Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-25 11:22:44.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-25 11:27:11.0 -0500
@@ -1257,7 +1257,8 @@
 static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
 static cpumask_t cpu_associativity_changes_mask;
 static int vphn_enabled;
-static void set_topology_timer(void);
+static int prrn_enabled;
+static void reset_topology_timer(void);
 
 /*
  * Store the current values of the associativity change counters in the
@@ -1293,11 +1294,9 @@
  */
 static int update_cpu_associativity_changes_mask(void)
 {
-   int cpu, nr_cpus = 0;
+   int cpu;
cpumask_t *changes = &cpu_associativity_changes_mask;
 
-   cpumask_clear(changes);
-
for_each_possible_cpu(cpu) {
int i, changed = 0;
u8 *counts = vphn_cpu_change_counts[cpu];
@@ -1311,11 +1310,10 @@
}
if (changed) {
cpumask_set_cpu(cpu, changes);
-   nr_cpus++;
}
}
 
-   return nr_cpus;
+   return cpumask_weight(changes);
 }
 
 /*
@@ -1416,7 +1414,7 @@
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
struct device *dev;
 
-   for_each_cpu(cpu,&cpu_associativity_changes_mask) {
+   for_each_cpu(cpu, &cpu_associativity_changes_mask) {
vphn_get_associativity(cpu, associativity);
nid = associativity_to_nid(associativity);
 
@@ -1438,6 +1436,7 @@
dev = get_cpu_device(cpu);
if (dev)
kobject_uevent(&dev->kobj, KOBJ_CHANGE);
+   cpumask_clear_cpu(cpu, &cpu_associativity_changes_mask);
changed = 1;
}
 
@@ -1457,37 +1456,80 @@
 
 static void topology_timer_fn(unsigned long ignored)
 {
-   if (!vphn_enabled)
-   return;
-   if (update_cpu_associativity_changes_mask() > 0)
+   if (prrn_enabled && cpumask_weight(&cpu_associativity_changes_mask))
topology_schedule_update();
-   set_topology_timer();
+   else if (vphn_enabled) {
+   if (update_cpu_associativity_changes_mask() > 0)
+   topology_schedule_update();
+   reset_topology_timer();
+   }
 }
 static struct timer_list topology_timer =
TIMER_INITIALIZER(topology_timer_fn, 0, 0);
 
-static void set_topology_timer(void)
+static void reset_topology_timer(void)
 {
topology_timer.data = 0;
topology_timer.expires = jiffies + 60 * HZ;
-   add_timer(&topology_timer);
+   mod_timer(&topology_timer, topology_timer.expires);
+}
+
+static void stage_topology_update(int core_id)
+{
+   cpumask_or(&cpu_associativity_changes_mask,
+   &cpu_associativity_changes_mask, cpu_sibling_mask(core_id));
+   reset_topology_timer();
 }
 
+static int dt_update_callback(struct notifier_block *nb,
+   unsigned long action, void *data)

[PATCH v2 7/11] Use stop machine to update cpu maps

[Nathan Fontenot]

From: Jesse Larrew 

The new PRRN firmware feature allows CPU and memory resources to be
transparently reassigned across NUMA boundaries. When this happens, the
kernel must update the node maps to reflect the new affinity
information.

Although the NUMA maps can be protected by locking primitives during the
update itself, this is insufficient to prevent concurrent accesses to these
structures. Since cpumask_of_node() hands out a pointer to these
structures, they can still be modified outside of the lock. Furthermore,
tracking down each usage of these pointers and adding locks would be quite
invasive and difficult to maintain.

Situations like these are best handled using stop_machine(). Since the NUMA
affinity updates are exceptionally rare events, this approach has the
benefit of not adding any overhead while accessing the NUMA maps during
normal operation.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/mm/numa.c |   51 +
 1 file changed, 35 insertions(+), 16 deletions(-)

Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-20 12:26:36.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-20 12:27:43.0 -0500
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1254,6 +1255,12 @@
 
 /* Virtual Processor Home Node (VPHN) support */
 #ifdef CONFIG_PPC_SPLPAR
+struct topology_update_data {
+   int cpu;
+   int old_nid;
+   int new_nid;
+};
+
 static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
 static cpumask_t cpu_associativity_changes_mask;
 static int vphn_enabled;
@@ -1405,34 +1412,46 @@
 }
 
 /*
+ * Update the CPU maps and sysfs entries for a single CPU when its NUMA
+ * characteristics change. This function doesn't perform any locking and is
+ * only safe to call from stop_machine().
+ */
+static int update_cpu_topology(void *data)
+{
+   struct topology_update_data *update = data;
+
+   if (!update)
+   return -EINVAL;
+
+   unregister_cpu_under_node(update->cpu, update->old_nid);
+   unmap_cpu_from_node(update->cpu);
+   map_cpu_to_node(update->cpu, update->new_nid);
+   register_cpu_under_node(update->cpu, update->new_nid);
+
+   return 0;
+}
+
+/*
  * Update the node maps and sysfs entries for each cpu whose home node
  * has changed. Returns 1 when the topology has changed, and 0 otherwise.
  */
 int arch_update_cpu_topology(void)
 {
-   int cpu, nid, old_nid, changed = 0;
+   int cpu, changed = 0;
+   struct topology_update_data update;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
struct device *dev;
 
for_each_cpu(cpu, &cpu_associativity_changes_mask) {
+   update.cpu = cpu;
vphn_get_associativity(cpu, associativity);
-   nid = associativity_to_nid(associativity);
-
-   if (nid < 0 || !node_online(nid))
-   nid = first_online_node;
+   update.new_nid = associativity_to_nid(associativity);
 
-   old_nid = numa_cpu_lookup_table[cpu];
-
-   /* Disable hotplug while we update the cpu
-* masks and sysfs.
-*/
-   get_online_cpus();
-   unregister_cpu_under_node(cpu, old_nid);
-   unmap_cpu_from_node(cpu);
-   map_cpu_to_node(cpu, nid);
-   register_cpu_under_node(cpu, nid);
-   put_online_cpus();
+   if (update.new_nid < 0 || !node_online(update.new_nid))
+   update.new_nid = first_online_node;
 
+   update.old_nid = numa_cpu_lookup_table[cpu];
+   stop_machine(update_cpu_topology, &update, cpu_online_mask);
dev = get_cpu_device(cpu);
if (dev)
kobject_uevent(&dev->kobj, KOBJ_CHANGE);

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[PATCH v2 8/11] Update numa cpu vdso info

[Nathan Fontenot]

From: Jesse Larrew 

The following patch adds vdso_getcpu_init(), which stores the NUMA node for
a cpu in SPRG3:

Commit 18ad51dd34 ("powerpc: Add VDSO version of getcpu") adds
vdso_getcpu_init(), which stores the NUMA node for a cpu in SPRG3.

This patch ensures that this information is also updated when the NUMA
affinity of a cpu changes.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/mm/numa.c |8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-20 12:27:43.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-20 12:27:46.0 -0500
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static int numa_enabled = 1;
 
@@ -1426,6 +1427,7 @@
unregister_cpu_under_node(update->cpu, update->old_nid);
unmap_cpu_from_node(update->cpu);
map_cpu_to_node(update->cpu, update->new_nid);
+   vdso_getcpu_init();
register_cpu_under_node(update->cpu, update->new_nid);
 
return 0;
@@ -1440,8 +1442,11 @@
int cpu, changed = 0;
struct topology_update_data update;
unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+   cpumask_t updated_cpu;
struct device *dev;
 
+   cpumask_clear(&updated_cpu);
+
for_each_cpu(cpu, &cpu_associativity_changes_mask) {
update.cpu = cpu;
vphn_get_associativity(cpu, associativity);
@@ -1451,7 +1456,8 @@
update.new_nid = first_online_node;
 
update.old_nid = numa_cpu_lookup_table[cpu];
-   stop_machine(update_cpu_topology, &update, cpu_online_mask);
+   cpumask_set_cpu(cpu, &updated_cpu);
+   stop_machine(update_cpu_topology, &update, &updated_cpu);
dev = get_cpu_device(cpu);
if (dev)
kobject_uevent(&dev->kobj, KOBJ_CHANGE);

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[PATCH v2 9/11] Re-enable Virtual Private Home Node capabilities

[Nathan Fontenot]

From: Jesse Larrew 

The new PRRN firmware feature provides a more convenient and event-driven
interface than VPHN for notifying Linux of changes to the NUMA affinity of
platform resources. However, for practical reasons, it may not be feasible
for some customers to update to the latest firmware. For these customers,
the VPHN feature supported on previous firmware versions may still be the
best option.

The VPHN feature was previously disabled due to races with the load
balancing code when accessing the NUMA cpu maps, but the new stop_machine()
approach protects the NUMA cpu maps from these concurrent accesses. It
should be safe to re-enable this feature now.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/mm/numa.c |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-20 12:27:46.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-20 12:27:48.0 -0500
@@ -1545,9 +1545,8 @@
vphn_enabled = 0;
rc = of_reconfig_notifier_register(&dt_update_nb);
}
-   } else if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
+   } else if (firmware_has_feature(FW_FEATURE_VPHN) &&
   get_lppaca()->shared_proc) {
-   /* Disabled until races with load balancing are fixed */
if (!vphn_enabled) {
prrn_enabled = 0;
vphn_enabled = 1;

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[PATCH v2 11/11] Add /proc interface to control topology updates

[Nathan Fontenot]

There are instances in which we do not want topology updates to occur.
In order to allow this a /proc interface (/proc/powerpc/topology_updates)
is introduced so that topology updates can be enabled and disabled.

This patch also adds a prrn_is_enabled() call so that PRRN events are
handled in the kernel only if topology updating is enabled.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/include/asm/topology.h |5 ++
 arch/powerpc/kernel/rtasd.c |6 ++-
 arch/powerpc/mm/numa.c  |   62 +++-
 3 files changed, 70 insertions(+), 3 deletions(-)

Index: powerpc/arch/powerpc/mm/numa.c
===
--- powerpc.orig/arch/powerpc/mm/numa.c 2013-03-20 12:27:48.0 -0500
+++ powerpc/arch/powerpc/mm/numa.c  2013-03-20 12:27:52.0 -0500
@@ -23,6 +23,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -1558,7 +1561,6 @@
 
return rc;
 }
-__initcall(start_topology_update);
 
 /*
  * Disable polling for VPHN associativity changes.
@@ -1577,4 +1579,62 @@
 
return rc;
 }
+
+inline int prrn_is_enabled(void)
+{
+   return prrn_enabled;
+}
+
+static int topology_read(struct seq_file *file, void *v)
+{
+   if (vphn_enabled || prrn_enabled)
+   seq_puts(file, "on\n");
+   else
+   seq_puts(file, "off\n");
+
+   return 0;
+}
+
+static int topology_open(struct inode *inode, struct file *file)
+{
+   return single_open(file, topology_read, NULL);
+}
+
+static ssize_t topology_write(struct file *file, const char __user *buf,
+ size_t count, loff_t *off)
+{
+   char kbuf[4]; /* "on" or "off" plus null. */
+   int read_len;
+
+   read_len = count < 3 ? count : 3;
+   if (copy_from_user(kbuf, buf, read_len))
+   return -EINVAL;
+
+   kbuf[read_len] = '\0';
+
+   if (!strncmp(kbuf, "on", 2))
+   start_topology_update();
+   else if (!strncmp(kbuf, "off", 3))
+   stop_topology_update();
+   else
+   return -EINVAL;
+
+   return count;
+}
+
+static const struct file_operations topology_ops = {
+   .read = seq_read,
+   .write = topology_write,
+   .open = topology_open,
+   .release = single_release
+};
+
+static int topology_update_init(void)
+{
+   start_topology_update();
+   proc_create("powerpc/topology_updates", 644, NULL, &topology_ops);
+
+   return 0;
+}
+device_initcall(topology_update_init);
 #endif /* CONFIG_PPC_SPLPAR */
Index: powerpc/arch/powerpc/include/asm/topology.h
===
--- powerpc.orig/arch/powerpc/include/asm/topology.h2013-03-20 
12:25:37.0 -0500
+++ powerpc/arch/powerpc/include/asm/topology.h 2013-03-20 12:27:52.0 
-0500
@@ -71,6 +71,7 @@
 #if defined(CONFIG_NUMA) && defined(CONFIG_PPC_SPLPAR)
 extern int start_topology_update(void);
 extern int stop_topology_update(void);
+extern inline int prrn_is_enabled(void);
 #else
 static inline int start_topology_update(void)
 {
@@ -80,6 +81,10 @@
 {
return 0;
 }
+static inline int prrn_is_enabled(void)
+{
+   return 0;
+}
 #endif /* CONFIG_NUMA && CONFIG_PPC_SPLPAR */
 
 #include 
Index: powerpc/arch/powerpc/kernel/rtasd.c
===
--- powerpc.orig/arch/powerpc/kernel/rtasd.c2013-03-20 12:25:37.0 
-0500
+++ powerpc/arch/powerpc/kernel/rtasd.c 2013-03-20 12:27:52.0 -0500
@@ -292,11 +292,13 @@
 {
pSeries_log_error((char *)log, ERR_TYPE_RTAS_LOG, 0);
 
-   if (log->type == RTAS_TYPE_PRRN)
+   if (log->type == RTAS_TYPE_PRRN) {
/* For PRRN Events the extended log length is used to denote
 * the scope for calling rtas update-nodes.
 */
-   prrn_schedule_update(log->extended_log_length);
+   if (prrn_is_enabled())
+   prrn_schedule_update(log->extended_log_length);
+   }
 
return;
 }

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[PATCH v2 10/11] Enable PRRN

[Nathan Fontenot]

The Linux kernel and platform firmware negotiate their mutual support
of the PRRN option via the ibm,client-architecture-support interface.
This patch simply sets the appropriate fields in the client architecture
vector to indicate Linux support and will cause the firmware to begin
sending PRRN events via the RTAS event-scan mechanism.

Signed-off-by: Nathan Fontenot 
---
 arch/powerpc/kernel/prom_init.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Index: powerpc/arch/powerpc/kernel/prom_init.c
===
--- powerpc.orig/arch/powerpc/kernel/prom_init.c2013-03-20 
12:25:38.0 -0500
+++ powerpc/arch/powerpc/kernel/prom_init.c 2013-03-20 12:27:50.0 
-0500
@@ -698,7 +698,7 @@
 #else
0,
 #endif
-   OV5_FEAT(OV5_TYPE1_AFFINITY),
+   OV5_FEAT(OV5_TYPE1_AFFINITY) | OV5_FEAT(OV5_PRRN),
0,
0,
0,

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repository location (MPC5200b)

[Maxwell MacLean]

Hello all,
I have been following this list for a while now and am interested in getting a 
version of the latest work in progress Linux kernel with fixes for powerpc.
Yes, I am a kernel newbie, but I am learning! I have an inherited project based 
on version 2.6.28 that is compiled for an MPC5200b and there are some issues I 
am interested in fixing (or seeing If they are already fixed) .

I know there are many branches of development, but where can I get the 'best' 
kernel for my processor?

Thank you in advance.
Max

__

Maxwell MacLean | Senior Firmware Engineer
978.284.2872 |   mmacl...@symbotic.com


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Re: repository location (MPC5200b)

[Anatolij Gustschin]

Hello,

On Mon, 25 Mar 2013 20:27:17 +
Maxwell MacLean  wrote:

> Hello all,
> I have been following this list for a while now and am interested
> in getting a version of the latest work in progress Linux kernel
> with fixes for powerpc.

For latest work in progress kernel look at master branch in linux-next
tree

 http://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git

> Yes, I am a kernel newbie, but I am learning! I have an inherited
> project based on version 2.6.28 that is compiled for an MPC5200b
> and there are some issues I am interested in fixing (or seeing If
> they are already fixed) .
> 
> I know there are many branches of development, but where can I get
> the 'best' kernel for my processor?

The current mainline kernel supports MPC5200b pretty well, you can
use latest stable release, branch "linux-3.8.y" of the stable tree

 http://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git


HTH,

Anatolij

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[git pull] Please pull some powerpc build fixes

[Stephen Rothwell]

The following changes since commit 3912a677f68f6084e0a7b6a1a29310ac1b083713:

  Merge tag 'pinctrl-fixes-for-v3.9' of 
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl (2013-03-24 
10:11:29 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/sfr/next-fixes.git 
tags/for-linus

for you to fetch changes up to f9294e989fa6f2990da155242db03cea1550cac8:

  powerpc: define the conditions where the ePAPR idle hcall can be supported 
(2013-03-26 08:47:27 +1100)


Just a couple of build fixes for powerpc all{mod,yes}config.

Submitted by me since BenH is on vacation.


Chen Gang (1):
  powerpc: make additional room in exception vector area

Stuart Yoder (1):
  powerpc: define the conditions where the ePAPR idle hcall can be supported

 arch/powerpc/kernel/epapr_paravirt.c |   6 ++
 arch/powerpc/kernel/exceptions-64s.S | 144 +--
 2 files changed, 78 insertions(+), 72 deletions(-)

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


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[PATCH 2/3] clk: add PowerPC corenet clock driver support

[Yuantian.Tang]

From: Tang Yuantian 

This adds the clock driver for Freescale PowerPC corenet
series SOC using common clock infrastructure.

Signed-off-by: Tang Yuantian 
Signed-off-by: Li Yang 
---
 arch/powerpc/platforms/Kconfig.cputype |   1 +
 drivers/clk/Kconfig|   7 +
 drivers/clk/Makefile   |   1 +
 drivers/clk/clk-ppc-corenet.c  | 285 +
 4 files changed, 294 insertions(+)
 create mode 100644 drivers/clk/clk-ppc-corenet.c

diff --git a/arch/powerpc/platforms/Kconfig.cputype 
b/arch/powerpc/platforms/Kconfig.cputype
index 18e3b76..cf065b8 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -158,6 +158,7 @@ config E500
 config PPC_E500MC
bool "e500mc Support"
select PPC_FPU
+   select COMMON_CLK
depends on E500
help
  This must be enabled for running on e500mc (and derivatives
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index a47e6ee..97ec76f 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -63,6 +63,13 @@ config CLK_TWL6040
  McPDM. McPDM module is using the external bit clock on the McPDM bus
  as functional clock.
 
+config CLK_PPC_CORENET
+   bool "Clock driver for PowerPC corenet platforms"
+   depends on PPC_E500MC
+   ---help---
+ This adds the clock driver support for Freescale PowerPC corenet
+ platforms using common clock framework.
+
 endmenu
 
 source "drivers/clk/mvebu/Kconfig"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 300d477..6720319 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -34,3 +34,4 @@ obj-$(CONFIG_X86) += x86/
 obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
 obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
 obj-$(CONFIG_CLK_TWL6040)  += clk-twl6040.o
+obj-$(CONFIG_CLK_PPC_CORENET)  += clk-ppc-corenet.o
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c
new file mode 100644
index 000..6811e03
--- /dev/null
+++ b/drivers/clk/clk-ppc-corenet.c
@@ -0,0 +1,285 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * clock driver for Freescale PowerPC corenet SoCs.
+ */
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct cmux_clk {
+   struct clk_hw   hw;
+   void __iomem*reg;
+   u32 flags;
+};
+
+#define PLL_KILL   BIT(31)
+#define CLKSEL_SHIFT   27
+#define CLKSEL_ADJUST  BIT(0)
+
+#define to_cmux_clk(p) container_of(p, struct cmux_clk, hw)
+
+static void __iomem *base;
+static unsigned int clocks_per_pll;
+
+static int cmux_set_parent(struct clk_hw *hw, u8 idx)
+{
+   struct cmux_clk *clk = to_cmux_clk(hw);
+   u32 clksel;
+
+   clksel = ((idx / clocks_per_pll) << 2) + idx % clocks_per_pll;
+   if (clk->flags & CLKSEL_ADJUST)
+   clksel += 8;
+   clksel = (clksel & 0xf) << CLKSEL_SHIFT;
+   iowrite32be(clksel, clk->reg);
+
+   return 0;
+}
+
+static u8 cmux_get_parent(struct clk_hw *hw)
+{
+   struct cmux_clk *clk = to_cmux_clk(hw);
+   u32 clksel;
+
+   clksel = ioread32be(clk->reg);
+   clksel = (clksel >> CLKSEL_SHIFT) & 0xf;
+   if (clk->flags & CLKSEL_ADJUST)
+   clksel -= 8;
+   clksel = (clksel >> 2) * clocks_per_pll + clksel % 4;
+
+   return clksel;
+}
+
+const struct clk_ops cmux_ops = {
+   .get_parent = cmux_get_parent,
+   .set_parent = cmux_set_parent,
+};
+
+static void __init core_mux_init(struct device_node *np)
+{
+   struct clk *clk;
+   struct clk_init_data init;
+   struct cmux_clk *cmux_clk;
+   struct device_node *node;
+   int rc, count, i;
+   u32 offset;
+   const char *clk_name;
+   const char **parent_names;
+
+   rc = of_property_read_u32(np, "reg", &offset);
+   if (rc) {
+   pr_err("%s: could not get reg property\n", np->name);
+   return;
+   }
+
+   /* get the input clock source count */
+   count = of_property_count_strings(np, "clock-names");
+   if (count < 0) {
+   pr_err("%s: get clock count error\n", np->name);
+   return;
+   }
+   parent_names = kzalloc((sizeof(char *) * count), GFP_KERNEL);
+   if (!parent_names) {
+   pr_err("%s: could not allocate parent_names\n", __func__);
+   return;
+   }
+
+   for (i = 0; i < count; i++)
+   parent_names[i] = of_clk_get_parent_name(np, i);
+
+   cmux_clk = kzalloc(sizeof(struct cmux_clk), GFP_KERNEL);
+   if (!cmux_clk) {
+   pr_err("%s: could not allocate cmux_clk\n", __func__);
+   goto err_name;
+

[PATCH 1/3] powerpc/mpc85xx: Update the clock device tree nodes

[Yuantian.Tang]

From: Tang Yuantian 

The following SOCs will be affected: p2041, p3041, p4080,
p5020, p5040

Signed-off-by: Tang Yuantian 
Signed-off-by: Li Yang 
---
 arch/powerpc/boot/dts/fsl/p2041si-post.dtsi |  62 -
 arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi  |   4 ++
 arch/powerpc/boot/dts/fsl/p3041si-post.dtsi |  62 -
 arch/powerpc/boot/dts/fsl/p3041si-pre.dtsi  |   4 ++
 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 100 +++-
 arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi  |   8 +++
 arch/powerpc/boot/dts/fsl/p5020si-post.dtsi |  42 +++-
 arch/powerpc/boot/dts/fsl/p5020si-pre.dtsi  |   2 +
 arch/powerpc/boot/dts/fsl/p5040si-post.dtsi |  54 ++-
 arch/powerpc/boot/dts/fsl/p5040si-pre.dtsi  |   4 ++
 10 files changed, 337 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 69ac1ac..d83de62 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -305,9 +305,69 @@
};
 
clockgen: global-utilities@e1000 {
-   compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+   compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0",
+  "fixed-clock";
reg = <0xe1000 0x1000>;
clock-frequency = <0>;
+   clock-output-names = "sysclk";
+   #clock-cells = <0>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+   pll0: pll0@800 {
+   #clock-cells = <1>;
+   reg = <0x800>;
+   compatible = "fsl,core-pll-clock";
+   clocks = <&clockgen>;
+   clock-output-names = "pll0", "pll0-div2", "pll0-div4";
+   };
+   pll1: pll1@820 {
+   #clock-cells = <1>;
+   reg = <0x820>;
+   compatible = "fsl,core-pll-clock";
+   clocks = <&clockgen>;
+   clock-output-names = "pll1", "pll1-div2", "pll1-div4";
+   };
+   mux0: mux0@0 {
+   #clock-cells = <0>;
+   reg = <0x0>;
+   compatible = "fsl,core-mux-clock";
+   clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+  <&pll1 0>, <&pll1 1>, <&pll1 2>;
+   clock-names = "pll0_0", "pll0_1", "pll0_2",
+   "pll1_0", "pll1_1", "pll1_2";
+   clock-output-names = "cmux0";
+   };
+   mux1: mux1@20 {
+   #clock-cells = <0>;
+   reg = <0x20>;
+   compatible = "fsl,core-mux-clock";
+   clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+  <&pll1 0>, <&pll1 1>, <&pll1 2>;
+   clock-names = "pll0_0", "pll0_1", "pll0_2",
+   "pll1_0", "pll1_1", "pll1_2";
+   clock-output-names = "cmux1";
+   };
+   mux2: mux2@40 {
+   #clock-cells = <0>;
+   reg = <0x40>;
+   compatible = "fsl,core-mux-clock";
+   clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+  <&pll1 0>, <&pll1 1>, <&pll1 2>;
+   clock-names = "pll0_0", "pll0_1", "pll0_2",
+   "pll1_0", "pll1_1", "pll1_2";
+   clock-output-names = "cmux2";
+   };
+   mux3: mux3@60 {
+   #clock-cells = <0>;
+   reg = <0x60>;
+   compatible = "fsl,core-mux-clock";
+   clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
+  <&pll1 0>, <&pll1 1>, <&pll1 2>;
+   clock-names = "pll0_0", "pll0_1", "pll0_2",
+   "pll1_0", "pll1_1", "pll1_2";
+   clock-output-names = "cmux3";
+   };
};
 
rcpm: global-utilities@e2000 {
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi 
b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
index 7a2697d..22f3b14 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-pre.dtsi
@@ -81,6 +81,7 @@
cpu0: PowerPC,e500mc@0 {
device_type = "cpu";
reg = <0>;
+   clocks = <&mux0>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
next-level-cache = <&cpc>;
@@ -89,6 +90,7 @@
cpu1: PowerPC,e500mc@1 {
device_type = "cpu";
reg

[PATCH 3/3] cpufreq: Add cpufreq driver for Freescale e500mc SOCs

[Yuantian.Tang]

From: Tang Yuantian 

Add cpufreq driver for Freescale e500mc, e5500 and e6500 SOCs
which are capable of changing the frequency of CPU dynamically

Signed-off-by: Tang Yuantian 
Signed-off-by: Li Yang 
---
 drivers/cpufreq/Kconfig.powerpc   |  10 ++
 drivers/cpufreq/Makefile  |   1 +
 drivers/cpufreq/ppc-corenet-cpufreq.c | 237 ++
 3 files changed, 248 insertions(+)
 create mode 100644 drivers/cpufreq/ppc-corenet-cpufreq.c

diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index e76992f..6339db4 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc
@@ -5,3 +5,13 @@ config CPU_FREQ_MAPLE
help
  This adds support for frequency switching on Maple 970FX
  Evaluation Board and compatible boards (IBM JS2x blades).
+
+config PPC_CORENET_CPUFREQ
+   tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
+   depends on PPC_E500MC
+   select CPU_FREQ_TABLE
+   select CLK_PPC_CORENET
+   help
+ This adds the CPUFreq driver support for Freescale e500mc,
+ e5500 and e6500 series SoCs which are capable of changing
+ the CPU's frequency dynamically.
diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
index 863fd18..2416559 100644
--- a/drivers/cpufreq/Makefile
+++ b/drivers/cpufreq/Makefile
@@ -61,3 +61,4 @@ obj-$(CONFIG_ARM_IMX6Q_CPUFREQ)   += 
imx6q-cpufreq.o
 
##
 # PowerPC platform drivers
 obj-$(CONFIG_CPU_FREQ_MAPLE)   += maple-cpufreq.o
+obj-$(CONFIG_PPC_CORENET_CPUFREQ)   += ppc-corenet-cpufreq.o
diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c 
b/drivers/cpufreq/ppc-corenet-cpufreq.c
new file mode 100644
index 000..ad359d4
--- /dev/null
+++ b/drivers/cpufreq/ppc-corenet-cpufreq.c
@@ -0,0 +1,237 @@
+/*
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * CPU Frequency Scaling driver for Freescale PowerPC corenet SoCs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/**
+ * struct cpufreq_data - cpufreq driver data
+ * @cpus_per_cluster: CPU numbers per cluster
+ * @cpufreq_lock: the mutex lock
+ */
+struct cpufreq_data {
+   int cpus_per_cluster;
+   struct mutex cpufreq_lock;
+};
+
+/**
+ * struct cpu_data - per CPU data struct
+ * @np: the node of CPU
+ * @parent: the parent node of np
+ * @table: frequency table point
+ */
+struct cpu_data {
+   struct device_node  *np;
+   struct device_node  *parent;
+   struct cpufreq_frequency_table *table;
+};
+
+static DEFINE_PER_CPU(struct cpu_data, cpu_data);
+static struct cpufreq_data freq_data;
+
+static unsigned int corenet_cpufreq_get_speed(unsigned int cpu)
+{
+   struct clk *clk;
+   struct cpu_data *data = &per_cpu(cpu_data, cpu);
+
+   clk = of_clk_get(data->np, 0);
+
+   return clk_get_rate(clk) / 1000;
+}
+
+/* reduce the duplicated frequency in frequency table */
+static int freq_table_redup(struct cpufreq_frequency_table *freq_table,
+   int cur)
+{
+   int i;
+
+   for (i = 0; i < cur; i++) {
+   if (freq_table[i].frequency == CPUFREQ_ENTRY_INVALID ||
+   freq_table[i].frequency != freq_table[cur].frequency)
+   continue;
+
+   freq_table[cur].index = -1;
+   freq_table[cur].frequency = CPUFREQ_ENTRY_INVALID;
+   break;
+   }
+
+   return (i == cur) ? 0 : 1;
+}
+
+static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
+{
+   unsigned int cpu = policy->cpu;
+   int i, count;
+   struct clk *clk;
+   struct cpufreq_frequency_table *table;
+   struct cpu_data *data;
+
+   data = &per_cpu(cpu_data, cpu);
+   data->np = of_get_cpu_node(cpu, NULL);
+   if (!data->np)
+   return -ENODEV;
+
+   data->parent = of_parse_phandle(data->np, "clocks", 0);
+   if (!data->parent)
+   return -ENODEV;
+
+   count = of_property_count_strings(data->parent, "clock-names");
+
+   table = kcalloc(count + 1,
+   sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
+   if (!table)
+   return -ENOMEM;
+
+   for (i = cpu; i < freq_data.cpus_per_cluster + cpu; i++)
+   cpumask_set_cpu(i, policy->cpus);
+
+   for (i = 0; i < count; i++) {
+   table[i].index = i;
+   clk = of_clk_get(data->parent, i);
+   table[i].frequency = clk_get_rate(clk) / 1000;
+   freq_table_redup(table, i);
+   }
+   table[i].index = -1;
+   table[i].frequency = CPUFREQ_TABLE

RE: [PATCH 3/3] powerpc/fsl: add MPIC timer wakeup support

[Wang Dongsheng-B40534]

> -Original Message-
> From: Wood Scott-B07421
> Sent: Saturday, March 23, 2013 6:11 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; Gala Kumar-B11780; linuxppc-dev@lists.ozlabs.org;
> Zhao Chenhui-B35336; Li Yang-R58472
> Subject: Re: [PATCH 3/3] powerpc/fsl: add MPIC timer wakeup support
> 
> On 03/22/2013 12:46:24 AM, Wang Dongsheng-B40534 wrote:
> >
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, March 21, 2013 5:49 AM
> > > To: Wang Dongsheng-B40534
> > > Cc: Wood Scott-B07421; Gala Kumar-B11780;
> > linuxppc-dev@lists.ozlabs.org;
> > > Zhao Chenhui-B35336; Li Yang-R58472
> > > Subject: Re: [PATCH 3/3] powerpc/fsl: add MPIC timer wakeup support
> > >
> > > On 03/19/2013 10:48:53 PM, Wang Dongsheng-B40534 wrote:
> > > > while (*s) {
> > > > if ('0' <= *s && *s <= '9')
> > > > val = *s - '0';
> > > > else if ('a' <= _tolower(*s) && _tolower(*s) <= 'f')
> > > > val = _tolower(*s) - 'a' + 10;
> > > > else
> > > > break;  //this will break out to convert.
> > >
> > > Really?  How do you know that the next byte after the buffer isn't a
> > > valid hex digit?  How do you even know that we won't take a fault
> > > accessing it?
> > >
> > Under what case is unsafe, please make sense.
> 
> char buffer[1] = { '5' };
> write(fd, &buffer, 1);
> 
> What comes after that '5' byte in the pointer you pass to kstrtol?
> 
The buffer is userspace. It will fall in the kernel space.
Kernel will get a free page, and copy the buffer to page.
This page has been cleared before copy to page.
The page has already have null-terminated.

> > "kstrtol" is used in almost of sysfs interface, I think it should be
> > accepted in defaule :).
> 
> Just because a lot of other people copy blindly doesn't make it right.
> Most of the examples I found use sscanf instead, though that has the same
> problem.
> 
> I do see a few instances of the "strings from sysfs write are not 0
> terminated!" in the comments, though (kernel/time/clocksource.c and
> kernel/rtmutex-tester.c).
> 
> Also "words written to sysfs files may, or may not, be \n terminated"
> in drivers/md/md.c.
> 
It's not "kstrtol" doesn't work as well, They do not belong to this kind
of scenarios.

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RE: [PATCH 2/3] powerpc/mpic: add global timer support

[Wang Dongsheng-B40534]

> -Original Message-
> From: Wood Scott-B07421
> Sent: Saturday, March 23, 2013 6:30 AM
> To: Wang Dongsheng-B40534
> Cc: Wood Scott-B07421; Gala Kumar-B11780; linuxppc-dev@lists.ozlabs.org;
> Li Yang-R58472
> Subject: Re: [PATCH 2/3] powerpc/mpic: add global timer support
> 
> On 03/22/2013 01:14:51 AM, Wang Dongsheng-B40534 wrote:
> >
> >
> > > -Original Message-
> > > From: Wood Scott-B07421
> > > Sent: Thursday, March 21, 2013 7:00 AM
> > > To: Wang Dongsheng-B40534
> > > Cc: Wood Scott-B07421; Gala Kumar-B11780;
> > linuxppc-dev@lists.ozlabs.org;
> > > Li Yang-R58472
> > > Subject: Re: [PATCH 2/3] powerpc/mpic: add global timer support
> > >
> > > BTW, the input clock frequency has been similarly scaled, yet you
> > don't
> > > try to scrounge up that information to get further precision...
> > >
> > Let's go back patch, do you think the code is repeated?
> > I will remove "if (!(priv->flags & FSL_GLOBAL_TIMER))" branch, there
> > will be no redundant code.
> 
> I'd rather that branch be kept and the more complicated branch deleted,
> and priv->timerfreq frequency be adjusted on initialization to account
> for the scaler.

static void convert_ticks_to_time(struct timer_group_priv *priv,
const u64 ticks, struct timeval *time)
{
u64 tmp_sec;

time->tv_sec = (__kernel_time_t)div_u64(ticks, priv->timerfreq);
tmp_sec = (u64)time->tv_sec * (u64)priv->timerfreq;

time->tv_usec = (__kernel_suseconds_t)
div_u64((ticks - tmp_sec) * 100, priv->timerfreq);

return;
}

timer_group_get_freq() {
...
if (priv->flags & FSL_GLOBAL_TIMER) {
div = (1 << (MPIC_TIMER_TCR_CLKDIV_64 >> 8)) * 8;
priv->timerfreq /= div;
}
...
}
Do you want to do that?

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[PATCH 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[Jia Hongtao]

MPIC version is useful information for both mpic_alloc() and mpic_init().
The patch provide an API to get MPIC version for reusing the code.
Also, some other IP block may need MPIC version for their own use.
The API for external use is also provided.

Signed-off-by: Jia Hongtao 
Signed-off-by: Li Yang 
---
 arch/powerpc/include/asm/mpic.h |  3 +++
 arch/powerpc/sysdev/mpic.c  | 30 +++---
 2 files changed, 26 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c0f9ef9..95053d6 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -393,6 +393,9 @@ struct mpic
 #defineMPIC_REGSET_STANDARDMPIC_REGSET(0)  /* Original 
MPIC */
 #defineMPIC_REGSET_TSI108  MPIC_REGSET(1)  /* Tsi108/109 
PIC */
 
+/* Get the mpic version */
+extern u32 mpic_primary_get_version(void);
+
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is
  * actually performed.
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index d30e6a6..d6b6fb6 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1165,10 +1165,31 @@ static struct irq_domain_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
 };
 
+static u32 mpic_get_version(struct mpic *mpic)
+{
+   u32 brr1;
+
+   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
+   MPIC_FSL_BRR1);
+
+   return brr1 & MPIC_FSL_BRR1_VER;
+}
+
 /*
  * Exported functions
  */
 
+u32 mpic_primary_get_version(void)
+{
+   u32 brr1;
+   struct mpic *mpic = mpic_primary;
+
+   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
+   MPIC_FSL_BRR1);
+
+   return brr1 & MPIC_FSL_BRR1_VER;
+}
+
 struct mpic * __init mpic_alloc(struct device_node *node,
phys_addr_t phys_addr,
unsigned int flags,
@@ -1315,7 +1336,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
 
if (mpic->flags & MPIC_FSL) {
-   u32 brr1;
int ret;
 
/*
@@ -1326,9 +1346,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
 MPIC_CPU_THISBASE, 0x1000);
 
-   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
-   MPIC_FSL_BRR1);
-   fsl_version = brr1 & MPIC_FSL_BRR1_VER;
+   fsl_version = mpic_get_version(mpic);
 
/* Error interrupt mask register (EIMR) is required for
 * handling individual device error interrupts. EIMR
@@ -1518,9 +1536,7 @@ void __init mpic_init(struct mpic *mpic)
mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
 
if (mpic->flags & MPIC_FSL) {
-   u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
- MPIC_FSL_BRR1);
-   u32 version = brr1 & MPIC_FSL_BRR1_VER;
+   u32 version = mpic_get_version(mpic);
 
/*
 * Timer group B is present at the latest in MPIC 3.1 (e.g.
-- 
1.8.0


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[PATCH 2/2] powerpc/85xx: workaround for chips with MSI hardware errata

[Jia Hongtao]

The MPIC version 2.0 has a MSI errata (errata PIC1 of mpc8544), It causes
that neither MSI nor MSI-X can work fine. This is a workaround to allow
MSI-X to function properly.

Signed-off-by: Liu Shuo 
Signed-off-by: Li Yang 
Signed-off-by: Jia Hongtao 
---
 arch/powerpc/sysdev/fsl_msi.c | 47 ---
 1 file changed, 44 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 178c994..d2f8040 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -28,6 +28,8 @@
 #include "fsl_msi.h"
 #include "fsl_pci.h"
 
+#define MSI_HW_ERRATA_ENDIAN 0x0010
+
 static LIST_HEAD(msi_head);
 
 struct fsl_msi_feature {
@@ -98,8 +100,18 @@ static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
 
 static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
 {
-   if (type == PCI_CAP_ID_MSIX)
-   pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
+   struct fsl_msi *msi;
+
+   if (type == PCI_CAP_ID_MSI) {
+   /*
+* MPIC version 2.0 has erratum PIC1. For now MSI
+* could not work. So check to prevent MSI from
+* being used on the board with this erratum.
+*/
+   list_for_each_entry(msi, &msi_head, list)
+   if (msi->feature & MSI_HW_ERRATA_ENDIAN)
+   return -EINVAL;
+   }
 
return 0;
 }
@@ -142,7 +154,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int 
hwirq,
msg->address_lo = lower_32_bits(address);
msg->address_hi = upper_32_bits(address);
 
-   msg->data = hwirq;
+   /*
+* MPIC version 2.0 has erratum PIC1. It causes
+* that neither MSI nor MSI-X can work fine.
+* This is a workaround to allow MSI-X to function
+* properly. It only works for MSI-X, we prevent
+* MSI on buggy chips in fsl_msi_check_device().
+*/
+   if (msi_data->feature & MSI_HW_ERRATA_ENDIAN)
+   msg->data = __swab32(hwirq);
+   else
+   msg->data = hwirq;
 
pr_debug("%s: allocated srs: %d, ibs: %d\n",
__func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
@@ -361,6 +383,15 @@ static int fsl_msi_setup_hwirq(struct fsl_msi *msi, struct 
platform_device *dev,
return 0;
 }
 
+/* MPIC version 2.0 has erratum PIC1 */
+static int mpic_has_errata(void)
+{
+   if (mpic_primary_get_version() == 0x0200)
+   return 1;
+
+   return 0;
+}
+
 static const struct of_device_id fsl_of_msi_ids[];
 static int fsl_of_msi_probe(struct platform_device *dev)
 {
@@ -423,6 +454,16 @@ static int fsl_of_msi_probe(struct platform_device *dev)
 
msi->feature = features->fsl_pic_ip;
 
+   if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC) {
+   rc = mpic_has_errata();
+   if (rc > 0) {
+   msi->feature |= MSI_HW_ERRATA_ENDIAN;
+   } else if (rc < 0) {
+   err = rc;
+   goto error_out;
+   }
+   }
+
/*
 * Remember the phandle, so that we can match with any PCI nodes
 * that have an "fsl,msi" property.
-- 
1.8.0


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Re: [PATCH] powerpc: remove two lines of dead code

[Michael Ellerman]

On Mon, Mar 25, 2013 at 11:32:11AM +0100, Paul Bolle wrote:
> Commit c1fb6816fb1b78dd94b673b0fdaa9a7a16e97bd1 ("powerpc: Add
> relocation on exception vector handlers") added two lines of code that
> depend on the macro CONFIG_HVC_SCOM. That macro doesn't exist. Perhaps
> it was intended to use CONFIG_PPC_SCOM here. But since
> "maintence_interrupt" is a typo and there's nothing in arch/powerpc that
> looks like maintenance_interrupt it seems best to just delete these
> lines.

It's cruft from our internal tree that snuck into the patch. I was
meaning to remove it but you beat me to it.

Acked-by: Michael Ellerman 

cheers
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Re: [PATCH 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[Michael Ellerman]

On Tue, Mar 26, 2013 at 11:28:46AM +0800, Jia Hongtao wrote:
> MPIC version is useful information for both mpic_alloc() and mpic_init().
> The patch provide an API to get MPIC version for reusing the code.
> Also, some other IP block may need MPIC version for their own use.
> The API for external use is also provided.
> 
> Signed-off-by: Jia Hongtao 
> Signed-off-by: Li Yang 
> ---
>  arch/powerpc/include/asm/mpic.h |  3 +++
>  arch/powerpc/sysdev/mpic.c  | 30 +++---
>  2 files changed, 26 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
> index c0f9ef9..95053d6 100644
> --- a/arch/powerpc/include/asm/mpic.h
> +++ b/arch/powerpc/include/asm/mpic.h
> @@ -393,6 +393,9 @@ struct mpic
>  #define  MPIC_REGSET_STANDARDMPIC_REGSET(0)  /* Original 
> MPIC */
>  #define  MPIC_REGSET_TSI108  MPIC_REGSET(1)  /* Tsi108/109 
> PIC */
>  
> +/* Get the mpic version */
> +extern u32 mpic_primary_get_version(void);
> +
>  /* Allocate the controller structure and setup the linux irq descs
>   * for the range if interrupts passed in. No HW initialization is
>   * actually performed.
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index d30e6a6..d6b6fb6 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -1165,10 +1165,31 @@ static struct irq_domain_ops mpic_host_ops = {
>   .xlate = mpic_host_xlate,
>  };
>  
> +static u32 mpic_get_version(struct mpic *mpic)
> +{
> + u32 brr1;
> +
> + brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> + MPIC_FSL_BRR1);
> +
> + return brr1 & MPIC_FSL_BRR1_VER;
> +}
> +
>  /*
>   * Exported functions
>   */
>  
> +u32 mpic_primary_get_version(void)
> +{
> + u32 brr1;
> + struct mpic *mpic = mpic_primary;
> +
> + brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> + MPIC_FSL_BRR1);
> +
> + return brr1 & MPIC_FSL_BRR1_VER;
> +}

Why doesn't mpic_primary_get_version() call mpic_get_version() ?

cheers
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RE: [PATCH 1/2] powerpc/MPIC: Add get_version API both for internal and external use

[Jia Hongtao-B38951]

> -Original Message-
> From: Michael Ellerman [mailto:mich...@ellerman.id.au]
> Sent: Tuesday, March 26, 2013 12:14 PM
> To: Jia Hongtao-B38951
> Cc: linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org; Wood Scott-
> B07421
> Subject: Re: [PATCH 1/2] powerpc/MPIC: Add get_version API both for
> internal and external use
> 
> On Tue, Mar 26, 2013 at 11:28:46AM +0800, Jia Hongtao wrote:
> > MPIC version is useful information for both mpic_alloc() and
> mpic_init().
> > The patch provide an API to get MPIC version for reusing the code.
> > Also, some other IP block may need MPIC version for their own use.
> > The API for external use is also provided.
> >
> > Signed-off-by: Jia Hongtao 
> > Signed-off-by: Li Yang 
> > ---
> >  arch/powerpc/include/asm/mpic.h |  3 +++
> >  arch/powerpc/sysdev/mpic.c  | 30 +++---
> >  2 files changed, 26 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/powerpc/include/asm/mpic.h
> > b/arch/powerpc/include/asm/mpic.h index c0f9ef9..95053d6 100644
> > --- a/arch/powerpc/include/asm/mpic.h
> > +++ b/arch/powerpc/include/asm/mpic.h
> > @@ -393,6 +393,9 @@ struct mpic
> >  #defineMPIC_REGSET_STANDARDMPIC_REGSET(0)  /* Original
> MPIC */
> >  #defineMPIC_REGSET_TSI108  MPIC_REGSET(1)  /* Tsi108/109
> PIC */
> >
> > +/* Get the mpic version */
> > +extern u32 mpic_primary_get_version(void);
> > +
> >  /* Allocate the controller structure and setup the linux irq descs
> >   * for the range if interrupts passed in. No HW initialization is
> >   * actually performed.
> > diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> > index d30e6a6..d6b6fb6 100644
> > --- a/arch/powerpc/sysdev/mpic.c
> > +++ b/arch/powerpc/sysdev/mpic.c
> > @@ -1165,10 +1165,31 @@ static struct irq_domain_ops mpic_host_ops = {
> > .xlate = mpic_host_xlate,
> >  };
> >
> > +static u32 mpic_get_version(struct mpic *mpic) {
> > +   u32 brr1;
> > +
> > +   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> > +   MPIC_FSL_BRR1);
> > +
> > +   return brr1 & MPIC_FSL_BRR1_VER;
> > +}
> > +
> >  /*
> >   * Exported functions
> >   */
> >
> > +u32 mpic_primary_get_version(void)
> > +{
> > +   u32 brr1;
> > +   struct mpic *mpic = mpic_primary;
> > +
> > +   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> > +   MPIC_FSL_BRR1);
> > +
> > +   return brr1 & MPIC_FSL_BRR1_VER;
> > +}
> 
> Why doesn't mpic_primary_get_version() call mpic_get_version() ?
> 
> cheers

Good idea.

Thanks.
-Hongtao.


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[PATCH] powerpc: fix annotation of fake_numa_create_new_node()

[Stephen Rothwell]

This function has always been marked as __cpuinit, but is only called
from functions marked as __init and references an __initdata variable.
So change its annotation to __init.

Fixes this build warning:

WARNING: arch/powerpc/mm/built-in.o(.cpuinit.text+0x86): Section mismatch in 
reference from the function .fake_numa_create_new_node() to the variable 
.init.data:cmdline
The function __cpuinit .fake_numa_create_new_node() references
a variable __initdata cmdline.
If cmdline is only used by .fake_numa_create_new_node then
annotate cmdline with a matching annotation.

Signed-off-by: Stephen Rothwell 
---
 arch/powerpc/mm/numa.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index bba87ca..715cab7 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -79,7 +79,7 @@ static void __init setup_node_to_cpumask_map(void)
dbg("Node to cpumask map for %d nodes\n", nr_node_ids);
 }
 
-static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
+static int __init fake_numa_create_new_node(unsigned long end_pfn,
unsigned int *nid)
 {
unsigned long long mem;
-- 
1.8.1

-- 
Cheers,
Stephen Rothwells...@canb.auug.org.au


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Re: [PATCH 3/3] cpufreq: Add cpufreq driver for Freescale e500mc SOCs

[Viresh Kumar]

On Tue, Mar 26, 2013 at 8:06 AM,   wrote:
> diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
> index e76992f..6339db4 100644
> --- a/drivers/cpufreq/Kconfig.powerpc
> +++ b/drivers/cpufreq/Kconfig.powerpc
> @@ -5,3 +5,13 @@ config CPU_FREQ_MAPLE
> help
>   This adds support for frequency switching on Maple 970FX
>   Evaluation Board and compatible boards (IBM JS2x blades).
> +
> +config PPC_CORENET_CPUFREQ
> +   tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
> +   depends on PPC_E500MC

depends on OF and COMMON_CLK too?

> +   select CPU_FREQ_TABLE
> +   select CLK_PPC_CORENET
> +   help
> + This adds the CPUFreq driver support for Freescale e500mc,
> + e5500 and e6500 series SoCs which are capable of changing
> + the CPU's frequency dynamically.
> diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile
> index 863fd18..2416559 100644
> --- a/drivers/cpufreq/Makefile
> +++ b/drivers/cpufreq/Makefile

> diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c 
> b/drivers/cpufreq/ppc-corenet-cpufreq.c

> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 

You shouldn't need this normally.

> +#include 

Keep them in alphabetical order, so that we don't anyone twice by mistake.

> +/**
> + * struct cpufreq_data - cpufreq driver data
> + * @cpus_per_cluster: CPU numbers per cluster
> + * @cpufreq_lock: the mutex lock
> + */
> +struct cpufreq_data {
> +   int cpus_per_cluster;
> +   struct mutex cpufreq_lock;
> +};
> +
> +/**
> + * struct cpu_data - per CPU data struct

For your case where you have 8 cpus in a cluster, only one of 8 variables
would be used... Better to create an array of struct with elements:
cpu and data.

> + * @np: the node of CPU
> + * @parent: the parent node of np
> + * @table: frequency table point
> + */
> +struct cpu_data {
> +   struct device_node  *np;
> +   struct device_node  *parent;
> +   struct cpufreq_frequency_table *table;
> +};
> +
> +static DEFINE_PER_CPU(struct cpu_data, cpu_data);
> +static struct cpufreq_data freq_data;
> +
> +static unsigned int corenet_cpufreq_get_speed(unsigned int cpu)
> +{
> +   struct clk *clk;
> +   struct cpu_data *data = &per_cpu(cpu_data, cpu);
> +
> +   clk = of_clk_get(data->np, 0);

You want to do this everytime? Want to store it?

> +   return clk_get_rate(clk) / 1000;
> +}
> +
> +/* reduce the duplicated frequency in frequency table */
> +static int freq_table_redup(struct cpufreq_frequency_table *freq_table,
> +   int cur)
> +{
> +   int i;
> +
> +   for (i = 0; i < cur; i++) {
> +   if (freq_table[i].frequency == CPUFREQ_ENTRY_INVALID ||
> +   freq_table[i].frequency != freq_table[cur].frequency)
> +   continue;
> +
> +   freq_table[cur].index = -1;

don't need this.

> +   freq_table[cur].frequency = CPUFREQ_ENTRY_INVALID;
> +   break;
> +   }
> +
> +   return (i == cur) ? 0 : 1;

return value isn't used by caller.

> +}
> +
> +static int corenet_cpufreq_cpu_init(struct cpufreq_policy *policy)
> +{
> +   unsigned int cpu = policy->cpu;
> +   int i, count;
> +   struct clk *clk;
> +   struct cpufreq_frequency_table *table;
> +   struct cpu_data *data;
> +
> +   data = &per_cpu(cpu_data, cpu);
> +   data->np = of_get_cpu_node(cpu, NULL);
> +   if (!data->np)
> +   return -ENODEV;
> +
> +   data->parent = of_parse_phandle(data->np, "clocks", 0);

You need to details your DTB bindings in Documentation/devicetree/bindings and
cc devicetree-disc...@lists.ozlabs.org.

> +   if (!data->parent)
> +   return -ENODEV;

of_node_put(np)??

> +
> +   count = of_property_count_strings(data->parent, "clock-names");
> +   table = kcalloc(count + 1,

kzalloc??

> +   sizeof(struct cpufreq_frequency_table), GFP_KERNEL);

sizeof(*table)

> +   if (!table)
> +   return -ENOMEM;
> +
> +   for (i = cpu; i < freq_data.cpus_per_cluster + cpu; i++)
> +   cpumask_set_cpu(i, policy->cpus);
> +
> +   for (i = 0; i < count; i++) {
> +   table[i].index = i;
> +   clk = of_clk_get(data->parent, i);
> +   table[i].frequency = clk_get_rate(clk) / 1000;
> +   freq_table_redup(table, i);

Don't call it everytime, fix all these in a single call.

> +   }
> +   table[i].index = -1;

-1 ??

> +   table[i].frequency = CPUFREQ_TABLE_END;
> +
> +   data->table = table;
> +   cpufreq_frequency_table_get_attr(table, cpu);

This must be done only when init() passed. What if
cpufreq_frequency_table_cpuinfo() failed?

> +
> +   /* FIXME: what's the actual transition time? in ns */
> +   policy->cpuinfo.transition_latency =

[PATCH V2] powerpc/MPIC: Add get_version API both for internal and external use

[Jia Hongtao]

MPIC version is useful information for both mpic_alloc() and mpic_init().
The patch provide an API to get MPIC version for reusing the code.
Also, some other IP block may need MPIC version for their own use.
The API for external use is also provided.

Signed-off-by: Jia Hongtao 
Signed-off-by: Li Yang 
---
Changes for V2:
* Using mpic_get_version() to implement mpic_primary_get_version()

 arch/powerpc/include/asm/mpic.h |  3 +++
 arch/powerpc/sysdev/mpic.c  | 26 +++---
 2 files changed, 22 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index c0f9ef9..7d1222d 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -393,6 +393,9 @@ struct mpic
 #defineMPIC_REGSET_STANDARDMPIC_REGSET(0)  /* Original 
MPIC */
 #defineMPIC_REGSET_TSI108  MPIC_REGSET(1)  /* Tsi108/109 
PIC */
 
+/* Get the version of primary MPIC */
+extern u32 mpic_primary_get_version(void);
+
 /* Allocate the controller structure and setup the linux irq descs
  * for the range if interrupts passed in. No HW initialization is
  * actually performed.
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index d30e6a6..c893a4b 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1165,10 +1165,27 @@ static struct irq_domain_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
 };
 
+static u32 mpic_get_version(struct mpic *mpic)
+{
+   u32 brr1;
+
+   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
+   MPIC_FSL_BRR1);
+
+   return brr1 & MPIC_FSL_BRR1_VER;
+}
+
 /*
  * Exported functions
  */
 
+u32 mpic_primary_get_version(void)
+{
+   struct mpic *mpic = mpic_primary;
+
+   return mpic_get_version(mpic);
+}
+
 struct mpic * __init mpic_alloc(struct device_node *node,
phys_addr_t phys_addr,
unsigned int flags,
@@ -1315,7 +1332,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 
0x1000);
 
if (mpic->flags & MPIC_FSL) {
-   u32 brr1;
int ret;
 
/*
@@ -1326,9 +1342,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
 MPIC_CPU_THISBASE, 0x1000);
 
-   brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
-   MPIC_FSL_BRR1);
-   fsl_version = brr1 & MPIC_FSL_BRR1_VER;
+   fsl_version = mpic_get_version(mpic);
 
/* Error interrupt mask register (EIMR) is required for
 * handling individual device error interrupts. EIMR
@@ -1518,9 +1532,7 @@ void __init mpic_init(struct mpic *mpic)
mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
 
if (mpic->flags & MPIC_FSL) {
-   u32 brr1 = _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
- MPIC_FSL_BRR1);
-   u32 version = brr1 & MPIC_FSL_BRR1_VER;
+   u32 version = mpic_get_version(mpic);
 
/*
 * Timer group B is present at the latest in MPIC 3.1 (e.g.
-- 
1.8.0


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