RE: [PATCH] powerpc/fsl-booke: Work around erratum A-006958
> On 07/15/2013 11:53:54 AM, Scott Wood wrote: > > On 07/15/2013 03:45:36 AM, David Laight wrote: > >> Also, if the high word changes, there is no need to loop. > >> Just return the second value with a low word of zero > >> (the returned count happened while the function was active). > > > > That would be more complicated than looping. I'm not that familiar with the ppc instructions set, but on x86 the equivalent instructions are synchronising ones - so can have performance penalties, so a few extra 'normal' instructions to avoid re-reading the timebase counter may be worth while. The branch for the loop might also be statically predicted 'taken' leading to a branch misprediction penalty as well. > That said, it's since been confirmed internally that the low word > should always be zero when this happens, so we could share the Cell > workaround code -- as long as we do something special in the timebase > sync code so that we don't get stuck if the timebase happens to be > frozen with TBL==0. This would avoid the need for scratch registers > (other than CR0). Yes - if the actual errata is that the low word is read one clock later then the high word then the only illegal value is one where the low word is zero. In that case it is sufficient to reread the counter - it can't be wrong again! Indeed it is only necessary to read the high part (even if the code pre-empted for over 2^32 counts, the returned value will have happened during the designated period). David ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1 21/24] [media] fsl-viu: OF clock lookup, prepare before enable
device tree based clock lookup, must prepare clocks before enabling
them, unprepare after disable, error check in the clock setup
Signed-off-by: Gerhard Sittig
---
drivers/media/platform/fsl-viu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index 221ec42..b95aa43 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1582,8 +1582,11 @@ static int viu_of_probe(struct platform_device *op)
dev_err(&op->dev, "failed to find the clock module!\n");
ret = -ENODEV;
goto err_clk;
- } else {
- clk_enable(viu_dev->clk);
+ }
+ ret = clk_prepare_enable(viu_dev->clk);
+ if (ret) {
+ dev_err(&op->dev, "failed to enable the clock!\n");
+ goto err_clk_put;
}
/* reset VIU module */
@@ -1602,7 +1605,8 @@ static int viu_of_probe(struct platform_device *op)
return ret;
err_irq:
- clk_disable(viu_dev->clk);
+ clk_disable_unprepare(viu_dev->clk);
+err_clk_put:
clk_put(viu_dev->clk);
err_clk:
video_unregister_device(viu_dev->vdev);
@@ -1626,7 +1630,7 @@ static int viu_of_remove(struct platform_device *op)
free_irq(dev->irq, (void *)dev);
irq_dispose_mapping(dev->irq);
- clk_disable(dev->clk);
+ clk_disable_unprepare(dev->clk);
clk_put(dev->clk);
video_unregister_device(dev->vdev);
--
1.7.10.4
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[PATCH v1 22/24] powerpc/fsl-pci: OF clock lookup, prepare before enable
device tree based clock lookup, must prepare clocks before enabling
them, error check in the clock setup
this change implements non-fatal clock lookup for compatibility with
platforms that don't provide OF clock specs, but failure to enable a
specified clock is considered fatal
Signed-off-by: Gerhard Sittig
---
arch/powerpc/sysdev/fsl_pci.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..cb2ed92 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -17,6 +17,8 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+#include
#include
#include
#include
@@ -741,6 +743,7 @@ err0:
int __init mpc83xx_add_bridge(struct device_node *dev)
{
+ struct clk *clk;
int ret;
int len;
struct pci_controller *hose;
@@ -758,6 +761,18 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
}
pr_debug("Adding PCI host bridge %s\n", dev->full_name);
+ /* non-fatal OF clock lookup, but fatal when a clock
+* was specified yet could not get enabled */
+ clk = of_clk_get_by_name(dev, "per");
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ clk_put(clk);
+ if (ret) {
+ pr_err("Could not enable peripheral clock\n");
+ return ret;
+ }
+ }
+
/* Fetch host bridge registers address */
if (of_address_to_resource(dev, 0, &rsrc_reg)) {
printk(KERN_WARNING "Can't get pci register base!\n");
--
1.7.10.4
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[PATCH v1 23/24] clk: mpc512x: switch to COMMON_CLK, remove PPC_CLOCK
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
arch/powerpc/platforms/512x/Makefile |3 +-
arch/powerpc/platforms/512x/clock.c | 753 --
3 files changed, 2 insertions(+), 768 deletions(-)
delete mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index c5fcdd0..5aa3f4b 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -1,21 +1,9 @@
-config MPC512x_COMMON_CLK
- bool "MPC512x platform uses COMMON_CLK"
- default y
- depends on PPC_MPC512x
- help
- This option is only here to support tests and comparison
- during development and migration. This option will get
- removed after the COMMON_CLK support for MPC512x has become
- fully operational and all drivers were adjusted to explicitly
- acquire their required clocks.
-
config PPC_MPC512x
bool "512x-based boards"
depends on 6xx
+ select COMMON_CLK
select FSL_SOC
select IPIC
- select PPC_CLOCK if !MPC512x_COMMON_CLK
- select COMMON_CLK if MPC512x_COMMON_CLK
select PPC_PCI_CHOICE
select FSL_PCI if PCI
select ARCH_WANT_OPTIONAL_GPIOLIB
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 1e05f9d..bb20116 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,8 +1,7 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-$(CONFIG_PPC_CLOCK)+= clock.o
-obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o
+obj-y += clock-commonclk.o
obj-y += mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
diff --git a/arch/powerpc/platforms/512x/clock.c
b/arch/powerpc/platforms/512x/clock.c
deleted file mode 100644
index e504166..000
--- a/arch/powerpc/platforms/512x/clock.c
+++ /dev/null
@@ -1,753 +0,0 @@
-/*
- * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby
- *
- * Implements the clk api defined in include/linux/clk.h
- *
- *Original based on linux/arch/arm/mach-integrator/clock.c
- *
- *Copyright (C) 2004 ARM Limited.
- *Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include
-#include
-
-#include "mpc512x.h"
-
-#undef CLK_DEBUG
-
-static int clocks_initialized;
-
-#define CLK_HAS_RATE 0x1 /* has rate in MHz */
-#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
-
-struct clk {
- struct list_head node;
- char name[32];
- int flags;
- struct device *dev;
- unsigned long rate;
- struct module *owner;
- void (*calc) (struct clk *);
- struct clk *parent;
- int reg, bit; /* CLK_HAS_CTRL */
- int div_shift; /* only used by generic_div_clk_calc */
-};
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
-{
- struct clk *p, *clk = ERR_PTR(-ENOENT);
- int dev_match;
- int id_match;
-
- if (dev == NULL || id == NULL)
- return clk;
-
- mutex_lock(&clocks_mutex);
- list_for_each_entry(p, &clocks, node) {
- dev_match = id_match = 0;
-
- if (dev == p->dev)
- dev_match++;
- if (strcmp(id, p->name) == 0)
- id_match++;
- if ((dev_match || id_match) && try_module_get(p->owner)) {
- clk = p;
- break;
- }
- }
- mutex_unlock(&clocks_mutex);
-
- return clk;
-}
-
-#ifdef CLK_DEBUG
-static void dump_clocks(void)
-{
- struct clk *p;
-
- mutex_lock(&clocks_mutex);
- printk(KERN_INFO "CLOCKS:\n");
- list_for_each_entry(p, &clocks, node) {
- pr_info(" %s=%ld", p->name, p->rate);
- if (p->parent)
- pr_cont(" %s=%ld", p->parent->name,
- p->parent->rate);
- if (p->flags & CLK_HAS_CTRL)
- pr_cont(" reg/bit=%d/%d", p->reg, p->bit);
- pr_cont("\n");
- }
- mutex_unlock(&clocks_mutex);
-}
-#define
[PATCH v1 24/24] net: can: mscan: remove MPC512x non-COMMON_CLK code path
transition to the COMMON_CLK framework has completed for the MPC512x
platform, remove the now obsolete code path of the mpc5xxx mscan
driver which accessed clock control module registers directly
Signed-off-by: Gerhard Sittig
---
drivers/net/can/mscan/mpc5xxx_can.c | 136 ---
1 file changed, 136 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index dd26ab6..cf5e4cfc 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -108,9 +108,6 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
-
-#if IS_ENABLED(CONFIG_COMMON_CLK)
-
static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
const char *clock_source, int *mscan_clksrc)
{
@@ -244,139 +241,6 @@ err_notavail:
dev_err(&ofdev->dev, "cannot acquire or setup clock source\n");
return 0;
}
-#else /* COMMON_CLK */
-struct mpc512x_clockctl {
- u32 spmr; /* System PLL Mode Reg */
- u32 sccr[2];/* System Clk Ctrl Reg 1 & 2 */
- u32 scfr1; /* System Clk Freq Reg 1 */
- u32 scfr2; /* System Clk Freq Reg 2 */
- u32 reserved;
- u32 bcr;/* Bread Crumb Reg */
- u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */
- u32 spccr; /* SPDIF Clk Ctrl Reg */
- u32 cccr; /* CFM Clk Ctrl Reg */
- u32 dccr; /* DIU Clk Cnfg Reg */
- u32 mccr[4];/* MSCAN Clk Ctrl Reg 1-3 */
-};
-
-static struct of_device_id mpc512x_clock_ids[] = {
- { .compatible = "fsl,mpc5121-clock", },
- {}
-};
-
-static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
-const char *clock_name, int *mscan_clksrc)
-{
- struct mpc512x_clockctl __iomem *clockctl;
- struct device_node *np_clock;
- struct clk *sys_clk, *ref_clk;
- int plen, clockidx, clocksrc = -1;
- u32 sys_freq, val, clockdiv = 1, freq = 0;
- const u32 *pval;
-
- np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
- if (!np_clock) {
- dev_err(&ofdev->dev, "couldn't find clock node\n");
- return 0;
- }
- clockctl = of_iomap(np_clock, 0);
- if (!clockctl) {
- dev_err(&ofdev->dev, "couldn't map clock registers\n");
- goto exit_put;
- }
-
- /* Determine the MSCAN device index from the peripheral's
-* physical address. Register address offsets against the
-* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380
-*/
- pval = of_get_property(ofdev->dev.of_node, "reg", &plen);
- BUG_ON(!pval || plen < sizeof(*pval));
- clockidx = (*pval & 0x80) ? 1 : 0;
- if (*pval & 0x2000)
- clockidx += 2;
-
- /*
-* Clock source and divider selection: 3 different clock sources
-* can be selected: "ip", "ref" or "sys". For the latter two, a
-* clock divider can be defined as well. If the clock source is
-* not specified by the device tree, we first try to find an
-* optimal CAN source clock based on the system clock. If that
-* is not posslible, the reference clock will be used.
-*/
- if (clock_name && !strcmp(clock_name, "ip")) {
- *mscan_clksrc = MSCAN_CLKSRC_IPS;
- freq = mpc5xxx_get_bus_frequency(ofdev->dev.of_node);
- } else {
- *mscan_clksrc = MSCAN_CLKSRC_BUS;
-
- pval = of_get_property(ofdev->dev.of_node,
- "fsl,mscan-clock-divider", &plen);
- if (pval && plen == sizeof(*pval))
- clockdiv = *pval;
- if (!clockdiv)
- clockdiv = 1;
-
- if (!clock_name || !strcmp(clock_name, "sys")) {
- sys_clk = clk_get(&ofdev->dev, "sys_clk");
- if (IS_ERR(sys_clk)) {
- dev_err(&ofdev->dev, "couldn't get sys_clk\n");
- goto exit_unmap;
- }
- /* Get and round up/down sys clock rate */
- sys_freq = 100 *
- ((clk_get_rate(sys_clk) + 49) / 100);
-
- if (!clock_name) {
- /* A multiple of 16 MHz would be optimal */
- if ((sys_freq % 1600) == 0) {
- clocksrc = 0;
- clockdiv = sys_freq / 1600;
- freq = sys_freq / clockdiv;
- }
- } else {
- clocksrc = 0;
-
RE: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type detection
Hi, scott Need I change something? I have some patches depend on this. Expect your advice. Thanks. Regards Haijun. > -Original Message- > From: Zhang Haijun-B42677 > Sent: Thursday, July 11, 2013 8:24 AM > To: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org > Cc: cbouatmai...@gmail.com; c...@laptop.org; Wood Scott-B07421; Fleming > Andy-AFLEMING; Wrobel Heinz-R39252; Zhang Haijun-B42677; Zhao Chenhui- > B35336 > Subject: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type detection > > Add this file to help detect cpu type in runtime. > These macros will be more favorable for driver to apply errata and > workaround to specified cpu type. > > Signed-off-by: Haijun Zhang > Signed-off-by: Zhao Chenhui > --- > changes for v3: > - remove get_svr and is_svr_rev > > arch/powerpc/include/asm/mpc85xx.h | 47 > ++ > 1 file changed, 47 insertions(+) > create mode 100644 arch/powerpc/include/asm/mpc85xx.h > > diff --git a/arch/powerpc/include/asm/mpc85xx.h > b/arch/powerpc/include/asm/mpc85xx.h > new file mode 100644 > index 000..824b619 > --- /dev/null > +++ b/arch/powerpc/include/asm/mpc85xx.h > @@ -0,0 +1,47 @@ > +/* > + * MPC85xx cpu type detection > + * > + * Copyright 2011-2012 Freescale Semiconductor, Inc. > + * > + * This is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License, or > + * (at your option) any later version. > + */ > + > +#ifndef __ASM_PPC_MPC85XX_H > +#define __ASM_PPC_MPC85XX_H > + > +#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */ > +#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/ > +#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/ > + > +/* Some parts define SVR[0:23] as the SOC version */ > +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version > fields */ > + > +#define SVR_8533 0x803400 > +#define SVR_8535 0x803701 > +#define SVR_8536 0x803700 > +#define SVR_8540 0x803000 > +#define SVR_8541 0x807200 > +#define SVR_8543 0x803200 > +#define SVR_8544 0x803401 > +#define SVR_8545 0x803102 > +#define SVR_8547 0x803101 > +#define SVR_8548 0x803100 > +#define SVR_8555 0x807100 > +#define SVR_8560 0x807000 > +#define SVR_8567 0x807501 > +#define SVR_8568 0x807500 > +#define SVR_8569 0x808000 > +#define SVR_8572 0x80E000 > +#define SVR_P10100x80f900 > +#define SVR_P20410x821001 > +#define SVR_P30410x821103 > +#define SVR_P50100x822100 > +#define SVR_P50200x822000 > +#define SVR_P50400x820400 > +#define SVR_T42400x824800 > +#define SVR_B48600x868800 > + > +#endif > -- > 1.8.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/8xx: Remove last traces of 8XX_MINIMAL_FPEMU
The Kconfig symbol 8XX_MINIMAL_FPEMU was removed in commit 968219fa33
("powerpc/8xx: Remove 8xx specific "minimal FPU emulation""). But that
commit didn't remove all code depending on that symbol. Do so now.
Signed-off-by: Paul Bolle
---
Not even compile tested!
arch/powerpc/include/asm/emulated_ops.h | 2 -
arch/powerpc/kernel/Makefile| 2 -
arch/powerpc/kernel/softemu8xx.c| 199
3 files changed, 203 deletions(-)
delete mode 100644 arch/powerpc/kernel/softemu8xx.c
diff --git a/arch/powerpc/include/asm/emulated_ops.h
b/arch/powerpc/include/asm/emulated_ops.h
index 63f2a22..5a8b82a 100644
--- a/arch/powerpc/include/asm/emulated_ops.h
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -46,8 +46,6 @@ extern struct ppc_emulated {
struct ppc_emulated_entry unaligned;
#ifdef CONFIG_MATH_EMULATION
struct ppc_emulated_entry math;
-#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
- struct ppc_emulated_entry 8xx;
#endif
#ifdef CONFIG_VSX
struct ppc_emulated_entry vsx;
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index a8619bf..d706e58 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -117,8 +117,6 @@ obj-$(CONFIG_DYNAMIC_FTRACE)+= ftrace.o
obj-$(CONFIG_FUNCTION_GRAPH_TRACER)+= ftrace.o
obj-$(CONFIG_FTRACE_SYSCALLS) += ftrace.o
-obj-$(CONFIG_8XX_MINIMAL_FPEMU) += softemu8xx.o
-
ifneq ($(CONFIG_PPC_INDIRECT_IO),y)
obj-y += iomap.o
endif
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
deleted file mode 100644
index 29b2f81..000
--- a/arch/powerpc/kernel/softemu8xx.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Software emulation of some PPC instructions for the 8xx core.
- *
- * Copyright (C) 1998 Dan Malek (dma...@jlc.net)
- *
- * Software floating emuation for the MPC8xx processor. I did this mostly
- * because it was easier than trying to get the libraries compiled for
- * software floating point. The goal is still to get the libraries done,
- * but I lost patience and needed some hacks to at least get init and
- * shells running. The first problem is the setjmp/longjmp that save
- * and restore the floating point registers.
- *
- * For this emulation, our working registers are found on the register
- * save area.
- */
-
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-#include
-
-#include
-#include
-#include
-
-/* Eventually we may need a look-up table, but this works for now.
-*/
-#define LFS48
-#define LFD50
-#define LFDU 51
-#define STFD 54
-#define STFDU 55
-#define FMR63
-
-void print_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
-
- printk(" pte @ 0x%8lx: ", addr);
- pgd = pgd_offset(mm, addr & PAGE_MASK);
- if (pgd) {
- pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
-addr & PAGE_MASK);
- if (pmd && pmd_present(*pmd)) {
- pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
- if (pte) {
- printk(" (0x%08lx)->(0x%08lx)->0x%08lx\n",
- (long)pgd, (long)pte,
(long)pte_val(*pte));
-#define pp ((long)pte_val(*pte))
- printk(" RPN: %05lx PP: %lx SPS: %lx SH: %lx "
- "CI: %lx v: %lx\n",
- pp>>12,/* rpn */
- (pp>>10)&3, /* pp */
- (pp>>3)&1, /* small */
- (pp>>2)&1, /* shared */
- (pp>>1)&1, /* cache inhibit */
- pp&1 /* valid */
- );
-#undef pp
- }
- else {
- printk("no pte\n");
- }
- }
- else {
- printk("no pmd\n");
- }
- }
- else {
- printk("no pgd\n");
- }
-}
-
-int get_8xx_pte(struct mm_struct *mm, unsigned long addr)
-{
- pgd_t *pgd;
- pmd_t *pmd;
- pte_t *pte;
- int retval = 0;
-
- pgd = pgd_offset(mm, addr & PAGE_MASK);
- if (pgd) {
- pmd = pmd_offset(pud_offset(pgd, addr & PAGE_MASK),
-addr & PAGE_MASK);
- if (pmd && pmd_present(*pmd)) {
- pte = pte_offset_kernel(pmd, addr & PAGE_MASK);
- if (pte) {
- retval = (int)pte_val(*pte);
- }
- }
- }
- return retval;
-}
-
-/*
- * We return 0 on success, 1 on unimplemented instruction, and EFAULT
- * if a
Re: [PATCH RFC v2 0/5] MPC512x DMA slave s/g support, OF DMA lookup
Hello everyone!
Hello Gerhard!
Thanks for your work.
2013/7/14 Gerhard Sittig :
> known issues:
> - currently encoded constraints do work for SD card and LPB test suite
> (all known DMA clients ATM), but will need more tuning or support for
> automatic adjustment for transfers of arbitrary length
NBYTES of data is read from / written to DMA client's port in one burst
after DMA controller receives service request from that DMA client.
Different DMA clients want different NBYTES:
SCLPC wants 4 and SD card wants 64, other clients might want something
different.
So having default case with magic number 64 is totally wrong.
What if we simply remove it from [PATCH RFC v2 2/5]:
len = sg_dma_len(sg);
if (mchan->tcd_nunits)
tcd->nbytes = mchan->tcd_nunits * 4;
- else
- tcd->nbytes = 64;
if (!IS_ALIGNED(len, tcd->nbytes))
return NULL;
and make SD card driver use fields
src_addr_width, dst_addr_width and src_maxburst / dst_maxburst
of dma_slave_config which is a part of standard API (dmaengine.h):
#define DEFAULT_WORDS_PER_TRANSFER16
...
struct dma_slave_config dma_conf = {};
...
if (dma_conf.direction = DMA_MEM_TO_DEV) {
dma_conf.dst_maxburst = DEFAULT_WORDS_PER_TRANSFER;
} else {
dma_conf.src_maxburst = DEFAULT_WORDS_PER_TRANSFER;
}
dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
...
if (dma_dev->device_control(chan, DMA_SLAVE_CONFIG,
(unsigned long)&dma_conf)) {
goto err_dma_prep;
}
This code for SD card driver would be very similar to the code from
SCLPC driver.
Best regards,
Alexander
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Re: [PATCH RFC v2 2/5] dma: mpc512x: add support for peripheral transfers
On 07/14/2013 02:01 PM, Gerhard Sittig wrote:
> From: Alexander Popov
>
> introduce support for slave s/g transfer preparation and the associated
> device control callback in the MPC512x DMA controller driver, which adds
> support for data transfers between memory and peripheral I/O to the
> previously supported mem-to-mem transfers
>
> refuse to prepare chunked transfers (transfers with more than one part)
> as long as proper support for scatter/gather is lacking
>
> keep MPC8308 operational by always starting transfers from software,
> this SoC appears to not have request lines for flow control when
> peripherals are involved in transfers
I had a look at the current driver and it seems that any channel can be used
for memcpy operation not only the MDDRC channel. Since the dmaengine API
will just pick one of the currently free channels when performing a memcpy
operation I think this patch breaks memcpy operations. You probably need to
register two dma controllers, one for memcpy operations one for slave
operations, that way you can ensure that only the MDDRC channel is used for
memcpy operations.
>
> [ introduction of slave s/g preparation and device control ]
> Signed-off-by: Alexander Popov
> [ execute() start condition, mpc8308 compat, terminate all, s/g length check,
> reworded commit msg ]
> Signed-off-by: Gerhard Sittig
> ---
[...]
> +
> +static int mpc_dma_device_control(struct dma_chan *chan, enum dma_ctrl_cmd
> cmd,
> + unsigned long arg)
> +{
> + struct mpc_dma_chan *mchan;
> + struct mpc_dma *mdma;
> + struct dma_slave_config *cfg;
> +
> + mchan = dma_chan_to_mpc_dma_chan(chan);
> + switch (cmd) {
> + case DMA_TERMINATE_ALL:
> + /* disable channel requests */
> + mdma = dma_chan_to_mpc_dma(chan);
> + out_8(&mdma->regs->dmacerq, chan->chan_id);
> + list_splice_tail_init(&mchan->prepared, &mchan->free);
> + list_splice_tail_init(&mchan->queued, &mchan->free);
> + list_splice_tail_init(&mchan->active, &mchan->free);
This probably need locking.
> + return 0;
[...]
> +}
> +
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[PATCH 2/2] powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64
We have split the math emulation into two parts. This makes it possible to just emulate the unimplemented floating point instructions on these boards. Signed-off-by: Kevin Hao --- arch/powerpc/configs/corenet64_smp_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig index b5408dc..39843ef 100644 --- a/arch/powerpc/configs/corenet64_smp_defconfig +++ b/arch/powerpc/configs/corenet64_smp_defconfig @@ -28,6 +28,7 @@ CONFIG_T4240_QDS=y # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set CONFIG_BINFMT_MISC=m CONFIG_MATH_EMULATION=y +CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y CONFIG_FSL_IFC=y CONFIG_PCIEPORTBUS=y CONFIG_PCI_MSI=y -- 1.8.1.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: split the math emulation into two parts
For some SoC (such as the FSL BookE) even though there does have
a hardware FPU, but not all floating point instructions are
implemented. Unfortunately some versions of gcc do use these
unimplemented instructions. Then we have to enable the math emulation
to workaround this issue. It seems a little redundant to have the
support to emulate all the floating point instructions in this case.
So split the math emulation into two parts. One is for the SoC which
doesn't have FPU at all and the other for the SoC which does have the
hardware FPU and only need some special floating point instructions to
be emulated.
Signed-off-by: Kevin Hao
---
arch/powerpc/Kconfig | 20
arch/powerpc/math-emu/Makefile | 24
arch/powerpc/math-emu/math.c | 20 ++--
3 files changed, 46 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3bf72cd..7205989 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -312,6 +312,26 @@ config MATH_EMULATION
such as fsqrt on cores that do have an FPU but do not implement
them (such as Freescale BookE).
+choice
+ prompt "Math emulation options"
+ default MATH_EMULATION_FULL
+ depends on MATH_EMULATION
+
+config MATH_EMULATION_FULL
+ bool "Emulate all the floating point instructions"
+ ---help---
+ Select this option will enable the kernel to support to emulate
+ all the floating point instructions. If your SoC doesn't have
+ a FPU, you should select this.
+
+config MATH_EMULATION_HW_UNIMPLEMENTED
+ bool "Just emulate the FPU unimplemented instructions"
+ ---help---
+ Select this if you know there does have a hardware FPU on your
+ SoC, but some floating point instructions are not implemented by that.
+
+endchoice
+
config PPC_TRANSACTIONAL_MEM
bool "Transactional Memory support for POWERPC"
depends on PPC_BOOK3S_64
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 8d035d2..1b46ab4 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -1,15 +1,15 @@
-
-obj-$(CONFIG_MATH_EMULATION) += fabs.o fadd.o fadds.o fcmpo.o fcmpu.o \
- fctiw.o fctiwz.o fdiv.o fdivs.o \
- fmadd.o fmadds.o fmsub.o fmsubs.o \
- fmul.o fmuls.o fnabs.o fneg.o \
- fnmadd.o fnmadds.o fnmsub.o fnmsubs.o \
- fres.o fre.o frsp.o fsel.o lfs.o \
- frsqrte.o frsqrtes.o \
- fsqrt.o fsqrts.o fsub.o fsubs.o \
- mcrfs.o mffs.o mtfsb0.o mtfsb1.o \
- mtfsf.o mtfsfi.o stfiwx.o stfs.o \
- math.o fmr.o lfd.o stfd.o
+math-emu-common-objs = math.o fre.o fsqrt.o fsqrts.o frsqrtes.o mtfsf.o
mtfsfi.o
+obj-$(CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED) += $(math-emu-common-objs)
+obj-$(CONFIG_MATH_EMULATION_FULL) += $(math-emu-common-objs) fabs.o fadd.o \
+ fadds.o fcmpo.o fcmpu.o fctiw.o \
+ fctiwz.o fdiv.o fdivs.o fmadd.o \
+ fmadds.o fmsub.o fmsubs.o fmul.o \
+ fmuls.o fnabs.o fneg.o fnmadd.o \
+ fnmadds.o fnmsub.o fnmsubs.o fres.o \
+ frsp.o fsel.o lfs.o frsqrte.o fsub.o \
+ fsubs.o mcrfs.o mffs.o mtfsb0.o \
+ mtfsb1.o stfiwx.o stfs.o math.o \
+ fmr.o lfd.o stfd.o
obj-$(CONFIG_SPE) += math_efp.o
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index d1ebac7..bc90162 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -14,6 +14,20 @@
#define FLOATFUNC(x) extern int x(void *, void *, void *, void *)
+/* The instructions list which may be not implemented by a hardware FPU */
+FLOATFUNC(fre);
+FLOATFUNC(frsqrtes);
+FLOATFUNC(fsqrt);
+FLOATFUNC(fsqrts);
+FLOATFUNC(mtfsf);
+FLOATFUNC(mtfsfi);
+
+#ifdef CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED
+#undef FLOATFUNC(x)
+#define FLOATFUNC(x) static inline int x(void *op1, void *op2, void *op3, \
+void *op4) { }
+#endif
+
FLOATFUNC(fadd);
FLOATFUNC(fadds);
FLOATFUNC(fdiv);
@@ -43,8 +57,6 @@ FLOATFUNC(mcrfs);
FLOATFUNC(mffs);
FLOATFUNC(mtfsb0);
FLOATFUNC(mtfsb1);
-FLOATFUNC(mtfsf);
-FLOATFUNC(mtfsfi);
FLOATFUNC(lfd);
FLOATFUNC(lfs);
@@ -59,13 +71,9 @@ FLOATFUNC(fnabs);
FLOATFUNC(fneg);
/* Optional */
-FLOATFUNC(fre);
FLOATFUNC(fres);
FLOATFUNC(frsqrte);
-FLOATFU
[PATCH 0/2] powerpc: split the match emulation into two parts
On some FSL BookE cores (such as e500mc, e5500 and e6500) there does have a FPU. But some floating point instructions are not supported by the FPU. Introduce a kernel option so we can make the kernel only support to emulate these unimplemented instructions. This will definitely reduce the footprint of the kernel. And it also trim down the kernel build time a little as predicted by Scott. Before the patch: Name Size .text 00618948 After the patch: Name Size .text 00605328 The kernel build time(I have reboot the build server before each kernel build) Before the patch: real2m29.653s user10m21.776s sys 0m32.832s After the patch: real2m27.767s user10m11.808s sys 0m32.717s Kevin Hao (2): powerpc: split the math emulation into two parts powerpc/mpc85xx: only emulate the unimplemented FP instructions on corenet64 arch/powerpc/Kconfig | 20 arch/powerpc/configs/corenet64_smp_defconfig | 1 + arch/powerpc/math-emu/Makefile | 24 arch/powerpc/math-emu/math.c | 20 ++-- 4 files changed, 47 insertions(+), 18 deletions(-) -- 1.8.1.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
force cpu:bus frequency?
Is possibile to force cpu:bus frequency ration in 2.6.33. kernel? we have a custom board based on mpc5200b. this is our boot: CPU: MPC5200B v2.2, Core v1.4 at 132 MHz Bus 132 MHz, IPB 132 MHz, PCI 66 MHz Board: Ran Controller Board I2C: 85 kHz, ready DRAM: 128 MB FLASH: 64 MB Thank you Lorenzo ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type detection
On 07/16/2013 03:46:44 AM, Zhang Haijun-B42677 wrote: Hi, scott Need I change something? I have some patches depend on this. Expect your advice. Thanks. Regards Haijun. It looks OK; go ahead and send the patches that depend on it. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/fsl-booke: Work around erratum A-006958
On 07/16/2013 03:28:06 AM, David Laight wrote: > On 07/15/2013 11:53:54 AM, Scott Wood wrote: > > On 07/15/2013 03:45:36 AM, David Laight wrote: > >> Also, if the high word changes, there is no need to loop. > >> Just return the second value with a low word of zero > >> (the returned count happened while the function was active). > > > > That would be more complicated than looping. I'm not that familiar with the ppc instructions set, but on x86 the equivalent instructions are synchronising ones - so can have performance penalties, so a few extra 'normal' instructions to avoid re-reading the timebase counter may be worth while. The core manual doesn't list any special syncronization for it, though it does take 4 cycles. The branch for the loop might also be statically predicted 'taken' leading to a branch misprediction penalty as well. The branch predictor should work fine most of the time. > That said, it's since been confirmed internally that the low word > should always be zero when this happens, so we could share the Cell > workaround code -- as long as we do something special in the timebase > sync code so that we don't get stuck if the timebase happens to be > frozen with TBL==0. This would avoid the need for scratch registers > (other than CR0). Yes - if the actual errata is that the low word is read one clock later then the high word then the only illegal value is one where the low word is zero. It's actually the timebase itself that is updated in the low word first... In that case it is sufficient to reread the counter - it can't be wrong again! ...which means, while it *probably* won't be wrong again, I'd want a statement from the hardware people that this is guaranteed if we were to rely on it. The workaround for a similar bug on Cell rereads until the lower half is non-zero, which will be fine as long as we avoid the workaround in timebase sync code (when the timebase is frozen). -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] module: ppc64 module CRC relocation fix causes perf issues
On 07/15/2013 03:47:06 AM, Benjamin Herrenschmidt wrote: On Mon, 2013-07-15 at 14:04 +1000, Anton Blanchard wrote: > Module CRCs are implemented as absolute symbols that get resolved by > a linker script. We build an intermediate .o that contains an > unresolved symbol for each CRC. genksysms parses this .o, calculates > the CRCs and writes a linker script that "resolves" the symbols to > the calc Scott, can somebody from FSL test that on 32-bit and Ack it ? Thanks ! Cheers, Ben. It boots for me on e500mc and I can insert modules. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type detection
On 07/16/2013 12:02:09 PM, Scott Wood wrote: On 07/16/2013 03:46:44 AM, Zhang Haijun-B42677 wrote: Hi, scott Need I change something? I have some patches depend on this. Expect your advice. Thanks. Regards Haijun. It looks OK; go ahead and send the patches that depend on it. Actually, could you add p2040, p4040, p4080, p5021, and any other missing ones you notice (lots of e500v2 P1/P2 chips are missing too)? At the very least p2040 and p5021 ought to be there if you're using this to check for p2041/p5040 errata, since they're basically the same chip and thus have the same errata. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] module: ppc64 module CRC relocation fix causes perf issues
On Tue, 2013-07-16 at 17:40 -0500, Scott Wood wrote: > On 07/15/2013 03:47:06 AM, Benjamin Herrenschmidt wrote: > > On Mon, 2013-07-15 at 14:04 +1000, Anton Blanchard wrote: > > > Module CRCs are implemented as absolute symbols that get resolved by > > > a linker script. We build an intermediate .o that contains an > > > unresolved symbol for each CRC. genksysms parses this .o, calculates > > > the CRCs and writes a linker script that "resolves" the symbols to > > > the calc > > > > Scott, can somebody from FSL test that on 32-bit and Ack it ? > > > > Thanks ! > > > > Cheers, > > Ben. > > It boots for me on e500mc and I can insert modules. But does perf work ? :-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] module: ppc64 module CRC relocation fix causes perf issues
On 07/16/2013 07:04:05 PM, Benjamin Herrenschmidt wrote: On Tue, 2013-07-16 at 17:40 -0500, Scott Wood wrote: > On 07/15/2013 03:47:06 AM, Benjamin Herrenschmidt wrote: > > On Mon, 2013-07-15 at 14:04 +1000, Anton Blanchard wrote: > > > Module CRCs are implemented as absolute symbols that get resolved by > > > a linker script. We build an intermediate .o that contains an > > > unresolved symbol for each CRC. genksysms parses this .o, calculates > > > the CRCs and writes a linker script that "resolves" the symbols to > > > the calc > > > > Scott, can somebody from FSL test that on 32-bit and Ack it ? > > > > Thanks ! > > > > Cheers, > > Ben. > > It boots for me on e500mc and I can insert modules. But does perf work ? :-) What specifically should I do to test it? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type detection
Of course. I'll send patch v4 to add the rest of them. Thanks. Regards Haijun. > -Original Message- > From: Wood Scott-B07421 > Sent: Wednesday, July 17, 2013 7:54 AM > To: Wood Scott-B07421 > Cc: Zhang Haijun-B42677; linux-...@vger.kernel.org; linuxppc- > d...@lists.ozlabs.org; cbouatmai...@gmail.com; c...@laptop.org; Wood Scott- > B07421; Fleming Andy-AFLEMING; Wrobel Heinz-R39252; Zhao Chenhui-B35336 > Subject: Re: [PATCH V3] powerpc/85xx: Add support for 85xx cpu type > detection > > On 07/16/2013 12:02:09 PM, Scott Wood wrote: > > On 07/16/2013 03:46:44 AM, Zhang Haijun-B42677 wrote: > >> Hi, scott > >> > >> Need I change something? > >> I have some patches depend on this. > >> Expect your advice. > >> > >> Thanks. > >> > >> Regards > >> Haijun. > > > > It looks OK; go ahead and send the patches that depend on it. > > Actually, could you add p2040, p4040, p4080, p5021, and any other missing > ones you notice (lots of e500v2 P1/P2 chips are missing too)? > > At the very least p2040 and p5021 ought to be there if you're using this > to check for p2041/p5040 errata, since they're basically the same chip > and thus have the same errata. > > -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/4 V4] powerpc/85xx: Add support for 85xx cpu type detection
Add this file to help detect cpu type in runtime. These macros will be more favorable for driver to apply errata and workaround to specified cpu type. Signed-off-by: Haijun Zhang Signed-off-by: Zhao Chenhui --- changes for v4: - Add new set of soc arch/powerpc/include/asm/mpc85xx.h | 92 ++ 1 file changed, 92 insertions(+) create mode 100644 arch/powerpc/include/asm/mpc85xx.h diff --git a/arch/powerpc/include/asm/mpc85xx.h b/arch/powerpc/include/asm/mpc85xx.h new file mode 100644 index 000..736d4ac --- /dev/null +++ b/arch/powerpc/include/asm/mpc85xx.h @@ -0,0 +1,92 @@ +/* + * MPC85xx cpu type detection + * + * Copyright 2011-2012 Freescale Semiconductor, Inc. + * + * This is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __ASM_PPC_MPC85XX_H +#define __ASM_PPC_MPC85XX_H + +#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */ +#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/ +#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/ + +/* Some parts define SVR[0:23] as the SOC version */ +#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF) /* SOC Version fields */ + +#define SVR_8533 0x803400 +#define SVR_8535 0x803701 +#define SVR_8536 0x803700 +#define SVR_8540 0x803000 +#define SVR_8541 0x807200 +#define SVR_8543 0x803200 +#define SVR_8544 0x803401 +#define SVR_8545 0x803102 +#define SVR_8547 0x803101 +#define SVR_8548 0x803100 +#define SVR_8555 0x807100 +#define SVR_8560 0x807000 +#define SVR_8567 0x807501 +#define SVR_8568 0x807500 +#define SVR_8569 0x808000 +#define SVR_8572 0x80E000 +#define SVR_P1010 0x80F100 +#define SVR_P1011 0x80E500 +#define SVR_P1012 0x80E501 +#define SVR_P1013 0x80E700 +#define SVR_P1014 0x80F101 +#define SVR_P1017 0x80F700 +#define SVR_P1020 0x80E400 +#define SVR_P1021 0x80E401 +#define SVR_P1022 0x80E600 +#define SVR_P1023 0x80F600 +#define SVR_P1024 0x80E402 +#define SVR_P1025 0x80E403 +#define SVR_P2010 0x80E300 +#define SVR_P2020 0x80E200 +#define SVR_P2040 0x821000 +#define SVR_P2041 0x821001 +#define SVR_P3041 0x821103 +#define SVR_P4040 0x820100 +#define SVR_P4080 0x82 +#define SVR_P5010 0x822100 +#define SVR_P5020 0x822000 +#define SVR_P5021 0X820500 +#define SVR_P5040 0x820400 +#define SVR_T4240 0x824000 +#define SVR_T4120 0x824001 +#define SVR_T4160 0x824100 +#define SVR_C291 0x85 +#define SVR_C292 0x850020 +#define SVR_C293 0x850030 +#define SVR_B4860 0X868000 +#define SVR_G4860 0x868001 +#define SVR_G4060 0x868003 +#define SVR_B4440 0x868100 +#define SVR_G4440 0x868101 +#define SVR_B4420 0x868102 +#define SVR_B4220 0x868103 +#define SVR_T1040 0x852000 +#define SVR_T1041 0x852001 +#define SVR_T1042 0x852002 +#define SVR_T1020 0x852100 +#define SVR_T1021 0x852101 +#define SVR_T1022 0x852102 + +#define SVR_8610 0x80A000 +#define SVR_8641 0x809000 +#define SVR_8641D 0x809001 + +#define SVR_9130 0x860001 +#define SVR_9131 0x86 +#define SVR_9132 0x861000 +#define SVR_9232 0x861400 + +#define SVR_Unknown0xFF + +#endif -- 1.8.0 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
