[PATCH] powerpc/ppc64: remove __volatile__ in get_current()
Uses of get_current() that normally get optimized away still result in
a load instruction of the current pointer in 64-bit because the inline
asm uses __volatile__. This patch removes __volatile__ so that nop-ed
uses of get_current() don't actually result in a load of the pointer.
Signed-off-by: James Yang
---
arch/powerpc/include/asm/current.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/include/asm/current.h
b/arch/powerpc/include/asm/current.h
index e2c7f06..bb250c8 100644
--- a/arch/powerpc/include/asm/current.h
+++ b/arch/powerpc/include/asm/current.h
@@ -19,7 +19,7 @@ static inline struct task_struct *get_current(void)
{
struct task_struct *task;
- __asm__ __volatile__("ld %0,%1(13)"
+ __asm__ ("ld %0,%1(13)"
: "=r" (task)
: "i" (offsetof(struct paca_struct, __current)));
--
1.7.0.4
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Re: [PATCH] powerpc: Use ibm,chip-id property to compute cpu_core_mask if available
On Fri, Aug 09, 2013 at 12:52:12PM +0530, Vasant Hegde wrote: > Paul, > > I wanted to test this patch but not able to apply this patch on top > of Linux tree. Looks like I'm missing traverse_core_siblings() > related patch. I searched in ppc mailing list and couldn't figure > out. Oops, my fault, there were actually 2 patches in that series but somehow I only posted the second one. I'll repost both patches. Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/2] powerpc: Pull out cpu_core_mask updates into a separate function
This factors out the details of updating cpu_core_mask into a separate
function, to make it easier to change how the mask is calculated later.
This makes no functional change.
Signed-off-by: Paul Mackerras
---
arch/powerpc/kernel/smp.c | 56 +++
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 38b0ba6..663cefd 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -609,11 +609,36 @@ static struct device_node *cpu_to_l2cache(int cpu)
return cache;
}
+static void traverse_core_siblings(int cpu, int add)
+{
+ struct device_node *l2_cache;
+ const struct cpumask *mask;
+ int i;
+
+ l2_cache = cpu_to_l2cache(cpu);
+ mask = add ? cpu_online_mask : cpu_present_mask;
+ for_each_cpu(i, mask) {
+ struct device_node *np = cpu_to_l2cache(i);
+ if (!np)
+ continue;
+ if (np == l2_cache) {
+ if (add) {
+ cpumask_set_cpu(cpu, cpu_core_mask(i));
+ cpumask_set_cpu(i, cpu_core_mask(cpu));
+ } else {
+ cpumask_clear_cpu(cpu, cpu_core_mask(i));
+ cpumask_clear_cpu(i, cpu_core_mask(cpu));
+ }
+ }
+ of_node_put(np);
+ }
+ of_node_put(l2_cache);
+}
+
/* Activate a secondary processor. */
void start_secondary(void *unused)
{
unsigned int cpu = smp_processor_id();
- struct device_node *l2_cache;
int i, base;
atomic_inc(&init_mm.mm_count);
@@ -652,18 +677,7 @@ void start_secondary(void *unused)
cpumask_set_cpu(cpu, cpu_core_mask(base + i));
cpumask_set_cpu(base + i, cpu_core_mask(cpu));
}
- l2_cache = cpu_to_l2cache(cpu);
- for_each_online_cpu(i) {
- struct device_node *np = cpu_to_l2cache(i);
- if (!np)
- continue;
- if (np == l2_cache) {
- cpumask_set_cpu(cpu, cpu_core_mask(i));
- cpumask_set_cpu(i, cpu_core_mask(cpu));
- }
- of_node_put(np);
- }
- of_node_put(l2_cache);
+ traverse_core_siblings(cpu, 1);
smp_wmb();
notify_cpu_starting(cpu);
@@ -719,7 +733,6 @@ int arch_sd_sibling_asym_packing(void)
#ifdef CONFIG_HOTPLUG_CPU
int __cpu_disable(void)
{
- struct device_node *l2_cache;
int cpu = smp_processor_id();
int base, i;
int err;
@@ -739,20 +752,7 @@ int __cpu_disable(void)
cpumask_clear_cpu(cpu, cpu_core_mask(base + i));
cpumask_clear_cpu(base + i, cpu_core_mask(cpu));
}
-
- l2_cache = cpu_to_l2cache(cpu);
- for_each_present_cpu(i) {
- struct device_node *np = cpu_to_l2cache(i);
- if (!np)
- continue;
- if (np == l2_cache) {
- cpumask_clear_cpu(cpu, cpu_core_mask(i));
- cpumask_clear_cpu(i, cpu_core_mask(cpu));
- }
- of_node_put(np);
- }
- of_node_put(l2_cache);
-
+ traverse_core_siblings(cpu, 0);
return 0;
}
--
1.8.3.1
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[PATCH 2/2] powerpc: Use ibm,chip-id property to compute cpu_core_mask if available
Some systems have an ibm,chip-id property in the cpu nodes in the
device tree. On these systems, we now use that to compute the
cpu_core_mask (i.e. the set of core siblings) rather than looking
at cache properties.
Signed-off-by: Paul Mackerras
---
arch/powerpc/kernel/smp.c | 47 ---
1 file changed, 44 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 663cefd..076977c 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -587,6 +587,32 @@ int cpu_first_thread_of_core(int core)
}
EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
+static void traverse_siblings_chip_id(int cpu, int add, int chipid)
+{
+ const struct cpumask *mask;
+ struct device_node *np;
+ int i, plen;
+ const int *prop;
+
+ mask = add ? cpu_online_mask : cpu_present_mask;
+ for_each_cpu(i, mask) {
+ np = of_get_cpu_node(i, NULL);
+ if (!np)
+ continue;
+ prop = of_get_property(np, "ibm,chip-id", &plen);
+ if (prop && plen == sizeof(int) && *prop == chipid) {
+ if (add) {
+ cpumask_set_cpu(cpu, cpu_core_mask(i));
+ cpumask_set_cpu(i, cpu_core_mask(cpu));
+ } else {
+ cpumask_clear_cpu(cpu, cpu_core_mask(i));
+ cpumask_clear_cpu(i, cpu_core_mask(cpu));
+ }
+ }
+ of_node_put(np);
+ }
+}
+
/* Must be called when no change can occur to cpu_present_mask,
* i.e. during cpu online or offline.
*/
@@ -611,14 +637,29 @@ static struct device_node *cpu_to_l2cache(int cpu)
static void traverse_core_siblings(int cpu, int add)
{
- struct device_node *l2_cache;
+ struct device_node *l2_cache, *np;
const struct cpumask *mask;
- int i;
+ int i, chip, plen;
+ const int *prop;
+
+ /* First see if we have ibm,chip-id properties in cpu nodes */
+ np = of_get_cpu_node(cpu, NULL);
+ if (np) {
+ chip = -1;
+ prop = of_get_property(np, "ibm,chip-id", &plen);
+ if (prop && plen == sizeof(int))
+ chip = *(int *)prop;
+ of_node_put(np);
+ if (chip >= 0) {
+ traverse_siblings_chip_id(cpu, add, chip);
+ return;
+ }
+ }
l2_cache = cpu_to_l2cache(cpu);
mask = add ? cpu_online_mask : cpu_present_mask;
for_each_cpu(i, mask) {
- struct device_node *np = cpu_to_l2cache(i);
+ np = cpu_to_l2cache(i);
if (!np)
continue;
if (np == l2_cache) {
--
1.8.3.1
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Re: [PATCH 6/6 v3] kvm: powerpc: use caching attributes as per linux pte
On Tue, 2013-08-06 at 17:01 +0530, Bharat Bhushan wrote:
> @@ -449,7 +446,16 @@ static inline int kvmppc_e500_shadow_map(struct
> kvmppc_vcpu_e500 *vcpu_e500,
> gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
> }
>
> - kvmppc_e500_ref_setup(ref, gtlbe, pfn);
> + pgdir = vcpu_e500->vcpu.arch.pgdir;
> + ptep = lookup_linux_pte(pgdir, hva, &tsize_pages);
> + if (pte_present(*ptep)) {
> + wimg = (pte_val(*ptep) >> PTE_WIMGE_SHIFT) & MAS2_WIMGE_MASK;
> + } else {
> + printk(KERN_ERR "pte not present: gfn %lx, pfn %lx\n",
> + (long)gfn, pfn);
> + return -EINVAL;
Don't let the guest spam the host kernel console by repeatedly accessing
bad mappings (even if it requires host userspace to assist by pointing a
memslot at a bad hva). This should at most be printk_ratelimited(), and
probably just pr_debug(). It should also have __func__ context.
Also, I don't see the return value getting checked (the immediate
callers check it and propogate the error, but kvmppc_mmu_map() doesn't).
We want to send a machine check to the guest if this happens (or
possibly exit to userspace since it indicates a bad memslot, not just a
guest bug). We don't want to just silently retry over and over.
Otherwise, this series looks good to me.
-Scott
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Re: Build errors on mainline kernel
Kumar Gala [ga...@kernel.crashing.org] wrote:
|
| >
| > The pre-processor output for the first WARN_ON() is:
| >
| > ---
| > ({ int __ret_warn_on = !!(nr < 0 || nr >= 32); if
(__builtin_constant_p(__ret_warn_on)) { if (__ret_warn_on) do { __asm__
__volatile__( "1:twi 31,0,0\n" ".section __bug_table,\"a\"\n" "2:\t"
".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org 2b+%3\n" ".previous\n" : :
"i" ("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i"
(((1 << 0) | ((9) << 8))), "i" (sizeof(struct bug_entry))); } while (0); } else
{ __asm__ __volatile__( "1: ""tdnei" " "" %4,0\n" ".section
__bug_table,\"a\"\n" "2:\t" ".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org
2b+%3\n" ".previous\n" : : "i"
("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i" (((1
<< 0) | ((9) << 8))), "i" (sizeof(struct bug_entry)), "r" (__ret_warn_on)); }
__builtin_expect(!!(__ret_warn_on), 0); });
| >
| > ---
| >
| >
| > Should I be doing something different to build with these configs ?
| >
|
| Hmm, that is odd.
|
| How about doing:
|
| $ make V=1
|
| so we can see what compiler flags are being passed around.
Sure.
make -f /root/tmp/linux.git/scripts/Makefile.build
obj=arch/powerpc/platforms/85xx arch/powerpc/platforms/85xx/smp.o
gcc -m64 -Wp,-MD,arch/powerpc/platforms/85xx/.smp.o.d -nostdinc -isystem
/usr/lib/gcc/ppc64-redhat-linux/4.4.6/include
-I/root/tmp/linux.git/arch/powerpc/include -Iarch/powerpc/include/generated
-I/root/tmp/linux.git/include -Iinclude
-I/root/tmp/linux.git/arch/powerpc/include/uapi
-Iarch/powerpc/include/generated/uapi -I/root/tmp/linux.git/include/uapi
-Iinclude/generated/uapi -include /root/tmp/linux.git/include/linux/kconfig.h
-I/root/tmp/linux.git/arch/powerpc/platforms/85xx -Iarch/powerpc/platforms/85xx
-D__KERNEL__ -I/root/tmp/linux.git/arch/powerpc -Iarch/powerpc -Wall -Wundef
-Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common
-Werror-implicit-function-declaration -Wno-format-security
-fno-delete-null-pointer-checks -O2 -msoft-float -pipe
-I/root/tmp/linux.git/arch/powerpc -Iarch/powerpc -mtraceback=no -mcall-aixdesc
-mcmodel=medium -mtune=power7 -mno-altivec -mno-vsx -mno-spe -mspe=no
-funit-at-a-time -fno-dwarf2-cfi-asm -mno-string -Wa,-me500 -Wframe-
larger-than=2048 -fno-stack-protector -Wno-unused-but-set-variable
-fomit-frame-pointer -Wdeclaration-after-statement -Wno-pointer-sign
-fno-strict-overflow -fconserve-stack -DCC_HAVE_ASM_GOTO
-D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(smp)"
-D"KBUILD_MODNAME=KBUILD_STR(smp)" -c -o arch/powerpc/platforms/85xx/.tmp_smp.o
/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c
{standard input}: Assembler messages:
{standard input}:244: Error: junk at end of line: `1'
make[2]: *** [arch/powerpc/platforms/85xx/smp.o] Error 1
make[1]: *** [arch/powerpc/platforms/85xx/smp.o] Error 2
make: *** [sub-make] Error 2
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Re: [v2] Enhanced support for MPC8xx/8xxx watchdog
On Thu, 2013-08-08 at 07:50 +0200, leroy christophe wrote:
> Le 26/06/2013 01:04, Scott Wood a écrit :
> > What happens if there's a race? If another CPU updates wdt_last_ping in
> > parallel, then you could see wdt_last_ping greater than the value you
> > read for jiffies. Since this is an unsigned comparison, it will fail to
> > call keepalive. You might get saved by pinging it twice as often as
> > necessary, but you shouldn't rely on that.
> Euh ... This watchdog is integrated inside the CPU, so there is no
> chance that any external CPU get access to it.
Hmm, it looks like mpc8641d (which is the only multi-core SoC among
mpc8xx/mpc83xx/mpc86xx) does not have this watchdog, even though mpc8610 does.
So pretend I said "what if you get preempted?". :-)
> >> + mpc8xxx_wdt_keepalive();
> >> + /* We're pinging it twice faster than needed, to be sure. */
> >> + mod_timer(&wdt_timer, jiffies + HZ * hw_timo_sec / 2);
> >> + }
> >> +}
> >> +
> >> +static void mpc8xxx_wdt_sw_keepalive(void)
> >> +{
> >> + wdt_last_ping = jiffies;
> >> + mpc8xxx_wdt_timer_ping(0);
> >> }
> > This isn't new with this patch, but it looks like
> > mpc8xxx_wdt_keepalive() can be called either from timer context, or with
> > interrupts enabled... yet it uses a bare spin_lock() rather than an
> > irq-safe version. This should be fixed.
> Ok, I'll propose another patch for that. Indeed, is the spin_lock needed
> at all ? If we get two writes interleaved, it will make it anyway.
I suppose... I don't like relying on things like that, though.
-Scott
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Re: Build errors on mainline kernel
On Aug 9, 2013, at 1:24 PM, Sukadev Bhattiprolu wrote:
>
> I am tryng to compile clean mainline kernel with a few different config files
> and running into errors with some configs.
>
> I am building on RHEL6.3 with following binaries:
>
> gcc (GCC) 4.4.6 20120305 (Red Hat 4.4.6-4)
> GNU ld version 2.20.51.0.2-5.34.el6 20100205
> binutils-2.20.51.0.2-5.34.el6.ppc64
> binutils-devel-2.20.51.0.2-5.34.el6.ppc64
>
> I am getting the error with several files and configs, but other configs
> (eg: ppc64_defconfig, pmac32_defconfig) build fine.
>
> For instance, with latest mainline kernel (commit 6c2580c) and
> ppc64_defconfig, I get:
>
> make O=linux-obj mrproper
> make O=linux-obj ppc64e_defconfig
> make O=linux-obj arch/powerpc/platforms/85xx/smp.o
> ...
>
> CC arch/powerpc/platforms/85xx/smp.o
> {standard input}: Assembler messages:
> {standard input}:240: Error: junk at end of line: `1'
> make[2]: *** [arch/powerpc/platforms/85xx/smp.o] Error 1
> make[1]: *** [arch/powerpc/platforms/85xx/smp.o] Error 2
>
> Not sure if 240 is a line number in smp.c, but looking through the function
> containing line 240, I was able to compile the smp.c after commenting out
> the two WARN_ON() messages.
>
> diff --git a/arch/powerpc/platforms/85xx/smp.c
> b/arch/powerpc/platforms/85xx/smp
> index 5ced4f5..9705850 100644
> --- a/arch/powerpc/platforms/85xx/smp.c
> +++ b/arch/powerpc/platforms/85xx/smp.c
> @@ -151,8 +151,10 @@ static int smp_85xx_kick_cpu(int nr)
>int ioremappable;
>int ret = 0;
>
> +#if 0
>WARN_ON(nr < 0 || nr >= NR_CPUS);
>WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS);
> +#endif
>
>pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
>
> ---
>
> The pre-processor output for the first WARN_ON() is:
>
> ---
> ({ int __ret_warn_on = !!(nr < 0 || nr >= 32); if
> (__builtin_constant_p(__ret_warn_on)) { if (__ret_warn_on) do { __asm__
> __volatile__( "1:twi 31,0,0\n" ".section __bug_table,\"a\"\n" "2:\t"
> ".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org 2b+%3\n" ".previous\n" : :
> "i" ("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i"
> (((1 << 0) | ((9) << 8))), "i" (sizeof(struct bug_entry))); } while (0); }
> else { __asm__ __volatile__( "1: ""tdnei" " "" %4,0\n" ".section
> __bug_table,\"a\"\n" "2:\t" ".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org
> 2b+%3\n" ".previous\n" : : "i"
> ("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i"
> (((1 << 0) | ((9) << 8))), "i" (sizeof(struct bug_entry)), "r"
> (__ret_warn_on)); } __builtin_expect(!!(__ret_warn_on), 0); });
>
> ---
>
>
> Should I be doing something different to build with these configs ?
>
Hmm, that is odd.
How about doing:
$ make V=1
so we can see what compiler flags are being passed around.
- k
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[PATCHv9 02/10] PCI: remove ARCH_SUPPORTS_MSI kconfig option
Now that we have weak versions for each of the PCI MSI architecture functions, we can actually build the MSI support for all platforms, regardless of whether they provide or not architecture-specific versions of those functions. For this reason, the ARCH_SUPPORTS_MSI hidden kconfig boolean becomes useless, and this patch gets rid of it. Signed-off-by: Thomas Petazzoni Acked-by: Bjorn Helgaas Acked-by: Benjamin Herrenschmidt Tested-by: Daniel Price Tested-by: Thierry Reding Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: linuxppc-dev@lists.ozlabs.org Cc: Martin Schwidefsky Cc: Heiko Carstens Cc: linux...@de.ibm.com Cc: linux-s...@vger.kernel.org Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: x...@kernel.org Cc: Russell King Cc: Tony Luck Cc: Fenghua Yu Cc: linux-i...@vger.kernel.org Cc: Ralf Baechle Cc: linux-m...@linux-mips.org Cc: David S. Miller Cc: sparcli...@vger.kernel.org Cc: Chris Metcalf --- arch/arm/Kconfig | 1 - arch/ia64/Kconfig| 1 - arch/mips/Kconfig| 2 -- arch/powerpc/Kconfig | 1 - arch/s390/Kconfig| 1 - arch/sparc/Kconfig | 1 - arch/tile/Kconfig| 1 - arch/x86/Kconfig | 1 - drivers/pci/Kconfig | 4 9 files changed, 13 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 37c0f4e..41b6c96 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -441,7 +441,6 @@ config ARCH_NETX config ARCH_IOP13XX bool "IOP13xx-based" depends on MMU - select ARCH_SUPPORTS_MSI select CPU_XSC3 select NEED_MACH_MEMORY_H select NEED_RET_TO_USER diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index 5a768ad..098602b 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -9,7 +9,6 @@ config IA64 select PCI if (!IA64_HP_SIM) select ACPI if (!IA64_HP_SIM) select PM if (!IA64_HP_SIM) - select ARCH_SUPPORTS_MSI select HAVE_UNSTABLE_SCHED_CLOCK select HAVE_IDE select HAVE_OPROFILE diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c3abed3..01b5f5a 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -726,7 +726,6 @@ config CAVIUM_OCTEON_SOC select SYS_HAS_CPU_CAVIUM_OCTEON select SWAP_IO_SPACE select HW_HAS_PCI - select ARCH_SUPPORTS_MSI select ZONE_DMA32 select USB_ARCH_HAS_OHCI select USB_ARCH_HAS_EHCI @@ -762,7 +761,6 @@ config NLM_XLR_BOARD select CEVT_R4K select CSRC_R4K select IRQ_CPU - select ARCH_SUPPORTS_MSI select ZONE_DMA32 if 64BIT select SYNC_R4K select SYS_HAS_EARLY_PRINTK diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3bf72cd..183a165 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig @@ -727,7 +727,6 @@ config PCI default y if !40x && !CPM2 && !8xx && !PPC_83xx \ && !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON default PCI_QSPAN if !4xx && !CPM2 && 8xx - select ARCH_SUPPORTS_MSI select GENERIC_PCI_IOMAP help Find out whether your system includes a PCI bus. PCI is the name of diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig index 22f75b5..e9982a3 100644 --- a/arch/s390/Kconfig +++ b/arch/s390/Kconfig @@ -428,7 +428,6 @@ menuconfig PCI bool "PCI support" default n depends on 64BIT - select ARCH_SUPPORTS_MSI select PCI_MSI help Enable PCI support. diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index a00cbd3..1570ad2 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -52,7 +52,6 @@ config SPARC32 config SPARC64 def_bool 64BIT - select ARCH_SUPPORTS_MSI select HAVE_FUNCTION_TRACER select HAVE_FUNCTION_GRAPH_TRACER select HAVE_FUNCTION_GRAPH_FP_TEST diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig index 24565a7..74dff90 100644 --- a/arch/tile/Kconfig +++ b/arch/tile/Kconfig @@ -380,7 +380,6 @@ config PCI select PCI_DOMAINS select GENERIC_PCI_IOMAP select TILE_GXIO_TRIO if TILEGX - select ARCH_SUPPORTS_MSI if TILEGX select PCI_MSI if TILEGX ---help--- Enable PCI root complex support, so PCIe endpoint devices can diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index b32ebf9..5db62ef 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -2014,7 +2014,6 @@ menu "Bus options (PCI etc.)" config PCI bool "PCI support" default y - select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC) ---help--- Find out whether you have a PCI motherboard. PCI is the name of a bus system, i.e. the way the CPU talks to the other stuff inside diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 81944fb..b6a99f7 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -1,13 +1,9 @@ # # PCI configuration # -config ARCH_SUPPORTS_MSI - bool - config PCI_MSI bool "Message Signaled Interrupts (M
[PATCHv9 01/10] PCI: use weak functions for MSI arch-specific functions
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.
Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.
Signed-off-by: Thomas Petazzoni
Acked-by: Bjorn Helgaas
Acked-by: Benjamin Herrenschmidt
Tested-by: Daniel Price
Tested-by: Thierry Reding
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky
Cc: Heiko Carstens
Cc: linux...@de.ibm.com
Cc: linux-s...@vger.kernel.org
Cc: Thomas Gleixner
Cc: Ingo Molnar
Cc: H. Peter Anvin
Cc: x...@kernel.org
Cc: Russell King
Cc: Tony Luck
Cc: Fenghua Yu
Cc: linux-i...@vger.kernel.org
Cc: Ralf Baechle
Cc: linux-m...@linux-mips.org
Cc: David S. Miller
Cc: sparcli...@vger.kernel.org
Cc: Chris Metcalf
---
arch/mips/include/asm/pci.h| 5 -
arch/powerpc/include/asm/pci.h | 5 -
arch/s390/include/asm/pci.h| 4
arch/x86/include/asm/pci.h | 30 --
arch/x86/kernel/x86_init.c | 24 +
drivers/pci/msi.c | 48 +-
include/linux/msi.h| 8 ++-
7 files changed, 55 insertions(+), 69 deletions(-)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index fa8e0aa..f194c08 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev
*dev, int channel)
return channel ? 15 : 14;
}
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-/* MSI arch hook for OCTEON */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#endif
-
extern char * (*pcibios_plat_setup)(char *str);
#ifdef CONFIG_OF
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 6653f27..95145a1 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-#define arch_msi_check_device arch_msi_check_device
-
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index 6e577ba..262b91b 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
int pci_domain_nr(struct pci_bus *);
int pci_proc_domain(struct pci_bus *);
-/* MSI arch hooks */
-#define arch_setup_msi_irqsarch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-
#define ZPCI_BUS_NR0 /* default bus number */
#define ZPCI_DEVFN 0 /* default device number */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d9e9e6c..7d74432 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
extern void pci_iommu_alloc(void);
#ifdef CONFIG_PCI_MSI
-/* MSI arch specific hooks */
-static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- return x86_msi.setup_msi_irqs(dev, nvec, type);
-}
-
-static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.teardown_msi_irqs(dev);
-}
-
-static inline void x86_teardown_msi_irq(unsigned int irq)
-{
- x86_msi.teardown_msi_irq(irq);
-}
-static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
-{
- x86_msi.restore_msi_irqs(dev, irq);
-}
-#define arch_setup_msi_irqs x86_setup_msi_irqs
-#define arch_teardown_msi_irqs x86_teardown_msi_irqs
-#define arch_teardown_msi_irq x86_teardown_msi_irq
-#define arch_restore_msi_irqs x86_restore_msi_irqs
/* implemented in arch/x86/kernel/apic/io_apic. */
struct msi_desc;
int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
@@ -130,16 +107,9 @@ void native_teardown_msi_irq(unsigned int irq);
void native_restore_msi_irqs(struct pci_dev *dev, int irq);
int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
unsigned int irq_base, unsigned int irq_offset);
-/* default to the implementation in drivers/lib/msi.c */
-#define HAVE_DEFAULT_MSI_TEARDOWN_I
Build errors on mainline kernel
I am tryng to compile clean mainline kernel with a few different config files
and running into errors with some configs.
I am building on RHEL6.3 with following binaries:
gcc (GCC) 4.4.6 20120305 (Red Hat 4.4.6-4)
GNU ld version 2.20.51.0.2-5.34.el6 20100205
binutils-2.20.51.0.2-5.34.el6.ppc64
binutils-devel-2.20.51.0.2-5.34.el6.ppc64
I am getting the error with several files and configs, but other configs
(eg: ppc64_defconfig, pmac32_defconfig) build fine.
For instance, with latest mainline kernel (commit 6c2580c) and ppc64_defconfig,
I get:
make O=linux-obj mrproper
make O=linux-obj ppc64e_defconfig
make O=linux-obj arch/powerpc/platforms/85xx/smp.o
...
CC arch/powerpc/platforms/85xx/smp.o
{standard input}: Assembler messages:
{standard input}:240: Error: junk at end of line: `1'
make[2]: *** [arch/powerpc/platforms/85xx/smp.o] Error 1
make[1]: *** [arch/powerpc/platforms/85xx/smp.o] Error 2
Not sure if 240 is a line number in smp.c, but looking through the function
containing line 240, I was able to compile the smp.c after commenting out
the two WARN_ON() messages.
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp
index 5ced4f5..9705850 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -151,8 +151,10 @@ static int smp_85xx_kick_cpu(int nr)
int ioremappable;
int ret = 0;
+#if 0
WARN_ON(nr < 0 || nr >= NR_CPUS);
WARN_ON(hw_cpu < 0 || hw_cpu >= NR_CPUS);
+#endif
pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
---
The pre-processor output for the first WARN_ON() is:
---
({ int __ret_warn_on = !!(nr < 0 || nr >= 32); if
(__builtin_constant_p(__ret_warn_on)) { if (__ret_warn_on) do { __asm__
__volatile__( "1:twi 31,0,0\n" ".section __bug_table,\"a\"\n" "2:\t"
".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org 2b+%3\n" ".previous\n" : :
"i" ("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i"
(((1 << 0) | ((9) << 8))), "i" (sizeof(struct bug_entry))); } while (0); } else
{ __asm__ __volatile__( "1: ""tdnei" " "" %4,0\n" ".section
__bug_table,\"a\"\n" "2:\t" ".llong" " " "1b, %0\n" "\t.short %1, %2\n" ".org
2b+%3\n" ".previous\n" : : "i"
("/root/tmp/linux.git/arch/powerpc/platforms/85xx/smp.c"), "i" (154), "i" (((1
<< 0) | ((9) << 8))), "i" (sizeof(struct bug_entry)), "r" (__ret_warn_on)); }
__builtin_expect(!!(__ret_warn_on), 0); });
---
Should I be doing something different to build with these configs ?
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Re: Pull request: scottwood/linux.git next
On Fri, 2013-08-09 at 09:43 -0500, Kumar Gala wrote: > On Aug 9, 2013, at 1:03 AM, Benjamin Herrenschmidt wrote: > > > On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote: > >> The following changes since commit > >> 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b: > >> > >> Linux 3.11-rc2 (2013-07-21 12:05:29 -0700) > >> > >> are available in the git repository at: > > > > Next time, put a little blurb at the head of the pull request giving a > > rough highlight, like I do when I send a pull request to Linus. > > > > Thanks ! > > > > Cheers, > > Ben. Oh, sorry -- forgot. Highlights include: - Setting compilation flags properly for the chosen e500 target -- among other things, on 64-bit e500 builds this will prevent the assembler from replacing lwsync with sync, which caused a significant slowdown on certain workloads. - e6500 perf support - MPIC MSI support for t4240/b4860-era chips - p1020rdb-pd board support > Also, I think we should pull a few of the commits in here out and submit for > 3.11 > > powerpc/msi: Fix compile error on mpc83xx This is poorly worded -- there is no compilation error unless you apply a subsequent patch without this one. A better subject would have been "powerpc/mpic: allow fsl_mpic_primary_get_version without CONFIG_MPIC". > powerpc/fsl_msi: fix error return code in fsl_of_msi_probe() This one doesn't seem that critical... > powerpc/pci: fix PCI-e check link issue I agree on this one. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/2] Register bootmem pages at boot on powerpc
Register bootmem pages at boot time on powerpc.
Previous commit 46723bfa540... introduced a new config option,
HAVE_BOOTMEM_INFO_NODE, to enable registering of bootmem pages. As a result
the bootmem pages for powerpc are not registered since we do not define this.
This causes a BUG_ON in put_page_bootmem() when trying to hotplug remove
memory on powerpc.
This patch resolves this by doing three things;
- define HAVE_BOOTMEM_INFO_NODE for powerpc
- Add a routine to register bootmem via register_page_bootmem_info_node()
in mem_init().
- Stub out the register_page_bootmem_memmap() routine needed for building
with SPARSE_VMEMMAP enabled.
Signed-off-by: Nathan Fontenot
---
arch/powerpc/mm/init_64.c |6 ++
arch/powerpc/mm/mem.c |9 +
mm/Kconfig|2 +-
3 files changed, 16 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/mm/init_64.c
===
--- powerpc.orig/arch/powerpc/mm/init_64.c
+++ powerpc/arch/powerpc/mm/init_64.c
@@ -300,5 +300,11 @@ void vmemmap_free(unsigned long start, u
{
}
+void register_page_bootmem_memmap(unsigned long section_nr,
+ struct page *start_page, unsigned long size)
+{
+ WARN_ONCE(1, KERN_INFO
+ "Sparse Vmemmap not fully supported for bootmem info
nodes\n");
+}
#endif /* CONFIG_SPARSEMEM_VMEMMAP */
Index: powerpc/arch/powerpc/mm/mem.c
===
--- powerpc.orig/arch/powerpc/mm/mem.c
+++ powerpc/arch/powerpc/mm/mem.c
@@ -297,12 +297,21 @@ void __init paging_init(void)
}
#endif /* ! CONFIG_NEED_MULTIPLE_NODES */
+static void __init register_page_bootmem_info(void)
+{
+ int i;
+
+ for_each_online_node(i)
+ register_page_bootmem_info_node(NODE_DATA(i));
+}
+
void __init mem_init(void)
{
#ifdef CONFIG_SWIOTLB
swiotlb_init(0);
#endif
+ register_page_bootmem_info();
high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
set_max_mapnr(max_pfn);
free_all_bootmem();
Index: powerpc/mm/Kconfig
===
--- powerpc.orig/mm/Kconfig
+++ powerpc/mm/Kconfig
@@ -183,7 +183,7 @@ config MEMORY_HOTPLUG_SPARSE
config MEMORY_HOTREMOVE
bool "Allow for memory hot remove"
select MEMORY_ISOLATION
- select HAVE_BOOTMEM_INFO_NODE if X86_64
+ select HAVE_BOOTMEM_INFO_NODE if (X86_64 || PPC64)
depends on MEMORY_HOTPLUG && ARCH_ENABLE_MEMORY_HOTREMOVE
depends on MIGRATION
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[PATCH 1/2] Mark memory resources as busy
Memory resources should be marked as busy. If memory resources are not marked as busy they do not get released during hotplug memory remove. This seems a bit counter intuitive but the core kernel resource code checks for the IORESOURCE_BUSY flag before releasing the resource. Signed-off-by: Nathan Fontenot --- arch/powerpc/mm/mem.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Index: powerpc/arch/powerpc/mm/mem.c === --- powerpc.orig/arch/powerpc/mm/mem.c +++ powerpc/arch/powerpc/mm/mem.c @@ -514,7 +514,7 @@ static int add_system_ram_resources(void res->name = "System RAM"; res->start = base; res->end = base + size - 1; - res->flags = IORESOURCE_MEM; + res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; WARN_ON(request_resource(&iomem_resource, res) < 0); } } ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 0/2] Correct memory hotplug remove
Memory hotplug on Power is currently broken, these two patches correct the issues needed to get memory hotplug working again. This update marks memory resources that are added at boot time are also marked as busy. It sounds a bit counter intuitive but the core mm code will not free memory resources if they are not marked as busy. This also ensures that bootmem memory is is registered at boot time. A previous commit (46723bfa540...) that enabled memory hotplug remove with SPARSE_VMEMMAP enabled broke this on Power. Additional patches to follow to correct the current memory hotplug implementation on Power. Nathan Fontenot --- arch/powerpc/mm/mem.c |2 +- powerpc/arch/powerpc/mm/init_64.c |6 ++ powerpc/arch/powerpc/mm/mem.c |9 + powerpc/mm/Kconfig|2 +- 4 files changed, 17 insertions(+), 2 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/3 V2] mmc:core: parse voltage from device-tree
On Jul 31, 2013, at 1:25 AM, Haijun Zhang wrote: > Add function to support get voltage from device-tree. > If there are voltage-range specified in device-tree node, this function > will parse it and return the avail voltage mask. > > Signed-off-by: Haijun Zhang > --- > changes for v2: > - Update the parameters of function > > drivers/mmc/core/core.c | 46 ++ > include/linux/mmc/core.h | 1 + > 2 files changed, 47 insertions(+) There should be a device tree binding spec update to go with this patch series. - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Pull request: scottwood/linux.git next
On Aug 9, 2013, at 1:03 AM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
>> The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
>>
>> Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
>>
>> are available in the git repository at:
>
> Next time, put a little blurb at the head of the pull request giving a
> rough highlight, like I do when I send a pull request to Linus.
>
> Thanks !
>
> Cheers,
> Ben.
Also, I think we should pull a few of the commits in here out and submit for
3.11
powerpc/msi: Fix compile error on mpc83xx
powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()
powerpc/pci: fix PCI-e check link issue
- k
>
>> git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next
>>
>> for you to fetch changes up to c8db32c8669f7de05b820ee4934926405af52188:
>>
>> powerpc/e500: Update compilation flags with core specific options
>> (2013-08-07 18:49:44 -0500)
>>
>>
>> Catalin Udma (2):
>> powerpc/perf: increase the perf HW events to 6
>> powerpc/e500: Update compilation flags with core specific options
>>
>> Dongsheng Wang (1):
>> powerpc/mpc85xx: invalidate TLB after hibernation resume
>>
>> Haijun.Zhang (2):
>> powerpc/85xx: add P1020RDB-PD platform support
>> powerpc/85xx: add the P1020RDB-PD DTS support
>>
>> Hongtao Jia (3):
>> powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h
>> powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
>> powerpc/msi: Fix compile error on mpc83xx
>>
>> Ian Campbell (1):
>> powerpc/fsl-booke: Rename b4qds.dts -> b4qds.dtsi.
>>
>> Kevin Hao (3):
>> powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds
>> board
>> powerpc/fsl-pci: fix the unreachable warning message
>> powerpc/fsl-pci: enable SWIOTLB in function setup_pci_atmu
>>
>> Laurentiu TUDOR (1):
>> powerpc/85xx: Move ePAPR paravirt initialization earlier
>>
>> Lijun Pan (2):
>> powerpc/perf: correct typos in counter enumeration
>> powerpc/perf: add 2 additional performance monitor counters for e6500
>> core
>>
>> Minghuan Lian (3):
>> powerpc/dts: update MSI bindings doc for MPIC v4.3
>> powerpc/dts: add MPIC v4.3 dts node
>> powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3
>>
>> Priyanka Jain (1):
>> powerpc/perf: Add e6500 PMU driver
>>
>> Wei Yongjun (1):
>> powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()
>>
>> Yuanquan Chen (1):
>> powerpc/pci: fix PCI-e check link issue
>>
>> Zhenhua Luo (1):
>> powerpc/fsl: Enable CONFIG_DEVTMPFS_MOUNT so /dev can be mounted
>> correctly
>>
>> .../devicetree/bindings/powerpc/fsl/msi-pic.txt| 53 +++-
>> arch/powerpc/Makefile | 18 +-
>> arch/powerpc/boot/dts/b4420qds.dts | 2 +-
>> arch/powerpc/boot/dts/b4860qds.dts | 2 +-
>> arch/powerpc/boot/dts/{b4qds.dts => b4qds.dtsi}| 0
>> arch/powerpc/boot/dts/fsl/b4si-post.dtsi | 2 +-
>> arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi | 149 +++
>> arch/powerpc/boot/dts/fsl/t4240si-post.dtsi| 2 +-
>> arch/powerpc/boot/dts/p1020rdb-pd.dts | 280
>> +
>> arch/powerpc/configs/85xx/p1023rds_defconfig | 1 +
>> arch/powerpc/configs/corenet32_smp_defconfig | 1 +
>> arch/powerpc/configs/corenet64_smp_defconfig | 1 +
>> arch/powerpc/configs/mpc83xx_defconfig | 1 +
>> arch/powerpc/configs/mpc85xx_defconfig | 1 +
>> arch/powerpc/configs/mpc85xx_smp_defconfig | 1 +
>> arch/powerpc/include/asm/epapr_hcalls.h| 6 +
>> arch/powerpc/include/asm/mpic.h| 7 +
>> arch/powerpc/include/asm/perf_event_fsl_emb.h | 2 +-
>> arch/powerpc/include/asm/ppc-opcode.h | 47
>> arch/powerpc/include/asm/reg_fsl_emb.h | 24 +-
>> arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
>> arch/powerpc/kernel/cputable.c | 2 +-
>> arch/powerpc/kernel/epapr_paravirt.c | 28 ++-
>> arch/powerpc/kernel/setup_32.c | 4 +-
>> arch/powerpc/kernel/setup_64.c | 3 +
>> arch/powerpc/kernel/swsusp_booke.S | 8 +
>> arch/powerpc/kernel/traps.c| 3 +
>> arch/powerpc/kvm/emulate.c | 45 +---
>> arch/powerpc/oprofile/op_model_fsl_emb.c | 30 +++
>> arch/powerpc/perf/Makefile | 2 +-
>> arch/powerpc/perf/core-fsl-emb.c | 30 +++
>> arch/powerpc/perf/e6500-pmu.c | 121 +
>> arch/powerpc/platforms/85xx/corenet_ds.c | 6 -
>> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 22 ++
>> arch/powerpc/sysdev/fsl_msi.c
Re: [RFC] powerpc: put the common parts of the ppc64*defconfigs in a Kconfig file
On Aug 9, 2013, at 1:24 AM, Stephen Rothwell wrote: > We cannot put the unsetting of config options in the Kconfig file, nor > the integer or string options. > > I checked that after this we get the same .config files generated (except > for the addition of the new PPC64_DEFCONFIG* config options. > > Any thoughts? > --- > arch/powerpc/Kconfig | 2 + > arch/powerpc/configs/Kconfig | 295 + > arch/powerpc/configs/ppc64_defconfig | 301 +- > arch/powerpc/configs/ppc64e_defconfig | 297 + > 4 files changed, 302 insertions(+), 593 deletions(-) > create mode 100644 arch/powerpc/configs/Kconfig Am I missing something here, isn't this a bit of a maintenance pain if symbol names change? Also, how much of a benefit is this? - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 00/11] Add compression support to pstore
On Thursday 08 August 2013 09:38 AM, Aruna Balakrishnaiah wrote: Hi Tony, On Thursday 08 August 2013 03:52 AM, Tony Luck wrote: On Tue, Aug 6, 2013 at 10:35 PM, Tony Luck wrote: ERST is at the whim of the BIOS writer (the ACPI standard doesn't provide any suggestions on record sizes). My systems support ~6K record size. Off by a little - 7896 bytes on my current machine. efivars has, IIRC, a 1k limit coded in the Linux back end. My memory was correct for this one. Adding a little tracing to pstore_getrecords() I see this: pstore: inflated 3880 bytes compressed to 17459 bytes pstore: inflated 2567 bytes compressed to 17531 bytes pstore: inflated 4018 bytes compressed to 17488 bytes Which isn't at all what I expected. The ERST backend advertised a bufsize of 7896, and I have the default kmsg_bytes of 10240. So on my forced panic the code decided to create a three part pstore dump. The sum of the pieces is close to, but a little over the target of 10K. But I don't understand why the compressed sizes are so much smaller that the ERST backend block size. The sizes of compressed text depends on the nature of uncompressed data that is captured from kmsg_dump, considering the worst case of plain text based on experiments 45% was thecompression achieved. So we chose a buffer of size psinfo->bufsize * 100/45. If the uncompressed data captured was more of plain text nature then it would take up size close to ERST backend block size. Thats the reason you see compressed data of 2.5k to 4.0k. 2.5k would have more repeated occurrences than 4.0k. The sum of 3 pstore records should not have exceeded kmsg_bytes. Is it after adding total_len in the fix patch? Will take a look at it. The sum of first two records is less than kmsg_bytes, so it captures the 3rd record. Only after 3rd record is captured and written total is evaluated against kmsg_bytes when itexceeds the limit it stops capturing the next one. This shall happen even without compression right? If total is checked before write this can be avoided. - Aruna The uncompressed sizes appear to be close to constant. The compression ratios vary from 14% to 23% Why do we get three small parts instead of two bigger ones close the the 7896 ERST bufsize? Same explanation as given above. -Tony ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[git pull] Please pull powerpc.git merge branch
Hi Linus ! Here are some powerpc fixes for you. This includes small series from Michael Neuling to fix a couple of nasty remaining problems with the new Power8 support, also targeted at stable 3.10, without which some new userspace accessible registers aren't properly context switched, and in some case, can be clobbered by the user of transactional memory. Along with that, a few slightly more minor things, such as a missing Kconfig option to enable handling of denorm exceptions when not running under a hypervisor (or userspace will randomly crash when hitting denorms with the vector unit), some nasty bugs in the new pstore oops code, and other simple bug fixes worth having in now. Note: I picked up the two powerpc KVM fixes as Alex Graf asked me to handle KVM bits while he is on vacation. However I'll let him decide whether they should go to -stable or not when he is back. Cheers, Ben. The following changes since commit b7bc9e7d808ba55729bd263b0210cda36965be32: Merge tag 'trace-fixes-3.11-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace (2013-08-07 13:01:30 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge for you to fetch changes up to 28e61cc466d8daace4b0f04ba2b83e0bd68f5832: powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs (2013-08-09 18:07:12 +1000) Anton Blanchard (1): powerpc: On POWERNV enable PPC_DENORMALISATION by default Aruna Balakrishnaiah (2): powerpc/pseries: Fix buffer overflow when reading from pstore powerpc/pseries: Add backward compatibilty to read old kernel oops-log Chen Gang (1): powerpc/kvm: Add signed type cast for comparation Michael Neuling (5): powerpc: Fix hypervisor facility unavaliable vector number powerpc: Rework setting up H/FSCR bit definitions powerpc: Fix context switch DSCR on POWER8 powerpc: Save the TAR register earlier powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs Mike Qiu (1): powerpc/eeh: Add missing procfs entry for PowerNV Thadeu Lima de Souza Cascardo (1): powerpc/kvm/book3s_pr: Return appropriate error when allocation fails arch/powerpc/Kconfig | 2 +- arch/powerpc/include/asm/processor.h | 4 ++ arch/powerpc/include/asm/reg.h | 31 - arch/powerpc/include/asm/switch_to.h | 9 arch/powerpc/kernel/asm-offsets.c | 3 ++ arch/powerpc/kernel/eeh.c | 2 +- arch/powerpc/kernel/entry_64.S | 36 ++- arch/powerpc/kernel/exceptions-64s.S | 5 ++- arch/powerpc/kernel/process.c | 10 + arch/powerpc/kernel/tm.S | 20 + arch/powerpc/kernel/traps.c| 58 ++-- arch/powerpc/kvm/book3s_hv.c | 4 +- arch/powerpc/kvm/book3s_pr.c | 5 ++- arch/powerpc/platforms/pseries/nvram.c | 80 +++--- 14 files changed, 170 insertions(+), 99 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc/eeh: powerpc/eeh: Fix undefined variable
On Wed, 2013-08-07 at 02:01 -0400, Mike Qiu wrote:
> 'pe_no' hasn't been defined, it should be an typo error,
> it should be 'frozen_pe_no'.
For some reason I can't find v3 of this in my mailbox, but it's
on patchwork so I tried applying it and it breaks the build
because %d doesn't work for a u64. Have you even tested it ?
Ben.
> Also '__func__' has missed iz IODA_EEH_DBG(),
>
> For safety reasons, use pr_info() directly, instead
> of use IODA_EEH_DBG()
>
> Signed-off-by: Mike Qiu
> ---
> arch/powerpc/platforms/powernv/eeh-ioda.c | 22 --
> 1 file changed, 8 insertions(+), 14 deletions(-)
>
> diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c
> b/arch/powerpc/platforms/powernv/eeh-ioda.c
> index 0cd1c4a..8bc19c8 100644
> --- a/arch/powerpc/platforms/powernv/eeh-ioda.c
> +++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
> @@ -36,13 +36,6 @@
> #include "powernv.h"
> #include "pci.h"
>
> -/* Debugging option */
> -#ifdef IODA_EEH_DBG_ON
> -#define IODA_EEH_DBG(args...)pr_info(args)
> -#else
> -#define IODA_EEH_DBG(args...)
> -#endif
> -
> static char *hub_diag = NULL;
> static int ioda_eeh_nb_init = 0;
>
> @@ -823,17 +816,17 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
>
> /* If OPAL API returns error, we needn't proceed */
> if (rc != OPAL_SUCCESS) {
> - IODA_EEH_DBG("%s: Invalid return value on "
> - "PHB#%x (0x%lx) from opal_pci_next_error",
> - __func__, hose->global_number, rc);
> + pr_info("%s: Invalid return value on "
> + "PHB#%x (0x%lx) from opal_pci_next_error",
> + __func__, hose->global_number, rc);
> continue;
> }
>
> /* If the PHB doesn't have error, stop processing */
> if (err_type == OPAL_EEH_NO_ERROR ||
> severity == OPAL_EEH_SEV_NO_ERROR) {
> - IODA_EEH_DBG("%s: No error found on PHB#%x\n",
> - __func__, hose->global_number);
> + pr_info("%s: No error found on PHB#%x\n",
> + __func__, hose->global_number);
> continue;
> }
>
> @@ -842,8 +835,9 @@ static int ioda_eeh_next_error(struct eeh_pe **pe)
>* highest priority reported upon multiple errors on the
>* specific PHB.
>*/
> - IODA_EEH_DBG("%s: Error (%d, %d, %d) on PHB#%x\n",
> - err_type, severity, pe_no, hose->global_number);
> + pr_info("%s: Error (%d, %d, %d) on PHB#%x\n",
> + __func__, err_type, severity,
> + frozen_pe_no, hose->global_number);
> switch (err_type) {
> case OPAL_EEH_IOC_ERROR:
> if (severity == OPAL_EEH_SEV_IOC_DEAD) {
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[PATCH 5/5] powerpc/tm: Fix context switching TAR, PPR and DSCR SPRs
If a transaction is rolled back, the Target Address Register (TAR), Processor
Priority Register (PPR) and Data Stream Control Register (DSCR) should be
restored to the checkpointed values before the transaction began. Any changes
to these SPRs inside the transaction should not be visible in the abort
handler.
Currently Linux doesn't save or restore the checkpointed TAR, PPR or DSCR. If
we preempt a processes inside a transaction which has modified any of these, on
process restore, that same transaction may be aborted we but we won't see the
checkpointed versions of these SPRs.
This adds checkpointed versions of these SPRs to the thread_struct and adds the
save/restore of these three SPRs to the treclaim/trechkpt code.
Without this if any of these SPRs are modified during a transaction, users may
incorrectly see a speculated SPR value even if the transaction is aborted.
Signed-off-by: Michael Neuling
Cc: [v3.10]
---
arch/powerpc/include/asm/processor.h | 4
arch/powerpc/kernel/asm-offsets.c| 3 +++
arch/powerpc/kernel/tm.S | 20
3 files changed, 27 insertions(+)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 47a35b0..e378ccc 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -247,6 +247,10 @@ struct thread_struct {
unsigned long tm_orig_msr;/* Thread's MSR on ctx switch */
struct pt_regs ckpt_regs; /* Checkpointed registers */
+ unsigned long tm_tar;
+ unsigned long tm_ppr;
+ unsigned long tm_dscr;
+
/*
* Transactional FP and VSX 0-31 register set.
* NOTE: the sense of these is the opposite of the integer ckpt_regs!
diff --git a/arch/powerpc/kernel/asm-offsets.c
b/arch/powerpc/kernel/asm-offsets.c
index c7e8afc..8207459 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -138,6 +138,9 @@ int main(void)
DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
+ DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
+ DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
+ DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
DEFINE(THREAD_TRANSACT_VR0, offsetof(struct thread_struct,
transact_vr[0]));
diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 51be8fb..0554d1f 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -233,6 +233,16 @@ dont_backup_fp:
std r5, _CCR(r7)
std r6, _XER(r7)
+
+ /* TAR, PPR, DSCR ** */
+ mfspr r3, SPRN_TAR
+ mfspr r4, SPRN_PPR
+ mfspr r5, SPRN_DSCR
+
+ std r3, THREAD_TM_TAR(r12)
+ std r4, THREAD_TM_PPR(r12)
+ std r5, THREAD_TM_DSCR(r12)
+
/* MSR and flags: We don't change CRs, and we don't need to alter
* MSR.
*/
@@ -347,6 +357,16 @@ dont_restore_fp:
mtmsr r6 /* FP/Vec off again! */
restore_gprs:
+
+ /* TAR, PPR, DSCR ** */
+ ld r4, THREAD_TM_TAR(r3)
+ ld r5, THREAD_TM_PPR(r3)
+ ld r6, THREAD_TM_DSCR(r3)
+
+ mtspr SPRN_TAR, r4
+ mtspr SPRN_PPR, r5
+ mtspr SPRN_DSCR, r6
+
/* CR,LR,CCR,MSR ** */
ld r3, _CTR(r7)
ld r4, _LINK(r7)
--
1.8.1.2
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[PATCH 4/5] powerpc: Save the TAR register earlier
This moves us to save the Target Address Register (TAR) a earlier in
__switch_to. It introduces a new function save_tar() to do this.
We need to save the TAR earlier as we will overwrite it in the transactional
memory reclaim/recheckpoint path. We are going to do this in a subsequent
patch which will fix saving the TAR register when it's modified inside a
transaction.
Signed-off-by: Michael Neuling
Cc: [v3.10]
---
arch/powerpc/include/asm/switch_to.h | 9 +
arch/powerpc/kernel/entry_64.S | 9 -
arch/powerpc/kernel/process.c| 10 ++
3 files changed, 19 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/switch_to.h
b/arch/powerpc/include/asm/switch_to.h
index 49a13e0..294c2ce 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -15,6 +15,15 @@ extern struct task_struct *__switch_to(struct task_struct *,
struct thread_struct;
extern struct task_struct *_switch(struct thread_struct *prev,
struct thread_struct *next);
+#ifdef CONFIG_PPC_BOOK3S_64
+static inline void save_tar(struct thread_struct *prev)
+{
+ if (cpu_has_feature(CPU_FTR_ARCH_207S))
+ prev->tar = mfspr(SPRN_TAR);
+}
+#else
+static inline void save_tar(struct thread_struct *prev) {}
+#endif
extern void giveup_fpu(struct task_struct *);
extern void load_up_fpu(void);
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 4674fe6..2bd0b88 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -449,15 +449,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
#ifdef CONFIG_PPC_BOOK3S_64
BEGIN_FTR_SECTION
- /*
-* Back up the TAR across context switches. Note that the TAR is not
-* available for use in the kernel. (To provide this, the TAR should
-* be backed up/restored on exception entry/exit instead, and be in
-* pt_regs. FIXME, this should be in pt_regs anyway (for debug).)
-*/
- mfspr r0,SPRN_TAR
- std r0,THREAD_TAR(r3)
-
/* Event based branch registers */
mfspr r0, SPRN_BESCR
std r0, THREAD_BESCR(r3)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index c517dbe..8083be2 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -600,6 +600,16 @@ struct task_struct *__switch_to(struct task_struct *prev,
struct ppc64_tlb_batch *batch;
#endif
+ /* Back up the TAR across context switches.
+* Note that the TAR is not available for use in the kernel. (To
+* provide this, the TAR should be backed up/restored on exception
+* entry/exit instead, and be in pt_regs. FIXME, this should be in
+* pt_regs anyway (for debug).)
+* Save the TAR here before we do treclaim/trecheckpoint as these
+* will change the TAR.
+*/
+ save_tar(&prev->thread);
+
__switch_to_tm(prev);
#ifdef CONFIG_SMP
--
1.8.1.2
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[PATCH 3/5] powerpc: Fix context switch DSCR on POWER8
POWER8 allows the DSCR to be accessed directly from userspace via a new SPR
number 0x3 (Rather than 0x11. DSCR SPR number 0x11 is still used on POWER8 but
like POWER7, is only accessible in HV and OS modes). Currently, we allow this
by setting H/FSCR DSCR bit on boot.
Unfortunately this doesn't work, as the kernel needs to see the DSCR change so
that it knows to no longer restore the system wide version of DSCR on context
switch (ie. to set thread.dscr_inherit).
This clears the H/FSCR DSCR bit initially. If a process then accesses the DSCR
(via SPR 0x3), it'll trap into the kernel where we set thread.dscr_inherit in
facility_unavailable_exception().
We also change _switch() so that we set or clear the H/FSCR DSCR bit based on
the thread.dscr_inherit.
Signed-off-by: Michael Neuling
Cc: [v3.10]
---
arch/powerpc/kernel/entry_64.S | 27 +++-
arch/powerpc/kernel/traps.c| 58 +-
2 files changed, 60 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ab15b8d..4674fe6 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -584,9 +584,34 @@ BEGIN_FTR_SECTION
ld r7,DSCR_DEFAULT@toc(2)
ld r0,THREAD_DSCR(r4)
cmpwi r6,0
+ li r8, FSCR_DSCR
bne 1f
ld r0,0(r7)
-1: cmpdr0,r25
+ b 3f
+1:
+ BEGIN_FTR_SECTION_NESTED(70)
+ mfspr r6, SPRN_FSCR
+ or r6, r6, r8
+ mtspr SPRN_FSCR, r6
+BEGIN_FTR_SECTION_NESTED(69)
+ mfspr r6, SPRN_HFSCR
+ or r6, r6, r8
+ mtspr SPRN_HFSCR, r6
+END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+ b 4f
+ END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+3:
+ BEGIN_FTR_SECTION_NESTED(70)
+ mfspr r6, SPRN_FSCR
+ andcr6, r6, r8
+ mtspr SPRN_FSCR, r6
+BEGIN_FTR_SECTION_NESTED(69)
+ mfspr r6, SPRN_HFSCR
+ andcr6, r6, r8
+ mtspr SPRN_HFSCR, r6
+END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+ END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+4: cmpdr0,r25
beq 2f
mtspr SPRN_DSCR,r0
2:
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index bf33c22..e435bc0 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -44,9 +44,7 @@
#include
#include
#include
-#ifdef CONFIG_PPC32
#include
-#endif
#ifdef CONFIG_PMAC_BACKLIGHT
#include
#endif
@@ -1296,43 +1294,54 @@ void vsx_unavailable_exception(struct pt_regs *regs)
die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
}
+#ifdef CONFIG_PPC64
void facility_unavailable_exception(struct pt_regs *regs)
{
static char *facility_strings[] = {
- "FPU",
- "VMX/VSX",
- "DSCR",
- "PMU SPRs",
- "BHRB",
- "TM",
- "AT",
- "EBB",
- "TAR",
+ [FSCR_FP_LG] = "FPU",
+ [FSCR_VECVSX_LG] = "VMX/VSX",
+ [FSCR_DSCR_LG] = "DSCR",
+ [FSCR_PM_LG] = "PMU SPRs",
+ [FSCR_BHRB_LG] = "BHRB",
+ [FSCR_TM_LG] = "TM",
+ [FSCR_EBB_LG] = "EBB",
+ [FSCR_TAR_LG] = "TAR",
};
- char *facility, *prefix;
+ char *facility = "unknown";
u64 value;
+ u8 status;
+ bool hv;
- if (regs->trap == 0xf60) {
- value = mfspr(SPRN_FSCR);
- prefix = "";
- } else {
+ hv = (regs->trap == 0xf80);
+ if (hv)
value = mfspr(SPRN_HFSCR);
- prefix = "Hypervisor ";
+ else
+ value = mfspr(SPRN_FSCR);
+
+ status = value >> 56;
+ if (status == FSCR_DSCR_LG) {
+ /* User is acessing the DSCR. Set the inherit bit and allow
+* the user to set it directly in future by setting via the
+* H/FSCR DSCR bit.
+*/
+ current->thread.dscr_inherit = 1;
+ if (hv)
+ mtspr(SPRN_HFSCR, value | HFSCR_DSCR);
+ else
+ mtspr(SPRN_FSCR, value | FSCR_DSCR);
+ return;
}
- value = value >> 56;
+ if ((status < ARRAY_SIZE(facility_strings)) &&
+ facility_strings[status])
+ facility = facility_strings[status];
/* We restore the interrupt state now */
if (!arch_irq_disabled_regs(regs))
local_irq_enable();
- if (value < ARRAY_SIZE(facility_strings))
- facility = facility_strings[value];
- else
- facility = "unknown";
-
pr_err("%sFacility '%s' unavailable, exception at 0x%lx, MSR=%lx\n",
- prefix, facility, regs->nip, regs->msr);
[PATCH 2/5] powerpc: Rework setting up H/FSCR bit definitions
This reworks the Facility Status and Control Regsiter (FSCR) config bit definitions so that we can access the bit numbers. This is needed for a subsequent patch to fix the userspace DSCR handling. HFSCR and FSCR bit definitions are the same, so reuse them. Signed-off-by: Michael Neuling Cc: [v3.10] --- arch/powerpc/include/asm/reg.h | 31 --- 1 file changed, 20 insertions(+), 11 deletions(-) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index a6840e4..99222e2 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -254,19 +254,28 @@ #define SPRN_HRMOR 0x139 /* Real mode offset register */ #define SPRN_HSRR0 0x13A /* Hypervisor Save/Restore 0 */ #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ +/* HFSCR and FSCR bit numbers are the same */ +#define FSCR_TAR_LG8 /* Enable Target Address Register */ +#define FSCR_EBB_LG7 /* Enable Event Based Branching */ +#define FSCR_TM_LG 5 /* Enable Transactional Memory */ +#define FSCR_PM_LG 4 /* Enable prob/priv access to PMU SPRs */ +#define FSCR_BHRB_LG 3 /* Enable Branch History Rolling Buffer*/ +#define FSCR_DSCR_LG 2 /* Enable Data Stream Control Register */ +#define FSCR_VECVSX_LG 1 /* Enable VMX/VSX */ +#define FSCR_FP_LG 0 /* Enable Floating Point */ #define SPRN_FSCR 0x099 /* Facility Status & Control Register */ -#define FSCR_TAR (1 << (63-55)) /* Enable Target Address Register */ -#define FSCR_EBB (1 << (63-56)) /* Enable Event Based Branching */ -#define FSCR_DSCR(1 << (63-61)) /* Enable Data Stream Control Register */ +#define FSCR_TAR __MASK(FSCR_TAR_LG) +#define FSCR_EBB __MASK(FSCR_EBB_LG) +#define FSCR_DSCR__MASK(FSCR_DSCR_LG) #define SPRN_HFSCR 0xbe/* HV=1 Facility Status & Control Register */ -#define HFSCR_TAR(1 << (63-55)) /* Enable Target Address Register */ -#define HFSCR_EBB(1 << (63-56)) /* Enable Event Based Branching */ -#define HFSCR_TM (1 << (63-58)) /* Enable Transactional Memory */ -#define HFSCR_PM (1 << (63-60)) /* Enable prob/priv access to PMU SPRs */ -#define HFSCR_BHRB (1 << (63-59)) /* Enable Branch History Rolling Buffer*/ -#define HFSCR_DSCR (1 << (63-61)) /* Enable Data Stream Control Register */ -#define HFSCR_VECVSX (1 << (63-62)) /* Enable VMX/VSX */ -#define HFSCR_FP (1 << (63-63)) /* Enable Floating Point */ +#define HFSCR_TAR__MASK(FSCR_TAR_LG) +#define HFSCR_EBB__MASK(FSCR_EBB_LG) +#define HFSCR_TM __MASK(FSCR_TM_LG) +#define HFSCR_PM __MASK(FSCR_PM_LG) +#define HFSCR_BHRB __MASK(FSCR_BHRB_LG) +#define HFSCR_DSCR __MASK(FSCR_DSCR_LG) +#define HFSCR_VECVSX __MASK(FSCR_VECVSX_LG) +#define HFSCR_FP __MASK(FSCR_FP_LG) #define SPRN_TAR 0x32f /* Target Address Register */ #define SPRN_LPCR 0x13E /* LPAR Control Register */ #define LPCR_VPM0(1ul << (63-0)) -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/5] powerpc: Fix hypervisor facility unavaliable vector number
Currently if we take hypervisor facility unavaliable (from 0xf80/0x4f80) we mark it as an OS facility unavaliable (0xf60) as the two share the same code path. The becomes a problem in facility_unavailable_exception() as we aren't able to see the hypervisor facility unavailable exceptions. Below fixes this by duplication the required macros. Signed-off-by: Michael Neuling Cc: [v3.10] --- arch/powerpc/kernel/exceptions-64s.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 4e00d22..902ca3c 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -848,7 +848,7 @@ hv_facility_unavailable_relon_trampoline: . = 0x4f80 SET_SCRATCH0(r13) EXCEPTION_PROLOG_0(PACA_EXGEN) - b facility_unavailable_relon_hv + b hv_facility_unavailable_relon_hv STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint) #ifdef CONFIG_PPC_DENORMALISATION @@ -1175,6 +1175,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) b .ret_from_except STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception) + STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception) .align 7 .globl __end_handlers @@ -1188,7 +1189,7 @@ __end_handlers: STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable) STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable) STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable) - STD_RELON_EXCEPTION_HV_OOL(0xf80, facility_unavailable) + STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable) #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) /* -- 1.8.1.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: Use ibm, chip-id property to compute cpu_core_mask if available
On 07/04/2013 08:35 AM, Paul Mackerras wrote:
Some systems have an ibm,chip-id property in the cpu nodes in the
device tree. On these systems, we now use that to compute the
cpu_core_mask (i.e. the set of core siblings) rather than looking
at cache properties.
Paul,
I wanted to test this patch but not able to apply this patch on top of Linux
tree. Looks like I'm missing traverse_core_siblings() related patch. I searched
in ppc mailing list and couldn't figure out.
Can you point me to related patch?
-Vasant
Signed-off-by: Paul Mackerras
---
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index b72d8c9..3b7a118 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -587,6 +587,32 @@ int cpu_first_thread_of_core(int core)
}
EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
+static void traverse_siblings_chip_id(int cpu, int add, int chipid)
+{
+ const struct cpumask *mask;
+ struct device_node *np;
+ int i, plen;
+ const int *prop;
+
+ mask = add ? cpu_online_mask : cpu_present_mask;
+ for_each_cpu(i, mask) {
+ np = of_get_cpu_node(i, NULL);
+ if (!np)
+ continue;
+ prop = of_get_property(np, "ibm,chip-id", &plen);
+ if (prop && plen == sizeof(int) && *prop == chipid) {
+ if (add) {
+ cpumask_set_cpu(cpu, cpu_core_mask(i));
+ cpumask_set_cpu(i, cpu_core_mask(cpu));
+ } else {
+ cpumask_clear_cpu(cpu, cpu_core_mask(i));
+ cpumask_clear_cpu(i, cpu_core_mask(cpu));
+ }
+ }
+ of_node_put(np);
+ }
+}
+
/* Must be called when no change can occur to cpu_present_mask,
* i.e. during cpu online or offline.
*/
@@ -611,14 +637,29 @@ static struct device_node *cpu_to_l2cache(int cpu)
static void traverse_core_siblings(int cpu, int add)
{
- struct device_node *l2_cache;
+ struct device_node *l2_cache, *np;
const struct cpumask *mask;
- int i;
+ int i, chip, plen;
+ const int *prop;
+
+ /* First see if we have ibm,chip-id properties in cpu nodes */
+ np = of_get_cpu_node(cpu, NULL);
+ if (np) {
+ chip = -1;
+ prop = of_get_property(np, "ibm,chip-id", &plen);
+ if (prop && plen == sizeof(int))
+ chip = *(int *)prop;
+ of_node_put(np);
+ if (chip >= 0) {
+ traverse_siblings_chip_id(cpu, add, chip);
+ return;
+ }
+ }
l2_cache = cpu_to_l2cache(cpu);
mask = add ? cpu_online_mask : cpu_present_mask;
for_each_cpu(i, mask) {
- struct device_node *np = cpu_to_l2cache(i);
+ np = cpu_to_l2cache(i);
if (!np)
continue;
if (np == l2_cache) {
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Re: [PATCH 3/8] Add all memory via sysfs probe interface at once
On Tue, 2013-08-06 at 15:44 -0500, Nathan Fontenot wrote: > I am planning on pulling the first two patches and sending them out > separate from the patch set since they are really independent of the > rest of the patch series. > > The remaining code I will send out for review and inclusion in > linux-next so it can have the proper test time as you mentioned. Ping ? :-) Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
On Fri, Aug 09, 2013 at 04:25:04PM +1000, Benjamin Herrenschmidt wrote: > On Wed, 2013-08-07 at 18:15 -0500, Fionnuala Gunter wrote: > > This patch fixes a bug that is triggered when cts(cbc(aes)) is used with > > nx-crypto driver on input larger than 32 bytes. > > > > The chaining value from co-processor was not being saved. This value is > > needed because it is used as the IV by cts(cbc(aes)). > > > > Signed-off-by: Fionnuala Gunter > > Reviewed-by: Marcelo Cerri > > Herbert, I assume you will handle this along with all the other NX fixes > and I can safely take them out of linuxppc patchwork ? Yes of course. Thanks, -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
