RE: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread David Laight
From: Sukadev Bhattiprolu
 When checking whether a bit representing a register is set in
 sample_regs, a 64-bit mask, use 64-bit value (1LL).
 
 Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
 ---
  tools/perf/util/unwind.c |4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
 diff --git a/tools/perf/util/unwind.c b/tools/perf/util/unwind.c
 index 742f23b..2b888c6 100644
 --- a/tools/perf/util/unwind.c
 +++ b/tools/perf/util/unwind.c
 @@ -396,11 +396,11 @@ static int reg_value(unw_word_t *valp, struct regs_dump 
 *regs, int id,
  {
   int i, idx = 0;
 
 - if (!(sample_regs  (1  id)))
 + if (!(sample_regs  (1LL  id)))
   return -EINVAL;
 
   for (i = 0; i  id; i++) {
 - if (sample_regs  (1  i))
 + if (sample_regs  (1LL  i))
   idx++;
   }

There are much faster ways to count the number of set bits, especially
if you might need to check a significant number of bits.
There might even be a function defined somewhere to do it.
Basically you just add up the bits, for 16 bit it would be:
val = (val  0x) + (val  1)  0x;
val = (val  0x) + (val  2)  0x;
val = (val  0x0f0f) + (val  4)  0x0f0f;
val = (val  0x00ff) + (val  8)  0x00ff;
As the size of the work increases the improvement is more significant.
(Some of the later masking can probably be proven unnecessary.)

David

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[PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Aneesh Kumar K.V
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com

This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause
the below crash in the host.

Unable to handle kernel paging request for data at address 0xf0001223f278
Faulting instruction address: 0xc0202a00
cpu 0x30: Vector: 300 (Data Access) at [c01e4debb2d0]
pc: c0202a00: .kfree+0x40/0x200
lr: c0098338: .kvmppc_core_destroy_vm_hv+0x38/0x90
sp: c01e4debb550
   msr: 90009032
   dar: f0001223f278
 dsisr: 4000
  current = 0xc01e4de195c0
  paca= 0xcfefb000   softe: 0irq_happened: 0x01
pid   = 29379, comm = qemu-system-ppc
enter ? for help
[c01e4debb5e0] c0098338 .kvmppc_core_destroy_vm_hv+0x38/0x90
[c01e4debb670] c0087f80 .kvmppc_core_destroy_vm+0x30/0x70
[c01e4debb6f0] c0084f28 .kvm_arch_destroy_vm+0xd8/0x120
[c01e4debb780] c0080218 .kvm_put_kvm+0x198/0x2e0
[c01e4debb820] c00880d4 .kvm_spapr_tce_release+0xe4/0x110
[c01e4debb8b0] c0218578 .__fput+0xb8/0x2a0
[c01e4debb950] c00d9af4 .task_work_run+0x114/0x150
[c01e4debb9f0] c00b31e8 .do_exit+0x328/0xbc0
[c01e4debbae0] c00b4cd4 .do_group_exit+0x54/0xf0
[c01e4debbb70] c00c8448 .get_signal_to_deliver+0x1e8/0x6f0
[c01e4debbc70] c0017ee4 .do_signal+0x54/0x320
[c01e4debbdb0] c00182e8 .do_notify_resume+0x68/0x80
[c01e4debbe30] c000a7b0 .ret_from_except_lite+0x5c/0x60
--- Exception: c00 (System Call) at 3fffb38a4744
SP (3ffd36ffe360) is in userspace
30:mon zr

Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
 arch/powerpc/include/asm/kvm_host.h | 24 ++-
 arch/powerpc/kernel/asm-offsets.c   | 19 ++---
 arch/powerpc/kvm/book3s_hv.c|  4 --
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 75 +
 4 files changed, 8 insertions(+), 114 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 1eaea2dea174..7726a3bc8ff0 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -475,6 +475,9 @@ struct kvm_vcpu_arch {
ulong ppr;
ulong pspb;
ulong fscr;
+   ulong tfhar;
+   ulong tfiar;
+   ulong texasr;
ulong ebbhr;
ulong ebbrr;
ulong bescr;
@@ -523,27 +526,6 @@ struct kvm_vcpu_arch {
u64 siar;
u64 sdar;
u64 sier;
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-   u64 tfhar;
-   u64 texasr;
-   u64 tfiar;
-
-   u32 cr_tm;
-   u64 lr_tm;
-   u64 ctr_tm;
-   u64 amr_tm;
-   u64 ppr_tm;
-   u64 dscr_tm;
-   u64 tar_tm;
-
-   ulong gpr_tm[32];
-
-   struct thread_fp_state fp_tm;
-
-   struct thread_vr_state vr_tm;
-   u32 vrsave_tm; /* also USPRG0 */
-
-#endif
 
 #ifdef CONFIG_KVM_EXIT_TIMING
struct mutex exit_timing_lock;
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index b5aacf72ae6f..936d445b961a 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -534,6 +534,9 @@ int main(void)
DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
+   DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
+   DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
+   DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
@@ -555,22 +558,6 @@ int main(void)
DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
-#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
-   DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
-   DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
-   DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
-   DEFINE(VCPU_GPR_TM, offsetof(struct kvm_vcpu, arch.gpr_tm));
-   DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr));
-   DEFINE(VCPU_VRS_TM, offsetof(struct kvm_vcpu, arch.vr_tm.vr));
-   DEFINE(VCPU_VRSAVE_TM, offsetof(struct kvm_vcpu, arch.vrsave_tm));
-   DEFINE(VCPU_CR_TM, offsetof(struct kvm_vcpu, arch.cr_tm));
-   DEFINE(VCPU_LR_TM, offsetof(struct kvm_vcpu, arch.lr_tm));
-   DEFINE(VCPU_CTR_TM, offsetof(struct kvm_vcpu, arch.ctr_tm));
-   DEFINE(VCPU_AMR_TM, offsetof(struct kvm_vcpu, arch.amr_tm));
-   DEFINE(VCPU_PPR_TM, offsetof(struct kvm_vcpu, arch.ppr_tm));
-   DEFINE(VCPU_DSCR_TM, offsetof(struct kvm_vcpu, 

[PATCH 2/2] KVM: PPC: Book3S HV: Fix register usage when loading/saving VRSAVE

2014-03-06 Thread Aneesh Kumar K.V
From: Paul Mackerras pau...@samba.org

Commit 595e4f7e697e (KVM: PPC: Book3S HV: Use load/store_fp_state functions
in HV guest entry/exit) changed the register usage in kvmppc_save_fp() and
kvmppc_load_fp() but omitted changing the instructions that load and save 
VRSAVE.
The result is that the VRSAVE value was loaded from a constant address, and
saved to a location past the end of the vcpu struct, causing host kernel memory
corruption and various kinds of host kernel crashes.

This fixes the problem by using register r31, which contains the
vcpu pointer, instead of r3 and r4.

Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 557a47800ca1..6962d38c76f5 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -2132,7 +2132,7 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif
mfspr   r6,SPRN_VRSAVE
-   stw r6,VCPU_VRSAVE(r3)
+   stw r6,VCPU_VRSAVE(r31)
mtlrr30
mtmsrd  r5
isync
@@ -2169,7 +2169,7 @@ BEGIN_FTR_SECTION
bl  .load_vr_state
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif
-   lwz r7,VCPU_VRSAVE(r4)
+   lwz r7,VCPU_VRSAVE(r31)
mtspr   SPRN_VRSAVE,r7
mtlrr30
mr  r4,r31
-- 
1.8.3.2

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Re: [PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes

2014-03-06 Thread Sascha Hauer
On Wed, Mar 05, 2014 at 11:52:09AM +0100, Gerhard Sittig wrote:
 On Wed, Mar 05, 2014 at 09:48 +0800, Shawn Guo wrote:
  
  On Mon, Mar 03, 2014 at 10:22:31AM +0100, Gerhard Sittig wrote:
   On Mon, Feb 24, 2014 at 11:25 +0100, Gerhard Sittig wrote:

a recent FEC binding document update that was motivated by i.MX
development revealed that ARM and PowerPC implementations in Linux
did not agree on the clock names to use for the FEC nodes

change clock names from per to ipg in the FEC nodes of the
mpc5121.dtsi include file such that the .dts specs comply with
the common FEC binding

this incompatible change does not break operation, because
- COMMON_CLK support for MPC5121/23/25 and adjusted .dts files
  were only introduced in Linux v3.14-rc1, no mainline release
  provided these specs before
- if this change won't make it for v3.14, the MPC512x CCF support
  provides full backwards compability, and keeps operating with
  device trees which lack clock specs or don't match in the names

Signed-off-by: Gerhard Sittig g...@denx.de
   
   ping
   
   Are there opinions about making PowerPC users of FEC use the same
   clock names as ARM users do, to re-use (actually: keep sharing)
   the FEC binding?  The alternative would be to fragment the FEC
   binding into several bindings for ARM and PowerPC, which I feel
   would be undesirable, and is not necessary.
  
  As I already said, Documentation/devicetree/bindings/net/fsl-fec.txt
  was created specifically for i.MX FEC controller from day one.  And even
  as of today, it doesn't serve PowerPC, because for example the property
  'phy-mode' documented as required one is not required by PowerPC FEC.
  My opinion would be to patch fsl-fec.txt a little bit to make it clear
  that it's a binding doc for i.MX FEC, and create the other one for
  PowerPC FEC.  This is the way less confusing to people and easier for
  binding maintenance.
 
 Should we still try to have a common behaviour where possible?
 Such that even if there are two bindings, they don't diverge in
 unnecessary ways?

Maybe the long term goal should be to share the code. The MPC5200 FEC
and the i.MX FEC are very similar. Only the DMA engine is quite
different.

Sascha

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Re: [PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Paul Mackerras
On Thu, Mar 06, 2014 at 04:06:09PM +0530, Aneesh Kumar K.V wrote:
 From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 
 This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause
 the below crash in the host.
 
 Unable to handle kernel paging request for data at address 0xf0001223f278
 Faulting instruction address: 0xc0202a00

Why exactly does it cause that crash?  What is the actual problem here?
Under what specific circumstances do you see the crash?

 cpu 0x30: Vector: 300 (Data Access) at [c01e4debb2d0]
 pc: c0202a00: .kfree+0x40/0x200
 lr: c0098338: .kvmppc_core_destroy_vm_hv+0x38/0x90
 sp: c01e4debb550
msr: 90009032
dar: f0001223f278
  dsisr: 4000
   current = 0xc01e4de195c0
   paca= 0xcfefb000   softe: 0irq_happened: 0x01
 pid   = 29379, comm = qemu-system-ppc
 enter ? for help
 [c01e4debb5e0] c0098338 .kvmppc_core_destroy_vm_hv+0x38/0x90
 [c01e4debb670] c0087f80 .kvmppc_core_destroy_vm+0x30/0x70
 [c01e4debb6f0] c0084f28 .kvm_arch_destroy_vm+0xd8/0x120
 [c01e4debb780] c0080218 .kvm_put_kvm+0x198/0x2e0
 [c01e4debb820] c00880d4 .kvm_spapr_tce_release+0xe4/0x110
 [c01e4debb8b0] c0218578 .__fput+0xb8/0x2a0
 [c01e4debb950] c00d9af4 .task_work_run+0x114/0x150
 [c01e4debb9f0] c00b31e8 .do_exit+0x328/0xbc0
 [c01e4debbae0] c00b4cd4 .do_group_exit+0x54/0xf0
 [c01e4debbb70] c00c8448 .get_signal_to_deliver+0x1e8/0x6f0
 [c01e4debbc70] c0017ee4 .do_signal+0x54/0x320
 [c01e4debbdb0] c00182e8 .do_notify_resume+0x68/0x80
 [c01e4debbe30] c000a7b0 .ret_from_except_lite+0x5c/0x60
 --- Exception: c00 (System Call) at 3fffb38a4744
 SP (3ffd36ffe360) is in userspace
 30:mon zr
 
 Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 ---
  arch/powerpc/include/asm/kvm_host.h | 24 ++-
  arch/powerpc/kernel/asm-offsets.c   | 19 ++---
  arch/powerpc/kvm/book3s_hv.c|  4 --
  arch/powerpc/kvm/book3s_hv_rmhandlers.S | 75 
 +
  4 files changed, 8 insertions(+), 114 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/kvm_host.h 
 b/arch/powerpc/include/asm/kvm_host.h
 index 1eaea2dea174..7726a3bc8ff0 100644
 --- a/arch/powerpc/include/asm/kvm_host.h
 +++ b/arch/powerpc/include/asm/kvm_host.h
 @@ -475,6 +475,9 @@ struct kvm_vcpu_arch {
   ulong ppr;
   ulong pspb;
   ulong fscr;
 + ulong tfhar;
 + ulong tfiar;
 + ulong texasr;
   ulong ebbhr;
   ulong ebbrr;
   ulong bescr;
 @@ -523,27 +526,6 @@ struct kvm_vcpu_arch {
   u64 siar;
   u64 sdar;
   u64 sier;
 -#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 - u64 tfhar;
 - u64 texasr;
 - u64 tfiar;
 -
 - u32 cr_tm;
 - u64 lr_tm;
 - u64 ctr_tm;
 - u64 amr_tm;
 - u64 ppr_tm;
 - u64 dscr_tm;
 - u64 tar_tm;
 -
 - ulong gpr_tm[32];
 -
 - struct thread_fp_state fp_tm;
 -
 - struct thread_vr_state vr_tm;
 - u32 vrsave_tm; /* also USPRG0 */
 -
 -#endif
  
  #ifdef CONFIG_KVM_EXIT_TIMING
   struct mutex exit_timing_lock;
 diff --git a/arch/powerpc/kernel/asm-offsets.c 
 b/arch/powerpc/kernel/asm-offsets.c
 index b5aacf72ae6f..936d445b961a 100644
 --- a/arch/powerpc/kernel/asm-offsets.c
 +++ b/arch/powerpc/kernel/asm-offsets.c
 @@ -534,6 +534,9 @@ int main(void)
   DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
   DEFINE(VCPU_FSCR, offsetof(struct kvm_vcpu, arch.fscr));
   DEFINE(VCPU_PSPB, offsetof(struct kvm_vcpu, arch.pspb));
 + DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
 + DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
 + DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
   DEFINE(VCPU_EBBHR, offsetof(struct kvm_vcpu, arch.ebbhr));
   DEFINE(VCPU_EBBRR, offsetof(struct kvm_vcpu, arch.ebbrr));
   DEFINE(VCPU_BESCR, offsetof(struct kvm_vcpu, arch.bescr));
 @@ -555,22 +558,6 @@ int main(void)
   DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
   DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
   DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
 -#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 - DEFINE(VCPU_TFHAR, offsetof(struct kvm_vcpu, arch.tfhar));
 - DEFINE(VCPU_TFIAR, offsetof(struct kvm_vcpu, arch.tfiar));
 - DEFINE(VCPU_TEXASR, offsetof(struct kvm_vcpu, arch.texasr));
 - DEFINE(VCPU_GPR_TM, offsetof(struct kvm_vcpu, arch.gpr_tm));
 - DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr));
 - DEFINE(VCPU_VRS_TM, offsetof(struct kvm_vcpu, arch.vr_tm.vr));
 - DEFINE(VCPU_VRSAVE_TM, offsetof(struct kvm_vcpu, arch.vrsave_tm));
 - DEFINE(VCPU_CR_TM, offsetof(struct kvm_vcpu, arch.cr_tm));
 - DEFINE(VCPU_LR_TM, offsetof(struct kvm_vcpu, arch.lr_tm));
 - DEFINE(VCPU_CTR_TM, offsetof(struct kvm_vcpu, 

Re: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread Gabriel Paubert
On Thu, Mar 06, 2014 at 09:44:47AM +, David Laight wrote:
 From: Sukadev Bhattiprolu
  When checking whether a bit representing a register is set in
  sample_regs, a 64-bit mask, use 64-bit value (1LL).
  
  Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
  ---
   tools/perf/util/unwind.c |4 ++--
   1 file changed, 2 insertions(+), 2 deletions(-)
  
  diff --git a/tools/perf/util/unwind.c b/tools/perf/util/unwind.c
  index 742f23b..2b888c6 100644
  --- a/tools/perf/util/unwind.c
  +++ b/tools/perf/util/unwind.c
  @@ -396,11 +396,11 @@ static int reg_value(unw_word_t *valp, struct 
  regs_dump *regs, int id,
   {
  int i, idx = 0;
  
  -   if (!(sample_regs  (1  id)))
  +   if (!(sample_regs  (1LL  id)))
  return -EINVAL;
  
  for (i = 0; i  id; i++) {
  -   if (sample_regs  (1  i))
  +   if (sample_regs  (1LL  i))
  idx++;
  }
 
 There are much faster ways to count the number of set bits, especially
 if you might need to check a significant number of bits.
 There might even be a function defined somewhere to do it.

Indeed, look for Hamming weight (hweight family of functions)
in asm/hweight.h and what is included from there.

Besides that, many modern processors also have a machine instruction
to perform this task. In the processor manuals the instruction is 
described as population count and the mnemonic starts with popcnt
on x86 and ppc.

Gabriel

 Basically you just add up the bits, for 16 bit it would be:
   val = (val  0x) + (val  1)  0x;
   val = (val  0x) + (val  2)  0x;
   val = (val  0x0f0f) + (val  4)  0x0f0f;
   val = (val  0x00ff) + (val  8)  0x00ff;
 As the size of the work increases the improvement is more significant.
 (Some of the later masking can probably be proven unnecessary.)
 
   David
 
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Re: [PATCH 1/2] Revert KVM: PPC: Book3S HV: Add new state for transactional memory

2014-03-06 Thread Aneesh Kumar K.V
Paul Mackerras pau...@samba.org writes:

 On Thu, Mar 06, 2014 at 04:06:09PM +0530, Aneesh Kumar K.V wrote:
 From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 
 This reverts commit 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b which cause
 the below crash in the host.
 
 Unable to handle kernel paging request for data at address 0xf0001223f278
 Faulting instruction address: 0xc0202a00

 Why exactly does it cause that crash?  What is the actual problem here?
 Under what specific circumstances do you see the crash?

When we exit from guest, we find that 263 index in the
kvm-arch.vcore is always corrupted. The way to reproduce is to start
the guest and use Qemu monitor to quit. That will result in the below
crash.

Now the commit in 7b490411c37f7ab7965cbdfe5e3ec28eadb6db5b is not
complete. If you look at series

http://article.gmane.org/gmane.comp.emulators.kvm.powerpc.devel/8562

Andreas didn't pull all the changes because TM changes had issues like

http://article.gmane.org/gmane.comp.emulators.kvm.devel/118411

+ HEAD
+===
+   /* Save DEC */
+   mfspr   r5,SPRN_DEC
+   mftbr6
+   extsw   r5,r5
+   add r5,r5,r6
+   std r5,VCPU_DEC_EXPIRES(r9)
+

and

+   /* Save and reset AMR and UAMOR before turning on the MMU */
+BEGIN_FTR_SECTION
+   mfspr   r5,SPRN_AMR
+   mfspr   r6,SPRN_UAMOR
+   std r5,VCPU_AMR(r9)
+   std r6,VCPU_UAMOR(r9)
+   li  r6,0
+   mtspr   SPRN_AMR,r6
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
+
+ a65ae5a... KVM: PPC: Book3S HV: Add new state for transactional memory


Which got reverted in the next patch

http://article.gmane.org/gmane.comp.emulators.kvm.powerpc.devel/8571

- HEAD
-===
-   /* Save DEC */
-   mfspr   r5,SPRN_DEC
-   mftbr6
-   extsw   r5,r5
-   add r5,r5,r6
-   std r5,VCPU_DEC_EXPIRES(r9)
-
-BEGIN_FTR_SECTION

and

-
-   /* Save and reset AMR and UAMOR before turning on the MMU */
-BEGIN_FTR_SECTION
-   mfspr   r5,SPRN_AMR
-   mfspr   r6,SPRN_UAMOR
-   std r5,VCPU_AMR(r9)
-   std r6,VCPU_UAMOR(r9)
-   li  r6,0
-   mtspr   SPRN_AMR,r6
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
-
- a65ae5a... KVM: PPC: Book3S HV: Add new state for transactional memory

I guess the complete series will possibly work. But since we dropped
patch 16 and 17 we ended up with broken code

http://article.gmane.org/gmane.comp.emulators.kvm.powerpc.devel/8667

Hence the idea that we will revert TM stuff for 3.14 and do it properly
for 3.15 ?


 cpu 0x30: Vector: 300 (Data Access) at [c01e4debb2d0]
 pc: c0202a00: .kfree+0x40/0x200
 lr: c0098338: .kvmppc_core_destroy_vm_hv+0x38/0x90
 sp: c01e4debb550
msr: 90009032
dar: f0001223f278
  dsisr: 4000
   current = 0xc01e4de195c0
   paca= 0xcfefb000   softe: 0irq_happened: 0x01
 pid   = 29379, comm = qemu-system-ppc
 enter ? for help
 [c01e4debb5e0] c0098338 .kvmppc_core_destroy_vm_hv+0x38/0x90
 [c01e4debb670] c0087f80 .kvmppc_core_destroy_vm+0x30/0x70
 [c01e4debb6f0] c0084f28 .kvm_arch_destroy_vm+0xd8/0x120
 [c01e4debb780] c0080218 .kvm_put_kvm+0x198/0x2e0
 [c01e4debb820] c00880d4 .kvm_spapr_tce_release+0xe4/0x110
 [c01e4debb8b0] c0218578 .__fput+0xb8/0x2a0
 [c01e4debb950] c00d9af4 .task_work_run+0x114/0x150
 [c01e4debb9f0] c00b31e8 .do_exit+0x328/0xbc0
 [c01e4debbae0] c00b4cd4 .do_group_exit+0x54/0xf0
 [c01e4debbb70] c00c8448 .get_signal_to_deliver+0x1e8/0x6f0
 [c01e4debbc70] c0017ee4 .do_signal+0x54/0x320
 [c01e4debbdb0] c00182e8 .do_notify_resume+0x68/0x80
 [c01e4debbe30] c000a7b0 .ret_from_except_lite+0x5c/0x60
 --- Exception: c00 (System Call) at 3fffb38a4744
 SP (3ffd36ffe360) is in userspace
 30:mon zr
 
 Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
 ---
  arch/powerpc/include/asm/kvm_host.h | 24 ++-
  arch/powerpc/kernel/asm-offsets.c   | 19 ++---
  arch/powerpc/kvm/book3s_hv.c|  4 --
  arch/powerpc/kvm/book3s_hv_rmhandlers.S | 75 
 +
  4 files changed, 8 insertions(+), 114 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/kvm_host.h 
 b/arch/powerpc/include/asm/kvm_host.h
 index 1eaea2dea174..7726a3bc8ff0 100644
 --- a/arch/powerpc/include/asm/kvm_host.h
 +++ b/arch/powerpc/include/asm/kvm_host.h
 @@ -475,6 +475,9 @@ struct kvm_vcpu_arch {
  ulong ppr;
  ulong pspb;
  ulong fscr;
 +ulong tfhar;
 +ulong tfiar;
 +ulong texasr;
  ulong ebbhr;
  ulong ebbrr;
  ulong bescr;
 @@ -523,27 +526,6 @@ struct kvm_vcpu_arch {
  u64 siar;
  u64 sdar;
  u64 sier;
 -#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 -u64 tfhar;
 -u64 texasr;
 -u64 tfiar;
 -
 -u32 cr_tm;
 -u64 lr_tm;
 -u64 ctr_tm;
 -u64 amr_tm;
 

Re: [PATCH RFC v8 5/5] dma: mpc512x: register for device tree channel lookup

2014-03-06 Thread Alexander Popov
Hello Andy.

2014-02-24 17:08 GMT+04:00 Andy Shevchenko andriy.shevche...@linux.intel.com:
 On Mon, 2014-02-24 at 15:09 +0400, Alexander Popov wrote:
 @@ -1018,11 +1019,23 @@ static int mpc_dma_probe(struct platform_device *op)
   /* Register DMA engine */
   dev_set_drvdata(dev, mdma);
   retval = dma_async_device_register(dma);
 - if (retval) {
 - devm_free_irq(dev, mdma-irq, mdma);
 - irq_dispose_mapping(mdma-irq);
 + if (retval)
 + goto out_irq;
 +
 + /* register with OF helpers for DMA lookups (nonfatal) */
 + if (dev-of_node) {
 + retval = of_dma_controller_register(dev-of_node,
 + of_dma_xlate_by_chan_id,
 + mdma);
 + if (retval)
 + dev_warn(dev, could not register for OF lookup\n);
   }

 + return 0;
 +
 +out_irq:
 + devm_free_irq(dev, mdma-irq, mdma);

 Something wrong either with devm_request_irq() or you don't need to call
 devm_free_irq() explicitly. Once we already try to discuss this earlier
 in this mailing list with Lars-Peter(?), though there were no solution
 how to keep devm_*_irq usability.

Thanks, I've read this discussion. It seems that the current code doesn't do
anything bad, though devm_request_irq() and devm_free_irq() can be changed
to request_irq() and free_irq() accordingly. Do you think it's worth being done
in a separate patch in this series?

 + irq_dispose_mapping(mdma-irq);
   return retval;
  }

 @@ -1031,6 +1044,8 @@ static int mpc_dma_remove(struct platform_device *op)
   struct device *dev = op-dev;
   struct mpc_dma *mdma = dev_get_drvdata(dev);

 + if (dev-of_node)
 + of_dma_controller_free(dev-of_node);
   dma_async_device_unregister(mdma-dma);
   devm_free_irq(dev, mdma-irq, mdma);
   irq_dispose_mapping(mdma-irq);

Best regards,
Alexander
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[PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Nikita Yushchenko
When preparing dump-capturing kernel, kexec userspace tool needs to know
actual amount of memory used by the running kernel. This may differ from
extire available DRAM for a couple of reasons. To address this issue,
kdump kernel support code injects several attributes into device tree that
are later captured by userspace kexec tool via /proc interface.

One such attrubute is 'chosen/linux,memory_limit' that is used to pass
memory limit of the running kernel.

This was initialized using kernel's 'memory_limit' variable, that is set
by early init code based on mem= kernel parameter and other reasons.

But there are cases when memory_limit variable does not contain proper
information. One such case is when !CONFIG_HIGHMEM kernel runs on system
with memory large enough not to fit into lowmem.

This patch fixes initialization of 'chosen/linux,memory_limit' to use
values from memblock subsystem. These are adjusted at kernel memory
management init and thus always contain values that match reality.

Signed-off-by: Nikita Yushchenko nyushche...@dev.rtsoft.ru
---
 arch/powerpc/kernel/machine_kexec.c |8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/machine_kexec.c 
b/arch/powerpc/kernel/machine_kexec.c
index 015ae55..372cda5 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -250,8 +250,14 @@ static void __init export_crashk_values(struct device_node 
*node)
/*
 * memory_limit is required by the kexec-tools to limit the
 * crash regions to the actual memory used.
+*
+* There are cases when memory_limit variable does not hold actual
+* limit, for example when memory was limited by no kernel support
+* for HIGHMEM. Reliable information is known by memblock because
+* memory management init adjusts it.
 */
-   mem_limit = cpu_to_be_ulong(memory_limit);
+   mem_limit = cpu_to_be_ulong(memblock_end_of_DRAM() -
+   memblock_start_of_DRAM());
of_update_property(node, memory_limit_prop);
 }
 
-- 
1.7.10.4

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Re: [PATCH 0/3] powerpc/perf: Enable linking with libunwind

2014-03-06 Thread Jiri Olsa
On Wed, Mar 05, 2014 at 08:41:56PM -0800, Sukadev Bhattiprolu wrote:
 When we try to create backtraces (call-graphs) with the perf tool
 
   perf record -g /tmp/sprintft
 
 we get backtraces with duplicate arcs for sprintft[1]:
 
 14.61%  sprintft  libc-2.18.so   [.] __random 

 |
 --- __random
|
|--61.09%-- __random
|  |
|  |--97.18%-- rand
|  |  do_my_sprintf
|  |  main
|  |  generic_start_main.isra.0
|  |  __libc_start_main
|  |  0x0
|  |
|   --2.82%-- do_my_sprintf
| main
| generic_start_main.isra.0
| __libc_start_main
| 0x0
|
 --38.91%-- rand
   |  
   |--92.90%-- rand
   |  |
   |  |--99.87%-- do_my_sprintf
   |  |  main
   |  |  generic_start_main.isra.0
   |  |  __libc_start_main
   |  |  0x0
   |   --0.13%-- [...]
   |
--7.10%-- do_my_sprintf
  main
  generic_start_main.isra.0
  __libc_start_main
  0x0
 
 (where the two arcs both have the same backtrace but are not merged).
 
 Linking with libunwind seems to create better backtraces. While x86 and
 ARM processors have support for linking with libunwind but Power does not.
 This patchset is an RFC for linking with libunwind.
 
 With this patchset and running:
 
   /tmp/perf record --call-graph=dwarf,8192 /tmp/sprintft
 
 the backtrace is:
 
 14.94%  sprintft  libc-2.18.so   [.] __random 

 |
 --- __random
 rand
 do_my_sprintf
 main
 generic_start_main.isra.0
 __libc_start_main
 (nil)
 
 This appears better.
 
 One downside is that we now need the kernel to save the entire user stack
 (the 8192 in the command line is the default user stack size).
 
 A second issue is that this invocation of perf (with --call-graph=dwarf,8192)
 seems to fail for backtraces involving tail-calls[2]
 
   /tmp/perf record -g ./tailcall
 gives 
 
 20.00%  tailcall  tailcall   [.] work2
 |
 --- work2
 work
 
 shows the tail function 'work2' as called from 'work()'
 
 But with libunwind:
 
   /tmp/perf record --call-graph=dwarf,8192 ./tailcall
 we get:
 
20.50%  tailcall  tailcall   [.] work2
 |
 --- work2
 
 the caller of 'work' is not shown.
 
 I am debugging this, but would appreciate any feedback/pointers on the
 patchset/direction:
 
   - Does libunwind need the entire user stack to work or are there
 optimizations we can do to save the minimal entries for it to
 perform the unwind.

AFAIK you dont need to provide whole stack, but the more
you have the bigger chance you'll get full(er) backtrace

 
   - Does libunwind work with tailcalls like the one above ?

not sure, but if you have x86 alternative to your tailcall (i cannot
read ppc assembly) I could try on x86 ;-)

CC-ing Jean, as he might have seen this issue..


 
   - Are there benefits to linking with libunwind (even if it does not
 yet solve the tailcall problem)

provides backtrace for binaries/distros/archs compiled without framepointer

 
   - Are there any examples of using libdwarf to solve the tailcall
 issue ?


btw there's now remote unwinder in elfutils (version 0.158)
the perf supprot is in Arnaldo's perf/core tree

jirka
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Re: [PATCH 3/3] perf: Use 64-bit value when comparing sample_regs

2014-03-06 Thread Jiri Olsa
On Thu, Mar 06, 2014 at 12:33:32PM +0100, Gabriel Paubert wrote:
 On Thu, Mar 06, 2014 at 09:44:47AM +, David Laight wrote:
  From: Sukadev Bhattiprolu
   When checking whether a bit representing a register is set in
   sample_regs, a 64-bit mask, use 64-bit value (1LL).
   
   Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
   ---
tools/perf/util/unwind.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
   
   diff --git a/tools/perf/util/unwind.c b/tools/perf/util/unwind.c
   index 742f23b..2b888c6 100644
   --- a/tools/perf/util/unwind.c
   +++ b/tools/perf/util/unwind.c
   @@ -396,11 +396,11 @@ static int reg_value(unw_word_t *valp, struct 
   regs_dump *regs, int id,
{
 int i, idx = 0;
   
   - if (!(sample_regs  (1  id)))
   + if (!(sample_regs  (1LL  id)))
 return -EINVAL;
   
 for (i = 0; i  id; i++) {
   - if (sample_regs  (1  i))
   + if (sample_regs  (1LL  i))
 idx++;
 }
  
  There are much faster ways to count the number of set bits, especially
  if you might need to check a significant number of bits.
  There might even be a function defined somewhere to do it.
 
 Indeed, look for Hamming weight (hweight family of functions)
 in asm/hweight.h and what is included from there.
 
 Besides that, many modern processors also have a machine instruction
 to perform this task. In the processor manuals the instruction is 
 described as population count and the mnemonic starts with popcnt
 on x86 and ppc.
 
   Gabriel
 
  Basically you just add up the bits, for 16 bit it would be:
  val = (val  0x) + (val  1)  0x;
  val = (val  0x) + (val  2)  0x;
  val = (val  0x0f0f) + (val  4)  0x0f0f;
  val = (val  0x00ff) + (val  8)  0x00ff;
  As the size of the work increases the improvement is more significant.
  (Some of the later masking can probably be proven unnecessary.)

right I think the loop could be replaced by:

  idx = hweight(mask  ((1  id) - 1))

Sukadev,
please also rebase against latest Arnaldo's perf/core,
this code has changed just recently, it's now in:
  util/perf_regs.c:perf_reg_value

thanks,
jirka
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Re: ibmveth: Fix endian issues with MAC addresses

2014-03-06 Thread David Miller
From: Anton Blanchard an...@samba.org
Date: Wed, 5 Mar 2014 14:51:37 +1100

 The code to load a MAC address into a u64 for passing to the
 hypervisor via a register is broken on little endian.
 
 Create a helper function called ibmveth_encode_mac_addr
 which does the right thing in both big and little endian.
 
 We were storing the MAC address in a long in struct ibmveth_adapter.
 It's never used so remove it - we don't need another place in the
 driver where we create endian issues with MAC addresses.
 
 Signed-off-by: Anton Blanchard an...@samba.org
 Cc: sta...@vger.kernel.org

Applied, thanks Anton.

 - memcpy(adapter-mac_addr, mac_addr_p, ETH_ALEN);
 ...
 -unsigned long mac_addr;

That's some scary stuff right there.
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Re: [PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Michael Ellerman
On Thu, 2014-03-06 at 18:24 +0400, Nikita Yushchenko wrote:
 When preparing dump-capturing kernel, kexec userspace tool needs to know
 actual amount of memory used by the running kernel. This may differ from
 extire available DRAM for a couple of reasons. To address this issue,
 kdump kernel support code injects several attributes into device tree that
 are later captured by userspace kexec tool via /proc interface.
 
 One such attrubute is 'chosen/linux,memory_limit' that is used to pass
 memory limit of the running kernel.
 
 This was initialized using kernel's 'memory_limit' variable, that is set
 by early init code based on mem= kernel parameter and other reasons.
 
 But there are cases when memory_limit variable does not contain proper
 information. One such case is when !CONFIG_HIGHMEM kernel runs on system
 with memory large enough not to fit into lowmem.

Why doesn't the !CONFIG_HIGHMEM code update memory_limit to reflect reality.

cheers


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Re: [PATCH v2 14/52] powerpc, sysfs: Fix CPU hotplug callback registration

2014-03-06 Thread Benjamin Herrenschmidt
On Fri, 2014-02-14 at 13:22 +0530, Srivatsa S. Bhat wrote:
 Subsystems that want to register CPU hotplug callbacks, as well as perform
 initialization for the CPUs that are already online, often do it as shown
 below:
 
   get_online_cpus();
 
   for_each_online_cpu(cpu)
   init_cpu(cpu);
 
   register_cpu_notifier(foobar_cpu_notifier);
 
   put_online_cpus();

This patch breaks a good half of my test configs with:

/home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c: In function 
'topology_init':
/home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:979:2: error: 
implicit declaration of function 'cpu_notifier_register_begin' 
[-Werror=implicit-function-declaration]
/home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1004:2: error: 
implicit declaration of function '__register_cpu_notifier' 
[-Werror=implicit-function-declaration]
/home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1006:2: error: 
implicit declaration of function 'cpu_notifier_register_done' 
[-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[2]: *** [arch/powerpc/kernel/sysfs.o] Error 1
make[2]: *** Waiting for unfinished jobs



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Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure

2014-03-06 Thread Anshuman Khandual
On 02/19/2014 09:36 PM, Sudeep Holla wrote:
 From: Sudeep Holla sudeep.ho...@arm.com
 
 This patch removes the redundant sysfs cacheinfo code by making use of
 the newly introduced generic cacheinfo infrastructure.
 
 Signed-off-by: Sudeep Holla sudeep.ho...@arm.com
 Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
 Cc: Paul Mackerras pau...@samba.org
 Cc: linuxppc-dev@lists.ozlabs.org
 ---
  arch/powerpc/kernel/cacheinfo.c | 831 
 ++--
  arch/powerpc/kernel/cacheinfo.h |   8 -
  arch/powerpc/kernel/sysfs.c |   4 -
  3 files changed, 109 insertions(+), 734 deletions(-)
  delete mode 100644 arch/powerpc/kernel/cacheinfo.h
 
 diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c
 index 2912b87..05b7580 100644
 --- a/arch/powerpc/kernel/cacheinfo.c
 +++ b/arch/powerpc/kernel/cacheinfo.c
 @@ -10,38 +10,10 @@
   * 2 as published by the Free Software Foundation.
   */
 
 +#include linux/cacheinfo.h
  #include linux/cpu.h
 -#include linux/cpumask.h
  #include linux/kernel.h
 -#include linux/kobject.h
 -#include linux/list.h
 -#include linux/notifier.h
  #include linux/of.h
 -#include linux/percpu.h
 -#include linux/slab.h
 -#include asm/prom.h
 -
 -#include cacheinfo.h
 -
 -/* per-cpu object for tracking:
 - * - a cache kobject for the top-level directory
 - * - a list of index objects representing the cpu's local cache hierarchy
 - */
 -struct cache_dir {
 - struct kobject *kobj; /* bare (not embedded) kobject for cache
 -* directory */
 - struct cache_index_dir *index; /* list of index objects */
 -};
 -
 -/* index object: each cpu's cache directory has an index
 - * subdirectory corresponding to a cache object associated with the
 - * cpu.  This object's lifetime is managed via the embedded kobject.
 - */
 -struct cache_index_dir {
 - struct kobject kobj;
 - struct cache_index_dir *next; /* next index in parent directory */
 - struct cache *cache;
 -};
 
  /* Template for determining which OF properties to query for a given
   * cache type */
 @@ -60,11 +32,6 @@ struct cache_type_info {
   const char *nr_sets_prop;
  };
 
 -/* These are used to index the cache_type_info array. */
 -#define CACHE_TYPE_UNIFIED 0
 -#define CACHE_TYPE_INSTRUCTION 1
 -#define CACHE_TYPE_DATA2
 -
  static const struct cache_type_info cache_type_info[] = {
   {
   /* PowerPC Processor binding says the [di]-cache-*
 @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_info[] = 
 {
   .nr_sets_prop= d-cache-sets,
   },
   {
 - .name= Instruction,
 - .size_prop   = i-cache-size,
 - .line_size_props = { i-cache-line-size,
 -  i-cache-block-size, },
 - .nr_sets_prop= i-cache-sets,
 - },
 - {
   .name= Data,
   .size_prop   = d-cache-size,
   .line_size_props = { d-cache-line-size,
d-cache-block-size, },
   .nr_sets_prop= d-cache-sets,
   },
 + {
 + .name= Instruction,
 + .size_prop   = i-cache-size,
 + .line_size_props = { i-cache-line-size,
 +  i-cache-block-size, },
 + .nr_sets_prop= i-cache-sets,
 + },
  };


Hey Sudeep,

After applying this patch, the cache_type_info array looks like this.

static const struct cache_type_info cache_type_info[] = {
{
/* 
 * PowerPC Processor binding says the [di]-cache-*
 * must be equal on unified caches, so just use
 * d-cache properties.
 */
.name= Unified,
.size_prop   = d-cache-size,
.line_size_props = { d-cache-line-size,
 d-cache-block-size, },
.nr_sets_prop= d-cache-sets,
},
{
.name= Data,
.size_prop   = d-cache-size,
.line_size_props = { d-cache-line-size,
 d-cache-block-size, },
.nr_sets_prop= d-cache-sets,
},
{
.name= Instruction,
.size_prop   = i-cache-size,
.line_size_props = { i-cache-line-size,
 i-cache-block-size, },
.nr_sets_prop= i-cache-sets,
},
};

and this function computes the the array index for any given cache type
define for PowerPC.

static inline int get_cacheinfo_idx(enum cache_type type)
{
if (type == CACHE_TYPE_UNIFIED)
return 0;
else
return type;
}

These types are define in include/linux/cacheinfo.h as

enum cache_type {

[PATCH 4/9] powerpc/85xx: support CPU hotplug for e500mc and e5500

2014-03-06 Thread Chenhui Zhao
Implemented CPU hotplug on e500mc and e5500. On e5500 both 32-bit and
64-bit modes can work. Used some callback functions implemented in RCPM
driver.

Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/Kconfig  |2 +-
 arch/powerpc/kernel/smp.c |6 ++-
 arch/powerpc/mm/tlb_nohash.c  |6 ++-
 arch/powerpc/platforms/85xx/smp.c |   94 ++---
 4 files changed, 87 insertions(+), 21 deletions(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a5e5d2e..05f6323 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -362,7 +362,7 @@ config SWIOTLB
 config HOTPLUG_CPU
bool Support for enabling/disabling CPUs
depends on SMP  (PPC_PSERIES || \
-   PPC_PMAC || PPC_POWERNV || (PPC_85xx  !PPC_E500MC))
+   PPC_PMAC || PPC_POWERNV || FSL_SOC_BOOKE)
---help---
  Say Y here to be able to disable and re-enable individual
  CPUs at runtime on SMP machines.
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index ac2621a..f3f4401 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -405,8 +405,12 @@ void generic_cpu_die(unsigned int cpu)
 
for (i = 0; i  100; i++) {
smp_rmb();
-   if (per_cpu(cpu_state, cpu) == CPU_DEAD)
+   if (per_cpu(cpu_state, cpu) == CPU_DEAD) {
+#ifdef CONFIG_PPC64
+   paca[cpu].cpu_start = 0;
+#endif
return;
+   }
msleep(100);
}
printk(KERN_ERR CPU%d didn't die...\n, cpu);
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index b37a58e..d24e06c 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -648,8 +648,10 @@ static void __early_init_mmu(int boot_cpu)
num_cams = (mfspr(SPRN_TLB1CFG)  TLBnCFG_N_ENTRY) / 4;
linear_map_top = map_mem_in_cams(linear_map_top, num_cams);
 
-   /* limit memory so we dont have linear faults */
-   memblock_enforce_memory_limit(linear_map_top);
+   if (boot_cpu) {
+   /* limit memory so we dont have linear faults */
+   memblock_enforce_memory_limit(linear_map_top);
+   }
 
if (book3e_htw_mode == PPC_HTW_NONE) {
patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e);
diff --git a/arch/powerpc/platforms/85xx/smp.c 
b/arch/powerpc/platforms/85xx/smp.c
index 2e5911e..0047883 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -19,6 +19,7 @@
 #include linux/kexec.h
 #include linux/highmem.h
 #include linux/cpu.h
+#include linux/smp.h
 
 #include asm/machdep.h
 #include asm/pgtable.h
@@ -46,6 +47,17 @@ static u64 timebase;
 static int tb_req;
 static int tb_valid;
 
+#ifdef CONFIG_PPC_E500MC
+/* specify the cpu PM state when cpu dies, PH15/NAP is the default */
+int qoriq_cpu_die_state = E500_PM_PH15;
+#endif
+
+#ifdef CONFIG_PPC_E500MC
+static void mpc85xx_timebase_freeze(int freeze)
+{
+   qoriq_pm_ops-freeze_time_base(freeze);
+}
+#else
 static void mpc85xx_timebase_freeze(int freeze)
 {
uint32_t mask;
@@ -58,6 +70,7 @@ static void mpc85xx_timebase_freeze(int freeze)
 
in_be32(guts-devdisr);
 }
+#endif
 
 static void mpc85xx_give_timebase(void)
 {
@@ -125,6 +138,34 @@ static void mpc85xx_take_timebase(void)
 }
 
 #ifdef CONFIG_HOTPLUG_CPU
+#ifdef CONFIG_PPC_E500MC
+static void qoriq_cpu_die(void)
+{
+   unsigned int cpu = smp_processor_id();
+
+   local_irq_disable();
+#ifdef CONFIG_PPC64
+   __hard_irq_disable();
+#endif
+   idle_task_exit();
+
+   if (qoriq_pm_ops-irq_mask)
+   qoriq_pm_ops-irq_mask(cpu);
+
+   mtspr(SPRN_TCR, 0);
+   mtspr(SPRN_TSR, mfspr(SPRN_TSR));
+
+   generic_set_cpu_dead(cpu);
+
+   if (cur_cpu_spec  cur_cpu_spec-cpu_flush_caches)
+   cur_cpu_spec-cpu_flush_caches();
+
+   qoriq_pm_ops-cpu_enter_state(cpu, qoriq_cpu_die_state);
+
+   while (1)
+   ;
+}
+#else
 static void smp_85xx_mach_cpu_die(void)
 {
unsigned int cpu = smp_processor_id();
@@ -155,6 +196,7 @@ static void smp_85xx_mach_cpu_die(void)
;
 }
 #endif
+#endif
 
 static inline void flush_spin_table(void *spin_table)
 {
@@ -208,11 +250,8 @@ static int smp_85xx_kick_cpu(int nr)
spin_table = phys_to_virt(*cpu_rel_addr);
 
local_irq_save(flags);
-#ifdef CONFIG_PPC32
-#ifdef CONFIG_HOTPLUG_CPU
-   /* Corresponding to generic_set_cpu_dead() */
-   generic_set_cpu_up(nr);
 
+#ifdef CONFIG_HOTPLUG_CPU
if (system_state == SYSTEM_RUNNING) {
/*
 * To keep it compatible with old boot program which uses
@@ -225,6 +264,12 @@ static int smp_85xx_kick_cpu(int nr)
out_be32(spin_table-addr_l, 0);

[PATCH 5/9] powerpc/85xx: disable irq by hardware when suspend for 64-bit

2014-03-06 Thread Chenhui Zhao
In 64-bit mode, kernel just clears the irq soft-enable flag
in struct paca_struct to disable external irqs. But, in
the case of suspend, irqs should be disabled by hardware.
Therefore, hook a function to ppc_md.suspend_disable_irqs
to really disable irqs.

Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/platforms/85xx/corenet_generic.c |   12 
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/85xx/corenet_generic.c 
b/arch/powerpc/platforms/85xx/corenet_generic.c
index 3fdf9f3..983d81f 100644
--- a/arch/powerpc/platforms/85xx/corenet_generic.c
+++ b/arch/powerpc/platforms/85xx/corenet_generic.c
@@ -32,6 +32,13 @@
 #include sysdev/fsl_pci.h
 #include smp.h
 
+#if defined(CONFIG_PPC64)  defined(CONFIG_SUSPEND)
+static void fsl_suspend_disable_irqs(void)
+{
+   __hard_irq_disable();
+}
+#endif
+
 void __init corenet_gen_pic_init(void)
 {
struct mpic *mpic;
@@ -58,6 +65,11 @@ void __init corenet_gen_setup_arch(void)
 
fsl_rcpm_init();
 
+#if defined(CONFIG_PPC64)  defined(CONFIG_SUSPEND)
+   /* physically disable irq for 64-bit mode when suspend */
+   ppc_md.suspend_disable_irqs = fsl_suspend_disable_irqs;
+#endif
+
pr_info(%s board from Freescale Semiconductor\n, ppc_md.name);
 }
 
-- 
1.7.3


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[PATCH 3/9] powerpc/rcpm: add RCPM driver

2014-03-06 Thread Chenhui Zhao
There is a RCPM (Run Control/Power Management) in Freescale QorIQ
series processors. The device performs tasks associated with device
run control and power management.

The driver implements some features: mask/unmask irq, enter/exit low
power states, freeze time base, etc.

There are two versions of register map in RCPM, which is specified by
the compatible entry in the RCPM node of device tree.

Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/include/asm/fsl_guts.h   |  105 
 arch/powerpc/platforms/85xx/Kconfig   |1 +
 arch/powerpc/platforms/85xx/corenet_generic.c |2 +
 arch/powerpc/sysdev/Kconfig   |5 +
 arch/powerpc/sysdev/Makefile  |1 +
 arch/powerpc/sysdev/fsl_rcpm.c|  315 +
 arch/powerpc/sysdev/fsl_soc.h |   24 ++
 7 files changed, 453 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/sysdev/fsl_rcpm.c

diff --git a/arch/powerpc/include/asm/fsl_guts.h 
b/arch/powerpc/include/asm/fsl_guts.h
index 77ced0b..492534a 100644
--- a/arch/powerpc/include/asm/fsl_guts.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -185,5 +185,110 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts 
__iomem *guts,
 
 #endif
 
+struct ccsr_rcpm_v1 {
+   u8  res[4];
+   __be32  cdozsr; /* 0x0004 Core Doze Status Register */
+   u8  res0008[4];
+   __be32  cdozcr; /* 0x000c Core Doze Control Register */
+   u8  res0010[4];
+   __be32  cnapsr; /* 0x0014 Core Nap Status Register */
+   u8  res0018[4];
+   __be32  cnapcr; /* 0x001c Core Nap Control Register */
+   u8  res0020[4];
+   __be32  cdozpsr;/* 0x0024 Core Doze Previous Status Register */
+   u8  res0028[4];
+   __be32  cnappsr;/* 0x002c Core Nap Previous Status Register */
+   u8  res0030[4];
+   __be32  cwaitsr;/* 0x0034 Core Wait Status Register */
+   u8  res0038[4];
+   __be32  cwdtdsr;/* 0x003c Core Watchdog Detect Status Register */
+   __be32  powmgtcsr;  /* 0x0040 Power Mangement ControlStatus Register */
+#define RCPM_POWMGTCSR_SLP 0x0002
+   u8  res0044[12];
+   __be32  ippdexpcr;  /* 0x0050 IP Powerdown Exception Control Register */
+   u8  res0054[16];
+   __be32  cpmimr; /* 0x0064 Core PM IRQ Mask Register */
+   u8  res0068[4];
+   __be32  cpmcimr;/* 0x006c Core PM Critical IRQ Mask Register */
+   u8  res0070[4];
+   __be32  cpmmcmr;/* 0x0074 Core PM Machine Check Mask Register */
+   u8  res0078[4];
+   __be32  cpmnmimr;   /* 0x007c Core PM NMI Mask Register */
+   u8  res0080[4];
+   __be32  ctbenr; /* 0x0084 Core Time Base Enable Register */
+   u8  res0088[4];
+   __be32  ctbckselr;  /* 0x008c Core Time Base Clock Select Register */
+   u8  res0090[4];
+   __be32  ctbhltcr;   /* 0x0094 Core Time Base Halt Control Register */
+   u8  res0098[4];
+   __be32  cmcpmaskcr; /* 0x00a4 Core Machine Check Mask Register */
+};
+
+struct ccsr_rcpm_v2 {
+   u8  res_00[12];
+   u32 tph10sr0;   /* Thread PH10 Status Register */
+   u8  res_10[12];
+   u32 tph10setr0; /* Thread PH10 Set Control Register */
+   u8  res_20[12];
+   u32 tph10clrr0; /* Thread PH10 Clear Control Register */
+   u8  res_30[12];
+   u32 tph10psr0;  /* Thread PH10 Previous Status Register */
+   u8  res_40[12];
+   u32 twaitsr0;   /* Thread Wait Status Register */
+   u8  res_50[96];
+   u32 pcph15sr;   /* Physical Core PH15 Status Register */
+   u32 pcph15setr; /* Physical Core PH15 Set Control Register */
+   u32 pcph15clrr; /* Physical Core PH15 Clear Control Register */
+   u32 pcph15psr;  /* Physical Core PH15 Prev Status Register */
+   u8  res_c0[16];
+   u32 pcph20sr;   /* Physical Core PH20 Status Register */
+   u32 pcph20setr; /* Physical Core PH20 Set Control Register */
+   u32 pcph20clrr; /* Physical Core PH20 Clear Control Register */
+   u32 pcph20psr;  /* Physical Core PH20 Prev Status Register */
+   u32 pcpw20sr;   /* Physical Core PW20 Status Register */
+   u8  res_e0[12];
+   u32 pcph30sr;   /* Physical Core PH30 Status Register */
+   u32 pcph30setr; /* Physical Core PH30 Set Control Register */
+   u32 pcph30clrr; /* Physical Core PH30 Clear Control Register */
+   u32 pcph30psr;  /* Physical Core PH30 Prev Status Register */
+   u8  res_100[32];
+   u32 ippwrgatecr;/* IP Power Gating Control Register */
+   u8  res_124[12];
+   u32 powmgtcsr;  /* Power Management Control  Status Reg */
+#define RCPM_POWMGTCSR_LPM20_RQ 

[PATCH 6/9] powerpc/85xx: support sleep feature on QorIQ SoCs with RCPM

2014-03-06 Thread Chenhui Zhao
In sleep mode, the clocks of e500 cores and unused IP blocks is
turned off. The IP blocks which are allowed to wake up the processor
are still running.

The sleep mode is equal to the Standby state in Linux. Use the
command to enter sleep mode:
  echo standby  /sys/power/state

Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/Kconfig   |4 +-
 arch/powerpc/platforms/85xx/Makefile   |3 +
 arch/powerpc/platforms/85xx/qoriq_pm.c |   78 
 3 files changed, 83 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/qoriq_pm.c

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 05f6323..e1d6510 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -222,7 +222,7 @@ config ARCH_HIBERNATION_POSSIBLE
 config ARCH_SUSPEND_POSSIBLE
def_bool y
depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx || \
-  (PPC_85xx  !PPC_E500MC) || PPC_86xx || PPC_PSERIES \
+  FSL_SOC_BOOKE || PPC_86xx || PPC_PSERIES \
   || 44x || 40x
 
 config PPC_DCR_NATIVE
@@ -709,7 +709,7 @@ config FSL_PCI
 config FSL_PMC
bool
default y
-   depends on SUSPEND  (PPC_85xx || PPC_86xx)
+   depends on SUSPEND  (PPC_85xx  !PPC_E500MC || PPC_86xx)
help
  Freescale MPC85xx/MPC86xx power management controller support
  (suspend/resume). For MPC83xx see platforms/83xx/suspend.c
diff --git a/arch/powerpc/platforms/85xx/Makefile 
b/arch/powerpc/platforms/85xx/Makefile
index 25cebe7..7fae817 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -2,6 +2,9 @@
 # Makefile for the PowerPC 85xx linux kernel.
 #
 obj-$(CONFIG_SMP) += smp.o
+ifeq ($(CONFIG_FSL_CORENET_RCPM), y)
+obj-$(CONFIG_SUSPEND)  += qoriq_pm.o
+endif
 
 obj-y += common.o
 
diff --git a/arch/powerpc/platforms/85xx/qoriq_pm.c 
b/arch/powerpc/platforms/85xx/qoriq_pm.c
new file mode 100644
index 000..915b13b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/qoriq_pm.c
@@ -0,0 +1,78 @@
+/*
+ * Support Power Management feature
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Author: Chenhui Zhao chenhui.z...@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/suspend.h
+#include linux/of_platform.h
+
+#include sysdev/fsl_soc.h
+
+#define FSL_SLEEP  0x1
+#define FSL_DEEP_SLEEP 0x2
+
+/* specify the sleep state of the present platform */
+int sleep_pm_state;
+/* supported sleep modes by the present platform */
+static unsigned int sleep_modes;
+
+static int qoriq_suspend_enter(suspend_state_t state)
+{
+   int ret = 0;
+
+   switch (state) {
+   case PM_SUSPEND_STANDBY:
+
+   if (cur_cpu_spec-cpu_flush_caches)
+   cur_cpu_spec-cpu_flush_caches();
+
+   ret = qoriq_pm_ops-plat_enter_state(sleep_pm_state);
+
+   break;
+
+   default:
+   ret = -EINVAL;
+
+   }
+
+   return ret;
+}
+
+static int qoriq_suspend_valid(suspend_state_t state)
+{
+   if (state == PM_SUSPEND_STANDBY  (sleep_modes  FSL_SLEEP))
+   return 1;
+
+   return 0;
+}
+
+static const struct platform_suspend_ops qoriq_suspend_ops = {
+   .valid = qoriq_suspend_valid,
+   .enter = qoriq_suspend_enter,
+};
+
+static int __init qoriq_suspend_init(void)
+{
+   struct device_node *np;
+
+   sleep_modes = FSL_SLEEP;
+   sleep_pm_state = PLAT_PM_SLEEP;
+
+   np = of_find_compatible_node(NULL, NULL, fsl,qoriq-rcpm-2.0);
+   if (np)
+   sleep_pm_state = PLAT_PM_LPM20;
+
+   suspend_set_ops(qoriq_suspend_ops);
+
+   return 0;
+}
+arch_initcall(qoriq_suspend_init);
-- 
1.7.3


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[PATCH 7/9] fsl: add EPU FSM configuration for deep sleep

2014-03-06 Thread Chenhui Zhao
From: Hongbo Zhang hongbo.zh...@freescale.com

In the last stage of deep sleep, software will trigger a Finite
State Machine (FSM) to control the hardware precedure, such as
board isolation, killing PLLs, removing power, and so on.

When the system is waked up by an interrupt, the FSM controls the
hardware to complete the early resume precedure.

This patch configure the EPU FSM preparing for deep sleep.

Signed-off-by: Hongbo Zhang hongbo.zh...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/platforms/85xx/Kconfig |1 +
 arch/powerpc/sysdev/fsl_soc.h   |3 +
 drivers/platform/Kconfig|4 +
 drivers/platform/Makefile   |1 +
 drivers/platform/fsl/Kconfig|   10 +
 drivers/platform/fsl/Makefile   |5 +
 drivers/platform/fsl/sleep_fsm.c|  415 +++
 7 files changed, 439 insertions(+), 0 deletions(-)
 create mode 100644 drivers/platform/fsl/Kconfig
 create mode 100644 drivers/platform/fsl/Makefile
 create mode 100644 drivers/platform/fsl/sleep_fsm.c

diff --git a/arch/powerpc/platforms/85xx/Kconfig 
b/arch/powerpc/platforms/85xx/Kconfig
index 54d8843..27e2174 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -261,6 +261,7 @@ config CORENET_GENERIC
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+   select FSL_SLEEP_FSM if SUSPEND
help
  This option enables support for the FSL CoreNet based boards.
  For 32bit kernel, the following boards are supported:
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 9b9a34a..eb83a30 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -69,5 +69,8 @@ extern const struct fsl_pm_ops *qoriq_pm_ops;
 
 extern int fsl_rcpm_init(void);
 
+extern void fsl_dp_fsm_setup(void *dcsr_base);
+extern void fsl_dp_fsm_clean(void *dcsr_base);
+
 #endif
 #endif
diff --git a/drivers/platform/Kconfig b/drivers/platform/Kconfig
index 09fde58..6539e6d 100644
--- a/drivers/platform/Kconfig
+++ b/drivers/platform/Kconfig
@@ -6,3 +6,7 @@ source drivers/platform/goldfish/Kconfig
 endif
 
 source drivers/platform/chrome/Kconfig
+
+if FSL_SOC
+source drivers/platform/fsl/Kconfig
+endif
diff --git a/drivers/platform/Makefile b/drivers/platform/Makefile
index 3656b7b..37c6f72 100644
--- a/drivers/platform/Makefile
+++ b/drivers/platform/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_X86)   += x86/
 obj-$(CONFIG_OLPC) += olpc/
 obj-$(CONFIG_GOLDFISH) += goldfish/
 obj-$(CONFIG_CHROME_PLATFORMS) += chrome/
+obj-$(CONFIG_FSL_SOC)  += fsl/
diff --git a/drivers/platform/fsl/Kconfig b/drivers/platform/fsl/Kconfig
new file mode 100644
index 000..72ed053
--- /dev/null
+++ b/drivers/platform/fsl/Kconfig
@@ -0,0 +1,10 @@
+#
+# Freescale Specific Power Management Drivers
+#
+
+config FSL_SLEEP_FSM
+   bool
+   help
+ This driver configures a hardware FSM (Finite State Machine) for deep 
sleep.
+ The FSM is used to finish clean-ups at the last stage of system 
entering deep
+ sleep, and also wakes up system when a wake up event happens.
diff --git a/drivers/platform/fsl/Makefile b/drivers/platform/fsl/Makefile
new file mode 100644
index 000..d99ca0e
--- /dev/null
+++ b/drivers/platform/fsl/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for linux/drivers/platform/fsl
+# Freescale Specific Power Management Drivers
+#
+obj-$(CONFIG_FSL_SLEEP_FSM)+= sleep_fsm.o
diff --git a/drivers/platform/fsl/sleep_fsm.c b/drivers/platform/fsl/sleep_fsm.c
new file mode 100644
index 000..102
--- /dev/null
+++ b/drivers/platform/fsl/sleep_fsm.c
@@ -0,0 +1,415 @@
+/*
+ * Freescale deep sleep FSM (finite-state machine) configuration
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Author: Hongbo Zhang hongbo.zh...@freescale.com
+ * Chenhui Zhao chenhui.z...@freescale.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include linux/io.h
+#include linux/types.h
+
+#define FSL_STRIDE_4B  4
+#define FSL_STRIDE_8B  8
+
+/* Event Processor Global Control Register */
+#defineEPGCR   0x000
+
+/* Event Processor EVT Pin Control Registers */
+#defineEPEVTCR00x050
+#defineEPEVTCR10x054
+#defineEPEVTCR20x058
+#defineEPEVTCR30x05C
+#defineEPEVTCR40x060
+#defineEPEVTCR50x064
+#defineEPEVTCR60x068
+#defineEPEVTCR70x06C
+#defineEPEVTCR80x070
+#defineEPEVTCR90x074
+
+/* Event Processor Crosstrigger Control Register */
+#defineEPXTRIGCR   0x090
+
+/* Event Processor 

[PATCH 8/9] powerpc/85xx: add save/restore functions for core registers

2014-03-06 Thread Chenhui Zhao
From: Wang Dongsheng dongsheng.w...@freescale.com

Add booke_cpu_state_save() and booke_cpu_state_restore() functions which can be
used to save/restore CPU's registers in the case of deep sleep and hibernation.

Supported processors: E6500, E5500, E500MC, E500v2 and E500v1.

Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com
Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/include/asm/booke_save_regs.h |   96 
 arch/powerpc/kernel/Makefile   |1 +
 arch/powerpc/kernel/booke_save_regs.S  |  361 
 3 files changed, 458 insertions(+), 0 deletions(-)
 create mode 100644 arch/powerpc/include/asm/booke_save_regs.h
 create mode 100644 arch/powerpc/kernel/booke_save_regs.S

diff --git a/arch/powerpc/include/asm/booke_save_regs.h 
b/arch/powerpc/include/asm/booke_save_regs.h
new file mode 100644
index 000..87c357a
--- /dev/null
+++ b/arch/powerpc/include/asm/booke_save_regs.h
@@ -0,0 +1,96 @@
+/*
+ *  Save/restore e500 series core registers
+ *
+ * Author: Wang Dongsheng dongsheng.w...@freescale.com
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_FSL_SLEEP_H
+#define __ASM_FSL_SLEEP_H
+
+/*
+ * 8 bytes for each register, which is compatible with
+ * both 32-bit and 64-bit registers
+ *
+ * Acronyms:
+ * dw(data width)  0x08
+ *
+ * Map:
+ * General-Purpose Registers
+ * GPR1(sp)0
+ * GPR20x8 (dw * 1)
+ * GPR13 - GPR31   0x10 ~ 0xa0 (dw * 2 ~ dw * 20)
+ * Foating-point registers
+ * FPR14 - FPR31   0xa8 ~ 0x130(dw * 21 ~ dw * 38)
+ * Registers for Branch Operations
+ * CR  0x138   (dw * 39)
+ * LR  0x140   (dw * 40)
+ * Processor Control Registers
+ * MSR 0x148   (dw * 41)
+ * EPCR0x150   (dw * 42)
+ *
+ * Only e500, e500v2 need to save HID0 - HID1
+ * HID0 - HID1 0x158 ~ 0x160 (dw * 43 ~ dw * 44)
+ * Timer Registers
+ * TCR 0x168   (dw * 45)
+ * TB(64bit)   0x170   (dw * 46)
+ * TBU(32bit)  0x178   (dw * 47)
+ * TBL(32bit)  0x180   (dw * 48)
+ * Interrupt Registers
+ * IVPR0x188   (dw * 49)
+ * IVOR0 - IVOR15  0x190 ~ 0x208   (dw * 50 ~ dw * 65)
+ * IVOR32 - IVOR41 0x210 ~ 0x258   (dw * 66 ~ dw * 75)
+ * Software-Use Registers
+ * SPRG1   0x260   (dw * 76), 64-bit need to save.
+ * SPRG3   0x268   (dw * 77), 32-bit need to save.
+ * MMU Registers
+ * PID0 - PID2 0x270 ~ 0x280   (dw * 78 ~ dw * 80)
+ * Debug Registers
+ * DBCR0 - DBCR2   0x288 ~ 0x298   (dw * 81 ~ dw * 83)
+ * IAC1 - IAC4 0x2a0 ~ 0x2b8   (dw * 84 ~ dw * 87)
+ * DAC1 - DAC2 0x2c0 ~ 0x2c8   (dw * 88 ~ dw * 89)
+ *
+ */
+
+#define SR_GPR10x000
+#define SR_GPR20x008
+#define SR_GPR13   0x010
+#define SR_FPR14   0x0a8
+#define SR_CR  0x138
+#define SR_LR  0x140
+#define SR_MSR 0x148
+#define SR_EPCR0x150
+#define SR_HID00x158
+#define SR_TCR 0x168
+#define SR_TB  0x170
+#define SR_TBU 0x178
+#define SR_TBL 0x180
+#define SR_IVPR0x188
+#define SR_IVOR0   0x190
+#define SR_IVOR32  0x210
+#define SR_SPRG1   0x260
+#define SR_SPRG3   0x268
+#define SR_PID00x270
+#define SR_DBCR0   0x288
+#define SR_IAC10x2a0
+#define SR_DAC10x2c0
+#define REGS_BUFFER_SIZE   (SR_DAC1 + 0x10)
+
+/*
+ * hibernation and deepsleep save/restore different number of registers,
+ * use these flags to indicate.
+ */
+#define HIBERNATION_FLAG   1
+#define DEEPSLEEP_FLAG 2
+
+#ifndef __ASSEMBLY__
+extern void booke_cpu_state_save(void *buf, int type);
+extern void *booke_cpu_state_restore(void *buf, int type);
+#endif
+#endif
+
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index fcc9a89..64acae6 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_HIBERNATION) += swsusp_booke.o
 else
 obj-$(CONFIG_HIBERNATION)  += swsusp_$(CONFIG_WORD_SIZE).o
 endif
+obj-$(CONFIG_E500) += booke_save_regs.o
 obj64-$(CONFIG_HIBERNATION)+= swsusp_asm64.o
 obj-$(CONFIG_MODULES)  += 

[PATCH 9/9] powerpc/pm: support deep sleep feature on T1040

2014-03-06 Thread Chenhui Zhao
From: Zhao Chenhui chenhui.z...@freescale.com

T1040 supports deep sleep feature, which can switch off most parts of
the SoC when it is in deep sleep mode. This way, it becomes more
energy-efficient.

The DDR controller will also be powered off in deep sleep. Therefore,
the last stage (the latter part of fsl_dp_enter_low) will run without DDR
access. This piece of code and related TLBs will be prefetched.

Due to the different initialization code between 32-bit and 64-bit, they
have seperate resume entry and precedure.

The feature supports 32-bit and 64-bit kernel mode.

Signed-off-by: Zhao Chenhui chenhui.z...@freescale.com
---
 arch/powerpc/include/asm/booke_save_regs.h |3 +
 arch/powerpc/kernel/cpu_setup_fsl_booke.S  |   17 ++
 arch/powerpc/kernel/head_fsl_booke.S   |   30 +++
 arch/powerpc/platforms/85xx/Makefile   |2 +-
 arch/powerpc/platforms/85xx/deepsleep.c|  201 +++
 arch/powerpc/platforms/85xx/qoriq_pm.c |   38 
 arch/powerpc/platforms/85xx/sleep.S|  295 
 arch/powerpc/sysdev/fsl_soc.h  |7 +
 8 files changed, 592 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/platforms/85xx/deepsleep.c
 create mode 100644 arch/powerpc/platforms/85xx/sleep.S

diff --git a/arch/powerpc/include/asm/booke_save_regs.h 
b/arch/powerpc/include/asm/booke_save_regs.h
index 87c357a..37c1f6c 100644
--- a/arch/powerpc/include/asm/booke_save_regs.h
+++ b/arch/powerpc/include/asm/booke_save_regs.h
@@ -88,6 +88,9 @@
 #define HIBERNATION_FLAG   1
 #define DEEPSLEEP_FLAG 2
 
+#define CPLD_FLAG  1
+#define FPGA_FLAG  2
+
 #ifndef __ASSEMBLY__
 extern void booke_cpu_state_save(void *buf, int type);
 extern void *booke_cpu_state_restore(void *buf, int type);
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index e59d6de..ea9bc28 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -318,6 +318,23 @@ flush_backside_L2_cache:
 2:
blr
 
+#define CPC_CPCCSR00x0
+#define CPC_CPCCSR0_CPCFL  0x800
+
+/* r3 : the base address of CPC  */
+_GLOBAL(fsl_flush_cpc_cache)
+   lwz r6, CPC_CPCCSR0(r3)
+   ori r6, r6, CPC_CPCCSR0_CPCFL
+   stw r6, CPC_CPCCSR0(r3)
+   sync
+
+   /* Wait until completing the flush */
+1: lwz r6, CPC_CPCCSR0(r3)
+   andi.   r6, r6, CPC_CPCCSR0_CPCFL
+   bne 1b
+
+   blr
+
 _GLOBAL(__flush_caches_e500v2)
mflr r0
bl  flush_dcache_L1
diff --git a/arch/powerpc/kernel/head_fsl_booke.S 
b/arch/powerpc/kernel/head_fsl_booke.S
index 20204fe..3285752 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -162,6 +162,19 @@ _ENTRY(__early_start)
 #include fsl_booke_entry_mapping.S
 #undef ENTRY_MAPPING_BOOT_SETUP
 
+#if defined(CONFIG_SUSPEND)  defined(CONFIG_FSL_CORENET_RCPM)
+   /* if deep_sleep_flag != 0, jump to the deep sleep resume entry */
+   LOAD_REG_ADDR(r4, deep_sleep_flag)
+   lwz r3, 0(r4)
+   cmpwi   r3, 0
+   beq 11f
+   /* clear deep_sleep_flag */
+   li  r3, 0
+   stw r3, 0(r4)
+   b   fsl_deepsleep_resume
+11:
+#endif
+
 set_ivor:
/* Establish the interrupt vector offsets */
SET_IVOR(0,  CriticalInput);
@@ -343,6 +356,23 @@ set_ivor:
lwz r11, 0(r12);/* Get Linux PTE */
 #endif
 
+#if defined(CONFIG_SUSPEND)  defined(CONFIG_FSL_CORENET_RCPM)
+_ENTRY(__entry_deep_sleep)
+/*
+ * Bootloader will jump to here when resuming from deep sleep.
+ * After executing the init code in fsl_booke_entry_mapping.S,
+ * will jump to the real resume entry.
+ */
+   li  r8, 1
+   bl  12f
+12:mflrr9
+   addir9, r9, (deep_sleep_flag - 12b)
+   stw r8, 0(r9)
+   b __early_start
+deep_sleep_flag:
+   .long   0
+#endif
+
 /*
  * Interrupt vector entry code
  *
diff --git a/arch/powerpc/platforms/85xx/Makefile 
b/arch/powerpc/platforms/85xx/Makefile
index 7fae817..9a4ea86 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -3,7 +3,7 @@
 #
 obj-$(CONFIG_SMP) += smp.o
 ifeq ($(CONFIG_FSL_CORENET_RCPM), y)
-obj-$(CONFIG_SUSPEND)  += qoriq_pm.o
+obj-$(CONFIG_SUSPEND)  += qoriq_pm.o deepsleep.o sleep.o
 endif
 
 obj-y += common.o
diff --git a/arch/powerpc/platforms/85xx/deepsleep.c 
b/arch/powerpc/platforms/85xx/deepsleep.c
new file mode 100644
index 000..ddd7185
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/deepsleep.c
@@ -0,0 +1,201 @@
+/*
+ * Support deep sleep feature
+ *
+ * Copyright 2014 Freescale Semiconductor Inc.
+ *
+ * Author: Chenhui Zhao chenhui.z...@freescale.com
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under  the terms of the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of 

Re: [PATCH] kexec/powerpc: fix exporting memory limit

2014-03-06 Thread Nikita Yushchenko
 On Thu, 2014-03-06 at 18:24 +0400, Nikita Yushchenko wrote:
  When preparing dump-capturing kernel, kexec userspace tool needs to
  know actual amount of memory used by the running kernel. This may
  differ from extire available DRAM for a couple of reasons. To address
  this issue, kdump kernel support code injects several attributes into
  device tree that are later captured by userspace kexec tool via /proc
  interface.
 
  One such attrubute is 'chosen/linux,memory_limit' that is used to pass
  memory limit of the running kernel.
 
  This was initialized using kernel's 'memory_limit' variable, that is
  set by early init code based on mem= kernel parameter and other
  reasons.
 
  But there are cases when memory_limit variable does not contain proper
  information. One such case is when !CONFIG_HIGHMEM kernel runs on
  system with memory large enough not to fit into lowmem.

 Why doesn't the !CONFIG_HIGHMEM code update memory_limit to reflect
 reality.

I guess because memory_limit is used for ... well, memory limit, set by 
mem=. And for the rest memblock is used (and it *is* updated).

And code elsewhere does use memblock, see e.g. numa_enforce_memory_limit() 
in arch/powerpc/mm/numa.c

In MMU init (MMU_init() in arch/powerpc/mm/init_32.c -which is the point 
where final memory configuration is set) memblock, not memory_limit, is 
both used and updated.
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[PATCH 2/9] powerpc/cache: add cache flush operation for various e500

2014-03-06 Thread Chenhui Zhao
Various e500 core have different cache architecture, so they
need different cache flush operations. Therefore, add a callback
function cpu_flush_caches to the struct cpu_spec. The cache flush
operation for the specific kind of e500 is selected at init time.
The callback function will flush all caches in the current cpu.

Signed-off-by: Chenhui Zhao chenhui.z...@freescale.com
---
 arch/powerpc/include/asm/cacheflush.h |2 -
 arch/powerpc/include/asm/cputable.h   |   11 +++
 arch/powerpc/kernel/asm-offsets.c |3 +
 arch/powerpc/kernel/cpu_setup_fsl_booke.S |  114 -
 arch/powerpc/kernel/cputable.c|4 +
 arch/powerpc/kernel/head_fsl_booke.S  |   74 ---
 arch/powerpc/platforms/85xx/smp.c |4 +-
 7 files changed, 134 insertions(+), 78 deletions(-)

diff --git a/arch/powerpc/include/asm/cacheflush.h 
b/arch/powerpc/include/asm/cacheflush.h
index 5b93122..039753e 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -30,8 +30,6 @@ extern void flush_dcache_page(struct page *page);
 #define flush_dcache_mmap_lock(mapping)do { } while (0)
 #define flush_dcache_mmap_unlock(mapping)  do { } while (0)
 
-extern void __flush_disable_L1(void);
-
 extern void flush_icache_range(unsigned long, unsigned long);
 extern void flush_icache_user_range(struct vm_area_struct *vma,
struct page *page, unsigned long addr,
diff --git a/arch/powerpc/include/asm/cputable.h 
b/arch/powerpc/include/asm/cputable.h
index 617cc76..2c497a2 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -43,6 +43,13 @@ extern int machine_check_e500(struct pt_regs *regs);
 extern int machine_check_e200(struct pt_regs *regs);
 extern int machine_check_47x(struct pt_regs *regs);
 
+#if defined(CONFIG_E500) || defined(CONFIG_PPC_E500MC)
+extern void __flush_caches_e500v2(void);
+extern void __flush_caches_e500mc(void);
+extern void __flush_caches_e5500(void);
+extern void __flush_caches_e6500(void);
+#endif
+
 /* NOTE WELL: Update identify_cpu() if fields are added or removed! */
 struct cpu_spec {
/* CPU is matched via (PVR  pvr_mask) == pvr_value */
@@ -59,6 +66,10 @@ struct cpu_spec {
unsigned inticache_bsize;
unsigned intdcache_bsize;
 
+#if defined(CONFIG_E500) || defined(CONFIG_PPC_E500MC)
+   /* flush caches of the cpu which is running the function */
+   void (*cpu_flush_caches)(void);
+#endif
/* number of performance monitor counters */
unsigned intnum_pmcs;
enum powerpc_pmc_type pmc_type;
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 8d1d94d..5157fb4 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -372,6 +372,9 @@ int main(void)
DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
+#if defined(CONFIG_E500) || defined(CONFIG_PPC_E500MC)
+   DEFINE(CPU_FLUSH_CACHES, offsetof(struct cpu_spec, cpu_flush_caches));
+#endif
 
DEFINE(pbe_address, offsetof(struct pbe, address));
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S 
b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index cc2d896..e59d6de 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -1,7 +1,7 @@
 /*
  * This file contains low level CPU setup functions.
  * Kumar Gala ga...@kernel.crashing.org
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009, 2014 Freescale Semiconductor, Inc.
  *
  * Based on cpu_setup_6xx code by
  * Benjamin Herrenschmidt b...@kernel.crashing.org
@@ -13,11 +13,13 @@
  *
  */
 
+#include asm/page.h
 #include asm/processor.h
 #include asm/cputable.h
 #include asm/ppc_asm.h
 #include asm/mmu-book3e.h
 #include asm/asm-offsets.h
+#include asm/mpc85xx.h
 
 _GLOBAL(__e500_icache_setup)
mfspr   r0, SPRN_L1CSR1
@@ -223,3 +225,113 @@ _GLOBAL(__setup_cpu_e5500)
mtlrr5
blr
 #endif
+
+/* flush L1 date cache, it can apply to e500v2, e500mc and e5500 */
+_GLOBAL(flush_dcache_L1)
+   mfmsr   r10
+   wrteei  0
+
+   mfspr   r3,SPRN_L1CFG0
+   rlwinm  r5,r3,9,3   /* Extract cache block size */
+   twlgti  r5,1/* Only 32 and 64 byte cache blocks
+* are currently defined.
+*/
+   li  r4,32
+   subfic  r6,r5,2 /* r6 = log2(1KiB / cache block size) -
+*  log2(number of ways)
+*/
+   slw r5,r4,r5/* r5 = cache block size */
+
+   rlwinm  r7,r3,0,0xff/* 

[PATCH 1/9] powerpc/fsl: add PVR definition for E500MC and E5500

2014-03-06 Thread Chenhui Zhao
From: Wang Dongsheng dongsheng.w...@freescale.com

Signed-off-by: Wang Dongsheng dongsheng.w...@freescale.com
---
 arch/powerpc/include/asm/reg.h |2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 62b114e..cd7b630 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1075,6 +1075,8 @@
 #define PVR_8560   0x8020
 #define PVR_VER_E500V1 0x8020
 #define PVR_VER_E500V2 0x8021
+#define PVR_VER_E500MC 0x8023
+#define PVR_VER_E5500  0x8024
 #define PVR_VER_E6500  0x8040
 
 /*
-- 
1.7.3


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[PATCH] powerpc/powernv: Infrastructure to support OPAL async completion

2014-03-06 Thread Neelesh Gupta
This patch adds support for notifying the clients of their request
completion. Clients request for the token before making OPAL call
and then wait for the response.

This patch uses messaging infrastructure to pull the data to linux
by registering itself for the message type OPAL_MSG_ASYNC_COMP.

Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
 arch/powerpc/include/asm/opal.h |   12 +-
 arch/powerpc/platforms/powernv/Makefile |2 
 arch/powerpc/platforms/powernv/opal-async.c |  203 +++
 3 files changed, 215 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/platforms/powernv/opal-async.c

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index ed82142..90fad59 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -83,6 +83,8 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_INTERNAL_ERROR-11
 #define OPAL_BUSY_EVENT-12
 #define OPAL_HARDWARE_FROZEN   -13
+#define OPAL_WRONG_STATE   -14
+#define OPAL_ASYNC_COMPLETION  -15
 
 /* API Tokens (in r0) */
 #define OPAL_CONSOLE_WRITE 1
@@ -241,7 +243,9 @@ enum OpalPendingState {
 };
 
 enum OpalMessageType {
-   OPAL_MSG_ASYNC_COMP = 0,
+   OPAL_MSG_ASYNC_COMP = 0,/* params[0] = token, params[1] = rc,
+* additional params function-specific
+*/
OPAL_MSG_MEM_ERR,
OPAL_MSG_EPOW,
OPAL_MSG_SHUTDOWN,
@@ -853,6 +857,12 @@ extern void opal_notifier_update_evt(uint64_t evt_mask, 
uint64_t evt_val);
 extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
 extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
 
+extern int __opal_async_get_token(void);
+extern int opal_async_get_token_interruptible(void);
+extern int __opal_async_release_token(int token);
+extern int opal_async_release_token(int token);
+extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
+
 extern void hvc_opal_init_early(void);
 
 struct rtc_time;
diff --git a/arch/powerpc/platforms/powernv/Makefile 
b/arch/powerpc/platforms/powernv/Makefile
index 8d767fd..c0f85ea 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,4 +1,4 @@
-obj-y  += setup.o opal-takeover.o opal-wrappers.o opal.o
+obj-y  += setup.o opal-takeover.o opal-wrappers.o opal.o 
opal-async.o
 obj-y  += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
 obj-y  += rng.o
 
diff --git a/arch/powerpc/platforms/powernv/opal-async.c 
b/arch/powerpc/platforms/powernv/opal-async.c
new file mode 100644
index 000..cd0c135
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-async.c
@@ -0,0 +1,203 @@
+/*
+ * PowerNV OPAL asynchronous completion interfaces
+ *
+ * Copyright 2013 IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/slab.h
+#include linux/sched.h
+#include linux/semaphore.h
+#include linux/spinlock.h
+#include linux/wait.h
+#include linux/gfp.h
+#include linux/of.h
+#include asm/opal.h
+
+#define N_ASYNC_COMPLETIONS64
+
+static DECLARE_BITMAP(opal_async_complete_map, N_ASYNC_COMPLETIONS) = {~0UL};
+static DECLARE_BITMAP(opal_async_token_map, N_ASYNC_COMPLETIONS);
+static DECLARE_WAIT_QUEUE_HEAD(opal_async_wait);
+static DEFINE_SPINLOCK(opal_async_comp_lock);
+static struct semaphore opal_async_sem;
+static struct opal_msg *opal_async_responses;
+static unsigned int opal_max_async_tokens;
+
+int __opal_async_get_token(void)
+{
+   unsigned long flags;
+   int token;
+
+   spin_lock_irqsave(opal_async_comp_lock, flags);
+   token = find_first_bit(opal_async_complete_map, opal_max_async_tokens);
+   if (token = opal_max_async_tokens) {
+   token = -EBUSY;
+   goto out;
+   }
+
+   if (__test_and_set_bit(token, opal_async_token_map)) {
+   token = -EBUSY;
+   goto out;
+   }
+
+   __clear_bit(token, opal_async_complete_map);
+
+out:
+   spin_unlock_irqrestore(opal_async_comp_lock, flags);
+   return token;
+}
+
+int opal_async_get_token_interruptible(void)
+{
+   int token;
+
+   /* Wait until a token is available */
+   if (down_interruptible(opal_async_sem))
+   return -ERESTARTSYS;
+
+   token = __opal_async_get_token();
+   if (token  0)
+   up(opal_async_sem);
+
+   return token;
+}
+
+int __opal_async_release_token(int token)
+{
+   unsigned 

[PATCH] powerpc/powernv: Enable reading and updating of system parameters

2014-03-06 Thread Neelesh Gupta
This patch enables reading and updating of system parameters through
OPAL call.

Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
 arch/powerpc/include/asm/opal.h|   14 +
 arch/powerpc/platforms/powernv/Makefile|2 
 arch/powerpc/platforms/powernv/opal-sysparam.c |  290 
 arch/powerpc/platforms/powernv/opal-wrappers.S |2 
 arch/powerpc/platforms/powernv/opal.c  |2 
 5 files changed, 309 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/platforms/powernv/opal-sysparam.c

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 90fad59..60b3edc 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -159,6 +159,8 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_GET_MSG   85
 #define OPAL_CHECK_ASYNC_COMPLETION86
 #define OPAL_SYNC_HOST_REBOOT  87
+#define OPAL_GET_PARAM 89
+#define OPAL_SET_PARAM 90
 
 #ifndef __ASSEMBLY__
 
@@ -398,6 +400,13 @@ enum OpalLPCAddressType {
OPAL_LPC_FW = 2,
 };
 
+/* System parameter permission */
+enum OpalSysparamPerm {
+   OPAL_SYSPARAM_READ  = 0x1,
+   OPAL_SYSPARAM_WRITE = 0x2,
+   OPAL_SYSPARAM_RW= (OPAL_SYSPARAM_READ | OPAL_SYSPARAM_WRITE),
+};
+
 struct opal_msg {
uint32_t msg_type;
uint32_t reserved;
@@ -834,6 +843,10 @@ int64_t opal_update_flash(uint64_t blk_list);
 int64_t opal_get_msg(uint64_t buffer, size_t size);
 int64_t opal_check_completion(uint64_t buffer, size_t size, uint64_t token);
 int64_t opal_sync_host_reboot(void);
+int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
+   size_t length);
+int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
+   size_t length);
 
 /* Internal functions */
 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int 
depth, void *data);
@@ -871,6 +884,7 @@ extern void opal_get_rtc_time(struct rtc_time *tm);
 extern unsigned long opal_get_boot_time(void);
 extern void opal_nvram_init(void);
 extern void opal_flash_init(void);
+extern void opal_sys_param_init(void);
 
 extern int opal_machine_check(struct pt_regs *regs);
 
diff --git a/arch/powerpc/platforms/powernv/Makefile 
b/arch/powerpc/platforms/powernv/Makefile
index c0f85ea..e6166d3 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,5 +1,5 @@
 obj-y  += setup.o opal-takeover.o opal-wrappers.o opal.o 
opal-async.o
-obj-y  += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o
+obj-y  += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o 
opal-sysparam.o
 obj-y  += rng.o
 
 obj-$(CONFIG_SMP)  += smp.o
diff --git a/arch/powerpc/platforms/powernv/opal-sysparam.c 
b/arch/powerpc/platforms/powernv/opal-sysparam.c
new file mode 100644
index 000..0bd249a
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-sysparam.c
@@ -0,0 +1,290 @@
+/*
+ * PowerNV system parameter code
+ *
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include linux/kobject.h
+#include linux/mutex.h
+#include linux/slab.h
+#include linux/of.h
+#include linux/gfp.h
+#include linux/stat.h
+#include asm/opal.h
+
+#define MAX_PARAM_DATA_LEN 64
+
+static DEFINE_MUTEX(opal_sysparam_mutex);
+static struct kobject *sysparam_kobj;
+static void *param_data_buf;
+
+struct param_attr {
+   struct list_head list;
+   u32 param_id;
+   u32 param_size;
+   struct kobj_attribute kobj_attr;
+};
+
+static int opal_get_sys_param(u32 param_id, u32 length, void *buffer)
+{
+   struct opal_msg msg;
+   int ret, token;
+
+   token = opal_async_get_token_interruptible();
+   if (token  0) {
+   if (token != -ERESTARTSYS)
+   pr_err(%s: Couldn't get the token, returning\n,
+   __func__);
+   ret = token;
+   goto out;
+   }
+
+   ret = opal_get_param(token, param_id, (u64)buffer, length);
+   if (ret 

[PATCH 0/2] Enable powernv based platform sensors

2014-03-06 Thread Neelesh Gupta
This patchset contains the enablement code to expose platform sensor data
on powernv platform. First patch fetches the sensor data from the firmware
and second patch being an hwmon driver, enables the sysfs interfaces.

---

Neelesh Gupta (1):
  powerpc/powernv: Enable fetching of platform sensor data

Shivaprasad G Bhat (1):
  powerpc/powernv: hwmon driver for power values, fan rpm and temperature


 arch/powerpc/include/asm/opal.h|4 
 arch/powerpc/platforms/powernv/Makefile|2 
 arch/powerpc/platforms/powernv/opal-sensor.c   |   64 +++
 arch/powerpc/platforms/powernv/opal-wrappers.S |1 
 drivers/hwmon/Kconfig  |8 
 drivers/hwmon/Makefile |1 
 drivers/hwmon/ibmpowernv.c |  529 
 7 files changed, 608 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/platforms/powernv/opal-sensor.c
 create mode 100644 drivers/hwmon/ibmpowernv.c

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[PATCH 1/2] powerpc/powernv: Enable fetching of platform sensor data

2014-03-06 Thread Neelesh Gupta
This patch enables fetching of various platform sensor data through
OPAL and expects a sensor handle from the driver to pass to OPAL.

Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
 arch/powerpc/include/asm/opal.h|4 ++
 arch/powerpc/platforms/powernv/Makefile|2 -
 arch/powerpc/platforms/powernv/opal-sensor.c   |   64 
 arch/powerpc/platforms/powernv/opal-wrappers.S |1 
 4 files changed, 70 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/platforms/powernv/opal-sensor.c

diff --git a/arch/powerpc/include/asm/opal.h b/arch/powerpc/include/asm/opal.h
index 60b3edc..a1cc4dd 100644
--- a/arch/powerpc/include/asm/opal.h
+++ b/arch/powerpc/include/asm/opal.h
@@ -159,6 +159,7 @@ extern int opal_enter_rtas(struct rtas_args *args,
 #define OPAL_GET_MSG   85
 #define OPAL_CHECK_ASYNC_COMPLETION86
 #define OPAL_SYNC_HOST_REBOOT  87
+#define OPAL_SENSOR_READ   88
 #define OPAL_GET_PARAM 89
 #define OPAL_SET_PARAM 90
 
@@ -847,6 +848,8 @@ int64_t opal_get_param(uint64_t token, uint32_t param_id, 
uint64_t buffer,
size_t length);
 int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
size_t length);
+int64_t opal_sensor_read(uint32_t sensor_hndl, int token,
+   uint32_t *sensor_data);
 
 /* Internal functions */
 extern int early_init_dt_scan_opal(unsigned long node, const char *uname, int 
depth, void *data);
@@ -875,6 +878,7 @@ extern int opal_async_get_token_interruptible(void);
 extern int __opal_async_release_token(int token);
 extern int opal_async_release_token(int token);
 extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
+extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
 
 extern void hvc_opal_init_early(void);
 
diff --git a/arch/powerpc/platforms/powernv/Makefile 
b/arch/powerpc/platforms/powernv/Makefile
index e6166d3..00ae938 100644
--- a/arch/powerpc/platforms/powernv/Makefile
+++ b/arch/powerpc/platforms/powernv/Makefile
@@ -1,6 +1,6 @@
 obj-y  += setup.o opal-takeover.o opal-wrappers.o opal.o 
opal-async.o
 obj-y  += opal-rtc.o opal-nvram.o opal-lpc.o opal-flash.o 
opal-sysparam.o
-obj-y  += rng.o
+obj-y  += rng.o opal-sensor.o
 
 obj-$(CONFIG_SMP)  += smp.o
 obj-$(CONFIG_PCI)  += pci.o pci-p5ioc2.o pci-ioda.o
diff --git a/arch/powerpc/platforms/powernv/opal-sensor.c 
b/arch/powerpc/platforms/powernv/opal-sensor.c
new file mode 100644
index 000..663cc9c
--- /dev/null
+++ b/arch/powerpc/platforms/powernv/opal-sensor.c
@@ -0,0 +1,64 @@
+/*
+ * PowerNV sensor code
+ *
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include linux/delay.h
+#include linux/mutex.h
+#include asm/opal.h
+
+static DEFINE_MUTEX(opal_sensor_mutex);
+
+/*
+ * This will return sensor information to driver based on the requested sensor
+ * handle. A handle is an opaque id for the powernv, read by the driver from 
the
+ * device tree..
+ */
+int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data)
+{
+   int ret, token;
+   struct opal_msg msg;
+
+   token = opal_async_get_token_interruptible();
+   if (token  0) {
+   pr_err(%s: Couldn't get the token, returning\n, __func__);
+   ret = token;
+   goto out;
+   }
+
+   mutex_lock(opal_sensor_mutex);
+   ret = opal_sensor_read(sensor_hndl, token, sensor_data);
+   if (ret != OPAL_ASYNC_COMPLETION)
+   goto out_token;
+
+   ret = opal_async_wait_response(token, msg);
+   if (ret) {
+   pr_err(%s: Failed to wait for the async response, %d\n,
+   __func__, ret);
+   goto out_token;
+   }
+
+   ret = msg.params[1];
+
+out_token:
+   mutex_unlock(opal_sensor_mutex);
+   opal_async_release_token(token);
+out:
+   return ret;
+}
+EXPORT_SYMBOL_GPL(opal_get_sensor_data);
diff --git a/arch/powerpc/platforms/powernv/opal-wrappers.S 
b/arch/powerpc/platforms/powernv/opal-wrappers.S
index 

[PATCH 2/2] powerpc/powernv: hwmon driver for power values, fan rpm and temperature

2014-03-06 Thread Neelesh Gupta
From: Shivaprasad G Bhat sb...@linux.vnet.ibm.com

This patch adds basic kernel enablement for reading power values, fan
speed rpm and temperature values on powernv platforms which will
be exported to user space through sysfs interface.

Signed-off-by: Shivaprasad G Bhat sb...@linux.vnet.ibm.com
Signed-off-by: Neelesh Gupta neele...@linux.vnet.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
 drivers/hwmon/Kconfig  |8 +
 drivers/hwmon/Makefile |1 
 drivers/hwmon/ibmpowernv.c |  529 
 3 files changed, 538 insertions(+)
 create mode 100644 drivers/hwmon/ibmpowernv.c

diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 5ce43d8..ad4cdcb 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -557,6 +557,14 @@ config SENSORS_IBMPEX
  This driver can also be built as a module.  If so, the module
  will be called ibmpex.
 
+config SENSORS_IBMPOWERNV
+   tristate IBM PowerNv Platform temperature/power/fan sensor
+   depends on PPC_POWERNV
+   default y
+   help
+ If you say yes here you get support for the temperature/fan/power
+ sensors on your platform.
+
 config SENSORS_IIO_HWMON
tristate Hwmon driver that uses channels specified via iio maps
depends on IIO
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index ec7cde0..807e172 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -70,6 +70,7 @@ obj-$(CONFIG_SENSORS_ULTRA45) += ultra45_env.o
 obj-$(CONFIG_SENSORS_I5K_AMB)  += i5k_amb.o
 obj-$(CONFIG_SENSORS_IBMAEM)   += ibmaem.o
 obj-$(CONFIG_SENSORS_IBMPEX)   += ibmpex.o
+obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o
 obj-$(CONFIG_SENSORS_IIO_HWMON) += iio_hwmon.o
 obj-$(CONFIG_SENSORS_INA209)   += ina209.o
 obj-$(CONFIG_SENSORS_INA2XX)   += ina2xx.o
diff --git a/drivers/hwmon/ibmpowernv.c b/drivers/hwmon/ibmpowernv.c
new file mode 100644
index 000..b7b1297
--- /dev/null
+++ b/drivers/hwmon/ibmpowernv.c
@@ -0,0 +1,529 @@
+/*
+ * hwmon driver for temperature/power/fan on IBM PowerNV platform
+ * Copyright (C) 2013 IBM
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include linux/init.h
+#include linux/module.h
+#include linux/kernel.h
+#include linux/hwmon.h
+#include linux/hwmon-sysfs.h
+#include linux/of.h
+#include linux/slab.h
+
+#include linux/jiffies.h
+#include linux/platform_device.h
+#include asm/opal.h
+#include linux/err.h
+
+MODULE_DESCRIPTION(IBM PowerNV Platform power/temp/fan sensor hwmon module);
+MODULE_LICENSE(GPL);
+
+#define MAX_ATTR_LENGTH32
+
+/* Device tree sensor name prefixes. The device tree has the names in the
+ * format cooling-fan#2-faulted where the cooling-fan is the sensor type,
+ * 2 is the sensor count, and faulted is the sensor data attribute type.
+ */
+#define DT_FAULT_ATTR_SUFFIX   faulted
+#define DT_DATA_ATTR_SUFFIXdata
+#define DT_THRESHOLD_ATTR_SUFFIX   thrs
+
+enum sensors {
+   FAN,
+   TEMPERATURE,
+   POWERSUPPLY,
+   POWER,
+   MAX_SENSOR_TYPE,
+};
+
+enum attributes {
+   INPUT,
+   MINIMUM,
+   MAXIMUM,
+   FAULT,
+   MAX_ATTR_TYPES
+};
+
+static struct sensor_name {
+   char *name;
+   char *compaible;
+} sensor_names[] = {
+   {fan-sensor, ibm,opal-sensor-cooling-fan},
+   {amb-temp-sensor, ibm,opal-sensor-amb-temp},
+   {power-sensor, ibm,opal-sensor-power-supply},
+   {power, ibm,opal-sensor-power}
+};
+
+static const char * const attribute_type_table[] = {
+   input,
+   min,
+   max,
+   fault,
+   NULL
+};
+
+struct pdev_entry {
+   struct list_head list;
+   struct platform_device *pdev;
+   enum sensors type;
+};
+
+static LIST_HEAD(pdev_list);
+
+/* The sensors are categorised on type.
+ *
+ * The sensors of same type are categorised under a common platform device.
+ * So, The pdev is shared by all sensors of same type.
+ * Ex : temp1_input, temp1_max, temp2_input,temp2_max all share same platform
+ * device.
+ *
+ * sensor_data is the Platform device specific data.
+ * There is one hwmon_device instance for all the sensors of same type.
+ * This also holds the list of all sensors with same type but 

Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure

2014-03-06 Thread Anshuman Khandual
On 03/07/2014 09:36 AM, Anshuman Khandual wrote:
 On 02/19/2014 09:36 PM, Sudeep Holla wrote:
 From: Sudeep Holla sudeep.ho...@arm.com

 This patch removes the redundant sysfs cacheinfo code by making use of
 the newly introduced generic cacheinfo infrastructure.

 Signed-off-by: Sudeep Holla sudeep.ho...@arm.com
 Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
 Cc: Paul Mackerras pau...@samba.org
 Cc: linuxppc-dev@lists.ozlabs.org
 ---
  arch/powerpc/kernel/cacheinfo.c | 831 
 ++--
  arch/powerpc/kernel/cacheinfo.h |   8 -
  arch/powerpc/kernel/sysfs.c |   4 -
  3 files changed, 109 insertions(+), 734 deletions(-)
  delete mode 100644 arch/powerpc/kernel/cacheinfo.h

 diff --git a/arch/powerpc/kernel/cacheinfo.c 
 b/arch/powerpc/kernel/cacheinfo.c
 index 2912b87..05b7580 100644
 --- a/arch/powerpc/kernel/cacheinfo.c
 +++ b/arch/powerpc/kernel/cacheinfo.c
 @@ -10,38 +10,10 @@
   * 2 as published by the Free Software Foundation.
   */

 +#include linux/cacheinfo.h
  #include linux/cpu.h
 -#include linux/cpumask.h
  #include linux/kernel.h
 -#include linux/kobject.h
 -#include linux/list.h
 -#include linux/notifier.h
  #include linux/of.h
 -#include linux/percpu.h
 -#include linux/slab.h
 -#include asm/prom.h
 -
 -#include cacheinfo.h
 -
 -/* per-cpu object for tracking:
 - * - a cache kobject for the top-level directory
 - * - a list of index objects representing the cpu's local cache hierarchy
 - */
 -struct cache_dir {
 -struct kobject *kobj; /* bare (not embedded) kobject for cache
 -   * directory */
 -struct cache_index_dir *index; /* list of index objects */
 -};
 -
 -/* index object: each cpu's cache directory has an index
 - * subdirectory corresponding to a cache object associated with the
 - * cpu.  This object's lifetime is managed via the embedded kobject.
 - */
 -struct cache_index_dir {
 -struct kobject kobj;
 -struct cache_index_dir *next; /* next index in parent directory */
 -struct cache *cache;
 -};

  /* Template for determining which OF properties to query for a given
   * cache type */
 @@ -60,11 +32,6 @@ struct cache_type_info {
  const char *nr_sets_prop;
  };

 -/* These are used to index the cache_type_info array. */
 -#define CACHE_TYPE_UNIFIED 0
 -#define CACHE_TYPE_INSTRUCTION 1
 -#define CACHE_TYPE_DATA2
 -
  static const struct cache_type_info cache_type_info[] = {
  {
  /* PowerPC Processor binding says the [di]-cache-*
 @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_info[] 
 = {
  .nr_sets_prop= d-cache-sets,
  },
  {
 -.name= Instruction,
 -.size_prop   = i-cache-size,
 -.line_size_props = { i-cache-line-size,
 - i-cache-block-size, },
 -.nr_sets_prop= i-cache-sets,
 -},
 -{
  .name= Data,
  .size_prop   = d-cache-size,
  .line_size_props = { d-cache-line-size,
   d-cache-block-size, },
  .nr_sets_prop= d-cache-sets,
  },
 +{
 +.name= Instruction,
 +.size_prop   = i-cache-size,
 +.line_size_props = { i-cache-line-size,
 + i-cache-block-size, },
 +.nr_sets_prop= i-cache-sets,
 +},
  };
 
 
 Hey Sudeep,
 
 After applying this patch, the cache_type_info array looks like this.
 
 static const struct cache_type_info cache_type_info[] = {
 {
 /* 
  * PowerPC Processor binding says the [di]-cache-*
  * must be equal on unified caches, so just use
  * d-cache properties.
  */
 .name= Unified,
 .size_prop   = d-cache-size,
 .line_size_props = { d-cache-line-size,
  d-cache-block-size, },
 .nr_sets_prop= d-cache-sets,
 },
 {
 .name= Data,
 .size_prop   = d-cache-size,
 .line_size_props = { d-cache-line-size,
  d-cache-block-size, },
 .nr_sets_prop= d-cache-sets,
 },
 {
 .name= Instruction,
 .size_prop   = i-cache-size,
 .line_size_props = { i-cache-line-size,
  i-cache-block-size, },
 .nr_sets_prop= i-cache-sets,
 },
 };
 
 and this function computes the the array index for any given cache type
 define for PowerPC.
 
 static inline int get_cacheinfo_idx(enum cache_type type)
 {
 if (type == CACHE_TYPE_UNIFIED)
 return 0;
 else
 return type;
 }
 
 These types are define in 

Re: [PATCH v2 14/52] powerpc, sysfs: Fix CPU hotplug callback registration

2014-03-06 Thread Gautham R Shenoy
Hello Ben,

On Fri, Mar 07, 2014 at 01:57:31PM +1100, Benjamin Herrenschmidt wrote:
 On Fri, 2014-02-14 at 13:22 +0530, Srivatsa S. Bhat wrote:
  Subsystems that want to register CPU hotplug callbacks, as well as perform
  initialization for the CPUs that are already online, often do it as shown
  below:
  
  get_online_cpus();
  
  for_each_online_cpu(cpu)
  init_cpu(cpu);
  
  register_cpu_notifier(foobar_cpu_notifier);
  
  put_online_cpus();
 
 This patch breaks a good half of my test configs with:
 
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c: In function 
 'topology_init':
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:979:2: error: 
 implicit declaration of function 'cpu_notifier_register_begin' 
 [-Werror=implicit-function-declaration]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1004:2: error: 
 implicit declaration of function '__register_cpu_notifier' 
 [-Werror=implicit-function-declaration]
 /home/benh/linux-powerpc-test/arch/powerpc/kernel/sysfs.c:1006:2: error: 
 implicit declaration of function 'cpu_notifier_register_done' 
 [-Werror=implicit-function-declaration]
 cc1: all warnings being treated as errors
 make[2]: *** [arch/powerpc/kernel/sysfs.o] Error 1
 make[2]: *** Waiting for unfinished jobs

This patch depends on
[PATCH v2 02/52] CPU hotplug: Provide lockless versions of callback 
registration functions 
of the series (Can be found here: https://lkml.org/lkml/2014/2/14/59).
This particular patch defines 'cpu_notifier_register_begin',
'__register_cpu_notifier', and 'cpu_notifier_register_done' in the
cpu-hotplug core. Are you seeing the build breakage with this patch on
?

--
Thanks and Regards
gautham.

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