[PATCH] powerpc: fix skipping call to early_init_fdt_scan_reserved_mem
From: Rob Herring r...@kernel.org The call to early_init_fdt_scan_reserved_mem will be skipped if reserved-ranges is not found. Move the call earlier so that it is called unconditionally. Signed-off-by: Rob Herring r...@kernel.org Cc: Marek Szyprowski m.szyprow...@samsung.com Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: linuxppc-dev@lists.ozlabs.org Tested-by: Stephen Chivers schiv...@csc.com --- I found this issue in testing of my fdt clean-up series (thanks to Stephen). Since the reserved memory support is new, I don't think it is critical to fix this for 3.15. I plan to include this with my fdt series for 3.16 unless I hear otherwise. Rob arch/powerpc/kernel/prom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index 668aa47..d657549 100644 --- a/arch/powerpc/kernel/prom.c +++ b/arch/powerpc/kernel/prom.c @@ -567,6 +567,8 @@ static void __init early_reserve_mem_dt(void) unsigned long i, len, dt_root; const __be32 *prop; + early_init_fdt_scan_reserved_mem(); + dt_root = of_get_flat_dt_root(); prop = of_get_flat_dt_prop(dt_root, reserved-ranges, len); @@ -589,8 +591,6 @@ static void __init early_reserve_mem_dt(void) memblock_reserve(base, size); } } - - early_init_fdt_scan_reserved_mem(); } static void __init early_reserve_mem(void) -- 1.9.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: Add cpu family documentation
On Tue, 2014-02-04 at 16:43 -0600, Scott Wood wrote: On Sat, 2014-02-01 at 15:35 +1100, Michael Ellerman wrote: This patch adds some documentation on the different cpu families supported by arch/powerpc. Signed-off-by: Michael Ellerman m...@ellerman.id.au --- v2: Reworked formatting to avoid wrapping. Fixed up Freescale details. Documentation/powerpc/cpu_families.txt | 227 + 1 file changed, 227 insertions(+) create mode 100644 Documentation/powerpc/cpu_families.txt diff --git a/Documentation/powerpc/cpu_families.txt b/Documentation/powerpc/cpu_families.txt new file mode 100644 index 000..fa4f159 --- /dev/null +++ b/Documentation/powerpc/cpu_families.txt @@ -0,0 +1,227 @@ +CPU Families + + +This document tries to summarise some of the different cpu families that exist +and are supported by arch/powerpc. + + +Book3S (aka sPAPR) +-- + + - Hash MMU + - Mix of 32 64 bit + + +--+ ++ + | Old POWER | --- | RS64 (threads) | + +--+ ++ + | + | + v + +--+ ++ +---+ + | 601 | --- | 603 | - | 740 | + +--+ ++ +---+ + | | + | | + v v + +--+ ++ +---+ + | 604 | |750 (G3)| - | 750CX | + +--+ ++ +---+ + | | | + | | | + v v v + +--+ ++ +---+ + | 620 (64 bit) | | 7400 || 750CL | + +--+ ++ +---+ + | | | + | | | + v v v + +--+ ++ +---+ + | POWER3/630 | | 7410 || 750FX | + +--+ ++ +---+ + | | + | | + v v + +--+ ++ + | POWER3+| | 7450 | + +--+ ++ + | | + | | + v v + +--+ ++ + |POWER4| | 7455 | + +--+ ++ + | | + | | + v v + +--+ +---+ ++ + | POWER4+| --- | 970 | | 7447 | + +--+ +---+ ++ + | | | + | | | + v v v + +--+ +---++---+ ++ + |POWER5| -- | Cell || 970FX | | 7448 | + +--+ +---++---+ ++ + | | + | | + v v + +--+ +---+ + | POWER5+| | 970MP | + +--+ +---+ + | + | + v + +--+ + | POWER5++ | +
Re: [PATCH V3 2/2] powerpc/pseries: init fault_around_order for pseries
Ingo Molnar mi...@kernel.org writes: * Madhavan Srinivasan ma...@linux.vnet.ibm.com wrote: Performance data for different FAULT_AROUND_ORDER values from 4 socket Power7 system (128 Threads and 128GB memory). perf stat with repeat of 5 is used to get the stddev values. Test ran in v3.14 kernel (Baseline) and v3.15-rc1 for different fault around order values. FAULT_AROUND_ORDER Baseline1 3 4 5 8 Linux build (make -j64) minor-faults47,437,359 35,279,286 25,425,347 23,461,275 22,002,189 21,435,836 times in seconds347.302528420 344.061588460 340.974022391 348.193508116 348.673900158 350.986543618 stddev for time( +- 1.50% ) ( +- 0.73% ) ( +- 1.13% ) ( +- 1.01% ) ( +- 1.89% ) ( +- 1.55% ) %chg time to baseline -0.9% -1.8% 0.2% 0.39% 1.06% Probably too noisy. A little, but 3 still looks like the winner. Linux rebuild (make -j64) minor-faults941,552 718,319 486,625 440,124 410,510 397,416 times in seconds30.56983471831.21963753931.319370649 31.43428547231.97236717431.443043580 stddev for time( +- 1.07% ) ( +- 0.13% ) ( +- 0.43% ) ( +- 0.18% ) ( +- 0.95% ) ( +- 0.58% ) %chg time to baseline 2.1%2.4%2.8% 4.58% 2.85% Here it looks like a speedup. Optimal value: 5+. No, lower time is better. Baseline (no faultaround) wins. etc. It's not a huge surprise that a 64k page arch wants a smaller value than a 4k system. But I agree: I don't see much upside for FAO 0, but I do see downside. Most extreme results: Order 1: 2% loss on recompile. 10% win 4% loss on seq. 9% loss random. Order 3: 2% loss on recompile. 6% win 5% loss on seq. 14% loss on random. Order 4: 2.8% loss on recompile. 10% win 7% loss on seq. 9% loss on random. I'm starting to suspect that maybe workloads ought to be given a choice in this matter, via madvise() or such. I really don't think they'll be able to use it; it'll change far too much with machine and kernel updates. I think we should apply patch #1 (with fixes) to make it a variable, then set it to 0 for PPC. Cheers, Rusty. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] PPC: BOOK3S: Disable/Enable TM looking at the ibm, pa-features device tree entry
Runtime disable transactional memory feature looking at pa-features
device tree entry. This provides a mechanism to disable TM on P8
systems.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kernel/prom.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 668aa4791fd7..537bd7e7db0b 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -161,6 +161,11 @@ static struct ibm_pa_feature {
{CPU_FTR_NODSISRALIGN, 0, 0,1, 1, 1},
{0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
{CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
+ /*
+* We should use CPU_FTR_TM_COMP so that if we disable TM, it won't get
+* enabled via device tree
+*/
+ {CPU_FTR_TM_COMP, 0, 0, 22, 0, 0},
};
static void __init scan_features(unsigned long node, unsigned char *ftrs,
--
1.9.1
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Re: [PATCH V3 2/2] powerpc/pseries: init fault_around_order for pseries
On Wednesday 30 April 2014 12:34 PM, Rusty Russell wrote: Ingo Molnar mi...@kernel.org writes: * Madhavan Srinivasan ma...@linux.vnet.ibm.com wrote: Performance data for different FAULT_AROUND_ORDER values from 4 socket Power7 system (128 Threads and 128GB memory). perf stat with repeat of 5 is used to get the stddev values. Test ran in v3.14 kernel (Baseline) and v3.15-rc1 for different fault around order values. FAULT_AROUND_ORDER Baseline1 3 4 5 8 Linux build (make -j64) minor-faults47,437,359 35,279,286 25,425,347 23,461,275 22,002,189 21,435,836 times in seconds347.302528420 344.061588460 340.974022391 348.193508116 348.673900158 350.986543618 stddev for time( +- 1.50% ) ( +- 0.73% ) ( +- 1.13% ) ( +- 1.01% ) ( +- 1.89% ) ( +- 1.55% ) %chg time to baseline -0.9% -1.8% 0.2%0.39% 1.06% Probably too noisy. A little, but 3 still looks like the winner. Linux rebuild (make -j64) minor-faults941,552 718,319 486,625 440,124 410,510 397,416 times in seconds30.56983471831.21963753931.319370649 31.43428547231.97236717431.443043580 stddev for time( +- 1.07% ) ( +- 0.13% ) ( +- 0.43% ) ( +- 0.18% ) ( +- 0.95% ) ( +- 0.58% ) %chg time to baseline 2.1%2.4% 2.8%4.58% 2.85% Here it looks like a speedup. Optimal value: 5+. No, lower time is better. Baseline (no faultaround) wins. etc. It's not a huge surprise that a 64k page arch wants a smaller value than a 4k system. But I agree: I don't see much upside for FAO 0, but I do see downside. Most extreme results: Order 1: 2% loss on recompile. 10% win 4% loss on seq. 9% loss random. Order 3: 2% loss on recompile. 6% win 5% loss on seq. 14% loss on random. Order 4: 2.8% loss on recompile. 10% win 7% loss on seq. 9% loss on random. I'm starting to suspect that maybe workloads ought to be given a choice in this matter, via madvise() or such. I really don't think they'll be able to use it; it'll change far too much with machine and kernel updates. I think we should apply patch #1 (with fixes) to make it a variable, then set it to 0 for PPC. Ok. Will do. Thanks for review With regards Maddy Cheers, Rusty. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/3] Add new ptrace request macros on PowerPC
On 04/30/2014 05:59 AM, Michael Neuling wrote: Anshuman Khandual khand...@linux.vnet.ibm.com wrote: On 04/29/2014 01:52 PM, Michael Neuling wrote: That's not what that patch does. It shouldn't make any user visible changes to DSCR or PPR. It may not when it runs uninterrupted but after the tracee process has stopped, thread.dscr reflects the default DSCR value as mentioned before. This can be proved by changing the dscr_default value in arch/powerpc/sysfs.c file. The intention with DSCR is that if the user changes the DSCR, the kernel should always save/restore it. If you are seeing something else, then that is a bug. Anton has a test case for this here: http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c If that is failing, then there is a bug that we need to fix. Anton's above DSCR test passed. The PPR is the same, except that the kernel can change it over a syscall. Over syscall PPR and DSCR may change. Sorry, this should be only PPR. DSCR shouldn't change over a syscall, at least that's the intention. Depending on your test case, that may be your problem. I would guess when the tracee process stops for ptrace analysis, tm_reclaim or tm_recheckpoint path might be crossed which is causing this dscr_default value to go into thread_struct. That shouldn't happen. If that's happening, it's a bug. I would believe this is happening. Also after reverting the commit e9bdc3d6143d1c4b8d8ce5231, thread.dscr reflects the same value as that of thread.tm_dscr which is the check pointed DSCR register value just before the transaction started. So even the NIP has moved passed the point where the user changes DSCR inside the transaction, thread.dscr is unable to capture that latest value. But thread.dscr must contain the latest user changed value of DSCR which is definitely not happening here. So there is a problem we need to fix. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/6] Implement split core for POWER8
On 30.04.14 07:09, Michael Neuling wrote: This patch series implements split core mode on POWER8. This enables up to 4 subcores per core which can each independently run guests (per guest SPRs like SDR1, LPIDR etc are replicated per subcore). Lots more documentation on this feature in the code and commit messages. Most of this code is in the powernv platform but there's a couple of KVM specific patches too. Alex: If you're happy with the KVM patches, please ACK them and benh can hold this series. Alex, Any chance we can get an ACK on these two KVM patches so benh can put this series in his next branch? For patches 1/6 and 5/6: Acked-by: Alexander Graf ag...@suse.de However, please make sure to get Paul's ack as well. Alex ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
GNU binutils PowerPC VLE
Hello, I know this topic does not exactly fit this mailing list, but I think it's better to ask here than on binutils. I need to assemble and disassemble some PowerPC VLE (variable length encoding) e200 code. Binutils as of 2.23.2 support VLE. But when I try to use objdump -D with -m powerpc:vle or -M vle I get plain 32-bit powerpc ISA disassembly (instead of 16bit instructions). Tried to change input file format, endianity, etc. What am I doing wrong? Thank you, Martin ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 00/13] Refactor pci_is_brdige() to simplify code
On Fri, Apr 25, 2014 at 3:18 AM, Yijing Wang wangyij...@huawei.com wrote: This patchset rename the current pci_is_bridge() to pci_has_subordinate(), and introduce a new pci_is_bridge() which determine pci bridge by check dev-hdr_type. The new one is more accurate. PCIe Spec define the pci device is a bridge by the dev-hdr_type = 0x01 || 0x02. This needs to be posted to the linux-pci list. The fact that it wasn't means it's not in patchwork, so it's not on my to-do list. Currently we have one interface: pci_is_bridge(). After your series, we would have two interfaces: pci_is_bridge() and pci_has_subordinate(). Presumably, both are used, and you should explain how you decided which to use at each place. I assume the difference is that the old pci_is_bridge() is true for a bridge that has a subordinate bus. The new pci_is_bridge() is true for any bridge, even if there is no subordinate bus. When do we even have a bridge with no subordinate bus? This is the sort of stuff you need to explain so we know why we should apply these patches. Bjorn Yijing Wang (13): PCI: rename pci_is_bridge() to pci_has_subordinate() PCI: Introduce new pci_is_bridge() helper function PCI: Use new pci_is_bridge() to simplify code x86/PCI: Use new pci_is_bridge() to simplify code IA64/PCI: Use new pci_is_bridge() to simplify code powerpc/PCI: Use new pci_is_bridge() to simplify code sparc/PCI: Use new pci_is_bridge() to simplify code PCI, rpaphp: Use new pci_is_bridge() to simplify code PCI, shpchp: Use new pci_is_bridge() to simplify code PCI, cpcihp: Use new pci_is_bridge() to simplify code PCI, acpiphp: Use new pci_is_bridge() to simplify code PCI, pcmcia: Use new pci_is_bridge() to simplify code PCI, pciehp: Use new pci_is_bridge() to simplify code arch/ia64/pci/fixup.c |4 +--- arch/powerpc/kernel/pci-hotplug.c |3 +-- arch/powerpc/kernel/pci_of_scan.c |3 +-- arch/sparc/kernel/pci.c|3 +-- arch/x86/pci/fixup.c |4 +--- drivers/pci/hotplug/acpiphp_glue.c |3 +-- drivers/pci/hotplug/cpci_hotplug_pci.c |3 +-- drivers/pci/hotplug/pciehp_pci.c |3 +-- drivers/pci/hotplug/rpadlpar_core.c|3 +-- drivers/pci/hotplug/shpchp_pci.c |3 +-- drivers/pci/pci-acpi.c |8 +--- drivers/pci/pci-driver.c |8 drivers/pci/pci.h |2 +- drivers/pci/probe.c|3 +-- drivers/pci/setup-bus.c|4 +--- drivers/pcmcia/cardbus.c |3 +-- include/linux/pci.h|6 ++ 17 files changed, 25 insertions(+), 41 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: Add cpu family documentation
On 4/30/2014 1:45 AM, Michael Ellerman wrote: Are 40x considered booke? You tell me. The original 401, 403 and 405 cores predate the actual existence of what we now call Book E. But they most certainly contained features that would eventually become Book E (different timers, software managed TLB, etc.) For the sake of this diagram, I would say yes. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc 32: Provides VIRT_CPU_ACCOUNTING
On Wed, 2014-04-30 at 14:56 +1000, Benjamin Herrenschmidt wrote: On Wed, 2014-03-19 at 17:05 -0500, Scott Wood wrote: On Wed, 2014-03-19 at 22:52 +0100, Christophe Leroy wrote: This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture. Unlike PPC64, PPC32 doesn't provide the PACA register. Therefore the implementation is similar to the one done in the IA64 architecture. It is based on additional information added to the Task Info structure. PACA isn't a register -- just a convention for how Linux uses a GPR. Maybe it's time to use it on PPC32 as well? PACA is actually a data structure and you really really don't want it on ppc32 :-) Having a register point to current works, having a register point to per-cpu data instead works too (ie, change what we do today), but don't introduce a PACA *please* :-) What is special about 64-bit that warrants doing things differently from 32-bit? What is the difference between PACA and per-cpu data, other than the obscure name? -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: Add cpu family documentation
On Wed, 2014-04-30 at 13:14 -0500, Tom Musta wrote: On 4/30/2014 1:45 AM, Michael Ellerman wrote: Are 40x considered booke? You tell me. The original 401, 403 and 405 cores predate the actual existence of what we now call Book E. But they most certainly contained features that would eventually become Book E (different timers, software managed TLB, etc.) For the sake of this diagram, I would say yes. CONFIG_BOOKE doesn't get set on 40x builds... -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: Add cpu family documentation
On Wed, 2014-04-30 at 16:45 +1000, Michael Ellerman wrote: On Tue, 2014-02-04 at 16:43 -0600, Scott Wood wrote: Missing e300 (603 derivative) and e600 (7448 derivative). Happy to add them, where do they hang off? e300 hangs off 603 and e600 hangs off 7448. :-) +Motorola/Freescale 8xx +-- + + - Software loaded with hardware assist. + - All 32 bit + + +--+ + | 8xx | + +--+ + | + | + v + +--+ + | 850 | + +--+ Is the core of MPC850 different from other MPC8xx? Dunno, maybe someone who works at Freescale knows ;) I think they're the same -- I was just wondering if you had some difference in mind that led you to single it out. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: Add cpu family documentation
On Wednesday 30 April 2014 16:45:08 Michael Ellerman wrote: + v v + +--+ +---+ ++ + | POWER4+| --- | 970 | | 7447 | + +--+ +---+ ++ + | | | + | | | + v v v + +--+ +---++---+ ++ + |POWER5| -- | Cell || 970FX | | 7448 | + +--+ +---++---+ ++ + | | + | | + v v + +--+ +---+ + | POWER5+| | 970MP | + +--+ +---+ + | + | + v + +--+ + | POWER5++ | + +--+ + | + | + v + +--+ + |POWER6| + +--+ + | + | + v I think Cell and POWER6 are somewhat misrepresented here. Cell (together with Xenon, which is the same core) is basically an independent development unrelated to POWER5. POWER6 shares a lot of concepts with Cell, and IIRC is much closer related to Cell than to POWER5, though I don't remember which one was designed first. Probably code went both ways, and POWER6 got some enhancements that didn't make it into the Cell PPU. They both contain VMX (Altivec) and have an in-order pipeline. POWER6 is also closely related to z10, while POWER7 then includes aspects of both POWER5 and POWER6 but no longer shares much with z196, which in turn is derived from z10. Arnd ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/1] powerpc: crtsaveres.o needed only when -Os flag is enabled
On Wed, Apr 30, 2014 at 03:14:54PM +1000, Benjamin Herrenschmidt wrote: On Tue, 2014-04-29 at 10:38 -0500, Brian W Hart wrote: CHECKFLAGS += -m$(CONFIG_WORD_SIZE) -D__powerpc__ -D__powerpc$(CONFIG_WORD_SIZE)__ +ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE KBUILD_LDFLAGS_MODULE += arch/powerpc/lib/crtsavres.o +endif + # No AltiVec or VSX instructions when building kernel KBUILD_CFLAGS += $(call cc-option,-mno-altivec) I didn't try building a kernel or in-tree modules, but I confirmed that it allows building of out-of-tree modules when crtsavres.o is not present (e.g. as for a distro install where the kernel headers are provided by package, rather than being manually prepared from the sources). Tested-by: Brian W Hart ha...@linux.vnet.ibm.com I still don't like it. What guarantee do we have that gcc will never call into this with other optimisation settings ? It might decide one day that calling out for saving a large pile of registers is still more efficient than unrolling the whole lot, including for speed. This patch operates on the assumption that arch/powerpc/lib/crtsavres.o is needed only if the code is compiled with -Os. Are you saying this assumption is wrong? Besides that doesn't fix the root problem. We want to be able to build the kernel with CONFIG_CC_OPTIMIZE_FOR_SIZE and still have modules. And this patch will not stop you from doing that. You can compile your kernel with CONFIG_CC_OPTIMIZE_FOR_SIZE and modules will be built because arch/powerpc/lib/crtsavres.o will be linked with the module. Now, if the arch/powerpc/lib/crtsavres.o file does not exist, that is a different problem and has to be fixed by the distros for out-of-tree modules. So a better solution needs to be found. I don't know what that solution is (we might want to look at what other archs are doing maybe ?), could be to include crtsaveres.S in the build of every module (we really don't want to EXPORT_SYMBOL these guys), but that would mean having it installed somewhere with the kernel headers for out-of-tree modules... Currently crtsaveres.o is expected to be in the build during the linking stage of the module. You suggest instead have crtsaveres.S and get it compiled and linked? If necessary, involve lkml, Rusty etc... but this patch is crap. I dont see other archs having this problem. Possibly because there linker have inbuilt capabilities to satisfy the missing symbols? Alan Modra did mention that the ppc linker will soon have the capability to handle -Os compiled code, without the help of arch/powerpc/lib/crtsavres.o. However this patch is not about having crtsavres.o or crtsaveres.S Its about not needing crtsavres.o if the code is not compiled for space optimization using -Os. If you say that the assumption is wrong, than yes the code is crap :) RP ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: move epapr paravirt init of power_save to an initcall
On 30.04.14 21:54, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13..c49b69c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -52,11 +52,6 @@ static int __init early_init_dt_scan_epapr(unsigned long
node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -69,3 +64,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init_dt_scan(unsigned long node,
+ const char *uname,
+ int depth, void *data)
+{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_flat_dt_prop(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+ return 0;
+}
+
+static int __init epapr_idle_init(void)
+{
+ if (epapr_paravirt_enabled)
+ of_scan_flat_dt(epapr_idle_init_dt_scan, NULL);
Doesn't this scan all nodes? We only want to match on
/hypervisor/has-idle, no?
Alex
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RE: [PATCH] powerpc: move epapr paravirt init of power_save to an initcall
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, April 30, 2014 2:56 PM
To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: move epapr paravirt init of power_save to
an initcall
On 30.04.14 21:54, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13..c49b69c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -52,11 +52,6 @@ static int __init early_init_dt_scan_epapr(unsigned
long node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -69,3 +64,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init_dt_scan(unsigned long node,
+ const char *uname,
+ int depth, void *data)
+{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_flat_dt_prop(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+ return 0;
+}
+
+static int __init epapr_idle_init(void)
+{
+ if (epapr_paravirt_enabled)
+ of_scan_flat_dt(epapr_idle_init_dt_scan, NULL);
Doesn't this scan all nodes? We only want to match on
/hypervisor/has-idle, no?
I cut/pasted from the approach the existing code in that file
took, but yes you're right we just need the one property.
Let me respin that to look at the hypervisor node only.
Stuart
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Re: [PATCH] powerpc: move epapr paravirt init of power_save to an initcall
On 30.04.14 22:03, Stuart Yoder wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, April 30, 2014 2:56 PM
To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: move epapr paravirt init of power_save to
an initcall
On 30.04.14 21:54, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13..c49b69c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -52,11 +52,6 @@ static int __init early_init_dt_scan_epapr(unsigned
long node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -69,3 +64,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init_dt_scan(unsigned long node,
+ const char *uname,
+ int depth, void *data)
+{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_flat_dt_prop(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+ return 0;
+}
+
+static int __init epapr_idle_init(void)
+{
+ if (epapr_paravirt_enabled)
+ of_scan_flat_dt(epapr_idle_init_dt_scan, NULL);
Doesn't this scan all nodes? We only want to match on
/hypervisor/has-idle, no?
I cut/pasted from the approach the existing code in that file
took, but yes you're right we just need the one property.
Let me respin that to look at the hypervisor node only.
The other function aborts early if it doesn't find a
hcall-instructions property. I'm still surprised we don't limit the
scope to /hypervisor at all though. Is this on purpose maybe?
Alex
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Re: [PATCH] powerpc: move epapr paravirt init of power_save to an initcall
On 30.04.14 22:03, Stuart Yoder wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, April 30, 2014 2:56 PM
To: Yoder Stuart-B08248; b...@kernel.crashing.org; Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc: move epapr paravirt init of power_save to
an initcall
On 30.04.14 21:54, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13..c49b69c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -52,11 +52,6 @@ static int __init early_init_dt_scan_epapr(unsigned
long node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -69,3 +64,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init_dt_scan(unsigned long node,
+ const char *uname,
+ int depth, void *data)
+{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_flat_dt_prop(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+ return 0;
+}
+
+static int __init epapr_idle_init(void)
+{
+ if (epapr_paravirt_enabled)
+ of_scan_flat_dt(epapr_idle_init_dt_scan, NULL);
Doesn't this scan all nodes? We only want to match on
/hypervisor/has-idle, no?
I cut/pasted from the approach the existing code in that file
took, but yes you're right we just need the one property.
Let me respin that to look at the hypervisor node only.
Yeah, the same commit that introduced the breakage on has-idle also
removed the explicit check for /hypervisor.
Laurentiu, was this change on purpose?
commit 4e21b94c9c644c43223878f4c848e852743e789c
Author: Laurentiu TUDOR laurentiu.tu...@freescale.com
Date: Wed Jul 3 17:13:15 2013 +0300
powerpc/85xx: Move ePAPR paravirt initialization earlier
At console init, when the kernel tries to flush the log buffer
the ePAPR byte-channel based console write fails silently,
losing the buffered messages.
This happens because The ePAPR para-virtualization init isn't
done early enough so that the hcall instruction to be set,
causing the byte-channel write hcall to be a nop.
To fix, change the ePAPR para-virt init to use early device
tree functions and move it in early init.
Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com
Signed-off-by: Scott Wood scottw...@freescale.com
[...]
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index d44a571..6300c13 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -30,22 +30,20 @@ extern u32 epapr_ev_idle_start[];
bool epapr_paravirt_enabled;
-static int __init epapr_paravirt_init(void)
+static int __init early_init_dt_scan_epapr(unsigned long node,
+ const char *uname,
+ int depth, void *data)
{
- struct device_node *hyper_node;
const u32 *insts;
- int len, i;
+ unsigned long len;
+ int i;
- hyper_node = of_find_node_by_path(/hypervisor);
- if (!hyper_node)
- return -ENODEV;
-
- insts = of_get_property(hyper_node, hcall-instructions, len);
+ insts = of_get_flat_dt_prop(node, hcall-instructions, len);
if (!insts)
- return -ENODEV;
+ return 0;
if (len % 4 || len (4 * 4))
- return -ENODEV;
+ return -1;
[...]
Alex
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[PATCH] powerpc: move epapr paravirt init of power_save to an initcall
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 6300c13..c49b69c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -52,11 +52,6 @@ static int __init early_init_dt_scan_epapr(unsigned long
node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -69,3 +64,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init_dt_scan(unsigned long node,
+ const char *uname,
+ int depth, void *data)
+{
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_flat_dt_prop(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+ return 0;
+}
+
+static int __init epapr_idle_init(void)
+{
+ if (epapr_paravirt_enabled)
+ of_scan_flat_dt(epapr_idle_init_dt_scan, NULL);
+
+ return 0;
+}
+
+postcore_initcall(epapr_idle_init);
--
1.7.9.7
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[PATCH][v2] powerpc: move epapr paravirt init of power_save to an initcall
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v2: don't iterate over the entire DT, just look at
the hypervisor node
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..a01df5e 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -53,11 +53,6 @@ static int __init early_init_dt_scan_epapr(unsigned long
node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -70,3 +65,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init(void)
+{
+ struct device_node *node;
+
+ if (!epapr_paravirt_enabled)
+ return 0;
+
+ node = of_find_node_by_path(/hypervisor);
+ if (!node)
+ return -ENODEV;
+
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_property(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+
+ return 0;
+}
+
+postcore_initcall(epapr_idle_init);
--
1.7.9.7
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Re: [PATCH][v2] powerpc: move epapr paravirt init of power_save to an initcall
On 30.04.14 22:20, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
Looks pretty good to me and IMHO should get a CC on stable when it gets
into the tree. One minor nit below.
We still need to clarify whether the omitted check on
early_init_dt_scan_epapr() is on purpose and if not reintroduce it, but
that's a separate issue.
---
-v2: don't iterate over the entire DT, just look at
the hypervisor node
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..a01df5e 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -53,11 +53,6 @@ static int __init early_init_dt_scan_epapr(unsigned long
node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -70,3 +65,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
v
+static int __init epapr_idle_init(void)
+{
+ struct device_node *node;
+
+ if (!epapr_paravirt_enabled)
+ return 0;
+
+ node = of_find_node_by_path(/hypervisor);
+ if (!node)
+ return -ENODEV;
+
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
Please move the #if scope from v to ^. That way we don't waste space /
time / anything on systems that don't bother with the idle hcall.
+ if (of_get_property(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+
+ return 0;
+}
+
+postcore_initcall(epapr_idle_init);
^
Alex
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Re: [PATCH 2/2] PCI/MSI: Phase out pci_enable_msi_block()
On Mon, Apr 14, 2014 at 03:28:34PM +0200, Alexander Gordeev wrote: There are no users of pci_enable_msi_block() function have left. Obsolete it in favor of pci_enable_msi_range() and pci_enable_msi_exact() functions. Hi Bjorn, How about this one? Thanks! -- Regards, Alexander Gordeev agord...@redhat.com ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/powernv: Reduce pseries panic timeout from 180s to 10s
We've already dropped the default pseries timeout to 10s, do
the same for powernv.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/platforms/powernv/setup.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/setup.c
b/arch/powerpc/platforms/powernv/setup.c
index 23aab41..a789307 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -39,6 +39,8 @@
static void __init pnv_setup_arch(void)
{
+ set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
+
/* Initialize SMP */
pnv_smp_init();
--
1.9.1
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Re: [PATCH] powerpc/powernv: Reduce pseries panic timeout from 180s to 10s
On Thu, May 01, 2014 at 07:20:04AM +1000, Anton Blanchard wrote: We've already dropped the default pseries timeout to 10s, do the same for powernv. Why is there pseries in the patch subject rather than powernv? Paul. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc/powernv: Reduce panic timeout from 180s to 10s
We've already dropped the default pseries timeout to 10s, do
the same for powernv.
Signed-off-by: Anton Blanchard an...@samba.org
---
arch/powerpc/platforms/powernv/setup.c | 2 ++
1 file changed, 2 insertions(+)
v2: fix the commit message as Paul pointed out
diff --git a/arch/powerpc/platforms/powernv/setup.c
b/arch/powerpc/platforms/powernv/setup.c
index 23aab41..a789307 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -39,6 +39,8 @@
static void __init pnv_setup_arch(void)
{
+ set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
+
/* Initialize SMP */
pnv_smp_init();
--
1.9.1
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Re: [PATCH][v2] powerpc: move epapr paravirt init of power_save to an initcall
On Wed, 2014-04-30 at 15:20 -0500, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v2: don't iterate over the entire DT, just look at
the hypervisor node
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..a01df5e 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -53,11 +53,6 @@ static int __init early_init_dt_scan_epapr(unsigned long
node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -70,3 +65,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init(void)
+{
+ struct device_node *node;
+
+ if (!epapr_paravirt_enabled)
+ return 0;
+
+ node = of_find_node_by_path(/hypervisor);
+ if (!node)
+ return -ENODEV;
+
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_property(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+
+ return 0;
+}
Why duplicate the search-for-hv-node code? Just have the early init
func set a flag indicating whether has-idle was found, and have
epapr_idle_init act on that flag.
-Scott
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RE: [PATCH][v2] powerpc: move epapr paravirt init of power_save to an initcall
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, April 30, 2014 5:49 PM
To: Yoder Stuart-B08248
Cc: b...@kernel.crashing.org; linuxppc-dev@lists.ozlabs.org;
ag...@suse.de
Subject: Re: [PATCH][v2] powerpc: move epapr paravirt init of power_save
to an initcall
On Wed, 2014-04-30 at 15:20 -0500, Stuart Yoder wrote:
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v2: don't iterate over the entire DT, just look at
the hypervisor node
arch/powerpc/kernel/epapr_paravirt.c | 25 -
1 file changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..a01df5e 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -53,11 +53,6 @@ static int __init early_init_dt_scan_epapr(unsigned
long node,
#endif
}
-#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
- if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
-#endif
-
epapr_paravirt_enabled = true;
return 1;
@@ -70,3 +65,23 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init(void)
+{
+ struct device_node *node;
+
+ if (!epapr_paravirt_enabled)
+ return 0;
+
+ node = of_find_node_by_path(/hypervisor);
+ if (!node)
+ return -ENODEV;
+
+#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
+ if (of_get_property(node, has-idle, NULL))
+ ppc_md.power_save = epapr_ev_idle;
+#endif
+
+ return 0;
+}
Why duplicate the search-for-hv-node code? Just have the early init
func set a flag indicating whether has-idle was found, and have
epapr_idle_init act on that flag.
That's a good idea, and the patch would be quite a bit smaller.
I'll do that and leave the stuff in early_init_dt_scan_epapr() alone
mostly. Then as a separate step we could put back the code that
looks at only /hypervisor (based on feedback from Laurentiu).
Stuart
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[PATCH][v3] powerpc: move epapr paravirt init of power_save to an initcall
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v3
-changed approach slightly, set flag in the dt scanning
code and just look at that flag in the initcall
arch/powerpc/kernel/epapr_paravirt.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..6596cd7 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -30,6 +30,7 @@ extern u32 epapr_ev_idle_start[];
#endif
bool epapr_paravirt_enabled;
+bool epapr_has_idle;
static int __init early_init_dt_scan_epapr(unsigned long node,
const char *uname,
@@ -55,7 +56,7 @@ static int __init early_init_dt_scan_epapr(unsigned long node,
#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
+ epapr_has_idle = true;
#endif
epapr_paravirt_enabled = true;
@@ -70,3 +71,12 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init(void)
+{
+ if (epapr_has_idle)
+ ppc_md.power_save = epapr_ev_idle;
+
+ return 0;
+}
+
+postcore_initcall(epapr_idle_init);
--
1.7.9.7
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Re: [PATCH][v3] powerpc: move epapr paravirt init of power_save to an initcall
On Wed, 2014-04-30 at 18:23 -0500, Stuart Yoder wrote: From: Stuart Yoder stuart.yo...@freescale.com some restructuring of epapr paravirt init resulted in ppc_md.power_save being set, and then overwritten to NULL during machine_init. This patch splits the initialization of ppc_md.power_save out into a postcore init call. Signed-off-by: Stuart Yoder stuart.yo...@freescale.com --- -v3 -changed approach slightly, set flag in the dt scanning code and just look at that flag in the initcall arch/powerpc/kernel/epapr_paravirt.c | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/epapr_paravirt.c b/arch/powerpc/kernel/epapr_paravirt.c index 7898be9..6596cd7 100644 --- a/arch/powerpc/kernel/epapr_paravirt.c +++ b/arch/powerpc/kernel/epapr_paravirt.c @@ -30,6 +30,7 @@ extern u32 epapr_ev_idle_start[]; #endif bool epapr_paravirt_enabled; +bool epapr_has_idle; static -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH][v4] powerpc: move epapr paravirt init of power_save to an initcall
From: Stuart Yoder stuart.yo...@freescale.com
some restructuring of epapr paravirt init resulted in
ppc_md.power_save being set, and then overwritten to
NULL during machine_init. This patch splits the
initialization of ppc_md.power_save out into a postcore
init call.
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
---
-v3
-changed approach slightly, set flag in the dt scanning
code and just look at that flag in the initcall
-v4
-made idle flag static
arch/powerpc/kernel/epapr_paravirt.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/epapr_paravirt.c
b/arch/powerpc/kernel/epapr_paravirt.c
index 7898be9..8a7a62c 100644
--- a/arch/powerpc/kernel/epapr_paravirt.c
+++ b/arch/powerpc/kernel/epapr_paravirt.c
@@ -30,6 +30,7 @@ extern u32 epapr_ev_idle_start[];
#endif
bool epapr_paravirt_enabled;
+static bool epapr_has_idle;
static int __init early_init_dt_scan_epapr(unsigned long node,
const char *uname,
@@ -55,7 +56,7 @@ static int __init early_init_dt_scan_epapr(unsigned long node,
#if !defined(CONFIG_64BIT) || defined(CONFIG_PPC_BOOK3E_64)
if (of_get_flat_dt_prop(node, has-idle, NULL))
- ppc_md.power_save = epapr_ev_idle;
+ epapr_has_idle = true;
#endif
epapr_paravirt_enabled = true;
@@ -70,3 +71,12 @@ int __init epapr_paravirt_early_init(void)
return 0;
}
+static int __init epapr_idle_init(void)
+{
+ if (epapr_has_idle)
+ ppc_md.power_save = epapr_ev_idle;
+
+ return 0;
+}
+
+postcore_initcall(epapr_idle_init);
--
1.7.9.7
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Re: [PATCH 2/2] PCI/MSI: Phase out pci_enable_msi_block()
On Mon, Apr 14, 2014 at 03:28:35PM +0200, Alexander Gordeev wrote:
There are no users of pci_enable_msi_block() function have
left. Obsolete it in favor of pci_enable_msi_range() and
pci_enable_msi_exact() functions.
I mistakenly assumed this would have to wait because I thought there were
other pci_enable_msi_block() users that wouldn't be removed until the v3.16
merge window. But I think I was wrong: I put your GenWQE patch in my tree,
and I think that was the last use, so I can just add this patch on top.
But I need a little help understanding the changelog:
Up until now, when enabling MSI mode for a device a single
successful call to arch_msi_check_device() was followed by
a single call to arch_setup_msi_irqs() function.
I understand this part; the following two paths call
arch_msi_check_device() once and then arch_setup_msi_irqs() once:
pci_enable_msi_block
pci_msi_check_device
arch_msi_check_device
msi_capability_init
arch_setup_msi_irqs
pci_enable_msix
pci_msi_check_device
arch_msi_check_device
msix_capability_init
arch_setup_msi_irqs
Yet, if arch_msi_check_device() returned success we should be
able to call arch_setup_msi_irqs() multiple times - while it
returns a number of MSI vectors that could have been allocated
(a third state).
I don't know what you mean by a third state.
Previously we only called arch_msi_check_device() once. After your patch,
pci_enable_msi_range() can call it several times. The only non-trivial
implementation of arch_msi_check_device() is in powerpc, and all the
ppc_md.msi_check_device() possibilities look safe to call multiple times.
After your patch, the pci_enable_msi_range() path can also call
arch_setup_msi_irqs() several times. I don't see a problem with that --
even if the first call succeeds and allocates something, then a subsequent
call fails, I assume the allocations will be cleaned up when
msi_capability_init() calls free_msi_irqs().
This update makes use of the assumption described above. It
could have broke things had the architectures done any pre-
allocations or switch to some state in a call to function
arch_msi_check_device(). But because arch_msi_check_device()
is expected stateless and MSI resources are allocated in a
follow-up call to arch_setup_msi_irqs() we should be fine.
I guess you mean that your patch assumes arch_msi_check_device() is
stateless. That looks like a safe assumption to me.
arch_setup_msi_irqs() is clearly not stateless, but I assume
free_msi_irqs() is enough to clean up any state if we fail.
Bjorn
Signed-off-by: Alexander Gordeev agord...@redhat.com
Cc: linux-m...@linux-mips.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s...@vger.kernel.org
Cc: x...@kernel.org
Cc: linux-...@vger.kernel.org
---
drivers/pci/msi.c | 79 +-
include/linux/pci.h |5 +--
2 files changed, 34 insertions(+), 50 deletions(-)
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 955ab79..fc669ab 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -883,50 +883,6 @@ int pci_msi_vec_count(struct pci_dev *dev)
}
EXPORT_SYMBOL(pci_msi_vec_count);
-/**
- * pci_enable_msi_block - configure device's MSI capability structure
- * @dev: device to configure
- * @nvec: number of interrupts to configure
- *
- * Allocate IRQs for a device with the MSI capability.
- * This function returns a negative errno if an error occurs. If it
- * is unable to allocate the number of interrupts requested, it returns
- * the number of interrupts it might be able to allocate. If it successfully
- * allocates at least the number of interrupts requested, it returns 0 and
- * updates the @dev's irq member to the lowest new interrupt number; the
- * other interrupt numbers allocated to this device are consecutive.
- */
-int pci_enable_msi_block(struct pci_dev *dev, int nvec)
-{
- int status, maxvec;
-
- if (dev-current_state != PCI_D0)
- return -EINVAL;
-
- maxvec = pci_msi_vec_count(dev);
- if (maxvec 0)
- return maxvec;
- if (nvec maxvec)
- return maxvec;
-
- status = pci_msi_check_device(dev, nvec, PCI_CAP_ID_MSI);
- if (status)
- return status;
-
- WARN_ON(!!dev-msi_enabled);
-
- /* Check whether driver already requested MSI-X irqs */
- if (dev-msix_enabled) {
- dev_info(dev-dev, can't enable MSI
- (MSI-X already enabled)\n);
- return -EINVAL;
- }
-
- status = msi_capability_init(dev, nvec);
- return status;
-}
-EXPORT_SYMBOL(pci_enable_msi_block);
-
void pci_msi_shutdown(struct pci_dev *dev)
{
struct msi_desc *desc;
@@ -1132,14 +1088,45 @@ void pci_msi_init_pci_dev(struct pci_dev *dev)
**/
int pci_enable_msi_range(struct pci_dev *dev, int minvec, int maxvec)
{
- int nvec = maxvec;
+ int nvec;
int
[PATCH v2 0/4] KVM: PPC: Read guest instruction from kvmppc_get_last_inst()
Read guest last instruction from kvmppc_get_last_inst() allowing the function to fail in order to emulate again. On bookehv architecture search for the physical address and kmap it, instead of using Load External PID (lwepx) instruction. This fixes an infinite loop caused by lwepx's data TLB miss exception handled in the host and the TODO for execute-but-not-read entries and TLB eviction. Mihai Caraman (4): KVM: PPC: e500mc: Revert add load inst fixup KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1 KVM: PPC: Alow kvmppc_get_last_inst() to fail KVM: PPC: Bookehv: Get vcpu's last instruction for emulation arch/powerpc/include/asm/kvm_book3s.h| 26 - arch/powerpc/include/asm/kvm_booke.h | 5 -- arch/powerpc/include/asm/kvm_ppc.h | 2 + arch/powerpc/include/asm/mmu-book3e.h| 7 ++- arch/powerpc/kvm/book3s.c| 32 +++ arch/powerpc/kvm/book3s.h| 1 + arch/powerpc/kvm/book3s_64_mmu_hv.c | 16 ++ arch/powerpc/kvm/book3s_paired_singles.c | 42 -- arch/powerpc/kvm/book3s_pr.c | 36 +++- arch/powerpc/kvm/booke.c | 14 + arch/powerpc/kvm/booke.h | 3 + arch/powerpc/kvm/bookehv_interrupts.S| 54 ++ arch/powerpc/kvm/e500_mmu_host.c | 98 arch/powerpc/kvm/emulate.c | 18 -- arch/powerpc/kvm/powerpc.c | 10 +++- 15 files changed, 235 insertions(+), 129 deletions(-) -- 1.7.11.7 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 2/4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1
Add defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() to Book3E. Signed-off-by: Mihai Caraman mihai.cara...@freescale.com --- v2: - no change arch/powerpc/include/asm/mmu-book3e.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h index 901dac6..60a949a 100644 --- a/arch/powerpc/include/asm/mmu-book3e.h +++ b/arch/powerpc/include/asm/mmu-book3e.h @@ -40,7 +40,11 @@ /* MAS registers bit definitions */ -#define MAS0_TLBSEL(x) (((x) 28) 0x3000) +#define MAS0_TLBSEL_MASK 0x3000 +#define MAS0_TLBSEL_SHIFT 28 +#define MAS0_TLBSEL(x) (((x) MAS0_TLBSEL_SHIFT) MAS0_TLBSEL_MASK) +#define MAS0_GET_TLBSEL(mas0) (((mas0) MAS0_TLBSEL_MASK) \ + MAS0_TLBSEL_SHIFT) #define MAS0_ESEL_MASK 0x0FFF #define MAS0_ESEL_SHIFT16 #define MAS0_ESEL(x) (((x) MAS0_ESEL_SHIFT) MAS0_ESEL_MASK) @@ -58,6 +62,7 @@ #define MAS1_TSIZE_MASK0x0f80 #define MAS1_TSIZE_SHIFT 7 #define MAS1_TSIZE(x) (((x) MAS1_TSIZE_SHIFT) MAS1_TSIZE_MASK) +#define MAS1_GET_TSIZE(mas1) (((mas1) MAS1_TSIZE_MASK) MAS1_TSIZE_SHIFT) #define MAS2_EPN (~0xFFFUL) #define MAS2_X00x0040 -- 1.7.11.7 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 4/4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation
On bookehv vcpu's last instruction is read using load external pid
(lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need
to be handled by KVM. These exceptions originate from host state
(MSR[GS] = 0) which implies additional checks in DO_KVM macro (beside
the current MSR[GS] = 1) by looking at the Exception Syndrome Register
(ESR[EPID]) and the External PID Load Context Register (EPLC[EGS]).
Doing this on each Data TLB miss exception is obvious too intrusive
for the host.
Get rid of lwepx and acquire last instuction in kvmppc_get_last_inst()
by searching for the physical address and kmap it. This fixes an
infinite loop caused by lwepx's data TLB miss handled in the host
and the TODO for TLB eviction and execute-but-not-read entries.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v2:
- reworked patch description
- used pr_* functions
- addressed cosmetic feedback
arch/powerpc/kvm/bookehv_interrupts.S | 37 --
arch/powerpc/kvm/e500_mmu_host.c | 93 ++-
2 files changed, 101 insertions(+), 29 deletions(-)
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
b/arch/powerpc/kvm/bookehv_interrupts.S
index 925da71..65eff4c 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -122,38 +122,14 @@
1:
.if \flags NEED_EMU
- /*
-* This assumes you have external PID support.
-* To support a bookehv CPU without external PID, you'll
-* need to look up the TLB entry and create a temporary mapping.
-*
-* FIXME: we don't currently handle if the lwepx faults. PR-mode
-* booke doesn't handle it either. Since Linux doesn't use
-* broadcast tlbivax anymore, the only way this should happen is
-* if the guest maps its memory execute-but-not-read, or if we
-* somehow take a TLB miss in the middle of this entry code and
-* evict the relevant entry. On e500mc, all kernel lowmem is
-* bolted into TLB1 large page mappings, and we don't use
-* broadcast invalidates, so we should not take a TLB miss here.
-*
-* Later we'll need to deal with faults here. Disallowing guest
-* mappings that are execute-but-not-read could be an option on
-* e500mc, but not on chips with an LRAT if it is used.
-*/
-
- mfspr r3, SPRN_EPLC /* will already have correct ELPID and EGS */
PPC_STL r15, VCPU_GPR(R15)(r4)
PPC_STL r16, VCPU_GPR(R16)(r4)
PPC_STL r17, VCPU_GPR(R17)(r4)
PPC_STL r18, VCPU_GPR(R18)(r4)
PPC_STL r19, VCPU_GPR(R19)(r4)
- mr r8, r3
PPC_STL r20, VCPU_GPR(R20)(r4)
- rlwimi r8, r6, EPC_EAS_SHIFT - MSR_IR_LG, EPC_EAS
PPC_STL r21, VCPU_GPR(R21)(r4)
- rlwimi r8, r6, EPC_EPR_SHIFT - MSR_PR_LG, EPC_EPR
PPC_STL r22, VCPU_GPR(R22)(r4)
- rlwimi r8, r10, EPC_EPID_SHIFT, EPC_EPID
PPC_STL r23, VCPU_GPR(R23)(r4)
PPC_STL r24, VCPU_GPR(R24)(r4)
PPC_STL r25, VCPU_GPR(R25)(r4)
@@ -163,10 +139,15 @@
PPC_STL r29, VCPU_GPR(R29)(r4)
PPC_STL r30, VCPU_GPR(R30)(r4)
PPC_STL r31, VCPU_GPR(R31)(r4)
- mtspr SPRN_EPLC, r8
- isync
- lwepx r9, 0, r5
- mtspr SPRN_EPLC, r3
+
+ /*
+* We don't use external PID support. lwepx faults would need to be
+* handled by KVM and this implies aditional code in DO_KVM (for
+* DTB_MISS, DSI and LRAT) to check ESR[EPID] and EPLC[EGS] which
+* is too intrusive for the host. Get last instuction in
+* kvmppc_get_last_inst().
+*/
+ li r9, KVM_INST_FETCH_FAILED
stw r9, VCPU_LAST_INST(r4)
.endif
diff --git a/arch/powerpc/kvm/e500_mmu_host.c b/arch/powerpc/kvm/e500_mmu_host.c
index fcccbb3..94b8be0 100644
--- a/arch/powerpc/kvm/e500_mmu_host.c
+++ b/arch/powerpc/kvm/e500_mmu_host.c
@@ -607,11 +607,102 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr,
gpa_t gpaddr,
}
}
+#ifdef CONFIG_KVM_BOOKE_HV
+int kvmppc_ld_inst(struct kvm_vcpu *vcpu, u32 *instr)
+{
+ gva_t geaddr;
+ hpa_t addr;
+ hfn_t pfn;
+ hva_t eaddr;
+ u32 mas0, mas1, mas2, mas3;
+ u64 mas7_mas3;
+ struct page *page;
+ unsigned int addr_space, psize_shift;
+ bool pr;
+ unsigned long flags;
+
+ /* Search TLB for guest pc to get the real address */
+ geaddr = kvmppc_get_pc(vcpu);
+ addr_space = (vcpu-arch.shared-msr MSR_IS) MSR_IR_LG;
+
+ local_irq_save(flags);
+ mtspr(SPRN_MAS6, (vcpu-arch.pid MAS6_SPID_SHIFT) | addr_space);
+ mtspr(SPRN_MAS5, MAS5_SGS | vcpu-kvm-arch.lpid);
+ asm volatile(tlbsx 0, %[geaddr]\n : :
+[geaddr] r (geaddr));
+ mtspr(SPRN_MAS5, 0);
+ mtspr(SPRN_MAS8, 0);
+ mas0 = mfspr(SPRN_MAS0);
+ mas1 = mfspr(SPRN_MAS1);
+ mas2 = mfspr(SPRN_MAS2);
+
[PATCH v2 1/4] KVM: PPC: e500mc: Revert add load inst fixup
The commit 1d628af7 add load inst fixup made an attempt to handle failures generated by reading the guest current instruction. The fixup code that was added works by chance hiding the real issue. Load external pid (lwepx) instruction, used by KVM to read guest instructions, is executed in a subsituted guest translation context (EPLC[EGS] = 1). In consequence lwepx's TLB error and data storage interrupts need to be handled by KVM, even though these interrupts are generated from host context (MSR[GS] = 0). Currently, KVM hooks only interrupts generated from guest context (MSR[GS] = 1), doing minimal checks on the fast path to avoid host performance degradation. As a result, the host kernel handles lwepx faults searching the faulting guest data address (loaded in DEAR) in its own Logical Partition ID (LPID) 0 context. In case a host translation is found the execution returns to the lwepx instruction instead of the fixup, the host ending up in an infinite loop. Revert the commit add load inst fixup. lwepx issue will be addressed in a subsequent patch without needing fixup code. Signed-off-by: Mihai Caraman mihai.cara...@freescale.com --- v2: - reworked patch description arch/powerpc/kvm/bookehv_interrupts.S | 25 + 1 file changed, 1 insertion(+), 24 deletions(-) diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S index a1712b8..925da71 100644 --- a/arch/powerpc/kvm/bookehv_interrupts.S +++ b/arch/powerpc/kvm/bookehv_interrupts.S @@ -164,32 +164,9 @@ PPC_STL r30, VCPU_GPR(R30)(r4) PPC_STL r31, VCPU_GPR(R31)(r4) mtspr SPRN_EPLC, r8 - - /* disable preemption, so we are sure we hit the fixup handler */ - CURRENT_THREAD_INFO(r8, r1) - li r7, 1 - stw r7, TI_PREEMPT(r8) - isync - - /* -* In case the read goes wrong, we catch it and write an invalid value -* in LAST_INST instead. -*/ -1: lwepx r9, 0, r5 -2: -.section .fixup, ax -3: li r9, KVM_INST_FETCH_FAILED - b 2b -.previous -.section __ex_table,a - PPC_LONG_ALIGN - PPC_LONG 1b,3b -.previous - + lwepx r9, 0, r5 mtspr SPRN_EPLC, r3 - li r7, 0 - stw r7, TI_PREEMPT(r8) stw r9, VCPU_LAST_INST(r4) .endif -- 1.7.11.7 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 3/4] KVM: PPC: Alow kvmppc_get_last_inst() to fail
On book3e, guest last instruction was read on the exist path using load
external pid (lwepx) dedicated instruction. lwepx failures have to be
handled by KVM and this would require additional checks in DO_KVM hooks
(beside MSR[GS] = 1). However extra checks on host fast path are commonly
considered too intrusive.
This patch lay down the path for an altenative solution, by allowing
kvmppc_get_lat_inst() function to fail. Booke architectures may choose
to read guest instruction from kvmppc_ld_inst() and to instruct the
emulation layer either to fail or to emulate again.
emulation_result enum defintion is not accesible from book3 asm headers.
Move kvmppc_get_last_inst() definitions that require emulation_result
to source files.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v2:
- integrated kvmppc_get_last_inst() in book3s code and checked build
- addressed cosmetic feedback
- please validate book3s functionality!
arch/powerpc/include/asm/kvm_book3s.h| 26
arch/powerpc/include/asm/kvm_booke.h | 5
arch/powerpc/include/asm/kvm_ppc.h | 2 ++
arch/powerpc/kvm/book3s.c| 32
arch/powerpc/kvm/book3s.h| 1 +
arch/powerpc/kvm/book3s_64_mmu_hv.c | 16 +++-
arch/powerpc/kvm/book3s_paired_singles.c | 42
arch/powerpc/kvm/book3s_pr.c | 36 +--
arch/powerpc/kvm/booke.c | 14 +++
arch/powerpc/kvm/booke.h | 3 +++
arch/powerpc/kvm/e500_mmu_host.c | 7 ++
arch/powerpc/kvm/emulate.c | 18 +-
arch/powerpc/kvm/powerpc.c | 10 ++--
13 files changed, 132 insertions(+), 80 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h
b/arch/powerpc/include/asm/kvm_book3s.h
index bb1e38a..e2a89f3 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -273,32 +273,6 @@ static inline bool kvmppc_need_byteswap(struct kvm_vcpu
*vcpu)
return (vcpu-arch.shared-msr MSR_LE) != (MSR_KERNEL MSR_LE);
}
-static inline u32 kvmppc_get_last_inst_internal(struct kvm_vcpu *vcpu, ulong
pc)
-{
- /* Load the instruction manually if it failed to do so in the
-* exit path */
- if (vcpu-arch.last_inst == KVM_INST_FETCH_FAILED)
- kvmppc_ld(vcpu, pc, sizeof(u32), vcpu-arch.last_inst, false);
-
- return kvmppc_need_byteswap(vcpu) ? swab32(vcpu-arch.last_inst) :
- vcpu-arch.last_inst;
-}
-
-static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
-{
- return kvmppc_get_last_inst_internal(vcpu, kvmppc_get_pc(vcpu));
-}
-
-/*
- * Like kvmppc_get_last_inst(), but for fetching a sc instruction.
- * Because the sc instruction sets SRR0 to point to the following
- * instruction, we have to fetch from pc - 4.
- */
-static inline u32 kvmppc_get_last_sc(struct kvm_vcpu *vcpu)
-{
- return kvmppc_get_last_inst_internal(vcpu, kvmppc_get_pc(vcpu) - 4);
-}
-
static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
{
return vcpu-arch.fault_dar;
diff --git a/arch/powerpc/include/asm/kvm_booke.h
b/arch/powerpc/include/asm/kvm_booke.h
index 80d46b5..6db1ca0 100644
--- a/arch/powerpc/include/asm/kvm_booke.h
+++ b/arch/powerpc/include/asm/kvm_booke.h
@@ -69,11 +69,6 @@ static inline bool kvmppc_need_byteswap(struct kvm_vcpu
*vcpu)
return false;
}
-static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
-{
- return vcpu-arch.last_inst;
-}
-
static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
{
vcpu-arch.ctr = val;
diff --git a/arch/powerpc/include/asm/kvm_ppc.h
b/arch/powerpc/include/asm/kvm_ppc.h
index 4096f16..6e7c358 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -72,6 +72,8 @@ extern int kvmppc_sanity_check(struct kvm_vcpu *vcpu);
extern int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu);
extern void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu);
+extern int kvmppc_get_last_inst(struct kvm_vcpu *vcpu, u32 *inst);
+
/* Core-specific hooks */
extern void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index 94e597e..3553735 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -463,6 +463,38 @@ mmio:
}
EXPORT_SYMBOL_GPL(kvmppc_ld);
+int kvmppc_get_last_inst_internal(struct kvm_vcpu *vcpu, ulong pc, u32 *inst)
+{
+ int ret = EMULATE_DONE;
+
+ /* Load the instruction manually if it failed to do so in the
+* exit path */
+ if (vcpu-arch.last_inst == KVM_INST_FETCH_FAILED)
+ ret = kvmppc_ld(vcpu, pc, sizeof(u32), vcpu-arch.last_inst,
+ false);
+
+ *inst = kvmppc_need_byteswap(vcpu) ? swab32(vcpu-arch.last_inst) :
+ vcpu-arch.last_inst;
+
+
[PATCH v2 0/4] KVM: PPC: Read guest instruction from kvmppc_get_last_inst()
Read guest last instruction from kvmppc_get_last_inst() allowing the function to fail in order to emulate again. On bookehv architecture search for the physical address and kmap it, instead of using Load External PID (lwepx) instruction. This fixes an infinite loop caused by lwepx's data TLB miss exception handled in the host and the TODO for execute-but-not-read entries and TLB eviction. Mihai Caraman (4): KVM: PPC: e500mc: Revert add load inst fixup KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1 KVM: PPC: Alow kvmppc_get_last_inst() to fail KVM: PPC: Bookehv: Get vcpu's last instruction for emulation arch/powerpc/include/asm/kvm_book3s.h| 26 - arch/powerpc/include/asm/kvm_booke.h | 5 -- arch/powerpc/include/asm/kvm_ppc.h | 2 + arch/powerpc/include/asm/mmu-book3e.h| 7 ++- arch/powerpc/kvm/book3s.c| 32 +++ arch/powerpc/kvm/book3s.h| 1 + arch/powerpc/kvm/book3s_64_mmu_hv.c | 16 ++ arch/powerpc/kvm/book3s_paired_singles.c | 42 -- arch/powerpc/kvm/book3s_pr.c | 36 +++- arch/powerpc/kvm/booke.c | 14 + arch/powerpc/kvm/booke.h | 3 + arch/powerpc/kvm/bookehv_interrupts.S| 54 ++ arch/powerpc/kvm/e500_mmu_host.c | 98 arch/powerpc/kvm/emulate.c | 18 -- arch/powerpc/kvm/powerpc.c | 10 +++- 15 files changed, 235 insertions(+), 129 deletions(-) -- 1.7.11.7 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] PPC: BOOK3S: Disable/Enable TM looking at the ibm, pa-features device tree entry
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com wrote:
Runtime disable transactional memory feature looking at pa-features
device tree entry. This provides a mechanism to disable TM on P8
systems.
What are we actually achieving with this?
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/kernel/prom.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 668aa4791fd7..537bd7e7db0b 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -161,6 +161,11 @@ static struct ibm_pa_feature {
{CPU_FTR_NODSISRALIGN, 0, 0,1, 1, 1},
{0, MMU_FTR_CI_LARGE_PAGE, 0, 1, 2, 0},
{CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
+ /*
+ * We should use CPU_FTR_TM_COMP so that if we disable TM, it won't get
+ * enabled via device tree
+ */
+ {CPU_FTR_TM_COMP, 0, 0, 22, 0, 0},
What does this do to guests? Will it turn TM unavailable into an
illegal instruction?
Mikey
};
static void __init scan_features(unsigned long node, unsigned char *ftrs,
--
1.9.1
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