RE: [PATCH 2/3] qe: run qe_init and qe_ic_init
On Sat, 2014-10-11 at 01:35AM, Wood Scott wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Saturday, October 11, 2014 1:35 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; linux-ker...@vger.kernel.org; Wood
> Scott-B07421; Xie Xiaobo-R63061
> Subject: Re: [PATCH 2/3] qe: run qe_init and qe_ic_init
>
> On Fri, 2014-10-10 at 14:48 +0800, Zhao Qiang wrote:
> > qe and qe_ic need to be initialized before the qe app drivers, using
> > subsys_initcall to run qe_init and qe_ic_init
> >
> > Signed-off-by: Zhao Qiang
> > ---
> > drivers/soc/qe/qe.c| 15 +++
> > drivers/soc/qe/qe_ic.c | 15 +++
> > 2 files changed, 30 insertions(+)
> >
> > diff --git a/drivers/soc/qe/qe.c b/drivers/soc/qe/qe.c index
> > 2aaa5b2..bfea0f8 100644
> > --- a/drivers/soc/qe/qe.c
> > +++ b/drivers/soc/qe/qe.c
> > @@ -683,6 +683,21 @@ unsigned int qe_get_num_of_snums(void) }
> > EXPORT_SYMBOL(qe_get_num_of_snums);
> >
> > +static int __init qe_init(void)
> > +{
> > + struct device_node *np;
> > +
> > + np = of_find_compatible_node(NULL, NULL, "fsl,qe");
> > + if (!np) {
> > + pr_err("%s: Could not find Quicc Engine node\n", __func__);
> > + return -ENODEV;
> > + }
> > + qe_reset();
> > + of_node_put(np);
> > + return 0;
> > +}
> > +subsys_initcall(qe_init);
>
> It is not an error to enable QE support on hardware that doesn't have QE.
> Please remove the pr_err().
OK, will be modified on V2.
>
> > +
> > #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) static int
> > qe_resume(struct platform_device *ofdev) { diff --git
> > a/drivers/soc/qe/qe_ic.c b/drivers/soc/qe/qe_ic.c index
> > cc1b8d5..11fe98c 100644
> > --- a/drivers/soc/qe/qe_ic.c
> > +++ b/drivers/soc/qe/qe_ic.c
> > @@ -34,6 +34,7 @@
> > #include
> >
> > #include "qe_ic.h"
> > +#include "../../irqchip/irqchip.h"
>
> What do you need from here, and can it be moved to include/linux/...?
>
> The only thing I see defined in irqchip.h is IRQCHIP_DECLARE, and you
> don't use that in this patch...
OK, will be modified on V2.
>
> -Scott
>
> > static DEFINE_RAW_SPINLOCK(qe_ic_lock);
> >
> > @@ -501,4 +502,18 @@ static int __init init_qe_ic_sysfs(void)
> > return 0;
> > }
> >
> > +static int __init qeic_of_init(void)
> > +{
> > + struct device_node *np;
> > +
> > + np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> > + if (np) {
> > + qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> > + qe_ic_cascade_high_mpic);
> > + of_node_put(np);
> > + }
> > + return 0;
> > +}
> > +subsys_initcall(qeic_of_init);
> > +
> > subsys_initcall(init_qe_ic_sysfs);
>
Best Regards
Zhao Qiang
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[git pull] Please pull mpe.git for-linus branch (for powerpc)
Hi Linus, Here's a first pull request for powerpc updates for 3.18. The bulk of the additions are for the "cxl" driver, for IBM's Coherent Accelerator Processor Interface (CAPI). Most of it's in drivers/misc, which Greg & Arnd maintain, Greg said he was happy for us to take it through our tree. I've CC'ed them in case they have any last minute objections. There's the usual minor cleanups and fixes, including a bit of noise in drivers from some of those. A bunch of updates to our EEH code, which has been getting more testing. Several nice speedups from Anton, including 20% in clear_page(). And a bunch of updates for freescale from Scott. cheers The following changes since commit 9e82bf014195d6f0054982c463575cdce24292be: Linux 3.17-rc5 (2014-09-14 17:50:12 -0700) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/mpe/linux.git for-linus for you to fetch changes up to d53ba6b3bba33432cc37b7101a86f8f3392c46e7: cxl: Fix afu_read() not doing finish_wait() on signal or non-blocking (2014-10-09 11:29:57 +1100) Aaron Sierra (2): fsl_ifc: Fix csor_ext position in fsl_ifc_regs powerpc: fsl_pci: Add forced PCI Agent enumeration Alexey Kardashevskiy (1): powerpc/iommu/ddw: Fix endianness Andreas Schwab (1): powerpc: Simplify symbol check in prom_init_check.sh Anton Blanchard (23): powerpc: Move adb symbol exports next to function definitions powerpc: Move via-cuda symbol exports next to function definitions powerpc: Move more symbol exports next to function definitions powerpc: Remove unused 32bit symbol exports powerpc: Move lib symbol exports into arch/powerpc/lib/ppc_ksyms.c powerpc: Separate ppc32 symbol exports into ppc_ksyms_32.c powerpc: Make a bunch of things static powerpc: Ensure global functions include their prototype powerpc: Remove stale function prototypes powerpc: Move htab_remove_mapping function prototype into header file powerpc: Add POWER8 CPU selection powerpc: Use CONFIG_ARCH_HAS_FAST_MULTIPLIER powerpc: Implement load_unaligned_zeropad powerpc: ppc64le optimised word at a time powerpc: Enable DCACHE_WORD_ACCESS on ppc64le powerpc: Speed up clear_page by unrolling it powerpc: Simplify do_sigbus powerpc: Add VM_FAULT_HWPOISON handling to powerpc page fault handler powerpc: Fill in si_addr_lsb siginfo field powerpc: Use pr_fmt in module loader code powerpc: Remove powerpc specific cmd_line powerpc: Add printk levels to powernv platform code powerpc: Add printk levels to powerpc code Benjamin Herrenschmidt (1): powerpc/powernv: Fix endian bug in LPC bus debugfs accessors Cody P Schafer (1): powerpc/perf/hv-24x7: use kmem_cache instead of aligned stack allocations Gavin Shan (21): powerpc/eeh: Drop unused argument in eeh_check_failure() powerpc/eeh: Add eeh_pe_state sysfs entry powerpc/eeh: Freeze PE before PE reset powerpc/eeh: Reenable PCI devices after reset powerpc/eeh: Clear frozen state on passing device powerpc/powernv: Sync header with firmware powerpc/eeh: Introduce eeh_ops::err_inject powerpc/powernv: Clear PAPR error injection registers powerpc/eeh: Clear frozen device state in time powerpc/eeh: Fix improper condition in eeh_pci_enable() powerpc/eeh: Unfreeze PE on enabling EEH functionality powerpc/eeh: Use eeh_unfreeze_pe() powerpc/eeh: Block PCI config access during reset powerpc/pseries: Decrease message level on EEH initialization powerpc/powernv: Sync OpalPciResetScope with firmware powerpc/eeh: Tag reset state for user owned PE powerpc/eeh: Emulate EEH recovery for VFIO devices powerpc/eeh: Dump PCI config space for all child devices powerpc/powernv: Fetch frozen PE on top level powerpc/powernv: Override dma_get_required_mask() powerpc/eeh: Show hex prefix for PE state sysfs Himangi Saraogi (1): powerpc/pseries: Drop unnecessary continue Ian Munsie (17): powerpc/cell: Move spu_handle_mm_fault() out of cell platform powerpc/cell: Move data segment faulting code out of cell platform powerpc/cell: Make spu_flush_all_slbs() generic powerpc/msi: Improve IRQ bitmap allocator powerpc/mm: Export mmu_kernel_ssize and mmu_linear_psize powerpc/powernv: Split out set MSI IRQ chip code cxl: Add new header for call backs and structs powerpc/powerpc: Add new PCIe functions for allocating cxl interrupts powerpc/mm: Add new hash_page_mm() powerpc/opal: Add PHB to cxl mode call powerpc/mm: Add hooks for cxl cxl: Add base builtin support cxl: Driver code for powernv PCIe based cards for userspace access cxl: Add userspace header file cxl: Add driver to Kbuild and Makefiles cxl: Add
Re: [PATCH 08/44] kernel: Move pm_power_off to common code
On 10/09/2014 01:24 PM, Pavel Machek wrote:
Hi!
@@ -184,6 +179,8 @@ machine_halt(void)
void
machine_power_off(void)
{
+ do_kernel_poweroff();
+
poweroff -> power_off for consistency.
Dunno; matter of personal preference. I started with that, but ultimately went
with poweroff to distinguish poweroff handler functions from existing code,
specifically kernel_power_off().
That works for you, but once it is merged, it is ugly/confusing typo.
Pavel
Ok, no problem, I'll change it.
Guenter
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Re: [PATCH v2 13/13] vfio: powerpc/spapr: Enable Dynamic DMA windows
On 09/23/2014 11:56 PM, Alex Williamson wrote:
> On Tue, 2014-09-23 at 13:01 +1000, Alexey Kardashevskiy wrote:
>> This defines and implements VFIO IOMMU API which lets the userspace
>> create and remove DMA windows.
>>
>> This updates VFIO_IOMMU_SPAPR_TCE_GET_INFO to return the number of
>> available windows and page mask.
>>
>> This adds VFIO_IOMMU_SPAPR_TCE_CREATE and VFIO_IOMMU_SPAPR_TCE_REMOVE
>> to allow the user space to create and remove window(s).
>>
>> The VFIO IOMMU driver does basic sanity checks and calls corresponding
>> SPAPR TCE functions. At the moment only IODA2 (POWER8 PCI host bridge)
>> implements them.
>>
>> This advertises VFIO_IOMMU_SPAPR_TCE_FLAG_DDW capability via
>> VFIO_IOMMU_SPAPR_TCE_GET_INFO.
>>
>> This calls platform DDW reset() callback when IOMMU is being disabled
>> to reset the DMA configuration to its original state.
>>
>> Signed-off-by: Alexey Kardashevskiy
>> ---
>> drivers/vfio/vfio_iommu_spapr_tce.c | 135
>> ++--
>> include/uapi/linux/vfio.h | 25 ++-
>> 2 files changed, 153 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
>> b/drivers/vfio/vfio_iommu_spapr_tce.c
>> index 0dccbc4..b518891 100644
>> --- a/drivers/vfio/vfio_iommu_spapr_tce.c
>> +++ b/drivers/vfio/vfio_iommu_spapr_tce.c
>> @@ -190,18 +190,25 @@ static void tce_iommu_disable(struct tce_container
>> *container)
>>
>> container->enabled = false;
>>
>> -if (!container->grp || !current->mm)
>> +if (!container->grp)
>> return;
>>
>> data = iommu_group_get_iommudata(container->grp);
>> if (!data || !data->iommu_owner || !data->ops->get_table)
>> return;
>>
>> -tbl = data->ops->get_table(data, 0);
>> -if (!tbl)
>> -return;
>> +if (current->mm) {
>> +tbl = data->ops->get_table(data, 0);
>> +if (tbl)
>> +decrement_locked_vm(tbl);
>>
>> -decrement_locked_vm(tbl);
>> +tbl = data->ops->get_table(data, 1);
>> +if (tbl)
>> +decrement_locked_vm(tbl);
>> +}
>> +
>> +if (data->ops->reset)
>> +data->ops->reset(data);
>> }
>>
>> static void *tce_iommu_open(unsigned long arg)
>> @@ -243,7 +250,7 @@ static long tce_iommu_ioctl(void *iommu_data,
>> unsigned int cmd, unsigned long arg)
>> {
>> struct tce_container *container = iommu_data;
>> -unsigned long minsz;
>> +unsigned long minsz, ddwsz;
>> long ret;
>>
>> switch (cmd) {
>> @@ -288,6 +295,28 @@ static long tce_iommu_ioctl(void *iommu_data,
>> info.dma32_window_size = tbl->it_size << tbl->it_page_shift;
>> info.flags = 0;
>>
>> +ddwsz = offsetofend(struct vfio_iommu_spapr_tce_info,
>> +page_size_mask);
>> +
>> +if (info.argsz == ddwsz) {
>
>> =
>
>> +if (data->ops->query && data->ops->create &&
>> +data->ops->remove) {
>> +info.flags |= VFIO_IOMMU_SPAPR_TCE_FLAG_DDW;
>
> I think you want to set this flag regardless of whether the user has
> provided space for it. A valid use model is to call with the minimum
> size and look at the flags to determine if it needs to be called again
> with a larger size.
>
>> +
>> +ret = data->ops->query(data,
>> +&info.current_windows,
>> +&info.windows_available,
>> +&info.page_size_mask);
>> +if (ret)
>> +return ret;
>> +} else {
>> +info.current_windows = 0;
>> +info.windows_available = 0;
>> +info.page_size_mask = 0;
>> +}
>> +minsz = ddwsz;
>
> It's not really any longer the min size, is it?
>
>> +}
>> +
>> if (copy_to_user((void __user *)arg, &info, minsz))
>> return -EFAULT;
>>
>> @@ -412,12 +441,106 @@ static long tce_iommu_ioctl(void *iommu_data,
>> tce_iommu_disable(container);
>> mutex_unlock(&container->lock);
>> return 0;
>> +
>> case VFIO_EEH_PE_OP:
>> if (!container->grp)
>> return -ENODEV;
>>
>> return vfio_spapr_iommu_eeh_ioctl(container->grp,
>>cmd, arg);
>> +
>> +case VFIO_IOMMU_SPAPR_TCE_CREATE: {
>> +struct vfio_iommu_spapr_tce_create create;
>> +struct spapr_tce_iommu_group *data;
>> +struct iommu_table *tbl;
>> +
>> +if (WARN_ON(!container->grp))
>
> redux previous comment on this warning
>
>> +
Re: [PATCH 3/3] ls1021a-twr/qe: add qe node to ls1-twr
On Fri, 2014-10-10 at 14:49 +0800, Zhao Qiang wrote:
> add qe node to ls1021atwr fdt.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/arm/boot/dts/ls1021a-twr.dts | 24 +++
> arch/arm/boot/dts/ls1021a.dtsi| 64
> +++
> 2 files changed, 88 insertions(+)
>
> diff --git a/arch/arm/boot/dts/ls1021a-twr.dts
> b/arch/arm/boot/dts/ls1021a-twr.dts
> index a52be7b..415387f 100755
> --- a/arch/arm/boot/dts/ls1021a-twr.dts
> +++ b/arch/arm/boot/dts/ls1021a-twr.dts
> @@ -164,6 +164,30 @@
> };
> };
>
> +&uqe {
> + tdma: ucc@2000 {
> + compatible = "fsl,ucc-tdm";
Binding?
> + rx-clock-name = "clk8";
> + tx-clock-name = "clk9";
> + fsl,rx-sync-clock = "rsync_pin";
> + fsl,tx-sync-clock = "tsync_pin";
> + fsl,tx-timeslot = <0xfffe>;
> + fsl,rx-timeslot = <0xfffe>;
> + fsl,tdm-framer-type = "e1";
> + fsl,tdm-mode = "normal";
> + fsl,tdm-id = <0>;
> + fsl,siram-entry-id = <0>;
> + };
> +
> + serial: ucc@2200 {
> + device_type = "serial";
> + compatible = "ucc_uart";
> + port-number = <1>;
> + rx-clock-name = "brg2";
> + tx-clock-name = "brg2";
> + };
Binding for ucc_uart? Why device_type?
> +};
> +
> &pwm6 {
> status = "okay";
> };
> diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
> index 80747dc..3f2ab89 100644
> --- a/arch/arm/boot/dts/ls1021a.dtsi
> +++ b/arch/arm/boot/dts/ls1021a.dtsi
> @@ -314,6 +314,70 @@
> status = "disabled";
> };
>
> + uqe: uqe@240 {
How does "uqe" differ from "qe"?
-Scott
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Re: [PATCH 1/3] qe-uart: modify qe-uart to adapt both powerpc and arm
On Fri, 2014-10-10 at 14:47 +0800, Zhao Qiang wrote:
> qe has been supported by arm board ls1021, qe-uart need
> to be supported by ls1021.
> modify the code to make qe-uart can work on both powerpc
> and ls1021.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/arm/include/asm/delay.h | 16
> arch/arm/include/asm/io.h | 28 +++
> arch/arm/include/asm/irq.h| 2 +
> arch/arm/kernel/irq.c | 7 ++
> drivers/soc/qe/Kconfig| 1 -
> drivers/soc/qe/qe.c | 63 ---
> drivers/soc/qe/qe_common.c| 2 +-
> drivers/soc/qe/qe_ic.c| 7 +-
> drivers/soc/qe/qe_io.c| 53 ++---
> drivers/soc/qe/ucc_slow.c | 40 +-
> drivers/tty/serial/ucc_uart.c | 176
> +-
> include/linux/fsl/qe.h| 21 +
> 12 files changed, 245 insertions(+), 171 deletions(-)
This patch obviously depends on the patches to relocate QE support, but
there's no mention of that dependency above.
There are many changes in here that ought to be separate patches with
separate justification.
Also, some of the QE changes seem to be reasonable cleanup, but not
related to making the code work on ARM.
> diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
> index dff714d..a932f99 100644
> --- a/arch/arm/include/asm/delay.h
> +++ b/arch/arm/include/asm/delay.h
> @@ -57,6 +57,22 @@ extern void __bad_udelay(void);
> __const_udelay((n) * UDELAY_MULT)) :\
> __udelay(n))
>
> +#define spin_event_timeout(condition, timeout, delay)
> \
> +({
> \
> + typeof(condition) __ret; \
> + int i = 0; \
> + while (!(__ret = (condition)) && (i++ < timeout)) {\
> + if (delay) \
> + udelay(delay); \
> + else \
> + cpu_relax(); \
> + udelay(1); \
> + } \
This will delay too long if "delay" is used.
How about:
delay = delay ? delay : 1; \
while (!(__ret = (condition))) {\
if (i < timeout)\
break; \
i += delay; \
udelay(delay); \
} \
Also, once the dependency on timebase is removed, how about making this
generic rather than just PPC+ARM?
> + if (!__ret)\
> + __ret = (condition); \
> + __ret; \
Timur, do you remember why that final "if (!__ret) __ret = (condition);"
is needed?
> +})
> +
> /* Loop-based definitions for assembly code. */
> extern void __loop_delay(unsigned long loops);
> extern void __loop_udelay(unsigned long usecs);
> diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
> index d070741..4bec694 100644
> --- a/arch/arm/include/asm/io.h
> +++ b/arch/arm/include/asm/io.h
> @@ -206,6 +206,34 @@ extern int pci_ioremap_io(unsigned int offset,
> phys_addr_t phys_addr);
> #endif
> #endif
>
> +/* access ports */
> +#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr))
> +#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
> +
> +#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr))
> +#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
> +
> +#define setbits8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr))
> +#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
This should also be a separate patch, though I don't think implicit big
endian is going to fly in arch/arm (it was a mistake in arch/powerpc).
Rename to setbits_be32 etc as is used in U-Boot.
> +/* Clear and set bits in one shot. These macros can be used to clear and
> + * set multiple bits in a register using a single read-modify-write. These
> + * macros can also be used to set a multiple-bit bit pattern using a mask,
> + * by specifying the mask in the 'clear' parameter and the new bit pattern
> + * in the 'set' parameter.
> + */
> +
> +#define clrsetbits_be32(addr, clear, set) \
> + iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
> +#define clrsetbits_le32(addr,
Re: [PATCH 2/3] qe: run qe_init and qe_ic_init
On Fri, 2014-10-10 at 14:48 +0800, Zhao Qiang wrote:
> qe and qe_ic need to be initialized before the
> qe app drivers, using subsys_initcall to run
> qe_init and qe_ic_init
>
> Signed-off-by: Zhao Qiang
> ---
> drivers/soc/qe/qe.c| 15 +++
> drivers/soc/qe/qe_ic.c | 15 +++
> 2 files changed, 30 insertions(+)
>
> diff --git a/drivers/soc/qe/qe.c b/drivers/soc/qe/qe.c
> index 2aaa5b2..bfea0f8 100644
> --- a/drivers/soc/qe/qe.c
> +++ b/drivers/soc/qe/qe.c
> @@ -683,6 +683,21 @@ unsigned int qe_get_num_of_snums(void)
> }
> EXPORT_SYMBOL(qe_get_num_of_snums);
>
> +static int __init qe_init(void)
> +{
> + struct device_node *np;
> +
> + np = of_find_compatible_node(NULL, NULL, "fsl,qe");
> + if (!np) {
> + pr_err("%s: Could not find Quicc Engine node\n", __func__);
> + return -ENODEV;
> + }
> + qe_reset();
> + of_node_put(np);
> + return 0;
> +}
> +subsys_initcall(qe_init);
It is not an error to enable QE support on hardware that doesn't have
QE. Please remove the pr_err().
> +
> #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx)
> static int qe_resume(struct platform_device *ofdev)
> {
> diff --git a/drivers/soc/qe/qe_ic.c b/drivers/soc/qe/qe_ic.c
> index cc1b8d5..11fe98c 100644
> --- a/drivers/soc/qe/qe_ic.c
> +++ b/drivers/soc/qe/qe_ic.c
> @@ -34,6 +34,7 @@
> #include
>
> #include "qe_ic.h"
> +#include "../../irqchip/irqchip.h"
What do you need from here, and can it be moved to include/linux/...?
The only thing I see defined in irqchip.h is IRQCHIP_DECLARE, and you
don't use that in this patch...
-Scott
> static DEFINE_RAW_SPINLOCK(qe_ic_lock);
>
> @@ -501,4 +502,18 @@ static int __init init_qe_ic_sysfs(void)
> return 0;
> }
>
> +static int __init qeic_of_init(void)
> +{
> + struct device_node *np;
> +
> + np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
> + if (np) {
> + qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
> +qe_ic_cascade_high_mpic);
> + of_node_put(np);
> + }
> + return 0;
> +}
> +subsys_initcall(qeic_of_init);
> +
> subsys_initcall(init_qe_ic_sysfs);
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[PATCH v3] powerpc/numa: add ability to disable and debug topology updates
On 10.10.2014 [15:28:16 +1100], Michael Ellerman wrote:
> On Thu, 2014-09-10 at 23:42:15 UTC, Nishanth Aravamudan wrote:
> > We have hit a few customer issues with the topology update code (VPHN
> > and PRRN). It would be nice to be able to debug the notifications coming
> > from the hypervisor in both cases to the LPAR, as well as to disable
> > responding to the notifications at boot-time, to narrow down the source
> > of the problems. Add a basic level of such functionality, similar to the
> > numa= command-line parameter. We already have a toggle in
> > /proc/powerpc/topology_updates that allows run-time enabling/disabling,
> > so the updates can be started at run-time if desired. But the bugs we've
> > run into have occured during boot or very shortly after coming to login,
> > and have resulted in a broken NUMA topology.
>
> Thanks Nish, a couple of minor nits.
Thanks for the review, fixed.
> > +static int __init early_topology_updates(char *p)
> > +{
> > + if (!p)
> > + return 0;
> > +
> > + if (strstr(p, "off")) {
>
> You're better off using strcmp. Using strstr() is nice if you need to support
> multiple values, but it's sloppy otherwise. This will match "offset",
> "smirnoff" etc.
I feel like this is the Linux-equivalent of "You just got iced!"
We have hit a few customer issues with the topology update code (VPHN
and PRRN). It would be nice to be able to debug the notifications coming
from the hypervisor in both cases to the LPAR, as well as to disable
responding to the notifications at boot-time, to narrow down the source
of the problems. Add a basic level of such functionality, similar to the
numa= command-line parameter. We already have a toggle in
/proc/powerpc/topology_updates that allows run-time enabling/disabling,
so the updates can be started at run-time if desired. But the bugs we've
run into have occured during boot or very shortly after coming to login,
and have resulted in a broken NUMA topology.
Signed-off-by: Nishanth Aravamudan
---
v1 -> v2:
Updated commit message to answer some of mpe's reviews.
Switched to pr_fmt based debugging, which removes the need for the
debug flag.
Be a little less verbose in the debugging, as it was duplicating
information.
v2 -> v3:
Move pr_fmt define to the right spot.
Make topology_updates_enabled bool.
Use strcmp instead of strstr for topology_updates= parsing.
Add a missing newline.
diff --git a/Documentation/kernel-parameters.txt
b/Documentation/kernel-parameters.txt
index d9a452e8fb9b..35a46b8240ad 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -3388,6 +3388,12 @@ bytes respectively. Such letter suffixes can also be
entirely omitted.
e.g. base its process migration decisions on it.
Default is on.
+ topology_updates= [KNL, PPC, NUMA]
+ Format: {off}
+ Specify if the kernel should ignore (off)
+ topology updates sent by the hypervisor to this
+ LPAR.
+
tp720= [HW,PS2]
tpm_suspend_pcr=[HW,TPM]
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index e28c21ba862d..6fde1d4351e6 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -8,6 +8,8 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
+#define pr_fmt(fmt) "numa: " fmt
+
#include
#include
#include
@@ -1160,6 +1162,22 @@ static int __init early_numa(char *p)
}
early_param("numa", early_numa);
+static bool topology_updates_enabled = true;
+
+static int __init early_topology_updates(char *p)
+{
+ if (!p)
+ return 0;
+
+ if (!strcmp(p, "off")) {
+ pr_info("Disabling topology updates\n");
+ topology_updates_enabled = false;
+ }
+
+ return 0;
+}
+early_param("topology_updates", early_topology_updates);
+
#ifdef CONFIG_MEMORY_HOTPLUG
/*
* Find the node associated with a hot added memory section for
@@ -1546,6 +1564,9 @@ int arch_update_cpu_topology(void)
struct device *dev;
int weight, new_nid, i = 0;
+ if (!prrn_enabled && !vphn_enabled)
+ return 0;
+
weight = cpumask_weight(&cpu_associativity_changes_mask);
if (!weight)
return 0;
@@ -1599,6 +1620,15 @@ int arch_update_cpu_topology(void)
cpu = cpu_last_thread_sibling(cpu);
}
+ pr_debug("Topology update for the following CPUs:\n");
+ if (cpumask_weight(&updated_cpus)) {
+ for (ud = &updates[0]; ud; ud = ud->next) {
+ pr_debug("cpu %d moving from node %d "
+ "to %d\n", ud->cpu,
+ ud->old_nid, ud->new_nid);
+ }
+ }
+
/*
* In cases where we have nothing to update
[PATCH v2] powerpc/powernv: Fallback to old HMI handling behavior for old firmware
From: Mahesh Salgaonkar
Recently we moved HMI handling into Linux kernel instead of taking
HMI directly in OPAL. This new change is dependent on new OPAL call
for HMI recovery which was introduced in newer firmware. While this new
change works fine with latest OPAL firmware, we broke the HMI handling
if we run newer kernel on old OPAL firmware that results in system hang.
This patch fixes this issue by falling back to old HMI behavior on older
OPAL firmware.
This patch introduces a check for opal token OPAL_HANDLE_HMI to see
if we are running on newer firmware or old firmware. On newer firmware
this check would return OPAL_TOKEN_PRESENT, otherwise we are running on
old firmware and fallback to old HMI behavior.
Old firmware: POWER8 System Firmware Release as of today <= SV810_087
Action: Let OPAL handle HMIs
Newer firmware: in development/yet to be released.
Action: Let Linux host handle HMIs.
This patch depends on opal check token patch posted at ppc-devel
https://lists.ozlabs.org/pipermail/linuxppc-dev/2014-August/120224.html
Signed-off-by: Mahesh Salgaonkar
---
arch/powerpc/platforms/powernv/opal.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index b44eec3..f172c15 100644
--- a/arch/powerpc/platforms/powernv/opal.c
+++ b/arch/powerpc/platforms/powernv/opal.c
@@ -194,6 +194,29 @@ static int __init opal_register_exception_handlers(void)
* fwnmi area at 0x7000 to provide the glue space to OPAL
*/
glue = 0x7000;
+
+ /*
+* Check if we are running on newer firmware that exports
+* OPAL_HANDLE_HMI token. If yes, then don't ask opal to patch
+* HMI interrupt and we catch it directly in Linux kernel.
+*
+* For older firmware (i.e currently released POWER8 System Firmware
+* as of today <= SV810_087), we fallback to old behavior and let OPAL
+* to patch the HMI vector and handle it inside OPAL firmware.
+*
+* For newer firmware (in development/yet to be released) we will
+* start catching/handling HMI directly in Linux kernel.
+*/
+ if (!opal_check_token(OPAL_HANDLE_HMI)) {
+ /* We are on old firmware. fallback to old behavior. */
+ pr_info("%s: Old firmware detected, let OPAL handle HMIs.\n",
+ "opal");
+ opal_register_exception_handler(
+ OPAL_HYPERVISOR_MAINTENANCE_HANDLER,
+ 0, glue);
+ glue += 128;
+ }
+
opal_register_exception_handler(OPAL_SOFTPATCH_HANDLER, 0, glue);
#endif
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[PATCHv5] clk: ppc-corenet: rename to qoriq and add CLK_OF_DECLARE support
The IP is shared by PPC and ARM, this renames it to qoriq for better
represention, and this also adds the CLK_OF_DECLARE support for being
initialized by of_clk_init() on ARM.
Signed-off-by: Jingchang Lu
---
changes in v5:
update drivers/cpufreq/Kconfig.powerpc to slect the renamed config option.
changes in v4:
remove "corenet" literals omitted in v3 remove.
changes in v3:
generate the patch with -M -C option
changes in v2:
rename the driver name to ppc-qoriq.c for shared on PPC and ARM.
drivers/clk/Kconfig| 10 -
drivers/clk/Makefile | 2 +-
drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} | 29 +++---
drivers/cpufreq/Kconfig.powerpc| 2 +-
4 files changed, 24 insertions(+), 19 deletions(-)
rename drivers/clk/{clk-ppc-corenet.c => clk-qoriq.c} (89%)
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 455fd17..4706a9f 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -101,12 +101,12 @@ config COMMON_CLK_AXI_CLKGEN
Support for the Analog Devices axi-clkgen pcore clock generator for
Xilinx
FPGAs. It is commonly used in Analog Devices' reference designs.
-config CLK_PPC_CORENET
- bool "Clock driver for PowerPC corenet platforms"
- depends on PPC_E500MC && OF
+config CLK_QORIQ
+ bool "Clock driver for Freescale QorIQ platforms"
+ depends on (PPC_E500MC || ARM) && OF
---help---
- This adds the clock driver support for Freescale PowerPC corenet
- platforms using common clock framework.
+ This adds the clock driver support for Freescale QorIQ platforms
+ using common clock framework.
config COMMON_CLK_XGENE
bool "Clock driver for APM XGene SoC"
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d5fba5b..4ff94cd 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -30,7 +30,7 @@ obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
obj-$(CONFIG_COMMON_CLK_PALMAS)+= clk-palmas.o
-obj-$(CONFIG_CLK_PPC_CORENET) += clk-ppc-corenet.o
+obj-$(CONFIG_CLK_QORIQ)+= clk-qoriq.o
obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o
obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
obj-$(CONFIG_COMMON_CLK_SI5351)+= clk-si5351.o
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
similarity index 89%
rename from drivers/clk/clk-ppc-corenet.c
rename to drivers/clk/clk-qoriq.c
index 8e58edf..48cb923 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-qoriq.c
@@ -5,7 +5,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * clock driver for Freescale PowerPC corenet SoCs.
+ * clock driver for Freescale QorIQ SoCs.
*/
#include
#include
@@ -155,7 +155,7 @@ static void __init core_pll_init(struct device_node *np)
base = of_iomap(np, 0);
if (!base) {
- pr_err("clk-ppc: iomap error\n");
+ pr_err("clk-qoriq: iomap error\n");
return;
}
@@ -252,7 +252,7 @@ static void __init sysclk_init(struct device_node *node)
u32 rate;
if (!np) {
- pr_err("ppc-clk: could not get parent node\n");
+ pr_err("qoriq-clk: could not get parent node\n");
return;
}
@@ -278,30 +278,35 @@ static const struct of_device_id clk_match[] __initconst
= {
{}
};
-static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
+static int __init qoriq_clk_probe(struct platform_device *pdev)
{
of_clk_init(clk_match);
return 0;
}
-static const struct of_device_id ppc_clk_ids[] __initconst = {
+static const struct of_device_id qoriq_clk_ids[] __initconst = {
{ .compatible = "fsl,qoriq-clockgen-1.0", },
{ .compatible = "fsl,qoriq-clockgen-2.0", },
{}
};
-static struct platform_driver ppc_corenet_clk_driver __initdata = {
+static struct platform_driver qoriq_clk_driver __initdata = {
.driver = {
- .name = "ppc_corenet_clock",
+ .name = "qoriq_clock",
.owner = THIS_MODULE,
- .of_match_table = ppc_clk_ids,
+ .of_match_table = qoriq_clk_ids,
},
- .probe = ppc_corenet_clk_probe,
+ .probe = qoriq_clk_probe,
};
-static int __init ppc_corenet_clk_init(void)
+static int __init qoriq_clk_init(void)
{
- return platform_driver_register(&ppc_corenet_clk_driver);
+ return platform_driver_register(&qoriq_clk_driver);
}
-subsys_initcall(ppc_corenet_clk_init);
+subsys_initcall(qoriq_clk_init);
+
+CLK_OF_DECLARE(qoriq_core_pll_v1, "fsl,qoriq-core-pll-1.0", core_pll_init);
+CLK_OF_DECLARE(qoriq_core_pll_v2, "fsl,qoriq-core-pll-2.0"
Re: [PATCH tty-next 14/22] tty: Remove tty_wait_until_sent_from_close()
> The point being that holding the tty lock across the _entire_ close > is equivalent to the current outcome, regardless of O_NONBLOCK. > > I'm reluctant to start returning EGAIN for non-blocking tty opens > because no tty driver does that now, and I don't think userspace will > deal well with new return codes from tty opens. I do not know about the non blocking case mattering. The blocking open does need to wait, when I broke that case before I broke the console login drivers (mingetty). Returning EAGAIN would also only work if poll/select did the right thing. Currently Linux can't support a System5 style ttymon process because of this limitation, which means, for example, that systemd can't implement a single thread to manage all console prompts/setup Alan ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2] powerpc/msi: Use WARN_ON() in msi bitmap selftests
Hi Michael, Comment inline. On 10/10/2014 11:04 AM, Michael Ellerman wrote: > As demonstrated in the previous commit, the failure message from the msi > bitmap selftests is a bit subtle, it's easy to miss a failure in a busy > boot log. > > So drop our check() macro and use WARN_ON() instead. This necessitates > inverting all the conditions as well. > > Signed-off-by: Michael Ellerman > --- > arch/powerpc/sysdev/msi_bitmap.c | 54 > ++-- [snip] > > /* Free most of them for the alignment tests */ > msi_bitmap_free_hwirqs(&bmp, 3, size - 3); > > /* Check we get a naturally aligned offset */ > rc = msi_bitmap_alloc_hwirqs(&bmp, 2); > - check(rc >= 0 && rc % 2 == 0); > + WARN_ON(rc < 0 && rc % 2 != 0); Here and below, shouldn't these be: WARN_ON(rc < 0 || rc % 2 != 0); ? > rc = msi_bitmap_alloc_hwirqs(&bmp, 4); > - check(rc >= 0 && rc % 4 == 0); > + WARN_ON(rc < 0 && rc % 4 != 0); > rc = msi_bitmap_alloc_hwirqs(&bmp, 8); > - check(rc >= 0 && rc % 8 == 0); > + WARN_ON(rc < 0 && rc % 8 != 0); > rc = msi_bitmap_alloc_hwirqs(&bmp, 9); > - check(rc >= 0 && rc % 16 == 0); > + WARN_ON(rc < 0 && rc % 16 != 0); > rc = msi_bitmap_alloc_hwirqs(&bmp, 3); > - check(rc >= 0 && rc % 4 == 0); > + WARN_ON(rc < 0 && rc % 4 != 0); > rc = msi_bitmap_alloc_hwirqs(&bmp, 7); > - check(rc >= 0 && rc % 8 == 0); > + WARN_ON(rc < 0 && rc % 8 != 0); > rc = msi_bitmap_alloc_hwirqs(&bmp, 121); > - check(rc >= 0 && rc % 128 == 0); > + WARN_ON(rc < 0 && rc % 128 != 0); > > msi_bitmap_free(&bmp); > > - /* Clients may check bitmap == NULL for "not-allocated" */ > - check(bmp.bitmap == NULL); > + /* Clients may WARN_ON bitmap == NULL for "not-allocated" */ > + WARN_ON(bmp.bitmap != NULL); > > kfree(bmp.bitmap); > } > @@ -229,14 +224,13 @@ static void __init test_of_node(void) > of_node_init(&of_node); > of_node.full_name = node_name; > > - check(0 == msi_bitmap_alloc(&bmp, size, &of_node)); > + WARN_ON(msi_bitmap_alloc(&bmp, size, &of_node)); > > /* No msi-available-ranges, so expect > 0 */ > - check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0); > + WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp) <= 0); > > /* Should all still be free */ > - check(0 == bitmap_find_free_region(bmp.bitmap, size, > -get_count_order(size))); > + WARN_ON(bitmap_find_free_region(bmp.bitmap, size, > get_count_order(size))); > bitmap_release_region(bmp.bitmap, 0, get_count_order(size)); > > /* Now create a fake msi-available-ranges property */ > @@ -250,11 +244,11 @@ static void __init test_of_node(void) > of_node.properties = ∝ > > /* msi-available-ranges, so expect == 0 */ > - check(msi_bitmap_reserve_dt_hwirqs(&bmp) == 0); > + WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp)); > > /* Check we got the expected result */ > - check(0 == bitmap_parselist(expected_str, expected, size)); > - check(bitmap_equal(expected, bmp.bitmap, size)); > + WARN_ON(bitmap_parselist(expected_str, expected, size)); > + WARN_ON(!bitmap_equal(expected, bmp.bitmap, size)); > > msi_bitmap_free(&bmp); > kfree(bmp.bitmap); > --- Best Regards, Laurentiu ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [v2] powerpc/vphn: fix endian issue in NUMA device node code
On Tue, 7 Oct 2014 20:28:23 +1100 (EST)
Michael Ellerman wrote:
> On Fri, 2014-03-10 at 09:13:17 UTC, Greg Kurz wrote:
> > The associativity domain numbers are obtained from the hypervisor through
> > registers and written into memory by the guest: the packed array passed to
> > vphn_unpack_associativity() is then native-endian, unlike what was assumed
> > in the following commit:
> >
> > This patch does two things:
> > - extract values from the packed array with shifts, in order to be endian
> > neutral
> > - convert the resulting values to be32 as expected
> >
> > Suggested-by: Anton Blanchard
> > Signed-off-by: Greg Kurz
> > Reviewed-by: Nishanth Aravamudan
> > Tested-by: Nishanth Aravamudan
>
>
> Hi Greg,
>
> I'm a bit dense, it's after 8pm, but this seems like it's more complicated
> than
> it needs to be?
>
> We get six 64-bit registers back from the hypervisor, they're cpu endian
> obviously, and each is defined to consist of four 2 byte fields.
>
> So to unpack them, can't we just iterate over those six 64-bit values, which
> if
> we load them as 64-bit values will be back in cpu endian?
>
> cheers
>
First, I was sure I had Cc'd Benjamin... sorry for this omission :)
Hi Michael,
Do you mean something like the following ?
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b835bf0..fbe5a8b 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -1421,8 +1421,11 @@ static long hcall_vphn(unsigned long cpu, __be32
*associativity)
long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
u64 flags = 1;
int hwcpu = get_hard_smp_processor_id(cpu);
+ int i;
rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
+ for (i = 0; i < 6; i++)
+ retbuf[i] = cpu_to_be64(retbuf[i]);
vphn_unpack_associativity(retbuf, associativity);
return rc;
Sure it also works and is a lot simplier... but it adds an extra loop. Also,
if the 3 first elements of the array contain 12 VPHN_FIELD_MSB fields, then
we don't even need to swap the remaining elements: only the parsing code
knows.
On the other hand, I understand this is not a hot path... so what should we
do ?
Cheers.
--
Greg
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[PATCH 2/2] powerpc/msi: Use WARN_ON() in msi bitmap selftests
As demonstrated in the previous commit, the failure message from the msi
bitmap selftests is a bit subtle, it's easy to miss a failure in a busy
boot log.
So drop our check() macro and use WARN_ON() instead. This necessitates
inverting all the conditions as well.
Signed-off-by: Michael Ellerman
---
arch/powerpc/sysdev/msi_bitmap.c | 54 ++--
1 file changed, 24 insertions(+), 30 deletions(-)
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 8155d93dee1d..73b64c73505b 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -145,69 +145,64 @@ void msi_bitmap_free(struct msi_bitmap *bmp)
#ifdef CONFIG_MSI_BITMAP_SELFTEST
-#define check(x) \
- if (!(x)) printk("msi_bitmap: test failed at line %d\n", __LINE__);
-
static void __init test_basics(void)
{
struct msi_bitmap bmp;
int rc, i, size = 512;
/* Can't allocate a bitmap of 0 irqs */
- check(msi_bitmap_alloc(&bmp, 0, NULL) != 0);
+ WARN_ON(msi_bitmap_alloc(&bmp, 0, NULL) == 0);
/* of_node may be NULL */
- check(0 == msi_bitmap_alloc(&bmp, size, NULL));
+ WARN_ON(msi_bitmap_alloc(&bmp, size, NULL));
/* Should all be free by default */
- check(0 == bitmap_find_free_region(bmp.bitmap, size,
- get_count_order(size)));
+ WARN_ON(bitmap_find_free_region(bmp.bitmap, size,
get_count_order(size)));
bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
/* With no node, there's no msi-available-ranges, so expect > 0 */
- check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0);
+ WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp) <= 0);
/* Should all still be free */
- check(0 == bitmap_find_free_region(bmp.bitmap, size,
- get_count_order(size)));
+ WARN_ON(bitmap_find_free_region(bmp.bitmap, size,
get_count_order(size)));
bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
/* Check we can fill it up and then no more */
for (i = 0; i < size; i++)
- check(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0);
+ WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 1) < 0);
+ WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) >= 0);
/* Should all be allocated */
- check(bitmap_find_free_region(bmp.bitmap, size, 0) < 0);
+ WARN_ON(bitmap_find_free_region(bmp.bitmap, size, 0) >= 0);
/* And if we free one we can then allocate another */
msi_bitmap_free_hwirqs(&bmp, size / 2, 1);
- check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2);
+ WARN_ON(msi_bitmap_alloc_hwirqs(&bmp, 1) != size / 2);
/* Free most of them for the alignment tests */
msi_bitmap_free_hwirqs(&bmp, 3, size - 3);
/* Check we get a naturally aligned offset */
rc = msi_bitmap_alloc_hwirqs(&bmp, 2);
- check(rc >= 0 && rc % 2 == 0);
+ WARN_ON(rc < 0 && rc % 2 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 4);
- check(rc >= 0 && rc % 4 == 0);
+ WARN_ON(rc < 0 && rc % 4 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 8);
- check(rc >= 0 && rc % 8 == 0);
+ WARN_ON(rc < 0 && rc % 8 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 9);
- check(rc >= 0 && rc % 16 == 0);
+ WARN_ON(rc < 0 && rc % 16 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 3);
- check(rc >= 0 && rc % 4 == 0);
+ WARN_ON(rc < 0 && rc % 4 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 7);
- check(rc >= 0 && rc % 8 == 0);
+ WARN_ON(rc < 0 && rc % 8 != 0);
rc = msi_bitmap_alloc_hwirqs(&bmp, 121);
- check(rc >= 0 && rc % 128 == 0);
+ WARN_ON(rc < 0 && rc % 128 != 0);
msi_bitmap_free(&bmp);
- /* Clients may check bitmap == NULL for "not-allocated" */
- check(bmp.bitmap == NULL);
+ /* Clients may WARN_ON bitmap == NULL for "not-allocated" */
+ WARN_ON(bmp.bitmap != NULL);
kfree(bmp.bitmap);
}
@@ -229,14 +224,13 @@ static void __init test_of_node(void)
of_node_init(&of_node);
of_node.full_name = node_name;
- check(0 == msi_bitmap_alloc(&bmp, size, &of_node));
+ WARN_ON(msi_bitmap_alloc(&bmp, size, &of_node));
/* No msi-available-ranges, so expect > 0 */
- check(msi_bitmap_reserve_dt_hwirqs(&bmp) > 0);
+ WARN_ON(msi_bitmap_reserve_dt_hwirqs(&bmp) <= 0);
/* Should all still be free */
- check(0 == bitmap_find_free_region(bmp.bitmap, size,
- get_count_order(size)));
+ WARN_ON(bitmap_find_free_region(bmp.bitmap, size,
get_count_order(size)));
bitmap_release_region(bmp.bitmap, 0, get_count_order(size));
/* Now create a fake msi-available-ranges property */
@@ -250,11 +244,11 @@ static void
[PATCH 1/2] powerpc/msi: Fix the msi bitmap alignment tests
When we added the alignment tests recently we failed to check they were
actually passing - oops.
They weren't passing, because the bitmap was full. We should also be a
bit more careful when checking the return code, a negative error return
could by divisible by our alignment value.
Fixes: b0345bbc6d09 ("powerpc/msi: Improve IRQ bitmap allocator")
Signed-off-by: Michael Ellerman
---
arch/powerpc/sysdev/msi_bitmap.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c
index 0c75214b6f92..8155d93dee1d 100644
--- a/arch/powerpc/sysdev/msi_bitmap.c
+++ b/arch/powerpc/sysdev/msi_bitmap.c
@@ -151,7 +151,7 @@ void msi_bitmap_free(struct msi_bitmap *bmp)
static void __init test_basics(void)
{
struct msi_bitmap bmp;
- int i, size = 512;
+ int rc, i, size = 512;
/* Can't allocate a bitmap of 0 irqs */
check(msi_bitmap_alloc(&bmp, 0, NULL) != 0);
@@ -185,14 +185,24 @@ static void __init test_basics(void)
msi_bitmap_free_hwirqs(&bmp, size / 2, 1);
check(msi_bitmap_alloc_hwirqs(&bmp, 1) == size / 2);
+ /* Free most of them for the alignment tests */
+ msi_bitmap_free_hwirqs(&bmp, 3, size - 3);
+
/* Check we get a naturally aligned offset */
- check(msi_bitmap_alloc_hwirqs(&bmp, 2) % 2 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 4) % 4 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 8) % 8 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 9) % 16 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 3) % 4 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 7) % 8 == 0);
- check(msi_bitmap_alloc_hwirqs(&bmp, 121) % 128 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 2);
+ check(rc >= 0 && rc % 2 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 4);
+ check(rc >= 0 && rc % 4 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 8);
+ check(rc >= 0 && rc % 8 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 9);
+ check(rc >= 0 && rc % 16 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 3);
+ check(rc >= 0 && rc % 4 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 7);
+ check(rc >= 0 && rc % 8 == 0);
+ rc = msi_bitmap_alloc_hwirqs(&bmp, 121);
+ check(rc >= 0 && rc % 128 == 0);
msi_bitmap_free(&bmp);
--
1.9.1
___
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Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/3] qe-uart: modify qe-uart to adapt both powerpc and arm
qe has been supported by arm board ls1021, qe-uart need
to be supported by ls1021.
modify the code to make qe-uart can work on both powerpc
and ls1021.
Signed-off-by: Zhao Qiang
---
arch/arm/include/asm/delay.h | 16
arch/arm/include/asm/io.h | 28 +++
arch/arm/include/asm/irq.h| 2 +
arch/arm/kernel/irq.c | 7 ++
drivers/soc/qe/Kconfig| 1 -
drivers/soc/qe/qe.c | 63 ---
drivers/soc/qe/qe_common.c| 2 +-
drivers/soc/qe/qe_ic.c| 7 +-
drivers/soc/qe/qe_io.c| 53 ++---
drivers/soc/qe/ucc_slow.c | 40 +-
drivers/tty/serial/ucc_uart.c | 176 +-
include/linux/fsl/qe.h| 21 +
12 files changed, 245 insertions(+), 171 deletions(-)
diff --git a/arch/arm/include/asm/delay.h b/arch/arm/include/asm/delay.h
index dff714d..a932f99 100644
--- a/arch/arm/include/asm/delay.h
+++ b/arch/arm/include/asm/delay.h
@@ -57,6 +57,22 @@ extern void __bad_udelay(void);
__const_udelay((n) * UDELAY_MULT)) :\
__udelay(n))
+#define spin_event_timeout(condition, timeout, delay)
\
+({
\
+ typeof(condition) __ret; \
+ int i = 0; \
+ while (!(__ret = (condition)) && (i++ < timeout)) {\
+ if (delay) \
+ udelay(delay); \
+ else \
+ cpu_relax(); \
+ udelay(1); \
+ } \
+ if (!__ret)\
+ __ret = (condition); \
+ __ret; \
+})
+
/* Loop-based definitions for assembly code. */
extern void __loop_delay(unsigned long loops);
extern void __loop_udelay(unsigned long usecs);
diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
index d070741..4bec694 100644
--- a/arch/arm/include/asm/io.h
+++ b/arch/arm/include/asm/io.h
@@ -206,6 +206,34 @@ extern int pci_ioremap_io(unsigned int offset, phys_addr_t
phys_addr);
#endif
#endif
+/* access ports */
+#define setbits32(_addr, _v) iowrite32be(ioread32be(_addr) | (_v), (_addr))
+#define clrbits32(_addr, _v) iowrite32be(ioread32be(_addr) & ~(_v), (_addr))
+
+#define setbits16(_addr, _v) iowrite16be(ioread16be(_addr) | (_v), (_addr))
+#define clrbits16(_addr, _v) iowrite16be(ioread16be(_addr) & ~(_v), (_addr))
+
+#define setbits8(_addr, _v) iowrite8(ioread8(_addr) | (_v), (_addr))
+#define clrbits8(_addr, _v) iowrite8(ioread8(_addr) & ~(_v), (_addr))
+
+/* Clear and set bits in one shot. These macros can be used to clear and
+ * set multiple bits in a register using a single read-modify-write. These
+ * macros can also be used to set a multiple-bit bit pattern using a mask,
+ * by specifying the mask in the 'clear' parameter and the new bit pattern
+ * in the 'set' parameter.
+ */
+
+#define clrsetbits_be32(addr, clear, set) \
+ iowrite32be((ioread32be(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_le32(addr, clear, set) \
+ iowrite32le((ioread32le(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_be16(addr, clear, set) \
+ iowrite16be((ioread16be(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_le16(addr, clear, set) \
+ iowrite16le((ioread16le(addr) & ~(clear)) | (set), (addr))
+#define clrsetbits_8(addr, clear, set) \
+ iowrite8((ioread8(addr) & ~(clear)) | (set), (addr))
+
/*
* IO port access primitives
* -
diff --git a/arch/arm/include/asm/irq.h b/arch/arm/include/asm/irq.h
index 53c15de..4358904 100644
--- a/arch/arm/include/asm/irq.h
+++ b/arch/arm/include/asm/irq.h
@@ -30,6 +30,8 @@ extern void asm_do_IRQ(unsigned int, struct pt_regs *);
void handle_IRQ(unsigned int, struct pt_regs *);
void init_IRQ(void);
+extern irq_hw_number_t virq_to_hw(unsigned int virq);
+
#ifdef CONFIG_MULTI_IRQ_HANDLER
extern void (*handle_arch_irq)(struct pt_regs *);
extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 9723d17..afa204a 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -121,6 +121,13 @@ void __init init_IRQ(void)
machine_desc->init_irq();
}
+irq_hw_number_t virq_to_hw(unsigned int virq)
+{
+ struct irq_data *irq_data = irq_get_irq_data(virq);
+
