Re: [PATCH] cleanup on stack DECLARE_COMPLETIONs

2014-12-30 Thread Dimitri Sivanich 
On Tue, Dec 23, 2014 at 06:34:08PM +0100, Nicholas Mc Guire wrote:
 fixups for incorrect use of DECLARE_COMPLETION. see also commit
 6e9a4738 (completions: lockdep annotate on stack completions)
 The only somewhat special case being
 drivers/misc/sgi-gru/grukservices.c:quicktest2
 which had a static qualifier in the original DECLARE_COMPLETION()
 but that seems to be wrong (why should the completion persisted between
 successive calls ?) so the conversion to DECLARE_COMPLETION_ONSTACK
 was also applied and the static qualifier removed.
 
 Not sure if this is suitable in this form or if it should go out as
 5 seperate patches ? 
 
 This was only code reviewed and compile tested

Acking just the drivers/misc/sgi-gru/grukservices.c patch of this set.

Acked-by: Dimitri Sivanich sivan...@sgi.com

 
 Signed-off-by: Nicholas Mc Guire der.h...@hofr.at
 ---
  drivers/macintosh/ams/ams-pmu.c   |4 ++--
  drivers/misc/sgi-gru/grukservices.c   |2 +-
  drivers/scsi/aha152x.c|2 +-
  drivers/usb/gadget/udc/fsl_qe_udc.c   |2 +-
  drivers/usb/gadget/udc/fsl_udc_core.c |2 +-
  5 files changed, 6 insertions(+), 6 deletions(-)
 
 diff --git a/drivers/macintosh/ams/ams-pmu.c b/drivers/macintosh/ams/ams-pmu.c
 index 4f61b3e..c2b178f 100644
 --- a/drivers/macintosh/ams/ams-pmu.c
 +++ b/drivers/macintosh/ams/ams-pmu.c
 @@ -52,7 +52,7 @@ static void ams_pmu_req_complete(struct adb_request *req)
  static void ams_pmu_set_register(u8 reg, u8 value)
  {
   static struct adb_request req;
 - DECLARE_COMPLETION(req_complete);
 + DECLARE_COMPLETION_ONSTACK(req_complete);
 
   req.arg = req_complete;
   if (pmu_request(req, ams_pmu_req_complete, 4, ams_pmu_cmd, 0x00, reg, 
 value))
 @@ -65,7 +65,7 @@ static void ams_pmu_set_register(u8 reg, u8 value)
  static u8 ams_pmu_get_register(u8 reg)
  {
   static struct adb_request req;
 - DECLARE_COMPLETION(req_complete);
 + DECLARE_COMPLETION_ONSTACK(req_complete);
 
   req.arg = req_complete;
   if (pmu_request(req, ams_pmu_req_complete, 3, ams_pmu_cmd, 0x01, reg))
 diff --git a/drivers/misc/sgi-gru/grukservices.c 
 b/drivers/misc/sgi-gru/grukservices.c
 index 913de07..4e412fe 100644
 --- a/drivers/misc/sgi-gru/grukservices.c
 +++ b/drivers/misc/sgi-gru/grukservices.c
 @@ -1044,7 +1044,7 @@ done:
 
  static int quicktest2(unsigned long arg)
  {
 - static DECLARE_COMPLETION(cmp);
 + DECLARE_COMPLETION_ONSTACK(cmp);
   unsigned long han;
   int blade_id = 0;
   int numcb = 4;
 diff --git a/drivers/scsi/aha152x.c b/drivers/scsi/aha152x.c
 index 2b960b3..b16afb9 100644
 --- a/drivers/scsi/aha152x.c
 +++ b/drivers/scsi/aha152x.c
 @@ -1055,7 +1055,7 @@ static int aha152x_abort(Scsi_Cmnd *SCpnt)
  static int aha152x_device_reset(Scsi_Cmnd * SCpnt)
  {
   struct Scsi_Host *shpnt = SCpnt-device-host;
 - DECLARE_COMPLETION(done);
 + DECLARE_COMPLETION_ONSTACK(done);
   int ret, issued, disconnected;
   unsigned char old_cmd_len = SCpnt-cmd_len;
   unsigned long flags;
 diff --git a/drivers/usb/gadget/udc/fsl_qe_udc.c 
 b/drivers/usb/gadget/udc/fsl_qe_udc.c
 index 795c99c..e0822f1 100644
 --- a/drivers/usb/gadget/udc/fsl_qe_udc.c
 +++ b/drivers/usb/gadget/udc/fsl_qe_udc.c
 @@ -2630,7 +2630,7 @@ static int qe_udc_remove(struct platform_device *ofdev)
   struct qe_udc *udc = platform_get_drvdata(ofdev);
   struct qe_ep *ep;
   unsigned int size;
 - DECLARE_COMPLETION(done);
 + DECLARE_COMPLETION_ONSTACK(done);
 
   usb_del_gadget_udc(udc-gadget);
 
 diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c 
 b/drivers/usb/gadget/udc/fsl_udc_core.c
 index 2df8074..c3830ad 100644
 --- a/drivers/usb/gadget/udc/fsl_udc_core.c
 +++ b/drivers/usb/gadget/udc/fsl_udc_core.c
 @@ -2529,7 +2529,7 @@ static int __exit fsl_udc_remove(struct platform_device 
 *pdev)
   struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
   struct fsl_usb2_platform_data *pdata = dev_get_platdata(pdev-dev);
 
 - DECLARE_COMPLETION(done);
 + DECLARE_COMPLETION_ONSTACK(done);
 
   if (!udc_controller)
   return -ENODEV;
 --
 1.7.10.4
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[PATCH] tty: 8250: Add 64byte UART support for FSL platforms

2014-12-30 Thread Vijay Rai 
Some of FSL SoCs like T1040 has new version of UART controller which
can support 64byte FiFo.
To enable 64 byte support, following needs to be done:
-FCR[EN64] needs to be programmed to 1 to enable it.
-Also, when FCR[EN64]==1, RTL bits to be used as below
to define various Receive Trigger Levels:
-FCR[RTL] = 00  1 byte
-FCR[RTL] = 01  16 bytes
-FCR[RTL] = 10  32 bytes
-FCR[RTL] = 11  56 bytes
-tx_loadsz is set to 32-bytes instead of 64-bytes to implement
 workaround of errata A-008006 which states that tx_loadsz should
 be configured less than Maximum supported fifo bytes

Signed-off-by: Vijay Rai vijay@freescale.com
Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
---
 drivers/tty/serial/8250/8250_core.c |   20 +++-
 include/uapi/linux/serial_core.h|3 ++-
 include/uapi/linux/serial_reg.h |3 ++-
 3 files changed, 23 insertions(+), 3 deletions(-)

diff --git a/drivers/tty/serial/8250/8250_core.c 
b/drivers/tty/serial/8250/8250_core.c
index 11c6685..565748c 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -329,6 +329,14 @@ static const struct serial8250_config uart_config[] = {
.fcr= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
.flags  = UART_CAP_FIFO | UART_CAP_AFE,
},
+   [PORT_16550A_FSL64] = {
+   .name   = 16550A_FSL64,
+   .fifo_size  = 64,
+   .tx_loadsz  = 32,
+   .fcr= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
+ UART_FCR7_64BYTE,
+   .flags  = UART_CAP_FIFO,
+   },
 };
 
 /* Uart divisor latch read */
@@ -956,7 +964,17 @@ static void autoconfig_16550a(struct uart_8250_port *up)
up-port.type = PORT_16650;
up-capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
} else {
-   DEBUG_AUTOCONF(Motorola 8xxx DUART );
+   serial_out(up, UART_LCR, 0);
+   serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
+  UART_FCR7_64BYTE);
+   status1 = serial_in(up, UART_IIR)  5;
+   serial_out(up, UART_FCR, 0);
+   serial_out(up, UART_LCR, 0);
+
+   if (status1 == 7)
+   up-port.type = PORT_16550A_FSL64;
+   else
+   DEBUG_AUTOCONF(Motorola 8xxx DUART );
}
serial_out(up, UART_EFR, 0);
return;
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h
index c172180..a3b4491 100644
--- a/include/uapi/linux/serial_core.h
+++ b/include/uapi/linux/serial_core.h
@@ -55,7 +55,8 @@
 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
 #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
 #define PORT_RT288029  /* Ralink RT2880 internal UART */
-#define PORT_MAX_8250  29  /* max port ID */
+#define PORT_16550A_FSL64 30   /* Freescale 16550 UART with 64 FIFOs */
+#define PORT_MAX_8250  31  /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed
diff --git a/include/uapi/linux/serial_reg.h b/include/uapi/linux/serial_reg.h
index 53af3b7..00adb01 100644
--- a/include/uapi/linux/serial_reg.h
+++ b/include/uapi/linux/serial_reg.h
@@ -86,7 +86,8 @@
 #define UART_FCR6_T_TRIGGER_8  0x10 /* Mask for transmit trigger set at 8 */
 #define UART_FCR6_T_TRIGGER_24  0x20 /* Mask for transmit trigger set at 24 */
 #define UART_FCR6_T_TRIGGER_30 0x30 /* Mask for transmit trigger set at 30 */
-#define UART_FCR7_64BYTE   0x20 /* Go into 64 byte mode (TI16C750) */
+#define UART_FCR7_64BYTE   0x20 /* Go into 64 byte mode (TI16C750 and
+   some Freescale UARTs) */
 
 #define UART_FCR_R_TRIG_SHIFT  6
 #define UART_FCR_R_TRIG_BITS(x)\
-- 
1.7.9.5

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Re: [PATCH] ASoC: fsl_esai: Fix incorrect xDC field width of xCCR registers

2014-12-30 Thread Mark Brown 
On Mon, Dec 29, 2014 at 04:13:51PM -0800, Nicolin Chen wrote:
 The xDC field should have 5 bit width according to Reference Manual.
 Thus this patch fixes it.

Applied, thanks.


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Re: [PATCH] ASoC: fsl_esai: Fix incorrect xDC field width of xCCR registers

2014-12-30 Thread Mark Brown 
On Mon, Dec 29, 2014 at 04:13:51PM -0800, Nicolin Chen wrote:
 The xDC field should have 5 bit width according to Reference Manual.
 Thus this patch fixes it.

Applied, thanks - I also fixed the patch author up to be him.


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Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Peter Zijlstra 
On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote:
 Isolate the SRCU functions and data structures within CONFIG_SRCU so that 
 there
 is a compile time failure if srcu is used when not enabled. This was decided 
 to
 be better than waiting until link time for a failure to occur.

Why?
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Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Pranith Kumar 
On Tue, Dec 30, 2014 at 1:50 PM, Peter Zijlstra pet...@infradead.org wrote:
 On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote:
 Isolate the SRCU functions and data structures within CONFIG_SRCU so that 
 there
 is a compile time failure if srcu is used when not enabled. This was decided 
 to
 be better than waiting until link time for a failure to occur.

 Why?

This is part of the kernel tinification efforts. The first patch was
posted here: https://lkml.org/lkml/2014/12/4/848. This patch enables a
compile time failure instead of a link time failure.

Thanks!
-- 
Pranith
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Re: [PATCH v2] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Peter Zijlstra 
On Tue, Dec 30, 2014 at 01:54:07PM -0500, Pranith Kumar wrote:
 On Tue, Dec 30, 2014 at 1:50 PM, Peter Zijlstra pet...@infradead.org wrote:
  On Tue, Dec 30, 2014 at 12:46:22AM -0500, Pranith Kumar wrote:
  Isolate the SRCU functions and data structures within CONFIG_SRCU so that 
  there
  is a compile time failure if srcu is used when not enabled. This was 
  decided to
  be better than waiting until link time for a failure to occur.
 
  Why?
 
 This is part of the kernel tinification efforts. The first patch was
 posted here: https://lkml.org/lkml/2014/12/4/848. This patch enables a
 compile time failure instead of a link time failure.

can't be arsed to click. again, why does it matter when it fails,
neither stages produces a working kernel so tinification cannot be the
purpose.
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Re: [PATCH] srcu: Isolate srcu sections using CONFIG_SRCU

2014-12-30 Thread Scott Wood 
On Mon, 2014-12-29 at 23:32 -0500, Pranith Kumar wrote:
 On Mon, Dec 29, 2014 at 5:03 AM, Martin Schwidefsky
 schwidef...@de.ibm.com wrote:
  On Sat, 27 Dec 2014 12:17:43 -0500
  Pranith Kumar bobby.pr...@gmail.com wrote:
 
  @@ -65,10 +65,13 @@
   #include asm/kexec.h
   #include asm/mmu_context.h
   #include asm/code-patching.h
  -#include asm/kvm_ppc.h
   #include asm/hugetlb.h
   #include asm/epapr_hcalls.h
 
  +#if IS_ENABLED(CONFIG_KVM)
  +#include asm/kvm_ppc.h
  +#endif
  +
   #ifdef DEBUG
   #define DBG(fmt...) udbg_printf(fmt)
   #else
 
  I always cringe when I see an include protected by an #ifdef.
  Is this really necessary? All that is done in asm-offsets.c is
  to calculate offsets, the code where the two offsets in question
  are used (entry64.S) does have the #ifdef for CONFIG_KVM.
 
 I agree that this is not the ideal way to do this. But, it has been
 the way things were already being done. If you see
 arch/powerpc/kernel/asm-offsets.c, there are quite some includes which
 are within ifdefs.

asm-offsets.c is unusual in that respect, and I think most of those
ifdefs could go away without breaking anything (head_booke.h is not a
normal header file, and kvm_book3s.h should just be removed as it will
be pulled in by kvm_ppc.h if applicable).

 I've considered other alternatives (though not in-depth) and found
 that they will require quite some refactoring. One simple idea is to
 move this #ifdef to within kvm_ppc.h. That should make the inclusion
 of this file a no-op in all the places where this is being included
 without KVM being enabled. But I am not 100% sure of that approach.
 
 Any suggestions are welcome.

As I suggested elsewhere in the thread, why not be more fine-grained in
what you ifdef in the srcu header?  How will that require excessive
refactoring?

Or, just stick with the linker error.

I also wonder if this is worthwhile just to save around 2000 bytes.
What other core synchronization mechanisms are optional?  What
real-world configs will actually have this disabled?

-Scott


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Re: [PATCH] tty: 8250: Add 64byte UART support for FSL platforms

2014-12-30 Thread Scott Wood 
On Tue, 2014-12-30 at 15:08 +0530, Vijay Rai wrote:
 Some of FSL SoCs like T1040 has new version of UART controller which
 can support 64byte FiFo.
 To enable 64 byte support, following needs to be done:
 -FCR[EN64] needs to be programmed to 1 to enable it.
 -Also, when FCR[EN64]==1, RTL bits to be used as below
 to define various Receive Trigger Levels:
 -FCR[RTL] = 00  1 byte
 -FCR[RTL] = 01  16 bytes
 -FCR[RTL] = 10  32 bytes
 -FCR[RTL] = 11  56 bytes
 -tx_loadsz is set to 32-bytes instead of 64-bytes to implement
  workaround of errata A-008006 which states that tx_loadsz should
  be configured less than Maximum supported fifo bytes

Why 32 and not 63?

 Signed-off-by: Vijay Rai vijay@freescale.com
 Signed-off-by: Priyanka Jain priyanka.j...@freescale.com
 Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
 ---
  drivers/tty/serial/8250/8250_core.c |   20 +++-
  include/uapi/linux/serial_core.h|3 ++-
  include/uapi/linux/serial_reg.h |3 ++-
  3 files changed, 23 insertions(+), 3 deletions(-)
 
 diff --git a/drivers/tty/serial/8250/8250_core.c 
 b/drivers/tty/serial/8250/8250_core.c
 index 11c6685..565748c 100644
 --- a/drivers/tty/serial/8250/8250_core.c
 +++ b/drivers/tty/serial/8250/8250_core.c
 @@ -329,6 +329,14 @@ static const struct serial8250_config uart_config[] = {
   .fcr= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
   .flags  = UART_CAP_FIFO | UART_CAP_AFE,
   },
 + [PORT_16550A_FSL64] = {
 + .name   = 16550A_FSL64,
 + .fifo_size  = 64,
 + .tx_loadsz  = 32,

Put a comment here mentioning the erratum.

 diff --git a/include/uapi/linux/serial_core.h 
 b/include/uapi/linux/serial_core.h
 index c172180..a3b4491 100644
 --- a/include/uapi/linux/serial_core.h
 +++ b/include/uapi/linux/serial_core.h
 @@ -55,7 +55,8 @@
  #define PORT_ALTR_16550_F64 27   /* Altera 16550 UART with 64 FIFOs */
  #define PORT_ALTR_16550_F128 28 /* Altera 16550 UART with 128 FIFOs */
  #define PORT_RT2880  29  /* Ralink RT2880 internal UART */
 -#define PORT_MAX_825029  /* max port ID */
 +#define PORT_16550A_FSL64 30 /* Freescale 16550 UART with 64 FIFOs */
 +#define PORT_MAX_825031  /* max port ID */

Why are you adding 2 to PORT_MAX_8250 when you only add one new type?
 
-Scott


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