Re: [PATCH v3 4/6] cpufreq: powernv: Call throttle_check() on receiving OCC_THROTTLE

2015-05-04 Thread Shilpasri G Bhat
Hi Preeti,

On 05/05/2015 09:30 AM, Preeti U Murthy wrote:
> Hi Shilpa,
> 
> On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
>> Re-evaluate the chip's throttled state on recieving OCC_THROTTLE
>> notification by executing *throttle_check() on any one of the cpu on
>> the chip. This is a sanity check to verify if we were indeed
>> throttled/unthrottled after receiving OCC_THROTTLE notification.
>>
>> We cannot call *throttle_check() directly from the notification
>> handler because we could be handling chip1's notification in chip2. So
>> initiate an smp_call to execute *throttle_check(). We are irq-disabled
>> in the notification handler, so use a worker thread to smp_call
>> throttle_check() on any of the cpu in the chipmask.
> 
> I see that the first patch takes care of reporting *per-chip* throttling
> for pmax capping condition. But where are we taking care of reporting
> "pstate set to safe" and "freq control disabled" scenarios per-chip ?
> 

IMO let us not have "psafe" and "freq control disabled" states managed per-chip.
Because when the above two conditions occur it is likely to happen across all
chips during an OCC reset cycle. So I am setting 'throttled' to false on
OCC_ACTIVE and re-verifying if it actually is the case by invoking
*throttle_check().

>>
>> Signed-off-by: Shilpasri G Bhat 
>> ---
>>  drivers/cpufreq/powernv-cpufreq.c | 28 ++--
>>  1 file changed, 26 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
>> b/drivers/cpufreq/powernv-cpufreq.c
>> index 9268424..9618813 100644
>> --- a/drivers/cpufreq/powernv-cpufreq.c
>> +++ b/drivers/cpufreq/powernv-cpufreq.c
>> @@ -50,6 +50,8 @@ static bool rebooting, throttled, occ_reset;
>>  static struct chip {
>>  unsigned int id;
>>  bool throttled;
>> +cpumask_t mask;
>> +struct work_struct throttle;
>>  } *chips;
>>
>>  static int nr_chips;
>> @@ -310,8 +312,9 @@ static inline unsigned int get_nominal_index(void)
>>  return powernv_pstate_info.max - powernv_pstate_info.nominal;
>>  }
>>
>> -static void powernv_cpufreq_throttle_check(unsigned int cpu)
>> +static void powernv_cpufreq_throttle_check(void *data)
>>  {
>> +unsigned int cpu = smp_processor_id();
>>  unsigned long pmsr;
>>  int pmsr_pmax, pmsr_lp, i;
>>
>> @@ -373,7 +376,7 @@ static int powernv_cpufreq_target_index(struct 
>> cpufreq_policy *policy,
>>  return 0;
>>
>>  if (!throttled)
>> -powernv_cpufreq_throttle_check(smp_processor_id());
>> +powernv_cpufreq_throttle_check(NULL);
>>
>>  freq_data.pstate_id = powernv_freqs[new_index].driver_data;
>>
>> @@ -418,6 +421,14 @@ static struct notifier_block powernv_cpufreq_reboot_nb 
>> = {
>>  .notifier_call = powernv_cpufreq_reboot_notifier,
>>  };
>>
>> +void powernv_cpufreq_work_fn(struct work_struct *work)
>> +{
>> +struct chip *chip = container_of(work, struct chip, throttle);
>> +
>> +smp_call_function_any(&chip->mask,
>> +  powernv_cpufreq_throttle_check, NULL, 0);
>> +}
>> +
>>  static char throttle_reason[][30] = {
>>  "No throttling",
>>  "Power Cap",
>> @@ -433,6 +444,7 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
>> *nb,
>>  struct opal_msg *occ_msg = msg;
>>  uint64_t token;
>>  uint64_t chip_id, reason;
>> +int i;
>>
>>  if (msg_type != OPAL_MSG_OCC)
>>  return 0;
>> @@ -466,6 +478,10 @@ static int powernv_cpufreq_occ_msg(struct 
>> notifier_block *nb,
>>  occ_reset = false;
>>  throttled = false;
>>  pr_info("OCC: Active\n");
>> +
>> +for (i = 0; i < nr_chips; i++)
>> +schedule_work(&chips[i].throttle);
>> +
>>  return 0;
>>  }
>>
>> @@ -476,6 +492,12 @@ static int powernv_cpufreq_occ_msg(struct 
>> notifier_block *nb,
>>  else if (!reason)
>>  pr_info("OCC: Chip %u %s\n", (unsigned int)chip_id,
>>  throttle_reason[reason]);
>> +else
>> +return 0;
> 
> Why the else section ? The code can never reach here, can it ?

When reason > 5 , we dont want to handle it.

> 
>> +
>> +for (i = 0; i < nr_chips; i++)
>> +if (chips[i].id == chip_id)
>> +schedule_work(&chips[i].throttle);
>>  }
> 
> Should we not do this only when we get unthrottled so as to cross verify
> if it is indeed the case ? In case of throttling notification, opal's
> verdict is final and there is no need to cross verify right ?

Two reasons for invoking *throttle_check() on throttling:
1) We just got to know the reason and not the Pmax value we are getting
throttled to.
2) It could be a spurious message caused due to late/lost delivery. My point
here is let us not completely rely on the no

Re: [PATCH v3 1/6] cpufreq: poowernv: Handle throttling due to Pmax capping at chip level

2015-05-04 Thread Shilpasri G Bhat
Hi Preeti,

On 05/05/2015 09:21 AM, Preeti U Murthy wrote:
> Hi Shilpa,
> 
> On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
>> The On-Chip-Controller(OCC) can throttle cpu frequency by reducing the
>> max allowed frequency for that chip if the chip exceeds its power or
>> temperature limits. As Pmax capping is a chip level condition report
>> this throttling behavior at chip level and also do not set the global
>> 'throttled' on Pmax capping instead set the per-chip throttled
>> variable. Report unthrottling if Pmax is restored after throttling.
>>
>> This patch adds a structure to store chip id and throttled state of
>> the chip.
>>
>> Signed-off-by: Shilpasri G Bhat 
>> ---
>>  drivers/cpufreq/powernv-cpufreq.c | 59 
>> ---
>>  1 file changed, 55 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
>> b/drivers/cpufreq/powernv-cpufreq.c
>> index ebef0d8..d0c18c9 100644
>> --- a/drivers/cpufreq/powernv-cpufreq.c
>> +++ b/drivers/cpufreq/powernv-cpufreq.c
>> @@ -27,6 +27,7 @@
>>  #include 
>>  #include 
>>  #include 
>> +#include 
>>
>>  #include 
>>  #include 
>> @@ -42,6 +43,13 @@
>>  static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
>>  static bool rebooting, throttled;
>>
>> +static struct chip {
>> +unsigned int id;
>> +bool throttled;
>> +} *chips;
>> +
>> +static int nr_chips;
>> +
>>  /*
>>   * Note: The set of pstates consists of contiguous integers, the
>>   * smallest of which is indicated by powernv_pstate_info.min, the
>> @@ -301,22 +309,33 @@ static inline unsigned int get_nominal_index(void)
>>  static void powernv_cpufreq_throttle_check(unsigned int cpu)
>>  {
>>  unsigned long pmsr;
>> -int pmsr_pmax, pmsr_lp;
>> +int pmsr_pmax, pmsr_lp, i;
>>
>>  pmsr = get_pmspr(SPRN_PMSR);
>>
>> +for (i = 0; i < nr_chips; i++)
>> +if (chips[i].id == cpu_to_chip_id(cpu))
>> +break;
>> +
>>  /* Check for Pmax Capping */
>>  pmsr_pmax = (s8)PMSR_MAX(pmsr);
>>  if (pmsr_pmax != powernv_pstate_info.max) {
>> -throttled = true;
>> -pr_info("CPU %d Pmax is reduced to %d\n", cpu, pmsr_pmax);
>> -pr_info("Max allowed Pstate is capped\n");
>> +if (chips[i].throttled)
>> +goto next;
>> +chips[i].throttled = true;
>> +pr_info("CPU %d on Chip %u has Pmax reduced to %d\n", cpu,
>> +chips[i].id, pmsr_pmax);
>> +} else if (chips[i].throttled) {
>> +chips[i].throttled = false;
> 
> Is this check on pmax sufficient to indicate that the chip is unthrottled ?

Unthrottling due to Pmax uncapping here is specific to a chip. So it is
sufficient to decide throttling/unthrottling when OCC is active for that chip.

> 
>> +pr_info("CPU %d on Chip %u has Pmax restored to %d\n", cpu,
>> +chips[i].id, pmsr_pmax);
>>  }
>>
>>  /*
>>   * Check for Psafe by reading LocalPstate
>>   * or check if Psafe_mode_active is set in PMSR.
>>   */
>> +next:
>>  pmsr_lp = (s8)PMSR_LP(pmsr);
>>  if ((pmsr_lp < powernv_pstate_info.min) ||
>>  (pmsr & PMSR_PSAFE_ENABLE)) {
>> @@ -414,6 +433,33 @@ static struct cpufreq_driver powernv_cpufreq_driver = {
>>  .attr   = powernv_cpu_freq_attr,
> 
> What about the situation where although occ is active, this particular
> chip has been throttled and we end up repeatedly reporting "pstate set
> to safe" and "frequency control disabled from OS" ? Should we not have a
> check on (chips[i].throttled) before reporting an anomaly for these two
> scenarios as well just like you have for pmsr_pmax ?

We will not have "Psafe" and "frequency control disabled" repeatedly printed
because of global variable 'throttled', which is set to true on passing any of
these two conditions.

It is quite unlikely behavior to have only one chip in "Psafe" or "frequency
control disabled" state. These two conditions are most likely to happen during
an OCC reset cycle which will occur across all chips.

Thanks and Regards,
Shilpa

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Re: [PATCH v3 4/6] cpufreq: powernv: Call throttle_check() on receiving OCC_THROTTLE

2015-05-04 Thread Preeti U Murthy
Hi Shilpa,

On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
> Re-evaluate the chip's throttled state on recieving OCC_THROTTLE
> notification by executing *throttle_check() on any one of the cpu on
> the chip. This is a sanity check to verify if we were indeed
> throttled/unthrottled after receiving OCC_THROTTLE notification.
> 
> We cannot call *throttle_check() directly from the notification
> handler because we could be handling chip1's notification in chip2. So
> initiate an smp_call to execute *throttle_check(). We are irq-disabled
> in the notification handler, so use a worker thread to smp_call
> throttle_check() on any of the cpu in the chipmask.

I see that the first patch takes care of reporting *per-chip* throttling
for pmax capping condition. But where are we taking care of reporting
"pstate set to safe" and "freq control disabled" scenarios per-chip ?

> 
> Signed-off-by: Shilpasri G Bhat 
> ---
>  drivers/cpufreq/powernv-cpufreq.c | 28 ++--
>  1 file changed, 26 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
> b/drivers/cpufreq/powernv-cpufreq.c
> index 9268424..9618813 100644
> --- a/drivers/cpufreq/powernv-cpufreq.c
> +++ b/drivers/cpufreq/powernv-cpufreq.c
> @@ -50,6 +50,8 @@ static bool rebooting, throttled, occ_reset;
>  static struct chip {
>   unsigned int id;
>   bool throttled;
> + cpumask_t mask;
> + struct work_struct throttle;
>  } *chips;
> 
>  static int nr_chips;
> @@ -310,8 +312,9 @@ static inline unsigned int get_nominal_index(void)
>   return powernv_pstate_info.max - powernv_pstate_info.nominal;
>  }
> 
> -static void powernv_cpufreq_throttle_check(unsigned int cpu)
> +static void powernv_cpufreq_throttle_check(void *data)
>  {
> + unsigned int cpu = smp_processor_id();
>   unsigned long pmsr;
>   int pmsr_pmax, pmsr_lp, i;
> 
> @@ -373,7 +376,7 @@ static int powernv_cpufreq_target_index(struct 
> cpufreq_policy *policy,
>   return 0;
> 
>   if (!throttled)
> - powernv_cpufreq_throttle_check(smp_processor_id());
> + powernv_cpufreq_throttle_check(NULL);
> 
>   freq_data.pstate_id = powernv_freqs[new_index].driver_data;
> 
> @@ -418,6 +421,14 @@ static struct notifier_block powernv_cpufreq_reboot_nb = 
> {
>   .notifier_call = powernv_cpufreq_reboot_notifier,
>  };
> 
> +void powernv_cpufreq_work_fn(struct work_struct *work)
> +{
> + struct chip *chip = container_of(work, struct chip, throttle);
> +
> + smp_call_function_any(&chip->mask,
> +   powernv_cpufreq_throttle_check, NULL, 0);
> +}
> +
>  static char throttle_reason[][30] = {
>   "No throttling",
>   "Power Cap",
> @@ -433,6 +444,7 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
> *nb,
>   struct opal_msg *occ_msg = msg;
>   uint64_t token;
>   uint64_t chip_id, reason;
> + int i;
> 
>   if (msg_type != OPAL_MSG_OCC)
>   return 0;
> @@ -466,6 +478,10 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
> *nb,
>   occ_reset = false;
>   throttled = false;
>   pr_info("OCC: Active\n");
> +
> + for (i = 0; i < nr_chips; i++)
> + schedule_work(&chips[i].throttle);
> +
>   return 0;
>   }
> 
> @@ -476,6 +492,12 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
> *nb,
>   else if (!reason)
>   pr_info("OCC: Chip %u %s\n", (unsigned int)chip_id,
>   throttle_reason[reason]);
> + else
> + return 0;

Why the else section ? The code can never reach here, can it ?

> +
> + for (i = 0; i < nr_chips; i++)
> + if (chips[i].id == chip_id)
> + schedule_work(&chips[i].throttle);
>   }

Should we not do this only when we get unthrottled so as to cross verify
if it is indeed the case ? In case of throttling notification, opal's
verdict is final and there is no need to cross verify right ?

Perhaps the one thing that needs to be taken care in addition to
reporting throttling is setting the chip's throttled parameter to true.
This should do right ? I don't see the need to call throttle_check() here.

Regards
Preeti U Murthy


>   return 0;
>  }
> @@ -527,6 +549,8 @@ static int init_chip_info(void)
>   for (i = 0; i < nr_chips; i++) {
>   chips[i].id = chip[i];
>   chips[i].throttled = false;
> + cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
> + INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
>   }
> 
>   return 0;
> 

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Re: [PATCH v3 1/6] cpufreq: poowernv: Handle throttling due to Pmax capping at chip level

2015-05-04 Thread Preeti U Murthy
Hi Shilpa,

On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
> The On-Chip-Controller(OCC) can throttle cpu frequency by reducing the
> max allowed frequency for that chip if the chip exceeds its power or
> temperature limits. As Pmax capping is a chip level condition report
> this throttling behavior at chip level and also do not set the global
> 'throttled' on Pmax capping instead set the per-chip throttled
> variable. Report unthrottling if Pmax is restored after throttling.
> 
> This patch adds a structure to store chip id and throttled state of
> the chip.
> 
> Signed-off-by: Shilpasri G Bhat 
> ---
>  drivers/cpufreq/powernv-cpufreq.c | 59 
> ---
>  1 file changed, 55 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
> b/drivers/cpufreq/powernv-cpufreq.c
> index ebef0d8..d0c18c9 100644
> --- a/drivers/cpufreq/powernv-cpufreq.c
> +++ b/drivers/cpufreq/powernv-cpufreq.c
> @@ -27,6 +27,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
> 
>  #include 
>  #include 
> @@ -42,6 +43,13 @@
>  static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
>  static bool rebooting, throttled;
> 
> +static struct chip {
> + unsigned int id;
> + bool throttled;
> +} *chips;
> +
> +static int nr_chips;
> +
>  /*
>   * Note: The set of pstates consists of contiguous integers, the
>   * smallest of which is indicated by powernv_pstate_info.min, the
> @@ -301,22 +309,33 @@ static inline unsigned int get_nominal_index(void)
>  static void powernv_cpufreq_throttle_check(unsigned int cpu)
>  {
>   unsigned long pmsr;
> - int pmsr_pmax, pmsr_lp;
> + int pmsr_pmax, pmsr_lp, i;
> 
>   pmsr = get_pmspr(SPRN_PMSR);
> 
> + for (i = 0; i < nr_chips; i++)
> + if (chips[i].id == cpu_to_chip_id(cpu))
> + break;
> +
>   /* Check for Pmax Capping */
>   pmsr_pmax = (s8)PMSR_MAX(pmsr);
>   if (pmsr_pmax != powernv_pstate_info.max) {
> - throttled = true;
> - pr_info("CPU %d Pmax is reduced to %d\n", cpu, pmsr_pmax);
> - pr_info("Max allowed Pstate is capped\n");
> + if (chips[i].throttled)
> + goto next;
> + chips[i].throttled = true;
> + pr_info("CPU %d on Chip %u has Pmax reduced to %d\n", cpu,
> + chips[i].id, pmsr_pmax);
> + } else if (chips[i].throttled) {
> + chips[i].throttled = false;

Is this check on pmax sufficient to indicate that the chip is unthrottled ?

> + pr_info("CPU %d on Chip %u has Pmax restored to %d\n", cpu,
> + chips[i].id, pmsr_pmax);
>   }
> 
>   /*
>* Check for Psafe by reading LocalPstate
>* or check if Psafe_mode_active is set in PMSR.
>*/
> +next:
>   pmsr_lp = (s8)PMSR_LP(pmsr);
>   if ((pmsr_lp < powernv_pstate_info.min) ||
>   (pmsr & PMSR_PSAFE_ENABLE)) {
> @@ -414,6 +433,33 @@ static struct cpufreq_driver powernv_cpufreq_driver = {
>   .attr   = powernv_cpu_freq_attr,

What about the situation where although occ is active, this particular
chip has been throttled and we end up repeatedly reporting "pstate set
to safe" and "frequency control disabled from OS" ? Should we not have a
check on (chips[i].throttled) before reporting an anomaly for these two
scenarios as well just like you have for pmsr_pmax ?

Regards
Preeti U Murthy

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Re: [PATCH v3 5/6] cpufreq: powernv: Report Psafe only if PMSR.psafe_mode_active bit is set

2015-05-04 Thread Preeti U Murthy
On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
> On a reset cycle of OCC, although the system retires from safe
> frequency state the local pstate is not restored to Pmin or last
> requested pstate. Now if the cpufreq governor initiates a pstate
> change, the local pstate will be in Psafe and we will be reporting a
> false positive when we are not throttled.
> 
> So in powernv_cpufreq_throttle_check() remove the condition which
> checks if local pstate is less than Pmin while checking for Psafe
> frequency. If the cpus are forced to Psafe then PMSR.psafe_mode_active
> bit will be set. So, when OCCs become active this bit will be cleared.
> Let us just rely on this bit for reporting throttling.
> 
> Signed-off-by: Shilpasri G Bhat 
> ---
>  drivers/cpufreq/powernv-cpufreq.c | 12 +++-
>  1 file changed, 3 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
> b/drivers/cpufreq/powernv-cpufreq.c
> index 9618813..0a59d5b 100644
> --- a/drivers/cpufreq/powernv-cpufreq.c
> +++ b/drivers/cpufreq/powernv-cpufreq.c
> @@ -39,7 +39,6 @@
>  #define PMSR_PSAFE_ENABLE(1UL << 30)
>  #define PMSR_SPR_EM_DISABLE  (1UL << 31)
>  #define PMSR_MAX(x)  ((x >> 32) & 0xFF)
> -#define PMSR_LP(x)   ((x >> 48) & 0xFF)
>  #define OCC_RESET0
>  #define OCC_LOAD 1
>  #define OCC_THROTTLE 2
> @@ -316,7 +315,7 @@ static void powernv_cpufreq_throttle_check(void *data)
>  {
>   unsigned int cpu = smp_processor_id();
>   unsigned long pmsr;
> - int pmsr_pmax, pmsr_lp, i;
> + int pmsr_pmax, i;
>  
>   pmsr = get_pmspr(SPRN_PMSR);
>  
> @@ -338,14 +337,9 @@ static void powernv_cpufreq_throttle_check(void *data)
>   chips[i].id, pmsr_pmax);
>   }
>  
> - /*
> -  * Check for Psafe by reading LocalPstate
> -  * or check if Psafe_mode_active is set in PMSR.
> -  */
> + /* Check if Psafe_mode_active is set in PMSR. */
>  next:
> - pmsr_lp = (s8)PMSR_LP(pmsr);
> - if ((pmsr_lp < powernv_pstate_info.min) ||
> - (pmsr & PMSR_PSAFE_ENABLE)) {
> + if (pmsr & PMSR_PSAFE_ENABLE) {
>   throttled = true;
>   pr_info("Pstate set to safe frequency\n");
>   }
> 

Reviewed-by: Preeti U Murthy 

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Re: [PATCH v3 3/6] cpufreq: powernv: Register for OCC related opal_message notification

2015-05-04 Thread Preeti U Murthy
On 05/04/2015 02:24 PM, Shilpasri G Bhat wrote:
> OCC is an On-Chip-Controller which takes care of power and thermal
> safety of the chip. During runtime due to power failure or
> overtemperature the OCC may throttle the frequencies of the CPUs to
> remain within the power budget.
> 
> We want the cpufreq driver to be aware of such situations to be able
> to report the reason to the user. We register to opal_message_notifier
> to receive OCC messages from opal.
> 
> powernv_cpufreq_throttle_check() reports any frequency throttling and
> this patch will report the reason or event that caused throttling. We
> can be throttled if OCC is reset or OCC limits Pmax due to power or
> thermal reasons. We are also notified of unthrottling after an OCC
> reset or if OCC restores Pmax on the chip.
> 
> Signed-off-by: Shilpasri G Bhat 
> ---
> Changes from v2:
> - Patch split in to multiple patches.
> - This patch contains only the opal_message notification handler
> 
> Changes from v1:
> - Add macros to define OCC_RESET, OCC_LOAD and OCC_THROTTLE
> - Define a structure to store chip id, chip mask which has bits set
>   for cpus present in the chip, throttled state and a work_struct.
> - Modify powernv_cpufreq_throttle_check() to be called via smp_call()
> - On Pmax throttling/unthrottling update 'chip.throttled' and not the
>   global 'throttled' as Pmax capping is local to the chip.
> - Remove the condition which checks if local pstate is less than Pmin
>   while checking for Psafe frequency. When OCC becomes active after
>   reset we update 'thottled' to false and when the cpufreq governor
>   initiates a pstate change, the local pstate will be in Psafe and we
>   will be reporting a false positive when we are not throttled.
> - Schedule a kworker on receiving throttling/unthrottling OCC message
>   for that chip and schedule on all chips after receiving active.
> - After an OCC reset all the cpus will be in Psafe frequency. So call
>   target() and restore the frequency to policy->cur after OCC_ACTIVE
>   and Pmax unthrottling
> - Taken care of Viresh and Preeti's comments.
> 
>  drivers/cpufreq/powernv-cpufreq.c | 75 
> ++-
>  1 file changed, 74 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/cpufreq/powernv-cpufreq.c 
> b/drivers/cpufreq/powernv-cpufreq.c
> index d0c18c9..9268424 100644
> --- a/drivers/cpufreq/powernv-cpufreq.c
> +++ b/drivers/cpufreq/powernv-cpufreq.c
> @@ -33,15 +33,19 @@
>  #include 
>  #include 
>  #include  /* Required for cpu_sibling_mask() in UP configs */
> +#include 
> 
>  #define POWERNV_MAX_PSTATES  256
>  #define PMSR_PSAFE_ENABLE(1UL << 30)
>  #define PMSR_SPR_EM_DISABLE  (1UL << 31)
>  #define PMSR_MAX(x)  ((x >> 32) & 0xFF)
>  #define PMSR_LP(x)   ((x >> 48) & 0xFF)
> +#define OCC_RESET0
> +#define OCC_LOAD 1
> +#define OCC_THROTTLE 2
> 
>  static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
> -static bool rebooting, throttled;
> +static bool rebooting, throttled, occ_reset;
> 
>  static struct chip {
>   unsigned int id;
> @@ -414,6 +418,74 @@ static struct notifier_block powernv_cpufreq_reboot_nb = 
> {
>   .notifier_call = powernv_cpufreq_reboot_notifier,
>  };
> 
> +static char throttle_reason[][30] = {
> + "No throttling",
> + "Power Cap",
> + "Processor Over Temperature",
> + "Power Supply Failure",
> + "Over Current",
> + "OCC Reset"
> +  };
> +
> +static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
> +unsigned long msg_type, void *msg)
> +{
> + struct opal_msg *occ_msg = msg;
> + uint64_t token;
> + uint64_t chip_id, reason;
> +
> + if (msg_type != OPAL_MSG_OCC)
> + return 0;
> +
> + token = be64_to_cpu(occ_msg->params[0]);
> +
> + switch (token) {
> + case OCC_RESET:
> + occ_reset = true;
> + /*
> +  * powernv_cpufreq_throttle_check() is called in
> +  * target() callback which can detect the throttle state
> +  * for governors like ondemand.
> +  * But static governors will not call target() often thus
> +  * report throttling here.
> +  */
> + if (!throttled) {
> + throttled = true;
> + pr_crit("CPU Frequency is throttled\n");
> + }
> + pr_info("OCC: Reset\n");
> + break;
> + case OCC_LOAD:
> + pr_info("OCC: Loaded\n");
> + break;
> + case OCC_THROTTLE:
> + chip_id = be64_to_cpu(occ_msg->params[1]);
> + reason = be64_to_cpu(occ_msg->params[2]);
> +
> + if (occ_reset) {
> +   

Re: [PATCH 1/2] powerpc: fix the dependency issue for CRASH_DUMP

2015-05-04 Thread Scott Wood
On Tue, 2015-05-05 at 10:27 +0800, Kevin Hao wrote:
> On Mon, May 04, 2015 at 05:17:17PM -0500, Scott Wood wrote:
> > On Thu, 2015-04-30 at 20:29 +0800, Kevin Hao wrote:
> > > In the current code, the RELOCATABLE will be forcedly enabled when
> > > enabling CRASH_DUMP. But for ppc32, the RELOCABLE also depend on
> > > ADVANCED_OPTIONS and select NONSTATIC_KERNEL. This will cause build
> > > error when CRASH_DUMP=y && ADVANCED_OPTIONS=n. Even there is no such
> > > issue for ppc64, but select is only for non-visible symbols and for
> > > symbols with no dependencies. As for a symbol like RELOCATABLE, it is
> > > definitely not suitable to select it. So choose to depend on it.
> > 
> > Why is it "definitely not suitable to select it", provided the
> > ADVANCED_OPTIONS dependency is removed, and the FLATMEM dependency is
> > moved to places that select RELOCATABLE?
> 
> Even with this change, the definition of RELOCATABLE still be something like
> this:
> config RELOCATABLE
>bool "Build a relocatable kernel"
>depends on (PPC64 && !COMPILE_TEST) || 44x || FSL_BOOKE
>select NONSTATIC_KERNEL

That matches the cases where CRASH_DUMP selects RELOCATABLE.

> Quoted form Documentation/kbuild/kconfig-language.txt:
> select should be used with care. select will force
> a symbol to a value without visiting the dependencies.
> By abusing select you are able to select a symbol FOO even
> if FOO depends on BAR that is not set.
> In general use select only for non-visible symbols
> (no prompts anywhere) and for symbols with no dependencies.
> That will limit the usefulness but on the other hand avoid
> the illegal configurations all over.
> 
> So it is always error prone to select a kernel option like this.

Yes, but these days Kbuild does warn about selecting a symbol with unmet
dependencies, which IIRC wasn't the case when that was written.

> >  It seems wrong that the user
> > should have to enable ADVANCED_OPTIONS to even see the option to build a
> > crash kernel.
> 
> Yes, it seems ridiculous. But this is fixed in the patch 2.

OK...  Still non-obvious, but at least not *as* bad.

-Scott


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Re: [PATCH 1/2] powerpc: fix the dependency issue for CRASH_DUMP

2015-05-04 Thread Kevin Hao
On Mon, May 04, 2015 at 05:17:17PM -0500, Scott Wood wrote:
> On Thu, 2015-04-30 at 20:29 +0800, Kevin Hao wrote:
> > In the current code, the RELOCATABLE will be forcedly enabled when
> > enabling CRASH_DUMP. But for ppc32, the RELOCABLE also depend on
> > ADVANCED_OPTIONS and select NONSTATIC_KERNEL. This will cause build
> > error when CRASH_DUMP=y && ADVANCED_OPTIONS=n. Even there is no such
> > issue for ppc64, but select is only for non-visible symbols and for
> > symbols with no dependencies. As for a symbol like RELOCATABLE, it is
> > definitely not suitable to select it. So choose to depend on it.
> 
> Why is it "definitely not suitable to select it", provided the
> ADVANCED_OPTIONS dependency is removed, and the FLATMEM dependency is
> moved to places that select RELOCATABLE?

Even with this change, the definition of RELOCATABLE still be something like
this:
config RELOCATABLE
   bool "Build a relocatable kernel"
   depends on (PPC64 && !COMPILE_TEST) || 44x || FSL_BOOKE
   select NONSTATIC_KERNEL

Quoted form Documentation/kbuild/kconfig-language.txt:
select should be used with care. select will force
a symbol to a value without visiting the dependencies.
By abusing select you are able to select a symbol FOO even
if FOO depends on BAR that is not set.
In general use select only for non-visible symbols
(no prompts anywhere) and for symbols with no dependencies.
That will limit the usefulness but on the other hand avoid
the illegal configurations all over.

So it is always error prone to select a kernel option like this.

>  It seems wrong that the user
> should have to enable ADVANCED_OPTIONS to even see the option to build a
> crash kernel.

Yes, it seems ridiculous. But this is fixed in the patch 2.

Thanks,
Kevin


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Re: [PATCH 1/2] powerpc: fix the dependency issue for CRASH_DUMP

2015-05-04 Thread Scott Wood
On Thu, 2015-04-30 at 20:29 +0800, Kevin Hao wrote:
> In the current code, the RELOCATABLE will be forcedly enabled when
> enabling CRASH_DUMP. But for ppc32, the RELOCABLE also depend on
> ADVANCED_OPTIONS and select NONSTATIC_KERNEL. This will cause build
> error when CRASH_DUMP=y && ADVANCED_OPTIONS=n. Even there is no such
> issue for ppc64, but select is only for non-visible symbols and for
> symbols with no dependencies. As for a symbol like RELOCATABLE, it is
> definitely not suitable to select it. So choose to depend on it.

Why is it "definitely not suitable to select it", provided the
ADVANCED_OPTIONS dependency is removed, and the FLATMEM dependency is
moved to places that select RELOCATABLE?  It seems wrong that the user
should have to enable ADVANCED_OPTIONS to even see the option to build a
crash kernel.

-Scott


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Re: [v2,2/2] powerpc32: add support for csum_add()

2015-05-04 Thread Segher Boessenkool
On Fri, May 01, 2015 at 08:00:14PM -0500, Scott Wood wrote:
> On Tue, 2015-04-28 at 21:01 +0200, christophe leroy wrote:
> > The generated code is most likely different on ppc64. I have no ppc64
> > compiler

For reference: yes you do.  Just add -m64.

> Ideal (short of a 64-bit __wsum) would probably be something like (untested):
> 
>   add r3,r3,r4
>   srdir5,r3,32
>   add r3,r3,r5
>   clrldi  r3,r3,32
> 
> Or in C code (which would let the compiler schedule it better):
> 
> static inline __wsum csum_add(__wsum csum, __wsum addend)
> {
> u64 res = (__force u64)csum;
> res += (__force u32)addend;
> return (__force __wsum)((u32)res + (res >> 32));
> }

Older GCC make exactly your asm code for that, in 64-bit; newer GCC get
two adds (one as 32-bit, one as 64-bit, it does not see those are the
same, grrr); and GCC 5 makes the perfect  addc 3,4,3 ; addze 3,3  for
this in 32-bit mode.  You don't want to see what older GCC does with
32-bit though :-/


Segher
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Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

2015-05-04 Thread Joakim Tjernlund
On Mon, 2015-05-04 at 21:17 +, Joakim Tjernlund wrote:
> On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> > On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host 
> > > *host)
> > >  
> > > if (vvn > VENDOR_V_22)
> > > host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
> > > +
> > > +   host->mmc->caps |= MMC_CAP_8_BIT_DATA;
> > >  }
> > > 
> > 
> > Shouldn't this check the "bus-width" property before setting the width?
> > 
> > There might be an eMMC or SDIO with 4-bit interface connected.
> 
> This is for an eMMC chip we got and I THINK(this is new to me) that
> this only allows 8 bit negotiation but I might be way off.
>  
> Anyone knows for sure?

hmm, I need to look some more at this. There is bus-with/8BIT all over mmc and I
have probably missed something.

   Jocke
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[PATCH 01/21] perf probe ppc: Fix symbol fixup issues due to ELF type

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

If using the symbol table, symbol addresses are not being fixed up
properly, resulting in probes being placed at wrong addresses:

  # perf probe do_fork
  Added new event:
probe:do_fork(on do_fork)

  You can now use it in all perf tools, such as:

  perf record -e probe:do_fork -aR sleep 1

  # cat /sys/kernel/debug/tracing/kprobe_events
  p:probe/do_fork _text+635952
  # printf "%x" 635952
  9b430
  # grep do_fork /boot/System.map
  c00ab430 T .do_fork

Fix by checking for ELF type ET_DYN used by ppc64 kernels.

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Cc: Ananth N Mavinakayanahalli 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/41392bb856ef62d929995e0b61967689b7915207.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/Build  |  1 +
 tools/perf/arch/powerpc/util/sym-handling.c | 19 +++
 tools/perf/util/symbol-elf.c|  8 ++--
 tools/perf/util/symbol.h|  4 
 4 files changed, 30 insertions(+), 2 deletions(-)
 create mode 100644 tools/perf/arch/powerpc/util/sym-handling.c

diff --git a/tools/perf/arch/powerpc/util/Build 
b/tools/perf/arch/powerpc/util/Build
index 0af6e9b..7b8b0d1 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,4 +1,5 @@
 libperf-y += header.o
+libperf-y += sym-handling.o
 
 libperf-$(CONFIG_DWARF) += dwarf-regs.o
 libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
new file mode 100644
index 000..c9de001
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -0,0 +1,19 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * Copyright (C) 2015 Naveen N. Rao, IBM Corporation
+ */
+
+#include "debug.h"
+#include "symbol.h"
+
+#ifdef HAVE_LIBELF_SUPPORT
+bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
+{
+   return ehdr.e_type == ET_EXEC ||
+  ehdr.e_type == ET_REL ||
+  ehdr.e_type == ET_DYN;
+}
+#endif
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index a7ab606..54347ba 100644
--- a/tools/perf/util/symbol-elf.c
+++ b/tools/perf/util/symbol-elf.c
@@ -630,6 +630,11 @@ void symsrc__destroy(struct symsrc *ss)
close(ss->fd);
 }
 
+bool __weak elf__needs_adjust_symbols(GElf_Ehdr ehdr)
+{
+   return ehdr.e_type == ET_EXEC || ehdr.e_type == ET_REL;
+}
+
 int symsrc__init(struct symsrc *ss, struct dso *dso, const char *name,
 enum dso_binary_type type)
 {
@@ -711,8 +716,7 @@ int symsrc__init(struct symsrc *ss, struct dso *dso, const 
char *name,
 ".gnu.prelink_undo",
 NULL) != NULL);
} else {
-   ss->adjust_symbols = ehdr.e_type == ET_EXEC ||
-ehdr.e_type == ET_REL;
+   ss->adjust_symbols = elf__needs_adjust_symbols(ehdr);
}
 
ss->name   = strdup(name);
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index 0956150..8cb0af4 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -303,4 +303,8 @@ int setup_list(struct strlist **list, const char *list_str,
 int setup_intlist(struct intlist **list, const char *list_str,
  const char *list_name);
 
+#ifdef HAVE_LIBELF_SUPPORT
+bool elf__needs_adjust_symbols(GElf_Ehdr ehdr);
+#endif
+
 #endif /* __PERF_SYMBOL */
-- 
2.1.0

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[PATCH 03/21] perf probe ppc: Enable matching against dot symbols automatically

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

Allow perf probe to work on ppc ABIv1 without the need to specify the
leading dot '.' for functions. 'perf probe do_fork' works with this
patch.

We do this by changing how symbol name comparison works on ppc ABIv1 -
we simply ignore and skip over the initial dot, if one exists, during
symbol name comparison.

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Cc: Ananth N Mavinakayanahalli 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/652a8f3bfa919bd02a1836a128370eaed59b4a34.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/sym-handling.c | 13 +
 tools/perf/util/map.c   |  5 +
 tools/perf/util/map.h   |  3 ++-
 tools/perf/util/symbol.c|  4 ++--
 4 files changed, 22 insertions(+), 3 deletions(-)

diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
index 5522a40..2de2cc4 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -8,6 +8,7 @@
 
 #include "debug.h"
 #include "symbol.h"
+#include "map.h"
 
 #ifdef HAVE_LIBELF_SUPPORT
 bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
@@ -36,4 +37,16 @@ int arch__choose_best_symbol(struct symbol *syma,
 
return SYMBOL_A;
 }
+
+/* Allow matching against dot variants */
+int arch__compare_symbol_names(const char *namea, const char *nameb)
+{
+   /* Skip over initial dot */
+   if (*namea == '.')
+   namea++;
+   if (*nameb == '.')
+   nameb++;
+
+   return strcmp(namea, nameb);
+}
 #endif
diff --git a/tools/perf/util/map.c b/tools/perf/util/map.c
index a14f08f..cd0e335 100644
--- a/tools/perf/util/map.c
+++ b/tools/perf/util/map.c
@@ -292,6 +292,11 @@ int map__load(struct map *map, symbol_filter_t filter)
return 0;
 }
 
+int __weak arch__compare_symbol_names(const char *namea, const char *nameb)
+{
+   return strcmp(namea, nameb);
+}
+
 struct symbol *map__find_symbol(struct map *map, u64 addr,
symbol_filter_t filter)
 {
diff --git a/tools/perf/util/map.h b/tools/perf/util/map.h
index ec19c59..4e0c729 100644
--- a/tools/perf/util/map.h
+++ b/tools/perf/util/map.h
@@ -124,7 +124,7 @@ struct thread;
  */
 #define __map__for_each_symbol_by_name(map, sym_name, pos, filter) \
for (pos = map__find_symbol_by_name(map, sym_name, filter); \
-pos && strcmp(pos->name, sym_name) == 0;   \
+pos && arch__compare_symbol_names(pos->name, sym_name) == 0;   
\
 pos = symbol__next_by_name(pos))
 
 #define map__for_each_symbol_by_name(map, sym_name, pos)   \
@@ -132,6 +132,7 @@ struct thread;
 
 typedef int (*symbol_filter_t)(struct map *map, struct symbol *sym);
 
+int arch__compare_symbol_names(const char *namea, const char *nameb);
 void map__init(struct map *map, enum map_type type,
   u64 start, u64 end, u64 pgoff, struct dso *dso);
 struct map *map__new(struct machine *machine, u64 start, u64 len,
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
index f805757..45ba48a 100644
--- a/tools/perf/util/symbol.c
+++ b/tools/perf/util/symbol.c
@@ -411,7 +411,7 @@ static struct symbol *symbols__find_by_name(struct rb_root 
*symbols,
int cmp;
 
s = rb_entry(n, struct symbol_name_rb_node, rb_node);
-   cmp = strcmp(name, s->sym.name);
+   cmp = arch__compare_symbol_names(name, s->sym.name);
 
if (cmp < 0)
n = n->rb_left;
@@ -429,7 +429,7 @@ static struct symbol *symbols__find_by_name(struct rb_root 
*symbols,
struct symbol_name_rb_node *tmp;
 
tmp = rb_entry(n, struct symbol_name_rb_node, rb_node);
-   if (strcmp(tmp->sym.name, s->sym.name))
+   if (arch__compare_symbol_names(tmp->sym.name, s->sym.name))
break;
 
s = tmp;
-- 
2.1.0

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[PATCH 06/21] perf probe ppc64le: Fixup function entry if using kallsyms lookup

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

On powerpc ABIv2, if no debug-info is found and we use kallsyms, we need
to fixup the function entry to point to the local entry point. Use
offset of 8 since current toolchains always generate 2 instructions (8
bytes).

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Cc: Ananth N Mavinakayanahalli 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/92253021e77a104b23b615c8c23bf9501dfe60bf.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/sym-handling.c | 15 +++
 tools/perf/util/probe-event.c   |  5 +
 tools/perf/util/probe-event.h   |  2 ++
 3 files changed, 22 insertions(+)

diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
index a170060..bbc1a50 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -64,4 +64,19 @@ bool arch__prefers_symtab(void)
 {
return true;
 }
+
+#define PPC64LE_LEP_OFFSET 8
+
+void arch__fix_tev_from_maps(struct perf_probe_event *pev,
+struct probe_trace_event *tev, struct map *map)
+{
+   /*
+* ppc64 ABIv2 local entry point is currently always 2 instructions
+* (8 bytes) after the global entry point.
+*/
+   if (!pev->uprobes && map->dso->symtab_type == 
DSO_BINARY_TYPE__KALLSYMS) {
+   tev->point.address += PPC64LE_LEP_OFFSET;
+   tev->point.offset += PPC64LE_LEP_OFFSET;
+   }
+}
 #endif
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index 4dfb412..eb75a5e 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -2447,6 +2447,10 @@ static int find_probe_functions(struct map *map, char 
*name)
 #define strdup_or_goto(str, label) \
({ char *__p = strdup(str); if (!__p) goto label; __p; })
 
+void __weak arch__fix_tev_from_maps(struct perf_probe_event *pev 
__maybe_unused,
+   struct probe_trace_event *tev __maybe_unused,
+   struct map *map __maybe_unused) { }
+
 /*
  * Find probe function addresses from map.
  * Return an error or the number of found probe_trace_event
@@ -2553,6 +2557,7 @@ static int find_probe_trace_events_from_map(struct 
perf_probe_event *pev,
strdup_or_goto(pev->args[i].type,
nomem_out);
}
+   arch__fix_tev_from_maps(pev, tev, map);
}
 
 out:
diff --git a/tools/perf/util/probe-event.h b/tools/perf/util/probe-event.h
index 52bca4b..180f142 100644
--- a/tools/perf/util/probe-event.h
+++ b/tools/perf/util/probe-event.h
@@ -136,6 +136,8 @@ extern int show_available_vars(struct perf_probe_event 
*pevs, int npevs,
 extern int show_available_funcs(const char *module, struct strfilter *filter,
bool user);
 bool arch__prefers_symtab(void);
+void arch__fix_tev_from_maps(struct perf_probe_event *pev,
+struct probe_trace_event *tev, struct map *map);
 
 /* Maximum index number of event-name postfix */
 #define MAX_EVENT_INDEX1024
-- 
2.1.0

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[PATCH 04/21] perf probe ppc64le: Fix ppc64 ABIv2 symbol decoding

2015-05-04 Thread Arnaldo Carvalho de Melo
From: Ananth N Mavinakayanahalli 

ppc64 ELF ABIv2 has a Global Entry Point (GEP) and a Local Entry Point
(LEP). For purposes of probing, we need the LEP - the offset to which is
encoded in st_other.

Signed-off-by: Ananth N Mavinakayanahalli 
Reviewed-by: Srikar Dronamraju 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/ab9cc5e2b9de4cbaaf50f6ef2346a6a81100bad1.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Naveen N. Rao 
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/sym-handling.c | 7 +++
 tools/perf/util/symbol-elf.c| 4 
 tools/perf/util/symbol.h| 1 +
 3 files changed, 12 insertions(+)

diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
index 2de2cc4..012a0f8 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -17,6 +17,13 @@ bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
   ehdr.e_type == ET_REL ||
   ehdr.e_type == ET_DYN;
 }
+
+#if defined(_CALL_ELF) && _CALL_ELF == 2
+void arch__elf_sym_adjust(GElf_Sym *sym)
+{
+   sym->st_value += PPC64_LOCAL_ENTRY_OFFSET(sym->st_other);
+}
+#endif
 #endif
 
 #if !defined(_CALL_ELF) || _CALL_ELF != 2
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index 54347ba..d99b442 100644
--- a/tools/perf/util/symbol-elf.c
+++ b/tools/perf/util/symbol-elf.c
@@ -775,6 +775,8 @@ static bool want_demangle(bool is_kernel_sym)
return is_kernel_sym ? symbol_conf.demangle_kernel : 
symbol_conf.demangle;
 }
 
+void __weak arch__elf_sym_adjust(GElf_Sym *sym __maybe_unused) { }
+
 int dso__load_sym(struct dso *dso, struct map *map,
  struct symsrc *syms_ss, struct symsrc *runtime_ss,
  symbol_filter_t filter, int kmodule)
@@ -939,6 +941,8 @@ int dso__load_sym(struct dso *dso, struct map *map,
(sym.st_value & 1))
--sym.st_value;
 
+   arch__elf_sym_adjust(&sym);
+
if (dso->kernel || kmodule) {
char dso_name[PATH_MAX];
 
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index bd50ba0..9096529 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -305,6 +305,7 @@ int setup_intlist(struct intlist **list, const char 
*list_str,
 
 #ifdef HAVE_LIBELF_SUPPORT
 bool elf__needs_adjust_symbols(GElf_Ehdr ehdr);
+void arch__elf_sym_adjust(GElf_Sym *sym);
 #endif
 
 #define SYMBOL_A 0
-- 
2.1.0

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[PATCH 02/21] perf probe ppc: Use the right prefix when ignoring SyS symbols on ppc

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

Use the proper prefix when ignoring SyS symbols on ppc ABIv1. While at
it, generalize symbol selection so architectures can implement their own
logic.

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Cc: Ananth N Mavinakayanahalli 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/adf1f98b121ecaf292777fe5cc69fe1038feabce.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/sym-handling.c | 20 
 tools/perf/util/symbol.c| 21 -
 tools/perf/util/symbol.h|  5 +
 3 files changed, 37 insertions(+), 9 deletions(-)

diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
index c9de001..5522a40 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -17,3 +17,23 @@ bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
   ehdr.e_type == ET_DYN;
 }
 #endif
+
+#if !defined(_CALL_ELF) || _CALL_ELF != 2
+int arch__choose_best_symbol(struct symbol *syma,
+struct symbol *symb __maybe_unused)
+{
+   char *sym = syma->name;
+
+   /* Skip over any initial dot */
+   if (*sym == '.')
+   sym++;
+
+   /* Avoid "SyS" kernel syscall aliases */
+   if (strlen(sym) >= 3 && !strncmp(sym, "SyS", 3))
+   return SYMBOL_B;
+   if (strlen(sym) >= 10 && !strncmp(sym, "compat_SyS", 10))
+   return SYMBOL_B;
+
+   return SYMBOL_A;
+}
+#endif
diff --git a/tools/perf/util/symbol.c b/tools/perf/util/symbol.c
index 201f6c4c..f805757 100644
--- a/tools/perf/util/symbol.c
+++ b/tools/perf/util/symbol.c
@@ -85,8 +85,17 @@ static int prefix_underscores_count(const char *str)
return tail - str;
 }
 
-#define SYMBOL_A 0
-#define SYMBOL_B 1
+int __weak arch__choose_best_symbol(struct symbol *syma,
+   struct symbol *symb __maybe_unused)
+{
+   /* Avoid "SyS" kernel syscall aliases */
+   if (strlen(syma->name) >= 3 && !strncmp(syma->name, "SyS", 3))
+   return SYMBOL_B;
+   if (strlen(syma->name) >= 10 && !strncmp(syma->name, "compat_SyS", 10))
+   return SYMBOL_B;
+
+   return SYMBOL_A;
+}
 
 static int choose_best_symbol(struct symbol *syma, struct symbol *symb)
 {
@@ -134,13 +143,7 @@ static int choose_best_symbol(struct symbol *syma, struct 
symbol *symb)
else if (na < nb)
return SYMBOL_B;
 
-   /* Avoid "SyS" kernel syscall aliases */
-   if (na >= 3 && !strncmp(syma->name, "SyS", 3))
-   return SYMBOL_B;
-   if (na >= 10 && !strncmp(syma->name, "compat_SyS", 10))
-   return SYMBOL_B;
-
-   return SYMBOL_A;
+   return arch__choose_best_symbol(syma, symb);
 }
 
 void symbols__fixup_duplicate(struct rb_root *symbols)
diff --git a/tools/perf/util/symbol.h b/tools/perf/util/symbol.h
index 8cb0af4..bd50ba0 100644
--- a/tools/perf/util/symbol.h
+++ b/tools/perf/util/symbol.h
@@ -307,4 +307,9 @@ int setup_intlist(struct intlist **list, const char 
*list_str,
 bool elf__needs_adjust_symbols(GElf_Ehdr ehdr);
 #endif
 
+#define SYMBOL_A 0
+#define SYMBOL_B 1
+
+int arch__choose_best_symbol(struct symbol *syma, struct symbol *symb);
+
 #endif /* __PERF_SYMBOL */
-- 
2.1.0

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[GIT PULL 00/21] perf/core improvements and fixes

2015-05-04 Thread Arnaldo Carvalho de Melo
Hi Ingo,

Besides these 21 patches there are 65 other patches, all present in the
perf-core-for-mingo tag, that I sent a pull request for but had some issues
building on older distros (got reports and fixes for OL6, CentOS6, tested it
all on RHEL6), minor stuff, all noted on the comments just before my
Signed-off-by lines.

Please consider pulling,

- Arnaldo

The following changes since commit b64aa553d8430aabd24f303899cfa4de678e2c3a:

  perf bench numa: Show more stats of particular threads in verbose mode 
(2015-05-04 12:43:41 -0300)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/acme/linux.git 
tags/perf-core-for-mingo-2

for you to fetch changes up to 0c160d495b5616e071bb4f873812e8f473128149:

  perf kmem: Add kmem.default config option (2015-05-04 13:34:48 -0300)


perf/core improvements and fixes:

User visible:

- perf kmem improvements: (Namhyung Kim)

  - Support sort keys on page analysis
  - New --live option
  - Humand readable gfp flags
  - Allow setting the default in perfconfig files

- perf probe --filter improvements (Masami Hiramatsu)

- Improve detection of file/function name in the 'perf probe' pattern (Naveen 
Rao)

Infrastructure:

- Some more Intel PT prep patches (Adrian Hunter)

- Fix ppc64 ABIv2 symbol decoding (Ananth N Mavinakayanahalli)

Build fixes:

- bison-related build failure on CentOS 6 (Namhyung Kim)

- perf probe fixes for better support powerpc (Naveen Rao)

Signed-off-by: Arnaldo Carvalho de Melo 


Adrian Hunter (3):
  perf evlist: Amend mmap ref counting for the AUX area mmap
  perf script: Always allow fields 'addr' and 'cpu' for auxtrace
  perf report: Add Instruction Tracing support

Ananth N Mavinakayanahalli (1):
  perf probe ppc64le: Fix ppc64 ABIv2 symbol decoding

Masami Hiramatsu (4):
  perf tools: Improve strfilter to append additional rules
  perf tools: Add strfilter__string to recover rules string
  perf probe: Accept multiple filter options
  perf probe: Accept filter argument for --list

Namhyung Kim (6):
  perf tools: Fix bison-related build failure on CentOS 6
  perf kmem: Implement stat --page --caller
  perf kmem: Support sort keys on page analysis
  perf kmem: Add --live option for current allocation stat
  perf kmem: Print gfp flags in human readable string
  perf kmem: Add kmem.default config option

Naveen N. Rao (7):
  perf probe ppc: Fix symbol fixup issues due to ELF type
  perf probe ppc: Use the right prefix when ignoring SyS symbols on ppc
  perf probe ppc: Enable matching against dot symbols automatically
  perf probe ppc64le: Prefer symbol table lookup over DWARF
  perf probe ppc64le: Fixup function entry if using kallsyms lookup
  perf symbols: Warn on build id mismatch
  perf probe: Improve detection of file/function name in the probe pattern

 tools/perf/Documentation/perf-kmem.txt  |  11 +-
 tools/perf/Documentation/perf-probe.txt |   6 +-
 tools/perf/Documentation/perf-report.txt|  27 +
 tools/perf/arch/powerpc/util/Build  |   1 +
 tools/perf/arch/powerpc/util/sym-handling.c |  82 +++
 tools/perf/builtin-kmem.c   | 964 +---
 tools/perf/builtin-probe.c  |  64 +-
 tools/perf/builtin-report.c |  11 +
 tools/perf/builtin-script.c |  29 +-
 tools/perf/util/Build   |   2 +-
 tools/perf/util/evlist.c|   2 +-
 tools/perf/util/map.c   |   5 +
 tools/perf/util/map.h   |   3 +-
 tools/perf/util/probe-event.c   |  69 +-
 tools/perf/util/probe-event.h   |   5 +-
 tools/perf/util/strfilter.c | 107 +++
 tools/perf/util/strfilter.h |  35 +
 tools/perf/util/symbol-elf.c|  13 +-
 tools/perf/util/symbol.c|  25 +-
 tools/perf/util/symbol.h|  10 +
 20 files changed, 1313 insertions(+), 158 deletions(-)
 create mode 100644 tools/perf/arch/powerpc/util/sym-handling.c
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[PATCH 12/21] perf probe: Improve detection of file/function name in the probe pattern

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

Currently, perf probe considers patterns including a '.' to be a file.
However, this causes problems on powerpc ABIv1 where all functions have
a leading '.':

  $ perf probe -F | grep schedule_timeout_interruptible
  .schedule_timeout_interruptible
  $ perf probe .schedule_timeout_interruptible
  Semantic error :File always requires line number or lazy pattern.
Error: Command Parse Error.

Fix this:
- by checking the probe pattern in more detail, and
- skipping leading dot if one exists when creating/deleting events.

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Acked-by: Masami Hiramatsu 
Cc: Ananth N Mavinakayanahalli 
Cc: Michael Ellerman 
Cc: Srikar Dronamraju 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/db680f7cb11c4452b632f908e67151f3aa0f4602.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/util/probe-event.c | 29 ++---
 1 file changed, 26 insertions(+), 3 deletions(-)

diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index eb75a5e..416c10f 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -1077,6 +1077,7 @@ static int parse_perf_probe_point(char *arg, struct 
perf_probe_event *pev)
struct perf_probe_point *pp = &pev->point;
char *ptr, *tmp;
char c, nc = 0;
+   bool file_spec = false;
/*
 * 
 * perf probe [EVENT=]SRC[:LN|;PTN]
@@ -1105,6 +1106,23 @@ static int parse_perf_probe_point(char *arg, struct 
perf_probe_event *pev)
arg = tmp;
}
 
+   /*
+* Check arg is function or file name and copy it.
+*
+* We consider arg to be a file spec if and only if it satisfies
+* all of the below criteria::
+* - it does not include any of "+@%",
+* - it includes one of ":;", and
+* - it has a period '.' in the name.
+*
+* Otherwise, we consider arg to be a function specification.
+*/
+   if (!strpbrk(arg, "+@%") && (ptr = strpbrk(arg, ";:")) != NULL) {
+   /* This is a file spec if it includes a '.' before ; or : */
+   if (memchr(arg, '.', ptr - arg))
+   file_spec = true;
+   }
+
ptr = strpbrk(arg, ";:+@%");
if (ptr) {
nc = *ptr;
@@ -1115,10 +1133,9 @@ static int parse_perf_probe_point(char *arg, struct 
perf_probe_event *pev)
if (tmp == NULL)
return -ENOMEM;
 
-   /* Check arg is function or file and copy it */
-   if (strchr(tmp, '.'))   /* File */
+   if (file_spec)
pp->file = tmp;
-   else/* Function */
+   else
pp->function = tmp;
 
/* Parse other options */
@@ -2265,6 +2282,9 @@ static int get_new_event_name(char *buf, size_t len, 
const char *base,
 {
int i, ret;
 
+   if (*base == '.')
+   base++;
+
/* Try no suffix */
ret = e_snprintf(buf, len, "%s", base);
if (ret < 0) {
@@ -2766,6 +2786,9 @@ int del_perf_probe_events(struct strlist *dellist)
event = str;
}
 
+   if (event && *event == '.')
+   event++;
+
ret = e_snprintf(buf, 128, "%s:%s", group, event);
if (ret < 0) {
pr_err("Failed to copy event.");
-- 
2.1.0

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[PATCH 05/21] perf probe ppc64le: Prefer symbol table lookup over DWARF

2015-05-04 Thread Arnaldo Carvalho de Melo
From: "Naveen N. Rao" 

Use symbol table lookups by default if DWARF is not necessary, since
powerpc ABIv2 encodes local entry points in the symbol table and the
function entry address in DWARF may not be appropriate for kprobes, as
described here:

https://sourceware.org/bugzilla/show_bug.cgi?id=17638

"The DWARF address ranges deliberately include the *whole* function,
both global and local entry points."
...
"If you want to set probes on a local entry point, you should look up
the symbol in the main symbol table (not DWARF), and check the st_other
bits; they will indicate whether the function has a local entry point,
and what its offset from the global entry point is.  Note that GDB does
the same when setting a breakpoint on a function entry."

Signed-off-by: Naveen N. Rao 
Reviewed-by: Srikar Dronamraju 
Cc: Ananth N Mavinakayanahalli 
Cc: Masami Hiramatsu 
Cc: Michael Ellerman 
Cc: Sukadev Bhattiprolu 
Cc: linuxppc-dev@lists.ozlabs.org
Link: 
http://lkml.kernel.org/r/88a10e22f4aaba2aef812824ca4b10d7beeea012.1430217967.git.naveen.n@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/arch/powerpc/util/sym-handling.c | 8 
 tools/perf/util/probe-event.c   | 8 
 tools/perf/util/probe-event.h   | 1 +
 3 files changed, 17 insertions(+)

diff --git a/tools/perf/arch/powerpc/util/sym-handling.c 
b/tools/perf/arch/powerpc/util/sym-handling.c
index 012a0f8..a170060 100644
--- a/tools/perf/arch/powerpc/util/sym-handling.c
+++ b/tools/perf/arch/powerpc/util/sym-handling.c
@@ -9,6 +9,7 @@
 #include "debug.h"
 #include "symbol.h"
 #include "map.h"
+#include "probe-event.h"
 
 #ifdef HAVE_LIBELF_SUPPORT
 bool elf__needs_adjust_symbols(GElf_Ehdr ehdr)
@@ -57,3 +58,10 @@ int arch__compare_symbol_names(const char *namea, const char 
*nameb)
return strcmp(namea, nameb);
 }
 #endif
+
+#if defined(_CALL_ELF) && _CALL_ELF == 2
+bool arch__prefers_symtab(void)
+{
+   return true;
+}
+#endif
diff --git a/tools/perf/util/probe-event.c b/tools/perf/util/probe-event.c
index 291bf23..4dfb412 100644
--- a/tools/perf/util/probe-event.c
+++ b/tools/perf/util/probe-event.c
@@ -2567,6 +2567,8 @@ err_out:
goto out;
 }
 
+bool __weak arch__prefers_symtab(void) { return false; }
+
 static int convert_to_probe_trace_events(struct perf_probe_event *pev,
  struct probe_trace_event **tevs,
  int max_tevs, const char *target)
@@ -2582,6 +2584,12 @@ static int convert_to_probe_trace_events(struct 
perf_probe_event *pev,
}
}
 
+   if (arch__prefers_symtab() && !perf_probe_event_need_dwarf(pev)) {
+   ret = find_probe_trace_events_from_map(pev, tevs, max_tevs, 
target);
+   if (ret > 0)
+   return ret; /* Found in symbol table */
+   }
+
/* Convert perf_probe_event with debuginfo */
ret = try_to_find_probe_trace_events(pev, tevs, max_tevs, target);
if (ret != 0)
diff --git a/tools/perf/util/probe-event.h b/tools/perf/util/probe-event.h
index d6b7834..52bca4b 100644
--- a/tools/perf/util/probe-event.h
+++ b/tools/perf/util/probe-event.h
@@ -135,6 +135,7 @@ extern int show_available_vars(struct perf_probe_event 
*pevs, int npevs,
   struct strfilter *filter, bool externs);
 extern int show_available_funcs(const char *module, struct strfilter *filter,
bool user);
+bool arch__prefers_symtab(void);
 
 /* Maximum index number of event-name postfix */
 #define MAX_EVENT_INDEX1024
-- 
2.1.0

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Re: [PATCH v4 19/21] drivers/of: Support adding sub-tree

2015-05-04 Thread Pantelis Antoniou
Hi Ben,

> On May 2, 2015, at 01:57 , Benjamin Herrenschmidt  
> wrote:
> 
> On Fri, 2015-05-01 at 13:46 -0500, Rob Herring wrote:
>> On Fri, May 1, 2015 at 10:22 AM, Benjamin Herrenschmidt
>>  wrote:
>>> On Fri, 2015-05-01 at 07:54 -0500, Rob Herring wrote:
>>> 
 The difference seems to be whether you allocate space or just point to
 the FDT for various strings/data. Is that right?
 
>   * of_fdt_add_subtree() is the introduced API to do the work.
 
 Have you looked at overlays and if so why do they not work for your 
 purposes?
 
 Why do you need to do this with the flattened tree?
>>> 
>>> The basic idea I asked Gavin to implement is that since the FW needs to
>>> provide a bunch of DT updates to Linux at runtime in the form of new
>>> nodes below an existing one, rather than doing it via some new/custom
>>> format, instead, have it send a bit of FDT blob to expand under an
>>> existing node.
>> 
>> Overlay = an FDT blob to graft into a live running system. Sounds like
>> the same thing.
>> 
>>> As for the details of Gavin implementation, I haven't looked at it in
>>> details yet so there might be issues there, however I don't know what
>>> you mean by "overlays", any pointer ?
>> 
>> CONFIG_OF_OVERLAY
>> 
>> http://events.linuxfoundation.org/sites/events/files/slides/dynamic-dt-keynote-v3.pdf
> 
> Well, that looks horrendously complicated, poorly documented and totally
> unused in-tree outside of the unittest stuff, yay ! It has all sort of
> "features" that I don't really care about.
> 

If it was easy to get stuff in, it would get more of the real-use drivers
in.

> I still don't see what it buys me other than making my FW a lot more
> complex having to generate all that additional fixup etc... crap that I
> don't totally get yet.
> 

You don’t generate any additional fixups. You just compile with the option
that generates all the fixups for you.

> What's wrong with just unflattening the nodes in place ? The DT comes
> from the FW in the first place so all the phandles are already good in
> the new added blob. Internally, the FW created new nodes in its internal
> representation and flattened the subtree and sends that subtree to
> Linux.
> 
> I don't plan to play "revert" either, if you unplug, I do need to remove
> what's under the slot but that's true of boot time devices, not just
> "new" ones, so the overlay stuff won't do the trick and I certainly
> don't want to keep track…
> 

You get all of the corner cases handled for free. Perhaps it works for your
case too.

Perhaps you can educate me on what you need supported and we can make sure
it’s included.

> Ben.
> 
> 

Regards

— Pantelis

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Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

2015-05-04 Thread Joakim Tjernlund
On Mon, 2015-05-04 at 19:31 +0200, Arnd Bergmann wrote:
> On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> > @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host 
> > *host)
> >  
> > if (vvn > VENDOR_V_22)
> > host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
> > +
> > +   host->mmc->caps |= MMC_CAP_8_BIT_DATA;
> >  }
> > 
> 
> Shouldn't this check the "bus-width" property before setting the width?
> 
> There might be an eMMC or SDIO with 4-bit interface connected.

This is for an eMMC chip we got and I THINK(this is new to me) that
this only allows 8 bit negotiation but I might be way off.
 
Anyone knows for sure?

 Jocke
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Re: [PATCH v4 19/21] drivers/of: Support adding sub-tree

2015-05-04 Thread Benjamin Herrenschmidt
On Mon, 2015-05-04 at 19:41 +0300, Pantelis Antoniou wrote:
> 
> You get all of the corner cases handled for free. Perhaps it works for
> your case too.
> 
> Perhaps you can educate me on what you need supported and we can make
> sure it’s included.

Which corner cases ?

IE, what I want is simply "update" the device-tree below a PCIe slot on
PCI hotplug.

The DT isn't "compiled" from a dts (it's amazing how many people seem to
believe this is the only way you get fdt's nowadays). It's dynamically
(ie programatically) generated by firmware at boot time and contains
whatever PCIe devices happen to be plugged during boot.

When doing PCIe hotplug operations, the kernel does various FW calls
(among others to control slot power), and during these, the FW re-probes
underneath the slot and refreshes its internal representation. So the
phandles remain fully consistent, there is no fixup needed.

We want the kernel to also update his copy as wee in order to avoid
keeping stale nodes that don't match what's there anymore. Also, when
plugging specific kind of IO drawers, the FW can provide additional node
and properties that will be used to control slots inside the drawers.

So what we need is:

  - On PCIe unplug, remove all old nodes below the slot
  - On PCIe plug, get all the new nodes from FW

Note that there is no need to do anything like platform device probing
etc... the PCI layer takes care of that, we will remove the old nodes
after the pci_dev are gone and create the new ones before Linux
re-probes the PCIe bus subtree.

So what we need is very simple: The removal can be handled without FW
help, and the plug case is a matter of just transferring all those new
nodes to Linux to re-expand.

Since the phandle etc... are all consistent with the original tree,
there is no fixups required.

So the "trivial" way to do it (and the way we have implemented the FW
side so far) is to have the FW simply "flatten" the subtree below the
slot and pass it to Linux, with the intent of expanding it back below
the slot node.

This is what Gavin proposed patches do.

The overlay mechanism adds all sorts of features that we don't seen to
need and would make the above more complex.

Cheers,
Ben.


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Re: [PATCH v3 0/7] Fixes for perf probe issues on ppc

2015-05-04 Thread Arnaldo Carvalho de Melo
Em Wed, Apr 29, 2015 at 11:07:58AM +0530, Srikar Dronamraju escreveu:
> * Arnaldo Carvalho de Melo  [2015-04-28 10:54:53]:
> 
> > Em Tue, Apr 28, 2015 at 05:35:33PM +0530, Naveen N. Rao escreveu:
> > > This patchset fixes various issues with perf probe on powerpc across 
> > > ABIv1 and
> > > ABIv2:
> > > - in the presence of DWARF debug-info,
> > > - in the absence of DWARF, but with the symbol table, and
> > > - in the absence of debug-info, but with kallsyms.
> > > 
> > > Arnaldo,
> > > I have moved all patches to use __weak functions. Kindly take a look and 
> > > let me
> > > know if this is what you had in mind.
> > 
> > Ok, I applied all but the first, for which I am waiting for Masami's
> > reaction, I kept Srikar's reviewed-by for the other patches, but would
> > as well like to get his word that he keeps it after the __weak changes.
> > 
> > So, for now, I'll leave it for a while sitting in my local tree, to give
> > time to Masami and Srikar, ok?
> > 
> 
> Yes Arnaldo, I have looked at the patches after the __weak changes and
> they look good to me.

Thanks everybody, I got it merged on my perf/core branch, that I'll
submit as soon as I see an Ingo :-)

- Arnaldo
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Re: Kernel 4.1-rc1 build fails on Sam460ex amcc 460ex powerpc Canyonlands

2015-05-04 Thread Tejun Heo
On Mon, May 04, 2015 at 08:18:30PM +0300, Andy Shevchenko wrote:
> On Mon, 2015-04-27 at 23:49 -0400, Tejun Heo wrote:
> > On Tue, Apr 28, 2015 at 11:12:25AM +1000, Michael Ellerman wrote:
> > > On Mon, 2015-04-27 at 06:59 -0400, Julian Margetson wrote:
> > > > Kernel 4.1-rc1 build fails  on Sam460ex amcc 460ex powerpc Canyonlands 
> > > > with 
> > > > CONFIG_SATA_DWC=y
> > > > 
> > > > sata_dwc_460ex.c:(.text+0xa165c): undefined reference to `dw_dma_remove'
> > > > drivers/built-in.o: In function `sata_dwc_probe':
> > > > sata_dwc_460ex.c:(.text+0xa1900): undefined reference to `dw_dma_probe'
> > > > sata_dwc_460ex.c:(.text+0xa1954): undefined reference to `dw_dma_remove'
> > > > make: *** [vmlinux] Error 1
> > > 
> > > Looks like it was caused by:
> > > 
> > > commit 8b3444852a2b58129ee68a8dd69fef81ceb902a1
> > > Author: Andy Shevchenko 
> > > Date:   Tue Mar 3 22:41:21 2015 +0200
> > > 
> > > sata_dwc_460ex: move to generic DMA driver
> > 
> > Oops, Andy?
> > 
> 
> Sorry for late answer. It requires CONFIG_DW_DMAC=y as well. I don't
> know the details of PPC configuration, we might add this to
> configuration.

Can you send a patch please?

Thanks.

-- 
tejun
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Re: [PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

2015-05-04 Thread Arnd Bergmann
On Monday 04 May 2015 18:31:31 Joakim Tjernlund wrote:
> @@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host 
> *host)
>  
> if (vvn > VENDOR_V_22)
> host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
> +
> +   host->mmc->caps |= MMC_CAP_8_BIT_DATA;
>  }
> 

Shouldn't this check the "bus-width" property before setting the width?

There might be an eMMC or SDIO with 4-bit interface connected.

Arnd
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[RFC PATCH] mm/thp: Use new function to clear pmd before THP splitting

2015-05-04 Thread Aneesh Kumar K.V
Archs like ppc64 require pte_t * to remain stable in some code path.
They use local_irq_disable to prevent a parallel split. Generic code
clear pmd instead of marking it _PAGE_SPLITTING in code path
where we can afford to mark pmd none before splitting. Use a
variant of pmdp_splitting_clear_notify that arch can override.

Signed-off-by: Aneesh Kumar K.V 
---
 arch/powerpc/include/asm/pgtable-ppc64.h |  4 
 arch/powerpc/mm/pgtable_64.c | 11 +++
 include/asm-generic/pgtable.h|  4 
 mm/huge_memory.c |  4 ++--
 4 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h 
b/arch/powerpc/include/asm/pgtable-ppc64.h
index 43e6ad424c7f..307e705cbead 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -576,6 +576,10 @@ static inline void pmdp_set_wrprotect(struct mm_struct 
*mm, unsigned long addr,
 extern void pmdp_splitting_flush(struct vm_area_struct *vma,
 unsigned long address, pmd_t *pmdp);
 
+#define __HAVE_ARCH_PMDP_SPLITTING_CLEAR_NOTIFY
+extern void pmdp_splitting_clear_notify(struct vm_area_struct *vma,
+   unsigned long address, pmd_t *pmdp);
+
 #define __HAVE_ARCH_PGTABLE_DEPOSIT
 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
   pgtable_t pgtable);
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 59daa5eeec25..c30b15894edf 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -598,6 +599,16 @@ pmd_t pmdp_clear_flush(struct vm_area_struct *vma, 
unsigned long address,
return pmd;
 }
 
+void pmdp_splitting_clear_notify(struct vm_area_struct *vma,
+unsigned long address, pmd_t *pmdp)
+{
+   pmdp_clear_flush_notify(vma, address, pmdp);
+   /*
+* Serialize against find_linux_pte_or_hugepte
+*/
+   kick_all_cpus_sync();
+}
+
 int pmdp_test_and_clear_young(struct vm_area_struct *vma,
  unsigned long address, pmd_t *pmdp)
 {
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 39f1d6a2b04d..83ed56c8594a 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -189,6 +189,10 @@ extern void pmdp_splitting_flush(struct vm_area_struct 
*vma,
 unsigned long address, pmd_t *pmdp);
 #endif
 
+#ifndef __HAVE_ARCH_PMDP_SPLITTING_CLEAR_NOTIFY
+#define pmdp_splitting_clear_notify pmdp_clear_flush_notify
+#endif
+
 #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
 extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
   pgtable_t pgtable);
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index 078832cf3636..f596312980f9 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1031,7 +1031,7 @@ static int do_huge_pmd_wp_page_fallback(struct mm_struct 
*mm,
goto out_free_pages;
VM_BUG_ON_PAGE(!PageHead(page), page);
 
-   pmdp_clear_flush_notify(vma, haddr, pmd);
+   pmdp_splitting_clear_notify(vma, haddr, pmd);
/* leave pmd empty until pte is filled */
 
pgtable = pgtable_trans_huge_withdraw(mm, pmd);
@@ -2865,7 +2865,7 @@ static void __split_huge_zero_page_pmd(struct 
vm_area_struct *vma,
pmd_t _pmd;
int i;
 
-   pmdp_clear_flush_notify(vma, haddr, pmd);
+   pmdp_splitting_clear_notify(vma, haddr, pmd);
/* leave pmd empty until pte is filled */
 
pgtable = pgtable_trans_huge_withdraw(mm, pmd);
-- 
2.1.4

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Re: Kernel 4.1-rc1 build fails on Sam460ex amcc 460ex powerpc Canyonlands

2015-05-04 Thread Andy Shevchenko
On Mon, 2015-04-27 at 23:49 -0400, Tejun Heo wrote:
> On Tue, Apr 28, 2015 at 11:12:25AM +1000, Michael Ellerman wrote:
> > On Mon, 2015-04-27 at 06:59 -0400, Julian Margetson wrote:
> > > Kernel 4.1-rc1 build fails  on Sam460ex amcc 460ex powerpc Canyonlands 
> > > with 
> > > CONFIG_SATA_DWC=y
> > > 
> > > sata_dwc_460ex.c:(.text+0xa165c): undefined reference to `dw_dma_remove'
> > > drivers/built-in.o: In function `sata_dwc_probe':
> > > sata_dwc_460ex.c:(.text+0xa1900): undefined reference to `dw_dma_probe'
> > > sata_dwc_460ex.c:(.text+0xa1954): undefined reference to `dw_dma_remove'
> > > make: *** [vmlinux] Error 1
> > 
> > Looks like it was caused by:
> > 
> > commit 8b3444852a2b58129ee68a8dd69fef81ceb902a1
> > Author: Andy Shevchenko 
> > Date:   Tue Mar 3 22:41:21 2015 +0200
> > 
> > sata_dwc_460ex: move to generic DMA driver
> 
> Oops, Andy?
> 

Sorry for late answer. It requires CONFIG_DW_DMAC=y as well. I don't
know the details of PPC configuration, we might add this to
configuration.

-- 
Andy Shevchenko 
Intel Finland Oy

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[PATCH 1/2] sdhci-of-esdhc: Support 8BIT bus width.

2015-05-04 Thread Joakim Tjernlund
Signed-off-by: Joakim Tjernlund 
---
 drivers/mmc/host/sdhci-of-esdhc.c | 10 ++
 1 file changed, 10 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c 
b/drivers/mmc/host/sdhci-of-esdhc.c
index 22e9111..7130130 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -82,6 +82,10 @@ static u8 esdhc_readb(struct sdhci_host *host, int reg)
/* fixup the result */
ret &= ~SDHCI_CTRL_DMA_MASK;
ret |= dma_bits;
+
+   /* 8BIT is bit 29 in Control register */
+   ret |= ((ret << 3) & SDHCI_CTRL_8BITBUS);
+   ret &= ~(SDHCI_CTRL_8BITBUS >> 3);
}
 
return ret;
@@ -134,6 +138,10 @@ static void esdhc_writeb(struct sdhci_host *host, u8 val, 
int reg)
dma_bits);
val &= ~SDHCI_CTRL_DMA_MASK;
val |= in_be32(host->ioaddr + reg) & SDHCI_CTRL_DMA_MASK;
+
+   /* 8BIT is bit 29 in Control register */
+   val |= ((val & SDHCI_CTRL_8BITBUS) >> 3);
+   val = (val & ~SDHCI_CTRL_8BITBUS);
}
 
/* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
@@ -252,6 +260,8 @@ static void esdhc_of_platform_init(struct sdhci_host *host)
 
if (vvn > VENDOR_V_22)
host->quirks &= ~SDHCI_QUIRK_NO_BUSY_IRQ;
+
+   host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 }
 
 static void esdhc_pltfm_set_bus_width(struct sdhci_host *host, int width)
-- 
2.3.6

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[PATCH 2/2] sdhci-of-esdhc: Pre divider starts at 1

2015-05-04 Thread Joakim Tjernlund
For PowerPC esdhc pre divider starts at 1, fixing this increases
the actual clock from 40 MHz to 50 MHz.

Signed-off-by: Joakim Tjernlund 
---
 drivers/mmc/host/sdhci-of-esdhc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-esdhc.c 
b/drivers/mmc/host/sdhci-of-esdhc.c
index 7130130..ffd5625 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -207,7 +207,7 @@ static unsigned int esdhc_of_get_min_clock(struct 
sdhci_host *host)
 
 static void esdhc_of_set_clock(struct sdhci_host *host, unsigned int clock)
 {
-   int pre_div = 2;
+   int pre_div = 1;
int div = 1;
u32 temp;
 
@@ -237,7 +237,7 @@ static void esdhc_of_set_clock(struct sdhci_host *host, 
unsigned int clock)
 
dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
clock, host->max_clk / pre_div / div);
-
+   host->mmc->actual_clock = host->max_clk / pre_div / div;
pre_div >>= 1;
div--;
 
-- 
2.3.6

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Re: [PATCH v4 0/3] Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.

2015-05-04 Thread Arnd Bergmann
On Monday 04 May 2015 19:09:49 Suman Tripathi wrote:
> This patch adds the SDHCI support for APM X-Gene SoC using ARASAN SDHCI 
> controller.
> 
> v1 change:
>  * Use the CONFIG_ARM64_DMA_HAS_IOMMU for dma-mapping.
> 
> v2 change:
>  * Drop the IOMMU support and switching to PIO mode for arasan.
>controller integrated inside APM X-Gene SoC.
> 
> v3 change:
>  * Change the sdhci-of-arasan.c to support arasan4.9a.
>  * Add quirks for arasan4.9a.
> 
> v4 change:
>  * Cleanup the Documentation and dts.
> 

All three patches

Acked-by: Arnd Bergmann 
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Re: [PATCH v4 2/3] mmc: host: arasan: Add the support for sdhci-arasan4.9a in sdhci-of-arasan.c

2015-05-04 Thread Michal Simek
On 05/04/2015 03:39 PM, Suman Tripathi wrote:
> This patch adds the quirks and compatible string in sdhci-of-arasan.c
> to support sdhci-arasan4.9a version of controller.
> 
> Signed-off-by: Suman Tripathi 
> ---
>  drivers/mmc/host/sdhci-of-arasan.c | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/mmc/host/sdhci-of-arasan.c 
> b/drivers/mmc/host/sdhci-of-arasan.c
> index 981d66e..92a4222 100644
> --- a/drivers/mmc/host/sdhci-of-arasan.c
> +++ b/drivers/mmc/host/sdhci-of-arasan.c
> @@ -20,6 +20,7 @@
>   */
> 
>  #include 
> +#include 
>  #include "sdhci-pltfm.h"
> 
>  #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c
> @@ -169,6 +170,11 @@ static int sdhci_arasan_probe(struct platform_device 
> *pdev)
>   goto clk_disable_all;
>   }
> 
> + if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
> + host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
> + host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
> + }
> +
>   sdhci_get_of_property(pdev);
>   pltfm_host = sdhci_priv(host);
>   pltfm_host->priv = sdhci_arasan;
> @@ -206,6 +212,7 @@ static int sdhci_arasan_remove(struct platform_device 
> *pdev)
> 
>  static const struct of_device_id sdhci_arasan_of_match[] = {
>   { .compatible = "arasan,sdhci-8.9a" },
> + { .compatible = "arasan,sdhci-4.9a" },
>   { }
>  };
>  MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
> --
> 1.8.2.1
> 

You probably need just to add simple of.h but of_device.h should be also
fine.

Reviewed-by: Michal Simek 

Thanks,
Michal
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Re: [PATCH v4 3/3] Documentation: mmc: Update Arasan SDHC documentation to support 4.9a version of Arasan SDHC controller.

2015-05-04 Thread Michal Simek
On 05/04/2015 03:39 PM, Suman Tripathi wrote:
> This patch updates Arasan SDHC documentation to support
> 4.9a version of Arasan SDHC controller.
> 
> Signed-off-by: Suman Tripathi 
> ---
>  Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt 
> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> index 98ee2ab..6dd3d60 100644
> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
> @@ -8,7 +8,8 @@ Device Tree Bindings for the Arasan SDHCI Controller
>[3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
> 
>  Required Properties:
> -  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'
> +  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or
> +'arasan,sdhci-4.9a'
>- reg: From mmc bindings: Register location and length.
>- clocks: From clock bindings: Handles to clock inputs.
>- clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
> --
> 1.8.2.1
> 

Reviewed-by: Michal Simek 

Thanks,
Michal
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[PATCH v4 3/3] Documentation: mmc: Update Arasan SDHC documentation to support 4.9a version of Arasan SDHC controller.

2015-05-04 Thread Suman Tripathi
This patch updates Arasan SDHC documentation to support
4.9a version of Arasan SDHC controller.

Signed-off-by: Suman Tripathi 
---
 Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt 
b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
index 98ee2ab..6dd3d60 100644
--- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
@@ -8,7 +8,8 @@ Device Tree Bindings for the Arasan SDHCI Controller
   [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt

 Required Properties:
-  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'
+  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or
+'arasan,sdhci-4.9a'
   - reg: From mmc bindings: Register location and length.
   - clocks: From clock bindings: Handles to clock inputs.
   - clock-names: From clock bindings: Tuple including "clk_xin" and "clk_ahb"
--
1.8.2.1

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[PATCH v4 2/3] mmc: host: arasan: Add the support for sdhci-arasan4.9a in sdhci-of-arasan.c

2015-05-04 Thread Suman Tripathi
This patch adds the quirks and compatible string in sdhci-of-arasan.c
to support sdhci-arasan4.9a version of controller.

Signed-off-by: Suman Tripathi 
---
 drivers/mmc/host/sdhci-of-arasan.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c 
b/drivers/mmc/host/sdhci-of-arasan.c
index 981d66e..92a4222 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -20,6 +20,7 @@
  */

 #include 
+#include 
 #include "sdhci-pltfm.h"

 #define SDHCI_ARASAN_CLK_CTRL_OFFSET   0x2c
@@ -169,6 +170,11 @@ static int sdhci_arasan_probe(struct platform_device *pdev)
goto clk_disable_all;
}

+   if (of_device_is_compatible(pdev->dev.of_node, "arasan,sdhci-4.9a")) {
+   host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
+   host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
+   }
+
sdhci_get_of_property(pdev);
pltfm_host = sdhci_priv(host);
pltfm_host->priv = sdhci_arasan;
@@ -206,6 +212,7 @@ static int sdhci_arasan_remove(struct platform_device *pdev)

 static const struct of_device_id sdhci_arasan_of_match[] = {
{ .compatible = "arasan,sdhci-8.9a" },
+   { .compatible = "arasan,sdhci-4.9a" },
{ }
 };
 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match);
--
1.8.2.1

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[PATCH v4 1/3] arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.

2015-05-04 Thread Suman Tripathi
This patch adds the arasan sdhc nodes to reuse the of-arasan
driver for APM X-Gene SoC.

Signed-off-by: Suman Tripathi 
---
 arch/arm64/boot/dts/apm-mustang.dts |  4 
 arch/arm64/boot/dts/apm-storm.dtsi  | 44 +
 2 files changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/apm-mustang.dts 
b/arch/arm64/boot/dts/apm-mustang.dts
index 8eb6d94..d0e52a9 100644
--- a/arch/arm64/boot/dts/apm-mustang.dts
+++ b/arch/arm64/boot/dts/apm-mustang.dts
@@ -44,3 +44,7 @@
 &xgenet {
status = "ok";
 };
+
+&sdhc0 {
+   status = "ok";
+};
diff --git a/arch/arm64/boot/dts/apm-storm.dtsi 
b/arch/arm64/boot/dts/apm-storm.dtsi
index 87d3205..a98ffc1 100644
--- a/arch/arm64/boot/dts/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm-storm.dtsi
@@ -144,6 +144,40 @@
clock-output-names = "socplldiv2";
};

+   ahbclk: ahbclk@1f2ac000 {
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f2ac000 0x0 0x1000
+   0x0 0x1700 0x0 0x2000>;
+   reg-names = "csr-reg", "div-reg";
+   csr-offset = <0x0>;
+   csr-mask = <0x1>;
+   enable-offset = <0x8>;
+   enable-mask = <0x1>;
+   divider-offset = <0x164>;
+   divider-width = <0x5>;
+   divider-shift = <0x0>;
+   clock-output-names = "ahbclk";
+   };
+
+   sdioclk: sdioclk@1f2ac000 {
+   compatible = "apm,xgene-device-clock";
+   #clock-cells = <1>;
+   clocks = <&socplldiv2 0>;
+   reg = <0x0 0x1f2ac000 0x0 0x1000
+   0x0 0x1700 0x0 0x2000>;
+   reg-names = "csr-reg", "div-reg";
+   csr-offset = <0x0>;
+   csr-mask = <0x2>;
+   enable-offset = <0x8>;
+   enable-mask = <0x2>;
+   divider-offset = <0x178>;
+   divider-width = <0x8>;
+   divider-shift = <0x0>;
+   clock-output-names = "sdioclk";
+   };
+
qmlclk: qmlclk {
compatible = "apm,xgene-device-clock";
#clock-cells = <1>;
@@ -503,6 +537,16 @@
interrupts = <0x0 0x4f 0x4>;
};

+   sdhc0: sdhc@1c00 {
+   device_type = "sdhc";
+   compatible = "arasan,sdhci-4.9a";
+   reg = <0x0 0x1c00 0x0 0x100>;
+   interrupts = <0x0 0x49 0x4>;
+   dma-coherent;
+   clock-names = "clk_xin", "clk_ahb";
+   clocks = <&sdioclk 0>, <&ahbclk 0>;
+   };
+
phy1: phy@1f21a000 {
compatible = "apm,xgene-phy";
reg = <0x0 0x1f21a000 0x0 0x100>;
--
1.8.2.1

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[PATCH v4 0/3] Add SDHCI support for APM X-Gene SoC using ARASAN SDHCI controller.

2015-05-04 Thread Suman Tripathi
This patch adds the SDHCI support for APM X-Gene SoC using ARASAN SDHCI 
controller.

v1 change:
 * Use the CONFIG_ARM64_DMA_HAS_IOMMU for dma-mapping.

v2 change:
 * Drop the IOMMU support and switching to PIO mode for arasan.
   controller integrated inside APM X-Gene SoC.

v3 change:
 * Change the sdhci-of-arasan.c to support arasan4.9a.
 * Add quirks for arasan4.9a.

v4 change:
 * Cleanup the Documentation and dts.

Signed-off-by: Suman Tripathi 
---

Suman Tripathi (3):
  arm64: dts: Add the arasan sdhc nodes in apm-storm.dtsi.
  mmc: host: arasan: Add the support for sdhci-arasan4.9a in
sdhci-of-arasan.c
  Documentation: mmc: Update Arasan SDHC documentation to support 4.9a
version of Arasan SDHC controller.

 .../devicetree/bindings/mmc/arasan,sdhci.txt   |  3 +-
 arch/arm64/boot/dts/apm-mustang.dts|  4 ++
 arch/arm64/boot/dts/apm-storm.dtsi | 44 ++
 drivers/mmc/host/sdhci-of-arasan.c |  7 
 4 files changed, 57 insertions(+), 1 deletion(-)

--
1.8.2.1

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Re: [RFC][PATCH 4/4] perf: Create aliases for PMU events

2015-05-04 Thread Andi Kleen
> I personaly like having set of event files in JSON notation
> rather than having them directly in C structure

Yes, strings are better and JSON input is also better. 

I prototyped translating JSON into the proposed structures. I already had to
add three new fields, and it wouldn't work for uncore. The string 
format is much more extensible.

BTW as expected the binary sizes are gigantic (for 14 CPU types):

% size all.o
   textdata bss dec hex filename
 662698   0   0  662698   a1caa all.o

% gcc -E all.c | wc -l
55475

-Andi
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[PATCH v3 6/6] cpufreq: powernv: Restore cpu frequency to policy->cur on unthrottling

2015-05-04 Thread Shilpasri G Bhat
If frequency is throttled due to OCC reset then cpus will be in Psafe
frequency, so restore the frequency on all cpus to policy->cur when
OCCs are active again. And if frequency is throttled due to Pmax
capping then restore the frequency of all the cpus  in the chip on
unthrottling.

Signed-off-by: Shilpasri G Bhat 
---
 drivers/cpufreq/powernv-cpufreq.c | 31 +--
 1 file changed, 29 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index 0a59d5b..b2915bc 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -51,6 +51,7 @@ static struct chip {
bool throttled;
cpumask_t mask;
struct work_struct throttle;
+   bool restore;
 } *chips;
 
 static int nr_chips;
@@ -418,9 +419,29 @@ static struct notifier_block powernv_cpufreq_reboot_nb = {
 void powernv_cpufreq_work_fn(struct work_struct *work)
 {
struct chip *chip = container_of(work, struct chip, throttle);
+   unsigned int cpu;
+   cpumask_var_t mask;
 
smp_call_function_any(&chip->mask,
  powernv_cpufreq_throttle_check, NULL, 0);
+
+   if (!chip->restore)
+   return;
+
+   chip->restore = false;
+   cpumask_copy(mask, &chip->mask);
+   for_each_cpu_and(cpu, mask, cpu_online_mask) {
+   int index, tcpu;
+   struct cpufreq_policy policy;
+
+   cpufreq_get_policy(&policy, cpu);
+   cpufreq_frequency_table_target(&policy, policy.freq_table,
+  policy.cur,
+  CPUFREQ_RELATION_C, &index);
+   powernv_cpufreq_target_index(&policy, index);
+   for_each_cpu(tcpu, policy.cpus)
+   cpumask_clear_cpu(tcpu, mask);
+   }
 }
 
 static char throttle_reason[][30] = {
@@ -473,8 +494,10 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
*nb,
throttled = false;
pr_info("OCC: Active\n");
 
-   for (i = 0; i < nr_chips; i++)
+   for (i = 0; i < nr_chips; i++) {
+   chips[i].restore = true;
schedule_work(&chips[i].throttle);
+   }
 
return 0;
}
@@ -490,8 +513,11 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
*nb,
return 0;
 
for (i = 0; i < nr_chips; i++)
-   if (chips[i].id == chip_id)
+   if (chips[i].id == chip_id) {
+   if (!reason)
+   chips[i].restore = true;
schedule_work(&chips[i].throttle);
+   }
}
return 0;
 }
@@ -545,6 +571,7 @@ static int init_chip_info(void)
chips[i].throttled = false;
cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
+   chips[i].restore = false;
}
 
return 0;
-- 
1.9.3

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[PATCH v3 5/6] cpufreq: powernv: Report Psafe only if PMSR.psafe_mode_active bit is set

2015-05-04 Thread Shilpasri G Bhat
On a reset cycle of OCC, although the system retires from safe
frequency state the local pstate is not restored to Pmin or last
requested pstate. Now if the cpufreq governor initiates a pstate
change, the local pstate will be in Psafe and we will be reporting a
false positive when we are not throttled.

So in powernv_cpufreq_throttle_check() remove the condition which
checks if local pstate is less than Pmin while checking for Psafe
frequency. If the cpus are forced to Psafe then PMSR.psafe_mode_active
bit will be set. So, when OCCs become active this bit will be cleared.
Let us just rely on this bit for reporting throttling.

Signed-off-by: Shilpasri G Bhat 
---
 drivers/cpufreq/powernv-cpufreq.c | 12 +++-
 1 file changed, 3 insertions(+), 9 deletions(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index 9618813..0a59d5b 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -39,7 +39,6 @@
 #define PMSR_PSAFE_ENABLE  (1UL << 30)
 #define PMSR_SPR_EM_DISABLE(1UL << 31)
 #define PMSR_MAX(x)((x >> 32) & 0xFF)
-#define PMSR_LP(x) ((x >> 48) & 0xFF)
 #define OCC_RESET  0
 #define OCC_LOAD   1
 #define OCC_THROTTLE   2
@@ -316,7 +315,7 @@ static void powernv_cpufreq_throttle_check(void *data)
 {
unsigned int cpu = smp_processor_id();
unsigned long pmsr;
-   int pmsr_pmax, pmsr_lp, i;
+   int pmsr_pmax, i;
 
pmsr = get_pmspr(SPRN_PMSR);
 
@@ -338,14 +337,9 @@ static void powernv_cpufreq_throttle_check(void *data)
chips[i].id, pmsr_pmax);
}
 
-   /*
-* Check for Psafe by reading LocalPstate
-* or check if Psafe_mode_active is set in PMSR.
-*/
+   /* Check if Psafe_mode_active is set in PMSR. */
 next:
-   pmsr_lp = (s8)PMSR_LP(pmsr);
-   if ((pmsr_lp < powernv_pstate_info.min) ||
-   (pmsr & PMSR_PSAFE_ENABLE)) {
+   if (pmsr & PMSR_PSAFE_ENABLE) {
throttled = true;
pr_info("Pstate set to safe frequency\n");
}
-- 
1.9.3

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[PATCH v3 3/6] cpufreq: powernv: Register for OCC related opal_message notification

2015-05-04 Thread Shilpasri G Bhat
OCC is an On-Chip-Controller which takes care of power and thermal
safety of the chip. During runtime due to power failure or
overtemperature the OCC may throttle the frequencies of the CPUs to
remain within the power budget.

We want the cpufreq driver to be aware of such situations to be able
to report the reason to the user. We register to opal_message_notifier
to receive OCC messages from opal.

powernv_cpufreq_throttle_check() reports any frequency throttling and
this patch will report the reason or event that caused throttling. We
can be throttled if OCC is reset or OCC limits Pmax due to power or
thermal reasons. We are also notified of unthrottling after an OCC
reset or if OCC restores Pmax on the chip.

Signed-off-by: Shilpasri G Bhat 
---
Changes from v2:
- Patch split in to multiple patches.
- This patch contains only the opal_message notification handler

Changes from v1:
- Add macros to define OCC_RESET, OCC_LOAD and OCC_THROTTLE
- Define a structure to store chip id, chip mask which has bits set
  for cpus present in the chip, throttled state and a work_struct.
- Modify powernv_cpufreq_throttle_check() to be called via smp_call()
- On Pmax throttling/unthrottling update 'chip.throttled' and not the
  global 'throttled' as Pmax capping is local to the chip.
- Remove the condition which checks if local pstate is less than Pmin
  while checking for Psafe frequency. When OCC becomes active after
  reset we update 'thottled' to false and when the cpufreq governor
  initiates a pstate change, the local pstate will be in Psafe and we
  will be reporting a false positive when we are not throttled.
- Schedule a kworker on receiving throttling/unthrottling OCC message
  for that chip and schedule on all chips after receiving active.
- After an OCC reset all the cpus will be in Psafe frequency. So call
  target() and restore the frequency to policy->cur after OCC_ACTIVE
  and Pmax unthrottling
- Taken care of Viresh and Preeti's comments.

 drivers/cpufreq/powernv-cpufreq.c | 75 ++-
 1 file changed, 74 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index d0c18c9..9268424 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -33,15 +33,19 @@
 #include 
 #include 
 #include  /* Required for cpu_sibling_mask() in UP configs */
+#include 
 
 #define POWERNV_MAX_PSTATES256
 #define PMSR_PSAFE_ENABLE  (1UL << 30)
 #define PMSR_SPR_EM_DISABLE(1UL << 31)
 #define PMSR_MAX(x)((x >> 32) & 0xFF)
 #define PMSR_LP(x) ((x >> 48) & 0xFF)
+#define OCC_RESET  0
+#define OCC_LOAD   1
+#define OCC_THROTTLE   2
 
 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
-static bool rebooting, throttled;
+static bool rebooting, throttled, occ_reset;
 
 static struct chip {
unsigned int id;
@@ -414,6 +418,74 @@ static struct notifier_block powernv_cpufreq_reboot_nb = {
.notifier_call = powernv_cpufreq_reboot_notifier,
 };
 
+static char throttle_reason[][30] = {
+   "No throttling",
+   "Power Cap",
+   "Processor Over Temperature",
+   "Power Supply Failure",
+   "Over Current",
+   "OCC Reset"
+};
+
+static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
+  unsigned long msg_type, void *msg)
+{
+   struct opal_msg *occ_msg = msg;
+   uint64_t token;
+   uint64_t chip_id, reason;
+
+   if (msg_type != OPAL_MSG_OCC)
+   return 0;
+
+   token = be64_to_cpu(occ_msg->params[0]);
+
+   switch (token) {
+   case OCC_RESET:
+   occ_reset = true;
+   /*
+* powernv_cpufreq_throttle_check() is called in
+* target() callback which can detect the throttle state
+* for governors like ondemand.
+* But static governors will not call target() often thus
+* report throttling here.
+*/
+   if (!throttled) {
+   throttled = true;
+   pr_crit("CPU Frequency is throttled\n");
+   }
+   pr_info("OCC: Reset\n");
+   break;
+   case OCC_LOAD:
+   pr_info("OCC: Loaded\n");
+   break;
+   case OCC_THROTTLE:
+   chip_id = be64_to_cpu(occ_msg->params[1]);
+   reason = be64_to_cpu(occ_msg->params[2]);
+
+   if (occ_reset) {
+   occ_reset = false;
+   throttled = false;
+   pr_info("OCC: Active\n");
+   return 0;
+   }
+
+   

[PATCH v3 4/6] cpufreq: powernv: Call throttle_check() on receiving OCC_THROTTLE

2015-05-04 Thread Shilpasri G Bhat
Re-evaluate the chip's throttled state on recieving OCC_THROTTLE
notification by executing *throttle_check() on any one of the cpu on
the chip. This is a sanity check to verify if we were indeed
throttled/unthrottled after receiving OCC_THROTTLE notification.

We cannot call *throttle_check() directly from the notification
handler because we could be handling chip1's notification in chip2. So
initiate an smp_call to execute *throttle_check(). We are irq-disabled
in the notification handler, so use a worker thread to smp_call
throttle_check() on any of the cpu in the chipmask.

Signed-off-by: Shilpasri G Bhat 
---
 drivers/cpufreq/powernv-cpufreq.c | 28 ++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index 9268424..9618813 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -50,6 +50,8 @@ static bool rebooting, throttled, occ_reset;
 static struct chip {
unsigned int id;
bool throttled;
+   cpumask_t mask;
+   struct work_struct throttle;
 } *chips;
 
 static int nr_chips;
@@ -310,8 +312,9 @@ static inline unsigned int get_nominal_index(void)
return powernv_pstate_info.max - powernv_pstate_info.nominal;
 }
 
-static void powernv_cpufreq_throttle_check(unsigned int cpu)
+static void powernv_cpufreq_throttle_check(void *data)
 {
+   unsigned int cpu = smp_processor_id();
unsigned long pmsr;
int pmsr_pmax, pmsr_lp, i;
 
@@ -373,7 +376,7 @@ static int powernv_cpufreq_target_index(struct 
cpufreq_policy *policy,
return 0;
 
if (!throttled)
-   powernv_cpufreq_throttle_check(smp_processor_id());
+   powernv_cpufreq_throttle_check(NULL);
 
freq_data.pstate_id = powernv_freqs[new_index].driver_data;
 
@@ -418,6 +421,14 @@ static struct notifier_block powernv_cpufreq_reboot_nb = {
.notifier_call = powernv_cpufreq_reboot_notifier,
 };
 
+void powernv_cpufreq_work_fn(struct work_struct *work)
+{
+   struct chip *chip = container_of(work, struct chip, throttle);
+
+   smp_call_function_any(&chip->mask,
+ powernv_cpufreq_throttle_check, NULL, 0);
+}
+
 static char throttle_reason[][30] = {
"No throttling",
"Power Cap",
@@ -433,6 +444,7 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
*nb,
struct opal_msg *occ_msg = msg;
uint64_t token;
uint64_t chip_id, reason;
+   int i;
 
if (msg_type != OPAL_MSG_OCC)
return 0;
@@ -466,6 +478,10 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
*nb,
occ_reset = false;
throttled = false;
pr_info("OCC: Active\n");
+
+   for (i = 0; i < nr_chips; i++)
+   schedule_work(&chips[i].throttle);
+
return 0;
}
 
@@ -476,6 +492,12 @@ static int powernv_cpufreq_occ_msg(struct notifier_block 
*nb,
else if (!reason)
pr_info("OCC: Chip %u %s\n", (unsigned int)chip_id,
throttle_reason[reason]);
+   else
+   return 0;
+
+   for (i = 0; i < nr_chips; i++)
+   if (chips[i].id == chip_id)
+   schedule_work(&chips[i].throttle);
}
return 0;
 }
@@ -527,6 +549,8 @@ static int init_chip_info(void)
for (i = 0; i < nr_chips; i++) {
chips[i].id = chip[i];
chips[i].throttled = false;
+   cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
+   INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
}
 
return 0;
-- 
1.9.3

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[PATCH v3 2/6] powerpc/powernv: Add definition of OPAL_MSG_OCC message type

2015-05-04 Thread Shilpasri G Bhat
Add OPAL_MSG_OCC message definition to opal_message_type to receive
OCC events like reset, load and throttled. Host performance can be
affected when OCC is reset or OCC throttles the max Pstate.
We can register to opal_message_notifier to receive OPAL_MSG_OCC type
of message and report it to the userspace so as to keep the user
informed about the reason for a performance drop in workloads.

The reset and load OCC events are notified to kernel when FSP sends
OCC_RESET and OCC_LOAD commands.  Both reset and load messages are
sent to kernel on successful completion of reset and load operation
respectively.

The throttle OCC event indicates that the Pmax of the chip is reduced.
The chip_id and throttle reason for reducing Pmax is also queued along
with the message.

Additional opal message type OPAL_MSG_PRD is added to maintain
compatibility between opal and kernel definition of opal_message_type.

Signed-off-by: Shilpasri G Bhat 
Reviewed-by: Preeti U Murthy 
---
No change from V2

Change from v1:
- Update the commit changelog

 arch/powerpc/include/asm/opal-api.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/powerpc/include/asm/opal-api.h 
b/arch/powerpc/include/asm/opal-api.h
index 0321a90..50053b7 100644
--- a/arch/powerpc/include/asm/opal-api.h
+++ b/arch/powerpc/include/asm/opal-api.h
@@ -352,6 +352,14 @@ enum opal_msg_type {
OPAL_MSG_SHUTDOWN,  /* params[0] = 1 reboot, 0 shutdown */
OPAL_MSG_HMI_EVT,
OPAL_MSG_DPO,
+   OPAL_MSG_PRD,
+   OPAL_MSG_OCC,   /*
+* params[0] = 0 reset,
+* 1 load,
+* 2 throttle
+* params[1] = chip_id
+* params[2] = throttle_status
+*/
OPAL_MSG_TYPE_MAX,
 };
 
-- 
1.9.3

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[PATCH v3 1/6] cpufreq: poowernv: Handle throttling due to Pmax capping at chip level

2015-05-04 Thread Shilpasri G Bhat
The On-Chip-Controller(OCC) can throttle cpu frequency by reducing the
max allowed frequency for that chip if the chip exceeds its power or
temperature limits. As Pmax capping is a chip level condition report
this throttling behavior at chip level and also do not set the global
'throttled' on Pmax capping instead set the per-chip throttled
variable. Report unthrottling if Pmax is restored after throttling.

This patch adds a structure to store chip id and throttled state of
the chip.

Signed-off-by: Shilpasri G Bhat 
---
 drivers/cpufreq/powernv-cpufreq.c | 59 ---
 1 file changed, 55 insertions(+), 4 deletions(-)

diff --git a/drivers/cpufreq/powernv-cpufreq.c 
b/drivers/cpufreq/powernv-cpufreq.c
index ebef0d8..d0c18c9 100644
--- a/drivers/cpufreq/powernv-cpufreq.c
+++ b/drivers/cpufreq/powernv-cpufreq.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -42,6 +43,13 @@
 static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
 static bool rebooting, throttled;
 
+static struct chip {
+   unsigned int id;
+   bool throttled;
+} *chips;
+
+static int nr_chips;
+
 /*
  * Note: The set of pstates consists of contiguous integers, the
  * smallest of which is indicated by powernv_pstate_info.min, the
@@ -301,22 +309,33 @@ static inline unsigned int get_nominal_index(void)
 static void powernv_cpufreq_throttle_check(unsigned int cpu)
 {
unsigned long pmsr;
-   int pmsr_pmax, pmsr_lp;
+   int pmsr_pmax, pmsr_lp, i;
 
pmsr = get_pmspr(SPRN_PMSR);
 
+   for (i = 0; i < nr_chips; i++)
+   if (chips[i].id == cpu_to_chip_id(cpu))
+   break;
+
/* Check for Pmax Capping */
pmsr_pmax = (s8)PMSR_MAX(pmsr);
if (pmsr_pmax != powernv_pstate_info.max) {
-   throttled = true;
-   pr_info("CPU %d Pmax is reduced to %d\n", cpu, pmsr_pmax);
-   pr_info("Max allowed Pstate is capped\n");
+   if (chips[i].throttled)
+   goto next;
+   chips[i].throttled = true;
+   pr_info("CPU %d on Chip %u has Pmax reduced to %d\n", cpu,
+   chips[i].id, pmsr_pmax);
+   } else if (chips[i].throttled) {
+   chips[i].throttled = false;
+   pr_info("CPU %d on Chip %u has Pmax restored to %d\n", cpu,
+   chips[i].id, pmsr_pmax);
}
 
/*
 * Check for Psafe by reading LocalPstate
 * or check if Psafe_mode_active is set in PMSR.
 */
+next:
pmsr_lp = (s8)PMSR_LP(pmsr);
if ((pmsr_lp < powernv_pstate_info.min) ||
(pmsr & PMSR_PSAFE_ENABLE)) {
@@ -414,6 +433,33 @@ static struct cpufreq_driver powernv_cpufreq_driver = {
.attr   = powernv_cpu_freq_attr,
 };
 
+static int init_chip_info(void)
+{
+   unsigned int chip[256];
+   unsigned int cpu, i;
+   unsigned int prev_chip_id = UINT_MAX;
+
+   for_each_possible_cpu(cpu) {
+   unsigned int id = cpu_to_chip_id(cpu);
+
+   if (prev_chip_id != id) {
+   prev_chip_id = id;
+   chip[nr_chips++] = id;
+   }
+   }
+
+   chips = kmalloc_array(nr_chips, sizeof(struct chip), GFP_KERNEL);
+   if (!chips)
+   return -ENOMEM;
+
+   for (i = 0; i < nr_chips; i++) {
+   chips[i].id = chip[i];
+   chips[i].throttled = false;
+   }
+
+   return 0;
+}
+
 static int __init powernv_cpufreq_init(void)
 {
int rc = 0;
@@ -429,6 +475,11 @@ static int __init powernv_cpufreq_init(void)
return rc;
}
 
+   /* Populate chip info */
+   rc = init_chip_info();
+   if (rc)
+   return rc;
+
register_reboot_notifier(&powernv_cpufreq_reboot_nb);
return cpufreq_register_driver(&powernv_cpufreq_driver);
 }
-- 
1.9.3

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[PATCH v3 0/6] powernv: cpufreq: Report frequency throttle by OCC

2015-05-04 Thread Shilpasri G Bhat
This patchset intends to add frequency throttle reporting mechanism
to powernv-cpufreq driver when OCC throttles the frequency. OCC is an
On-Chip-Controller which takes care of the power and thermal safety of
the chip. The CPU frequency can be throttled during an OCC reset or
when OCC tries to limit the max allowed frequency. The patchset will
report such conditions so as to keep the user informed about reason
for the drop in performance of workloads when frequency is throttled.

Changes from v2:
- Split into multiple patches
- Semantic fixes

Shilpasri G Bhat (6):
  cpufreq: poowernv: Handle throttling due to Pmax capping at chip level
  powerpc/powernv: Add definition of OPAL_MSG_OCC message type
  cpufreq: powernv: Register for OCC related opal_message notification
  cpufreq: powernv: Call throttle_check() on receiving OCC_THROTTLE
  cpufreq: powernv: Report Psafe only if PMSR.psafe_mode_active bit is
set
  cpufreq: powernv: Restore cpu frequency to policy->cur on unthrottling

 arch/powerpc/include/asm/opal-api.h |   8 ++
 drivers/cpufreq/powernv-cpufreq.c   | 199 +---
 2 files changed, 192 insertions(+), 15 deletions(-)

-- 
1.9.3

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[PATCH V3 9/9] powerpc/eeh: handle VF PE properly

2015-05-04 Thread Wei Yang
Compared with Bus PE, VF PE just has one single pci function. This
introduces the difference of error handling on a VF PE.

For example in the hotplug case, EEH needs to remove and re-create the VF
properly. In the case when PF's error_detected() disable SRIOV, this patch
introduces a flag to mark the eeh_dev of a VF to avoid the slot_reset() and
resume(). Since the FW is not ware of the VF, this patch handles the VF
restore/reset in kernel directly.

This patch is to handle the VF PE properly in these cases.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/eeh.h   |1 +
 arch/powerpc/kernel/eeh.c|1 +
 arch/powerpc/kernel/eeh_driver.c |  108 ++
 arch/powerpc/kernel/eeh_pe.c |3 +-
 4 files changed, 90 insertions(+), 23 deletions(-)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 78c8bec..43e8a24 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -141,6 +141,7 @@ struct eeh_dev {
struct pci_controller *phb; /* Associated PHB   */
struct pci_dn *pdn; /* Associated PCI device node   */
struct pci_dev *pdev;   /* Associated PCI device*/
+   intin_error;/* Error flag for eeh_dev   */
 #ifdef CONFIG_PCI_IOV
struct pci_dev *physfn; /* Associated PF PORT   */
 #endif /* CONFIG_PCI_IOV */
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 221e280..077c3d1 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1226,6 +1226,7 @@ void eeh_remove_device(struct pci_dev *dev)
 * from the parent PE during the BAR resotre.
 */
edev->pdev = NULL;
+   edev->in_error = 0;
dev->dev.archdata.edev = NULL;
if (!(edev->pe->state & EEH_PE_KEEP))
eeh_rmv_from_parent_pe(edev);
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 89eb4bc..6e42cad 100644
--- a/arch/powerpc/kernel/eeh_driver.c
+++ b/arch/powerpc/kernel/eeh_driver.c
@@ -211,6 +211,7 @@ static void *eeh_report_error(void *data, void *userdata)
if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
if (*res == PCI_ERS_RESULT_NONE) *res = rc;
 
+   edev->in_error = 1;
eeh_pcid_put(dev);
return NULL;
 }
@@ -282,7 +283,8 @@ static void *eeh_report_reset(void *data, void *userdata)
 
if (!driver->err_handler ||
!driver->err_handler->slot_reset ||
-   (edev->mode & EEH_DEV_NO_HANDLER)) {
+   (edev->mode & EEH_DEV_NO_HANDLER) ||
+   (!edev->in_error)) {
eeh_pcid_put(dev);
return NULL;
}
@@ -339,14 +341,16 @@ static void *eeh_report_resume(void *data, void *userdata)
 
if (!driver->err_handler ||
!driver->err_handler->resume ||
-   (edev->mode & EEH_DEV_NO_HANDLER)) {
+   (edev->mode & EEH_DEV_NO_HANDLER) ||
+   (!edev->in_error)) {
edev->mode &= ~EEH_DEV_NO_HANDLER;
-   eeh_pcid_put(dev);
-   return NULL;
+   goto out;
}
 
driver->err_handler->resume(dev);
 
+out:
+   edev->in_error = 0;
eeh_pcid_put(dev);
return NULL;
 }
@@ -386,12 +390,42 @@ static void *eeh_report_failure(void *data, void 
*userdata)
return NULL;
 }
 
+#ifdef CONFIG_PCI_IOV
+static void *eeh_add_virt_device(void *data, void *userdata)
+{
+   struct pci_driver *driver;
+   struct eeh_dev *edev = (struct eeh_dev *)data;
+   struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
+   struct pci_dn *pdn = eeh_dev_to_pdn(edev);
+
+   if (!(edev->mode & EEH_DEV_VF)) {
+   pr_warn("EEH: eeh_dev(%04x:%02x:%02x:%01x) is not a VF\n",
+   edev->phb->global_number, pdn->busno,
+   PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
+   return NULL;
+   }
+
+   driver = eeh_pcid_get(dev);
+   if (driver) {
+   eeh_pcid_put(dev);
+   if (driver->err_handler)
+   return NULL;
+   }
+
+   pci_iov_virtfn_add(edev->physfn, pdn->vf_index, 0);
+   return NULL;
+}
+#endif /* CONFIG_PCI_IOV */
+
 static void *eeh_rmv_device(void *data, void *userdata)
 {
struct pci_driver *driver;
struct eeh_dev *edev = (struct eeh_dev *)data;
struct pci_dev *dev = eeh_dev_to_pci_dev(edev);
int *removed = (int *)userdata;
+#ifdef CONFIG_PCI_IOV
+   struct pci_dn *pdn = eeh_dev_to_pdn(edev);
+#endif
 
/*
 * Actually, we should remove the PCI bridges as well.
@@ -416,7 +450,7 @@ static void *eeh_rmv_device(void *data, void *userdata)
driver = eeh_pcid_get(dev);
if (driver) {
eeh_pcid_put(dev);
-   if (driver->err_handler)
+   if (removed && driver->err_handler)
 

[PATCH V3 8/9] powerpc/powernv: Support PCI config restore for VFs

2015-05-04 Thread Wei Yang
Since FW is not aware of VFs, the restore action for VF should be done in
kernel.

This patch introduces pnv_eeh_vf_restore_config() for VF.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/pci-bridge.h|1 +
 arch/powerpc/platforms/powernv/eeh-powernv.c |   77 +-
 2 files changed, 77 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 9582aa2..de55ef6 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -205,6 +205,7 @@ struct pci_dn {
int m64_per_iov;
 #define IODA_INVALID_M64(-1)
int m64_wins[PCI_SRIOV_NUM_BARS][M64_PER_IOV];
+   int mps;
 #endif /* CONFIG_PCI_IOV */
 #endif
struct list_head child_list;
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c 
b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 1ad322f..6ba6d87 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -1589,6 +1589,59 @@ static int pnv_eeh_next_error(struct eeh_pe **pe)
return ret;
 }
 
+#ifdef CONFIG_PCI_IOV
+static int pnv_eeh_vf_restore_config(struct pci_dn *pdn)
+{
+   int pcie_cap, aer_cap, old_mps;
+   u32 devctl, cmd, cap2, aer_capctl;
+
+   /* Restore MPS */
+   pcie_cap = pnv_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
+   if (pcie_cap) {
+   old_mps = (ffs(pdn->mps) - 8) << 5;
+   pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, &devctl);
+   devctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
+   devctl |= old_mps;
+   pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, devctl);
+   }
+
+   /* Disable Completion Timeout */
+   if (pcie_cap) {
+   pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCAP2, 4, &cap2);
+   if (cap2 & 0x10) {
+   pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, 
&cap2);
+   cap2 |= 0x10;
+   pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL2, 4, 
cap2);
+   }
+   }
+
+   /* Enable SERR and parity checking */
+   pnv_pci_cfg_read(pdn, PCI_COMMAND, 2, &cmd);
+   cmd |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
+   pnv_pci_cfg_write(pdn, PCI_COMMAND, 2, cmd);
+
+   /* Enable report various errors */
+   if (pcie_cap) {
+   pnv_pci_cfg_read(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, &devctl);
+   devctl &= ~PCI_EXP_DEVCTL_CERE;
+   devctl |= (PCI_EXP_DEVCTL_NFERE |
+  PCI_EXP_DEVCTL_FERE |
+  PCI_EXP_DEVCTL_URRE);
+   pnv_pci_cfg_write(pdn, pcie_cap + PCI_EXP_DEVCTL, 2, devctl);
+   }
+
+   /* Enable ECRC generation and check */
+   if (pcie_cap) {
+   aer_cap = pnv_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
+   pnv_pci_cfg_read(pdn, aer_cap + PCI_ERR_CAP, 4, &aer_capctl);
+   aer_capctl |= (PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
+   pnv_pci_cfg_write(pdn, aer_cap + PCI_ERR_CAP, 4, aer_capctl);
+   }
+
+   return 0;
+}
+#endif /* CONFIG_PCI_IOV */
+
 static int pnv_eeh_restore_config(struct pci_dn *pdn)
 {
struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
@@ -1599,7 +1652,13 @@ static int pnv_eeh_restore_config(struct pci_dn *pdn)
return -EEXIST;
 
phb = edev->phb->private_data;
-   ret = opal_pci_reinit(phb->opal_id,
+#ifdef CONFIG_PCI_IOV
+   /* FW is not VF aware, we rely on OS to restore it */
+   if (edev->mode & EEH_DEV_VF)
+   ret = pnv_eeh_vf_restore_config(pdn);
+   else
+#endif
+   ret = opal_pci_reinit(phb->opal_id,
  OPAL_REINIT_PCI_DEV, edev->config_addr);
if (ret) {
pr_warn("%s: Can't reinit PCI dev 0x%x (%lld)\n",
@@ -1660,4 +1719,20 @@ static void pnv_pci_fixup_vf_eeh(struct pci_dev *pdev)
}
 }
 DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pnv_pci_fixup_vf_eeh);
+
+static void pnv_pci_fixup_vf_caps(struct pci_dev *pdev)
+{
+   struct pci_dn *pdn = pci_get_pdn(pdev);
+   int parent_mps;
+
+   if (!pdev->is_virtfn)
+   return;
+
+   /* Synchronize MPS for VF and PF */
+   parent_mps = pcie_get_mps(pdev->physfn);
+   if ((128 << pdev->pcie_mpss) >= parent_mps)
+   pcie_set_mps(pdev, parent_mps);
+   pdn->mps = pcie_get_mps(pdev);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pnv_pci_fixup_vf_caps);
 #endif /* CONFIG_PCI_IOV */
-- 
1.7.9.5

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[PATCH V3 7/9] powerpc/powernv: Support EEH reset for VFs

2015-05-04 Thread Wei Yang
Before VF PE introduced, there isn't a method to reset an individual pci
function. And since FW is not aware of the VF, the VF's reset should be
done in kernel.

This patch introduce a pnv_eeh_vf_pe_reset() to do the flr or af_flr to a
VF.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/eeh.h   |1 +
 arch/powerpc/platforms/powernv/eeh-powernv.c |  111 +-
 2 files changed, 111 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 2067de4..78c8bec 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -135,6 +135,7 @@ struct eeh_dev {
int pcix_cap;   /* Saved PCIx capability*/
int pcie_cap;   /* Saved PCIe capability*/
int aer_cap;/* Saved AER capability */
+   int af_cap; /* Saved AF capability  */
struct eeh_pe *pe;  /* Associated PE*/
struct list_head list;  /* Form link list in the PE */
struct pci_controller *phb; /* Associated PHB   */
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c 
b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 5447481..1ad322f 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -402,6 +402,7 @@ static void *pnv_eeh_probe(struct pci_dn *pdn, void *data)
edev->pcix_cap = pnv_eeh_find_cap(pdn, PCI_CAP_ID_PCIX);
edev->pcie_cap = pnv_eeh_find_cap(pdn, PCI_CAP_ID_EXP);
edev->aer_cap  = pnv_eeh_find_ecap(pdn, PCI_EXT_CAP_ID_ERR);
+   edev->af_cap   = pnv_eeh_find_cap(pdn, PCI_CAP_ID_AF);
if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
edev->mode |= EEH_DEV_BRIDGE;
if (edev->pcie_cap) {
@@ -891,6 +892,105 @@ static int pnv_eeh_bridge_reset(struct pci_dev *dev, int 
option)
return 0;
 }
 
+static int pnv_pci_wait_for_pending(struct pci_dn *pdn, int pos, u16 mask)
+{
+   int i;
+
+   /* Wait for Transaction Pending bit clean */
+   for (i = 0; i < 4; i++) {
+   u32 status;
+   if (i)
+   msleep((1 << (i - 1)) * 100);
+
+   eeh_ops->read_config(pdn, pos, 2, &status);
+   if (!(status & mask))
+   return 1;
+   }
+
+   return 0;
+}
+
+static int pnv_eeh_do_flr(struct pci_dn *pdn)
+{
+   u32 cap;
+   struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
+
+   eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP, 4, &cap);
+   if (!(cap & PCI_EXP_DEVCAP_FLR))
+   return -ENOTTY;
+
+   if (!pnv_pci_wait_for_pending(pdn, edev->pcie_cap + PCI_EXP_DEVSTA, 
PCI_EXP_DEVSTA_TRPND))
+   pr_err("%04x:%02x:%02x:%01x timed out waiting for pending 
transaction; performing function level reset anyway\n",
+   edev->phb->global_number, pdn->busno,
+   PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
+
+   eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, 4, &cap);
+   cap |= PCI_EXP_DEVCTL_BCR_FLR;
+   eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL, 4, cap);
+   msleep(100);
+   return 0;
+}
+
+static int pnv_eeh_do_af_flr(struct pci_dn *pdn)
+{
+   u32 cap;
+   struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
+
+   if (!edev->af_cap)
+   return -ENOTTY;
+
+   eeh_ops->read_config(pdn, edev->af_cap + PCI_AF_CAP, 1, &cap);
+   if (!(cap & PCI_AF_CAP_TP) || !(cap & PCI_AF_CAP_FLR))
+   return -ENOTTY;
+
+   /*
+* Wait for Transaction Pending bit to clear.  A word-aligned test
+* is used, so we use the conrol offset rather than status and shift
+* the test bit to match.
+*/
+   if (!pnv_pci_wait_for_pending(pdn, edev->af_cap + PCI_AF_CTRL,
+PCI_AF_STATUS_TP << 8))
+   pr_err("%04x:%02x:%02x:%01x timed out waiting for pending 
transaction; performing AF function level reset anyway\n",
+   edev->phb->global_number, pdn->busno,
+   PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
+
+   eeh_ops->write_config(pdn, edev->af_cap + PCI_AF_CTRL, 1, 
PCI_AF_CTRL_FLR);
+   msleep(100);
+   return 0;
+}
+
+static int pnv_eeh_reset_vf(struct pci_dn *pdn)
+{
+   int rc;
+
+   might_sleep();
+
+   rc = pnv_eeh_do_flr(pdn);
+   if (rc != -ENOTTY)
+   goto done;
+
+   rc = pnv_eeh_do_af_flr(pdn);
+   if (rc != -ENOTTY)
+   goto done;
+
+done:
+   return rc;
+}
+
+static int pnv_eeh_vf_pe_reset(struct eeh_pe *pe, int option)
+{
+   struct eeh_dev *edev, *tmp;
+   struct pci_dn *pdn;
+   int ret = 0;
+
+   eeh_pe_for_each_dev(pe, edev, tmp) {
+   pdn = eeh_dev_to_pdn(ed

[PATCH V3 6/9] powerpc/powernv: create/release eeh_dev for VF

2015-05-04 Thread Wei Yang
EEH on powerpc platform needs eeh_dev structure to track the pci device
status. Since VFs are created/released dynamically, VF's eeh_dev is also
dynamically created/released in system.

This patch creates/removes eeh_dev when pci_dn is created/removed for VFs,
and marks it with EEH_DEV_VF type.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/eeh.h |7 +++
 arch/powerpc/kernel/eeh.c  |4 
 arch/powerpc/kernel/eeh_dev.c  |   20 
 arch/powerpc/kernel/pci_dn.c   |7 +++
 4 files changed, 38 insertions(+)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index 56e8cd9..2067de4 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -124,6 +124,7 @@ static inline bool eeh_pe_passed(struct eeh_pe *pe)
 #define EEH_DEV_NO_HANDLER (1 << 8)/* No error handler */
 #define EEH_DEV_SYSFS  (1 << 9)/* Sysfs created*/
 #define EEH_DEV_REMOVED(1 << 10)   /* Removed permanently  
*/
+#define EEH_DEV_VF (1 << 11)   /* VF port  */
 
 struct eeh_dev {
int mode;   /* EEH mode */
@@ -139,6 +140,9 @@ struct eeh_dev {
struct pci_controller *phb; /* Associated PHB   */
struct pci_dn *pdn; /* Associated PCI device node   */
struct pci_dev *pdev;   /* Associated PCI device*/
+#ifdef CONFIG_PCI_IOV
+   struct pci_dev *physfn; /* Associated PF PORT   */
+#endif /* CONFIG_PCI_IOV */
struct pci_bus *bus;/* PCI bus for partial hotplug  */
 };
 
@@ -273,6 +277,7 @@ const char *eeh_pe_loc_get(struct eeh_pe *pe);
 struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);
 
 void *eeh_dev_init(struct pci_dn *pdn, void *data);
+void eeh_dev_remove(struct pci_dn *pdn);
 void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
 int eeh_init(void);
 int __init eeh_ops_register(struct eeh_ops *ops);
@@ -328,6 +333,8 @@ static inline void *eeh_dev_init(struct pci_dn *pdn, void 
*data)
return NULL;
 }
 
+void eeh_dev_remove(struct pci_dn *pdn) { }
+
 static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
 
 static inline int eeh_check_failure(const volatile void __iomem *token)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index 6c7ce1b..221e280 100644
--- a/arch/powerpc/kernel/eeh.c
+++ b/arch/powerpc/kernel/eeh.c
@@ -1135,6 +1135,10 @@ void eeh_add_device_late(struct pci_dev *dev)
}
 
edev->pdev = dev;
+#ifdef CONFIG_PCI_IOV
+   if (dev->is_virtfn)
+   edev->physfn = dev->physfn;
+#endif
dev->dev.archdata.edev = edev;
 
if (eeh_has_flag(EEH_PROBE_MODE_DEV))
diff --git a/arch/powerpc/kernel/eeh_dev.c b/arch/powerpc/kernel/eeh_dev.c
index aabba94..ab88e61 100644
--- a/arch/powerpc/kernel/eeh_dev.c
+++ b/arch/powerpc/kernel/eeh_dev.c
@@ -72,6 +72,26 @@ void *eeh_dev_init(struct pci_dn *pdn, void *data)
 }
 
 /**
+ * eeh_dev_remove - Release EEH device according to OF node
+ * @pdn: PCI device node
+ */
+void eeh_dev_remove(struct pci_dn *pdn)
+{
+   struct eeh_dev *edev;
+
+   if (!pdn)
+   return;
+
+   edev = pdn_to_eeh_dev(pdn);
+   if(!edev)
+   return;
+
+   eeh_rmv_from_parent_pe(edev);
+   kfree(edev);
+   pdn->edev = NULL;
+}
+
+/**
  * eeh_dev_phb_init_dynamic - Create EEH devices for devices included in PHB
  * @phb: PHB
  *
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index bf0fb873..a35f865 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -179,7 +179,9 @@ static struct pci_dn *add_one_dev_pci_data(struct pci_dn 
*parent,
 struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
 {
 #ifdef CONFIG_PCI_IOV
+   struct pci_controller *hose = pci_bus_to_host(pdev->bus);
struct pci_dn *parent, *pdn;
+   struct eeh_dev *edev;
int i;
 
/* Only support IOV for now */
@@ -205,6 +207,9 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
 __func__, i);
return NULL;
}
+   eeh_dev_init(pdn, hose);
+   edev = pdn_to_eeh_dev(pdn);
+   edev->mode |= EEH_DEV_VF;
}
 #endif /* CONFIG_PCI_IOV */
 
@@ -257,6 +262,8 @@ void remove_dev_pci_data(struct pci_dev *pdev)
pdn->devfn != pci_iov_virtfn_devfn(pdev, i))
continue;
 
+   eeh_dev_remove(pdn);
+
if (!list_empty(&pdn->list))
list_del(&pdn->list);
 
-- 
1.7.9.5

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[PATCH V3 5/9] powerpc/eeh: create EEH_PE_VF for VF PE

2015-05-04 Thread Wei Yang
On powernv platform, VF PE is a special PE which is different from the Bus
PE.  On the EEH side, it needs a corresponding concept to handle the VF PE
properly. For example, we need to create VF PE when VF's pci_dev is
initialized in kernel. And add a flag to mark it is a VF PF.

This patch introduces the EEH_PE_VF type for VF PE and creates it for a VF.
At the mean time, it creates the sysfs and address cache for VF PE.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/eeh.h   |1 +
 arch/powerpc/kernel/eeh_pe.c |   12 ++--
 arch/powerpc/platforms/powernv/eeh-powernv.c |   12 
 3 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/eeh.h b/arch/powerpc/include/asm/eeh.h
index a52db28..56e8cd9 100644
--- a/arch/powerpc/include/asm/eeh.h
+++ b/arch/powerpc/include/asm/eeh.h
@@ -70,6 +70,7 @@ struct pci_dn;
 #define EEH_PE_PHB (1 << 1)/* PHB PE*/
 #define EEH_PE_DEVICE  (1 << 2)/* Device PE */
 #define EEH_PE_BUS (1 << 3)/* Bus PE*/
+#define EEH_PE_VF  (1 << 4)/* VF PE */
 
 #define EEH_PE_ISOLATED(1 << 0)/* Isolated PE  
*/
 #define EEH_PE_RECOVERING  (1 << 1)/* Recovering PE*/
diff --git a/arch/powerpc/kernel/eeh_pe.c b/arch/powerpc/kernel/eeh_pe.c
index 35f0b62..edfe63a 100644
--- a/arch/powerpc/kernel/eeh_pe.c
+++ b/arch/powerpc/kernel/eeh_pe.c
@@ -299,7 +299,12 @@ static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev 
*edev)
 * EEH device already having associated PE, but
 * the direct parent EEH device doesn't have yet.
 */
-   pdn = pdn ? pdn->parent : NULL;
+#ifdef CONFIG_PCI_IOV
+   if (edev->mode & EEH_DEV_VF)
+   pdn = pci_get_pdn(edev->physfn);
+   else
+#endif
+   pdn = pdn ? pdn->parent : NULL;
while (pdn) {
/* We're poking out of PCI territory */
parent = pdn_to_eeh_dev(pdn);
@@ -382,7 +387,10 @@ int eeh_add_to_parent_pe(struct eeh_dev *edev)
}
 
/* Create a new EEH PE */
-   pe = eeh_pe_alloc(edev->phb, EEH_PE_DEVICE);
+   if (edev->mode & EEH_DEV_VF)
+   pe = eeh_pe_alloc(edev->phb, EEH_PE_VF);
+   else
+   pe = eeh_pe_alloc(edev->phb, EEH_PE_DEVICE);
if (!pe) {
pr_err("%s: out of memory!\n", __func__);
return -ENOMEM;
diff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c 
b/arch/powerpc/platforms/powernv/eeh-powernv.c
index 622f08c..5447481 100644
--- a/arch/powerpc/platforms/powernv/eeh-powernv.c
+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c
@@ -1540,3 +1540,15 @@ static int __init eeh_powernv_init(void)
return ret;
 }
 machine_early_initcall(powernv, eeh_powernv_init);
+
+#ifdef CONFIG_PCI_IOV
+static void pnv_pci_fixup_vf_eeh(struct pci_dev *pdev)
+{
+   /* sysfs files should only be added after devices are added */
+   if (pdev->is_virtfn) {
+   eeh_add_device_late(pdev);
+   eeh_sysfs_add_device(pdev);
+   }
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pnv_pci_fixup_vf_eeh);
+#endif /* CONFIG_PCI_IOV */
-- 
1.7.9.5

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[PATCH V3 4/9] powerpc/eeh: cache address range just for normal device

2015-05-04 Thread Wei Yang
The address cache is used to find the related eeh_dev for a given MMIO
address.  From the definition of pci_dev.resource[], it keeps MMIO address
in following order: 6 normal BAR, ROM BAR, 6 IOV BAR, 4 Bridge window.

In the address cache, first it doesn't cache bridge device, second the IOV
BAR range should map to their own VFs separately. This means it just need
to cache the first 7 BARs for a normal device.

This patch restricts the address cache to save the first 7 BARs for a pci
device.

Signed-off-by: Wei Yang 
Acked-by: Gavin Shan 
---
 arch/powerpc/kernel/eeh_cache.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c
index a1e86e1..f0ce2a3 100644
--- a/arch/powerpc/kernel/eeh_cache.c
+++ b/arch/powerpc/kernel/eeh_cache.c
@@ -196,7 +196,7 @@ static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)
}
 
/* Walk resources on this device, poke them into the tree */
-   for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+   for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
resource_size_t start = pci_resource_start(dev,i);
resource_size_t end = pci_resource_end(dev,i);
unsigned long flags = pci_resource_flags(dev,i);
-- 
1.7.9.5

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[PATCH V3 3/9] powerpc/pci: remove PCI devices in reverse order

2015-05-04 Thread Wei Yang
As commit ac205b7b ("PCI: make sriov work with hotplug remove") indicates,
when removing PCI devices on a bus which has VFs, we need to remove them
in the reverse order.

This patch applies this pattern to the hotplug removal code for the powerpc
arch.

Signed-off-by: Wei Yang 
Acked-by: Gavin Shan 
---
 arch/powerpc/kernel/pci-hotplug.c |2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/pci-hotplug.c 
b/arch/powerpc/kernel/pci-hotplug.c
index 7ed85a6..98f84ed 100644
--- a/arch/powerpc/kernel/pci-hotplug.c
+++ b/arch/powerpc/kernel/pci-hotplug.c
@@ -50,7 +50,7 @@ void pcibios_remove_pci_devices(struct pci_bus *bus)
 
pr_debug("PCI: Removing devices on bus %04x:%02x\n",
 pci_domain_nr(bus),  bus->number);
-   list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
+   list_for_each_entry_safe_reverse(dev, tmp, &bus->devices, bus_list) {
pr_debug("   Removing %s...\n", pci_name(dev));
pci_stop_and_remove_bus_device(dev);
}
-- 
1.7.9.5

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[PATCH V3 2/9] powerpc/pci_dn: cache vf_index in pci_dn

2015-05-04 Thread Wei Yang
This patch caches the index of a VF in its PF in pci_dn.

Signed-off-by: Wei Yang 
---
 arch/powerpc/include/asm/pci-bridge.h |1 +
 arch/powerpc/kernel/pci_dn.c  |5 +++--
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/pci-bridge.h 
b/arch/powerpc/include/asm/pci-bridge.h
index 1811c44..9582aa2 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -199,6 +199,7 @@ struct pci_dn {
 #ifdef CONFIG_PCI_IOV
u16 vfs_expanded;   /* number of VFs IOV BAR expanded */
u16 num_vfs;/* number of VFs enabled*/
+   int vf_index;   /* Index to PF for VF dev */
int offset; /* PE# for the first VF PE */
 #define M64_PER_IOV 4
int m64_per_iov;
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index b3b4df9..bf0fb873 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -138,7 +138,7 @@ struct pci_dn *pci_get_pdn(struct pci_dev *pdev)
 
 #ifdef CONFIG_PCI_IOV
 static struct pci_dn *add_one_dev_pci_data(struct pci_dn *parent,
-  struct pci_dev *pdev,
+  struct pci_dev *pdev, int vf_index,
   int busno, int devfn)
 {
struct pci_dn *pdn;
@@ -157,6 +157,7 @@ static struct pci_dn *add_one_dev_pci_data(struct pci_dn 
*parent,
pdn->parent = parent;
pdn->busno = busno;
pdn->devfn = devfn;
+   pdn->vf_index = vf_index;
 #ifdef CONFIG_PPC_POWERNV
pdn->pe_number = IODA_INVALID_PE;
 #endif
@@ -196,7 +197,7 @@ struct pci_dn *add_dev_pci_data(struct pci_dev *pdev)
return NULL;
 
for (i = 0; i < pci_sriov_get_totalvfs(pdev); i++) {
-   pdn = add_one_dev_pci_data(parent, NULL,
+   pdn = add_one_dev_pci_data(parent, NULL, i,
   pci_iov_virtfn_bus(pdev, i),
   pci_iov_virtfn_devfn(pdev, i));
if (!pdn) {
-- 
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[PATCH V3 1/9] pci/iov: rename and export virtfn_add/virtfn_remove

2015-05-04 Thread Wei Yang
During the EEH procedure, when a device's driver is not EEH aware or no
driver is binded with a device, EEH core would do hotplug on this devices.
While it isn't feasible for a VF with usual hotplug procedure. During
removal of a VF, virt_bus should be removed if necessary. During the
re-creation, the pci_scan_slot() doesn't work on a VF.

This patch exports two functions to handle the hotplug case for VF
properly. They will be invoked when the EEH core do the hotplug case for
VFs.

Signed-off-by: Wei Yang 
---
 drivers/pci/iov.c   |   10 +-
 include/linux/pci.h |2 ++
 2 files changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index ee0ebff..cc941dd 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
@@ -108,7 +108,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *dev, 
int resno)
return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
 }
 
-static int virtfn_add(struct pci_dev *dev, int id, int reset)
+int pci_iov_virtfn_add(struct pci_dev *dev, int id, int reset)
 {
int i;
int rc = -ENOMEM;
@@ -183,7 +183,7 @@ failed:
return rc;
 }
 
-static void virtfn_remove(struct pci_dev *dev, int id, int reset)
+void pci_iov_virtfn_remove(struct pci_dev *dev, int id, int reset)
 {
char buf[VIRTFN_ID_LEN];
struct pci_dev *virtfn;
@@ -320,7 +320,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
}
 
for (i = 0; i < initial; i++) {
-   rc = virtfn_add(dev, i, 0);
+   rc = pci_iov_virtfn_add(dev, i, 0);
if (rc)
goto failed;
}
@@ -332,7 +332,7 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
 
 failed:
for (j = 0; j < i; j++)
-   virtfn_remove(dev, j, 0);
+   pci_iov_virtfn_remove(dev, j, 0);
 
iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
pci_cfg_access_lock(dev);
@@ -361,7 +361,7 @@ static void sriov_disable(struct pci_dev *dev)
return;
 
for (i = 0; i < iov->num_VFs; i++)
-   virtfn_remove(dev, i, 0);
+   pci_iov_virtfn_remove(dev, i, 0);
 
pcibios_sriov_disable(dev);
 
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 353db8d..94bacfa 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -1679,6 +1679,8 @@ int pci_iov_virtfn_devfn(struct pci_dev *dev, int id);
 
 int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn);
 void pci_disable_sriov(struct pci_dev *dev);
+int pci_iov_virtfn_add(struct pci_dev *dev, int id, int reset);
+void pci_iov_virtfn_remove(struct pci_dev *dev, int id, int reset);
 int pci_num_vf(struct pci_dev *dev);
 int pci_vfs_assigned(struct pci_dev *dev);
 int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs);
-- 
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[PATCH V3 0/9] VF EEH on Power8

2015-05-04 Thread Wei Yang
This patchset enables EEH on SRIOV VFs. The general idea is to create proper
VF edev and VF PE and handle them properly.

Different from the Bus PE, VF PE just contain one VF. This introduces the
difference of EEH error handling on a VF PE. Generally, it has several
differences.

First, the VF's removal and re-enumerate rely on its PF. VF has a tight
relationship between its PF. This is not proper to enumerate a VF by usual
scan procedure. That's why virtfn_add/virtfn_remove are exported in this patch
set.

Second, the reset/restore of a VF is done in kernel space. FW is not aware of
the VF, this means the usual reset function done in FW will not work. One of
the patch will imitate the reset/restore function in kernel space.

Third, the VF may be removed during the PF's error_detected function. In this
case, the original error_detected->slot_reset->resume sequence is not proper
to those removed VFs, since they are re-created by PF in a fresh state. A flag
in eeh_dev is introduce to mark the eeh_dev is in error state. By doing so, we
track whether this device needs to be reset or not.

This has been tested both on host and in guest on Power8 with latest kernel
version.

v3:
   * add back vf_index in pci_dn to track the VF's index
   * rename ppdev in eeh_dev to physfn for consistency
   * move edev->physfn assignment before dev->dev.archdata.edev is set
   * move pnv_pci_fixup_vf_eeh() and pnv_pci_fixup_vf_caps() to eeh-powernv.c
   * more clear and detail in commit log and comment in code
   * merge eeh_rmv_virt_device() with eeh_rmv_device()
   * move the cfg_blocked check logic from pnv_eeh_read/write_config() to
 pnv_eeh_cfg_blocked()
   * move the vf reset/restore logic into its own patch, two patches are
 created.
 powerpc/powernv: Support PCI config restore for VFs
 powerpc/powernv: Support EEH reset for VFs
   * simplify the vf reset logic
v2:
   * add prefix pci_iov_ to virtfn_add/virtfn_remove
   * use EEH_DEV_VF as a flag for a VF's eeh_dev
   * use eeh_dev instead of edev in change log
   * remove vf_index in eeh_dev, calculate it from pdn->busno and devfn
   * do eeh_add_device_late() and eeh_sysfs_add_device() both after pci_dev is
 well initialized
   * do FLR to reset a VF PE
   * imitate the restore function in FW for VF
   * remove the reverse order patch, since it is still under discussion

Wei Yang (9):
  pci/iov: rename and export virtfn_add/virtfn_remove
  powerpc/pci_dn: cache vf_index in pci_dn
  powerpc/pci: remove PCI devices in reverse order
  powerpc/eeh: cache address range just for normal device
  powerpc/eeh: create EEH_PE_VF for VF PE
  powerpc/powernv: create/release eeh_dev for VF
  powerpc/powernv: Support EEH reset for VFs
  powerpc/powernv: Support PCI config restore for VFs
  powerpc/eeh: handle VF PE properly

 arch/powerpc/include/asm/eeh.h   |   10 ++
 arch/powerpc/include/asm/pci-bridge.h|2 +
 arch/powerpc/kernel/eeh.c|5 +
 arch/powerpc/kernel/eeh_cache.c  |2 +-
 arch/powerpc/kernel/eeh_dev.c|   20 +++
 arch/powerpc/kernel/eeh_driver.c |  108 +++---
 arch/powerpc/kernel/eeh_pe.c |   15 +-
 arch/powerpc/kernel/pci-hotplug.c|2 +-
 arch/powerpc/kernel/pci_dn.c |   12 +-
 arch/powerpc/platforms/powernv/eeh-powernv.c |  200 +-
 drivers/pci/iov.c|   10 +-
 include/linux/pci.h  |2 +
 12 files changed, 352 insertions(+), 36 deletions(-)

-- 
1.7.9.5

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Re: [PATCH v3 3/3] Documentation: mmc: Update Arasan SDHC documentation to support 4.9a version of Arasan SDHC controller.

2015-05-04 Thread Michal Simek
On 05/04/2015 08:03 AM, Suman Tripathi wrote:
> Hi,
> 
> On Mon, May 4, 2015 at 11:30 AM, Michal Simek  wrote:
>> On 05/01/2015 06:54 AM, Suman Tripathi wrote:
>>> This patch updates Arasan SDHC documentation to support
>>> 4.9a version of Arasan SDHC controller.
>>>
>>> Signed-off-by: Suman Tripathi 
>>> ---
>>>  Documentation/devicetree/bindings/mmc/arasan,sdhci.txt | 5 +++--
>>>  1 file changed, 3 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt 
>>> b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>>> index 98ee2ab..f01d41a 100644
>>> --- a/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>>> +++ b/Documentation/devicetree/bindings/mmc/arasan,sdhci.txt
>>> @@ -8,7 +8,8 @@ Device Tree Bindings for the Arasan SDHCI Controller
>>>[3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
>>>
>>>  Required Properties:
>>> -  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a'
>>> +  - compatible: Compatibility string. Must be 'arasan,sdhci-8.9a' or
>>> +'arasan,sdhci-4.9a'
>>>- reg: From mmc bindings: Register location and length.
>>>- clocks: From clock bindings: Handles to clock inputs.
>>>- clock-names: From clock bindings: Tuple including "clk_xin" and 
>>> "clk_ahb"
>>> @@ -18,7 +19,7 @@ Required Properties:
>>>
>>>  Example:
>>>   sdhci@e010 {
>>> - compatible = "arasan,sdhci-8.9a";
>>> + compatible = "arasan,sdhci-8.9a", "arasan,sdhci-4.9a";
>>
>> Is there any reason to change this example?
> 
> Thought that if dts is updated so why not update the binding too.

It is just about updating example. It is fine to update binding.

Thanks,
Michal
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