[PATCH V3 2/2] mm/pgtable/debug: Add test validating architecture page table helpers

2019-09-19 Thread Anshuman Khandual
This adds a test module which will validate architecture page table helpers
and accessors regarding compliance with generic MM semantics expectations.
This will help various architectures in validating changes to the existing
page table helpers or addition of new ones.

Test page table and memory pages creating it's entries at various level are
all allocated from system memory with required alignments. If memory pages
with required size and alignment could not be allocated, then all depending
individual tests are skipped.

Cc: Andrew Morton 
Cc: Vlastimil Babka 
Cc: Greg Kroah-Hartman 
Cc: Thomas Gleixner 
Cc: Mike Rapoport 
Cc: Jason Gunthorpe 
Cc: Dan Williams 
Cc: Peter Zijlstra 
Cc: Michal Hocko 
Cc: Mark Rutland 
Cc: Mark Brown 
Cc: Steven Price 
Cc: Ard Biesheuvel 
Cc: Masahiro Yamada 
Cc: Kees Cook 
Cc: Tetsuo Handa 
Cc: Matthew Wilcox 
Cc: Sri Krishna chowdary 
Cc: Dave Hansen 
Cc: Russell King - ARM Linux 
Cc: Michael Ellerman 
Cc: Paul Mackerras 
Cc: Martin Schwidefsky 
Cc: Heiko Carstens 
Cc: "David S. Miller" 
Cc: Vineet Gupta 
Cc: James Hogan 
Cc: Paul Burton 
Cc: Ralf Baechle 
Cc: Kirill A. Shutemov 
Cc: Gerald Schaefer 
Cc: Christophe Leroy 
Cc: linux-snps-...@lists.infradead.org
Cc: linux-m...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-i...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s...@vger.kernel.org
Cc: linux...@vger.kernel.org
Cc: sparcli...@vger.kernel.org
Cc: x...@kernel.org
Cc: linux-ker...@vger.kernel.org

Suggested-by: Catalin Marinas 
Signed-off-by: Christophe Leroy 
Tested-by: Christophe Leroy(PPC32)
Signed-off-by: Anshuman Khandual 
---
 arch/x86/include/asm/pgtable_64_types.h |   2 +
 mm/Kconfig.debug|  14 +
 mm/Makefile |   1 +
 mm/arch_pgtable_test.c  | 440 
 4 files changed, 457 insertions(+)
 create mode 100644 mm/arch_pgtable_test.c

diff --git a/arch/x86/include/asm/pgtable_64_types.h 
b/arch/x86/include/asm/pgtable_64_types.h
index 52e5f5f..b882792 100644
--- a/arch/x86/include/asm/pgtable_64_types.h
+++ b/arch/x86/include/asm/pgtable_64_types.h
@@ -40,6 +40,8 @@ static inline bool pgtable_l5_enabled(void)
 #define pgtable_l5_enabled() 0
 #endif /* CONFIG_X86_5LEVEL */
 
+#define mm_p4d_folded(mm) (!pgtable_l5_enabled())
+
 extern unsigned int pgdir_shift;
 extern unsigned int ptrs_per_p4d;
 
diff --git a/mm/Kconfig.debug b/mm/Kconfig.debug
index 327b3eb..ce9c397 100644
--- a/mm/Kconfig.debug
+++ b/mm/Kconfig.debug
@@ -117,3 +117,17 @@ config DEBUG_RODATA_TEST
 depends on STRICT_KERNEL_RWX
 ---help---
   This option enables a testcase for the setting rodata read-only.
+
+config DEBUG_ARCH_PGTABLE_TEST
+   bool "Test arch page table helpers for semantics compliance"
+   depends on MMU
+   depends on DEBUG_KERNEL
+   help
+ This options provides a kernel module which can be used to test
+ architecture page table helper functions on various platform in
+ verifying if they comply with expected generic MM semantics. This
+ will help architectures code in making sure that any changes or
+ new additions of these helpers will still conform to generic MM
+ expected semantics.
+
+ If unsure, say N.
diff --git a/mm/Makefile b/mm/Makefile
index d996846..bb572c5 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_HWPOISON_INJECT) += hwpoison-inject.o
 obj-$(CONFIG_DEBUG_KMEMLEAK) += kmemleak.o
 obj-$(CONFIG_DEBUG_KMEMLEAK_TEST) += kmemleak-test.o
 obj-$(CONFIG_DEBUG_RODATA_TEST) += rodata_test.o
+obj-$(CONFIG_DEBUG_ARCH_PGTABLE_TEST) += arch_pgtable_test.o
 obj-$(CONFIG_PAGE_OWNER) += page_owner.o
 obj-$(CONFIG_CLEANCACHE) += cleancache.o
 obj-$(CONFIG_MEMORY_ISOLATION) += page_isolation.o
diff --git a/mm/arch_pgtable_test.c b/mm/arch_pgtable_test.c
new file mode 100644
index 000..2942a04
--- /dev/null
+++ b/mm/arch_pgtable_test.c
@@ -0,0 +1,440 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * This kernel module validates architecture page table helpers &
+ * accessors and helps in verifying their continued compliance with
+ * generic MM semantics.
+ *
+ * Copyright (C) 2019 ARM Ltd.
+ *
+ * Author: Anshuman Khandual 
+ */
+#define pr_fmt(fmt) "arch_pgtable_test: %s " fmt, __func__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/*
+ * Basic operations
+ *
+ * mkold(entry)= An old and not a young entry
+ * mkyoung(entry)  = A young and not an old entry
+ * mkdirty(entry)  = A dirty and not a clean entry
+ * mkclean(entry)  = A clean and not a dirty entry
+ * mkwrite(entry)  = A write and not a write protected entry
+ * wrprotect(entry)= A write protected and not a write entry
+ * pxx_ba

[PATCH V3 0/2] mm/debug: Add tests for architecture exported page table helpers

2019-09-19 Thread Anshuman Khandual
This series adds a test validation for architecture exported page table
helpers. Patch in the series adds basic transformation tests at various
levels of the page table. Before that it exports gigantic page allocation
function from HugeTLB.

This test was originally suggested by Catalin during arm64 THP migration
RFC discussion earlier. Going forward it can include more specific tests
with respect to various generic MM functions like THP, HugeTLB etc and
platform specific tests.

https://lore.kernel.org/linux-mm/20190628102003.ga56...@arrakis.emea.arm.com/

Testing:

Successfully build and boot tested on both arm64 and x86 platforms without
any test failing. Only build tested on some other platforms. Build failed
on some platforms (known) in pud_clear_tests() as there were no available
__pgd() definitions.

- ARM32
- IA64

But I would really appreciate if folks can help validate this test on other
architectures and report back problems. All suggestions, comments and inputs
welcome. Thank you.

Changes in V3:

- Changed test trigger from module format into late_initcall()
- Marked all functions with __init to be freed after completion
- Changed all __PGTABLE_PXX_FOLDED checks as mm_pxx_folded()
- Folded in PPC32 fixes from Christophe

Changes in V2:

https://lore.kernel.org/linux-mm/1568268173-31302-1-git-send-email-anshuman.khand...@arm.com/T/#t

- Fixed small typo error in MODULE_DESCRIPTION()
- Fixed m64k build problems for lvalue concerns in pmd_xxx_tests()
- Fixed dynamic page table level folding problems on x86 as per Kirril
- Fixed second pointers during pxx_populate_tests() per Kirill and Gerald
- Allocate and free pte table with pte_alloc_one/pte_free per Kirill
- Modified pxx_clear_tests() to accommodate s390 lower 12 bits situation
- Changed RANDOM_NZVALUE value from 0xbe to 0xff
- Changed allocation, usage, free sequence for saved_ptep
- Renamed VMA_FLAGS as VMFLAGS
- Implemented a new method for random vaddr generation
- Implemented some other cleanups
- Dropped extern reference to mm_alloc()
- Created and exported new alloc_gigantic_page_order()
- Dropped the custom allocator and used new alloc_gigantic_page_order()

Changes in V1:

https://lore.kernel.org/linux-mm/1567497706-8649-1-git-send-email-anshuman.khand...@arm.com/

- Added fallback mechanism for PMD aligned memory allocation failure

Changes in RFC V2:

https://lore.kernel.org/linux-mm/1565335998-22553-1-git-send-email-anshuman.khand...@arm.com/T/#u

- Moved test module and it's config from lib/ to mm/
- Renamed config TEST_ARCH_PGTABLE as DEBUG_ARCH_PGTABLE_TEST
- Renamed file from test_arch_pgtable.c to arch_pgtable_test.c
- Added relevant MODULE_DESCRIPTION() and MODULE_AUTHOR() details
- Dropped loadable module config option
- Basic tests now use memory blocks with required size and alignment
- PUD aligned memory block gets allocated with alloc_contig_range()
- If PUD aligned memory could not be allocated it falls back on PMD aligned
  memory block from page allocator and pud_* tests are skipped
- Clear and populate tests now operate on real in memory page table entries
- Dummy mm_struct gets allocated with mm_alloc()
- Dummy page table entries get allocated with [pud|pmd|pte]_alloc_[map]()
- Simplified [p4d|pgd]_basic_tests(), now has random values in the entries

Original RFC V1:

https://lore.kernel.org/linux-mm/1564037723-26676-1-git-send-email-anshuman.khand...@arm.com/

Cc: Andrew Morton 
Cc: Vlastimil Babka 
Cc: Greg Kroah-Hartman 
Cc: Thomas Gleixner 
Cc: Mike Rapoport 
Cc: Jason Gunthorpe 
Cc: Dan Williams 
Cc: Peter Zijlstra 
Cc: Michal Hocko 
Cc: Mark Rutland 
Cc: Mark Brown 
Cc: Steven Price 
Cc: Ard Biesheuvel 
Cc: Masahiro Yamada 
Cc: Kees Cook 
Cc: Tetsuo Handa 
Cc: Matthew Wilcox 
Cc: Sri Krishna chowdary 
Cc: Dave Hansen 
Cc: Russell King - ARM Linux 
Cc: Michael Ellerman 
Cc: Paul Mackerras 
Cc: Martin Schwidefsky 
Cc: Heiko Carstens 
Cc: "David S. Miller" 
Cc: Vineet Gupta 
Cc: James Hogan 
Cc: Paul Burton 
Cc: Ralf Baechle 
Cc: Kirill A. Shutemov 
Cc: Gerald Schaefer 
Cc: Christophe Leroy 
Cc: Mike Kravetz 
Cc: linux-snps-...@lists.infradead.org
Cc: linux-m...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-i...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-s...@vger.kernel.org
Cc: linux...@vger.kernel.org
Cc: sparcli...@vger.kernel.org
Cc: x...@kernel.org
Cc: linux-ker...@vger.kernel.org

Anshuman Khandual (2):
  mm/hugetlb: Make alloc_gigantic_page() available for general use
  mm/pgtable/debug: Add test validating architecture page table helpers

 arch/x86/include/asm/pgtable_64_types.h |   2 +
 include/linux/hugetlb.h |   9 +
 mm/Kconfig.debug|  14 +
 mm/Makefile |   1 +
 mm/arch_pgtable_test.c  | 440 
 mm/hugetlb.c|  24 +-
 6 files changed, 488 insertions(+), 2 deletions(-)
 create mode 100644 mm/arch_pgtable_test.c

-- 
2.7.4



[PATCH 15/32] macintosh: Use pr_warn instead of pr_warning

2019-09-19 Thread Kefeng Wang
As said in commit f2c2cbcc35d4 ("powerpc: Use pr_warn instead of
pr_warning"), removing pr_warning so all logging messages use a
consistent _warn style. Let's do it.

Cc: Benjamin Herrenschmidt 
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Kefeng Wang 
---
 drivers/macintosh/windfarm_fcu_controls.c |  4 +---
 drivers/macintosh/windfarm_lm87_sensor.c  |  4 ++--
 drivers/macintosh/windfarm_pm72.c | 22 +++---
 drivers/macintosh/windfarm_rm31.c |  6 +++---
 4 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/drivers/macintosh/windfarm_fcu_controls.c 
b/drivers/macintosh/windfarm_fcu_controls.c
index 3c971297b6dc..67daeec94b44 100644
--- a/drivers/macintosh/windfarm_fcu_controls.c
+++ b/drivers/macintosh/windfarm_fcu_controls.c
@@ -468,9 +468,7 @@ static void wf_fcu_lookup_fans(struct wf_fcu_priv *pv)
else
id = ((*reg) - 0x30) / 2;
if (id > 7) {
-   pr_warning("wf_fcu: Can't parse "
-  "fan ID in device-tree for %pOF\n",
-  np);
+   pr_warn("wf_fcu: Can't parse fan ID in 
device-tree for %pOF\n", np);
break;
}
wf_fcu_add_fan(pv, name, type, id);
diff --git a/drivers/macintosh/windfarm_lm87_sensor.c 
b/drivers/macintosh/windfarm_lm87_sensor.c
index e44525b19071..b03a33b803b7 100644
--- a/drivers/macintosh/windfarm_lm87_sensor.c
+++ b/drivers/macintosh/windfarm_lm87_sensor.c
@@ -124,8 +124,8 @@ static int wf_lm87_probe(struct i2c_client *client,
}
}
if (!name) {
-   pr_warning("wf_lm87: Unsupported sensor %pOF\n",
-  client->dev.of_node);
+   pr_warn("wf_lm87: Unsupported sensor %pOF\n",
+   client->dev.of_node);
return -ENODEV;
}
 
diff --git a/drivers/macintosh/windfarm_pm72.c 
b/drivers/macintosh/windfarm_pm72.c
index c5da0fc24884..e81746b87cff 100644
--- a/drivers/macintosh/windfarm_pm72.c
+++ b/drivers/macintosh/windfarm_pm72.c
@@ -285,8 +285,8 @@ static void cpu_fans_tick_split(void)
/* Apply result directly to exhaust fan */
err = wf_control_set(cpu_rear_fans[cpu], sp->target);
if (err) {
-   pr_warning("wf_pm72: Fan %s reports error %d\n",
-  cpu_rear_fans[cpu]->name, err);
+   pr_warn("wf_pm72: Fan %s reports error %d\n",
+   cpu_rear_fans[cpu]->name, err);
failure_state |= FAILURE_FAN;
break;
}
@@ -296,8 +296,8 @@ static void cpu_fans_tick_split(void)
DBG_LOTS("  CPU%d: intake = %d RPM\n", cpu, intake);
err = wf_control_set(cpu_front_fans[cpu], intake);
if (err) {
-   pr_warning("wf_pm72: Fan %s reports error %d\n",
-  cpu_front_fans[cpu]->name, err);
+   pr_warn("wf_pm72: Fan %s reports error %d\n",
+   cpu_front_fans[cpu]->name, err);
failure_state |= FAILURE_FAN;
break;
}
@@ -367,22 +367,22 @@ static void cpu_fans_tick_combined(void)
for (cpu = 0; cpu < nr_chips; cpu++) {
err = wf_control_set(cpu_rear_fans[cpu], sp->target);
if (err) {
-   pr_warning("wf_pm72: Fan %s reports error %d\n",
-  cpu_rear_fans[cpu]->name, err);
+   pr_warn("wf_pm72: Fan %s reports error %d\n",
+   cpu_rear_fans[cpu]->name, err);
failure_state |= FAILURE_FAN;
}
err = wf_control_set(cpu_front_fans[cpu], intake);
if (err) {
-   pr_warning("wf_pm72: Fan %s reports error %d\n",
-  cpu_front_fans[cpu]->name, err);
+   pr_warn("wf_pm72: Fan %s reports error %d\n",
+   cpu_front_fans[cpu]->name, err);
failure_state |= FAILURE_FAN;
}
err = 0;
if (cpu_pumps[cpu])
err = wf_control_set(cpu_pumps[cpu], pump);
if (err) {
-   pr_warning("wf_pm72: Pump %s reports error %d\n",
-  cpu_pumps[cpu]->name, err);
+   pr_warn("wf_pm72: Pump %s reports error %d\n",
+   cpu_pumps[cpu]->name, err);
failure_state |= FAILURE_FAN;
}
}
@@ -561,7 +561,7 @@ static void drives_fan_tick(void)
 
err = wf_sensor_get(drives_tem

Re: [PATCH V2 2/2] mm/pgtable/debug: Add test validating architecture page table helpers

2019-09-19 Thread Anshuman Khandual



On 09/18/2019 11:52 PM, Gerald Schaefer wrote:
> On Wed, 18 Sep 2019 18:26:03 +0200
> Christophe Leroy  wrote:
> 
> [..] 
>> My suggestion was not to completely drop the #ifdef but to do like you 
>> did in pgd_clear_tests() for instance, ie to add the following test on 
>> top of the function:
>>
>>  if (mm_pud_folded(mm) || is_defined(__ARCH_HAS_5LEVEL_HACK))
>>  return;
>>
> 
> Ah, very nice, this would also fix the remaining issues for s390. Since
> we have dynamic page table folding, neither __PAGETABLE_PXX_FOLDED nor
> __ARCH_HAS_XLEVEL_HACK is defined, but mm_pxx_folded() will work.

Like Christophe mentioned earlier on the other thread, we will convert
all __PGTABLE_PXX_FOLDED checks as mm_pxx_folded() but looks like 
ARCH_HAS_[4 and 5]LEVEL_HACK macros will still be around. Will respin
the series with all agreed upon changes first and probably we can then
discuss pending issues from there.

> 
> mm_alloc() returns with a 3-level page table by default on s390, so we
> will run into issues in p4d_clear/populate_tests(), and also at the end
> with p4d/pud_free() (double free).
> 
> So, adding the mm_pud_folded() check to p4d_clear/populate_tests(),
> and also adding mm_p4d/pud_folded() checks at the end before calling> 
> p4d/pud_free(), would make it all work on s390.

Atleast p4d_clear/populate_tests() tests will be taken care.

> 
> BTW, regarding p4d/pud_free(), I'm not sure if we should rather check
> the folding inside our s390 functions, similar to how we do it for
> p4d/pud_free_tlb(), instead of relying on not being called for folded
> p4d/pud. So far, I see no problem with this behavior, all callers of
> p4d/pud_free() should be fine because of our folding check within
> p4d/pud_present/none(). But that doesn't mean that it is correct not
> to check for the folding inside p4d/pud_free(). At least, with this
> test module we do now have a caller of p4d/pud_free() on potentially
> folded entries, so instead of adding pxx_folded() checks to this
> test module, we could add them to our p4d/pud_free() functions.
> Any thoughts on this?
Agreed, it seems better to do the check inside p4d/pud_free() functions.


Re: [PATCH 1/1] powerpc: kvm: Reduce calls to get current->mm by storing the value locally

2019-09-19 Thread Leonardo Bras
Hello Paul, 
I sent this patch, but I have a question:

On Thu, 2019-09-19 at 19:27 -0300, Leonardo Bras wrote:
> Reduces the number of calls to get_current() in order to get the value of
> current->mm by doing it once and storing the value, since it is not
> supposed to change inside the same process).
> 
> Signed-off-by: Leonardo Bras 
> ---
>  arch/powerpc/kvm/book3s_64_mmu_hv.c | 11 ++-
>  1 file changed, 6 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c 
> b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> index 9a75f0e1933b..f2b9aea43216 100644
> --- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
> +++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> @@ -508,6 +508,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, 
> struct kvm_vcpu *vcpu,
>   struct vm_area_struct *vma;
>   unsigned long rcbits;
>   long mmio_update;
> + struct mm_struct *mm;
>  
>   if (kvm_is_radix(kvm))
>   return kvmppc_book3s_radix_page_fault(run, vcpu, ea, dsisr);
> @@ -584,6 +585,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, 
> struct kvm_vcpu *vcpu,
>   is_ci = false;
>   pfn = 0;
>   page = NULL;
> + mm = current->mm;

Here, current->mm is not always the same as kvm->mm? 

>   pte_size = PAGE_SIZE;
>   writing = (dsisr & DSISR_ISSTORE) != 0;
>   /* If writing != 0, then the HPTE must allow writing, if we get here */
> @@ -592,8 +594,8 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, 
> struct kvm_vcpu *vcpu,
>   npages = get_user_pages_fast(hva, 1, writing ? FOLL_WRITE : 0, pages);
>   if (npages < 1) {
>   /* Check if it's an I/O mapping */
> - down_read(¤t->mm->mmap_sem);
> - vma = find_vma(current->mm, hva);
> + down_read(&mm->mmap_sem);
> + vma = find_vma(mm, hva);
>   if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
>   (vma->vm_flags & VM_PFNMAP)) {
>   pfn = vma->vm_pgoff +
> @@ -602,7 +604,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, 
> struct kvm_vcpu *vcpu,
>   is_ci = pte_ci(__pte((pgprot_val(vma->vm_page_prot;
>   write_ok = vma->vm_flags & VM_WRITE;
>   }
> - up_read(¤t->mm->mmap_sem);
> + up_read(&mm->mmap_sem);
>   if (!pfn)
>   goto out_put;
>   } else {
> @@ -621,8 +623,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, 
> struct kvm_vcpu *vcpu,
>* hugepage split and collapse.
>*/
>   local_irq_save(flags);
> - ptep = find_current_mm_pte(current->mm->pgd,
> -hva, NULL, NULL);
> + ptep = find_current_mm_pte(mm->pgd, hva, NULL, NULL);
>   if (ptep) {
>   pte = kvmppc_read_update_linux_pte(ptep, 1);
>   if (__pte_write(pte))

Thanks !


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Re: [PATCH v2 1/1] powerpc/pseries/hotplug-memory.c: Change rc variable to bool

2019-09-19 Thread Leonardo Bras
Hello Michael,

Any feedback on this patch?

Best regards,


On Fri, 2019-08-02 at 15:45 +0200, David Hildenbrand wrote:
> On 02.08.19 15:39, Leonardo Bras wrote:
> > Changes the return variable to bool (as the return value) and
> > avoids doing a ternary operation before returning.
> > 
> > Signed-off-by: Leonardo Bras 
> > ---
> > Changes in v2:
> >   - Restore previous and-ing logic on rc.
> > 
> >  arch/powerpc/platforms/pseries/hotplug-memory.c | 6 +++---
> >  1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c 
> > b/arch/powerpc/platforms/pseries/hotplug-memory.c
> > index 8e700390f3d6..c126b94d1943 100644
> > --- a/arch/powerpc/platforms/pseries/hotplug-memory.c
> > +++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
> > @@ -338,7 +338,7 @@ static int pseries_remove_mem_node(struct device_node 
> > *np)
> >  static bool lmb_is_removable(struct drmem_lmb *lmb)
> >  {
> > int i, scns_per_block;
> > -   int rc = 1;
> > +   bool rc = true;
> > unsigned long pfn, block_sz;
> > u64 phys_addr;
> >  
> > @@ -363,11 +363,11 @@ static bool lmb_is_removable(struct drmem_lmb *lmb)
> > if (!pfn_present(pfn))
> > continue;
> >  
> > -   rc &= is_mem_section_removable(pfn, PAGES_PER_SECTION);
> > +   rc = rc && is_mem_section_removable(pfn, PAGES_PER_SECTION);
> > phys_addr += MIN_MEMORY_BLOCK_SIZE;
> > }
> >  
> > -   return rc ? true : false;
> > +   return rc;
> >  }
> >  
> >  static int dlpar_add_lmb(struct drmem_lmb *);
> > 
> 
> Yeah, why not
> 
> Reviewed-by: David Hildenbrand 
> 


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Re: [PATCH V3 2/4] ASoC: fsl_asrc: update supported sample format

2019-09-19 Thread Nicolin Chen
On Thu, Sep 19, 2019 at 08:11:40PM +0800, Shengjiu Wang wrote:
> The ASRC support 24bit/16bit/8bit input width, which is
> data width, not slot width.
> 
> For the S20_3LE format, the data with is 20bit, slot width
> is 24bit, if we set ASRMCR1n.IWD to be 24bits, the result
> is the volume is lower than expected, it likes 24bit data
> right shift 4 bits
> 
> So replace S20_3LE with S24_3LE in supported list and add S8
> format in TX supported list
> 
> Signed-off-by: Shengjiu Wang 

Acked-by: Nicolin Chen 

> ---
>  sound/soc/fsl/fsl_asrc.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
> index 4d3804a1ea55..584badf956d2 100644
> --- a/sound/soc/fsl/fsl_asrc.c
> +++ b/sound/soc/fsl/fsl_asrc.c
> @@ -624,7 +624,7 @@ static int fsl_asrc_dai_probe(struct snd_soc_dai *dai)
>  
>  #define FSL_ASRC_FORMATS (SNDRV_PCM_FMTBIT_S24_LE | \
>SNDRV_PCM_FMTBIT_S16_LE | \
> -  SNDRV_PCM_FMTBIT_S20_3LE)
> +  SNDRV_PCM_FMTBIT_S24_3LE)
>  
>  static struct snd_soc_dai_driver fsl_asrc_dai = {
>   .probe = fsl_asrc_dai_probe,
> @@ -635,7 +635,8 @@ static struct snd_soc_dai_driver fsl_asrc_dai = {
>   .rate_min = 5512,
>   .rate_max = 192000,
>   .rates = SNDRV_PCM_RATE_KNOT,
> - .formats = FSL_ASRC_FORMATS,
> + .formats = FSL_ASRC_FORMATS |
> +SNDRV_PCM_FMTBIT_S8,
>   },
>   .capture = {
>   .stream_name = "ASRC-Capture",
> -- 
> 2.21.0
> 


Re: [PATCH v5 05/12] powerpc/eeh: EEH for pSeries hot plug

2019-09-19 Thread Nathan Lynch
"Oliver O'Halloran"  writes:

> On Fri, Sep 20, 2019 at 6:28 AM Nathan Lynch  wrote:
>>
>> Hello Sam,
>>
>> Sam Bobroff  writes:
>>
>> With this change, I get a crash (use after free by the looks of it) when
>> I remove and then add a pci device in qemu:
>>
>> $ qemu-system-ppc64 -M pseries -append 'debug console=hvc0' \
>>   -nographic -vga none -m 1G,slots=32,maxmem=1024G -smp 2 \
>>   -kernel vmlinux -initrd ~/b/br/ppc64le-initramfs/images/rootfs.cpio \
>>   -nic model=e1000
>
> is there anything special in your kernel config? I tested this with
> pseries_le_defconfig and couldn't hit the crash.

My config is below; CONFIG_SLUB_DEBUG_ON=y probably makes the difference.

CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_AUDIT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_LOG_CPU_MAX_BUF_SHIFT=13
CONFIG_NUMA_BALANCING=y
CONFIG_CGROUPS=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_CGROUP_SCHED=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_BPF=y
CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="rootfs.cpio"
CONFIG_BPF_SYSCALL=y
# CONFIG_COMPAT_BRK is not set
CONFIG_PROFILING=y
CONFIG_PPC64=y
CONFIG_NR_CPUS=2048
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_PPC_SPLPAR=y
CONFIG_DTL=y
CONFIG_SCANLOG=y
CONFIG_PPC_SMLPAR=y
CONFIG_RTAS_FLASH=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
CONFIG_HZ_100=y
CONFIG_PPC_TRANSACTIONAL_MEM=y
CONFIG_KEXEC=y
CONFIG_KEXEC_FILE=y
CONFIG_IRQ_ALL_CPUS=y
CONFIG_PPC_64K_PAGES=y
CONFIG_PPC_SUBPAGE_PROT=y
CONFIG_SCHED_SMT=y
CONFIG_PM_DEBUG=y
CONFIG_VIRTUALIZATION=y
CONFIG_KVM_BOOK3S_64=y
CONFIG_KVM_BOOK3S_64_HV=y
CONFIG_VHOST_NET=y
CONFIG_OPROFILE=y
CONFIG_KPROBES=y
CONFIG_JUMP_LABEL=y
CONFIG_REFCOUNT_FULL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_BINFMT_MISC=y
CONFIG_MEMORY_HOTPLUG=y
CONFIG_MEMORY_HOTREMOVE=y
CONFIG_KSM=y
CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM_USER=y
CONFIG_NET_KEY=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_NET_IPIP=y
CONFIG_SYN_COOKIES=y
CONFIG_INET_AH=y
CONFIG_INET_ESP=y
CONFIG_INET_IPCOMP=y
# CONFIG_IPV6 is not set
CONFIG_NETFILTER=y
# CONFIG_NETFILTER_ADVANCED is not set
CONFIG_NF_CONNTRACK=y
CONFIG_NF_CONNTRACK_FTP=y
CONFIG_NF_CONNTRACK_IRC=y
CONFIG_NF_CONNTRACK_SIP=y
CONFIG_NF_CT_NETLINK=y
CONFIG_NETFILTER_XT_MARK=y
CONFIG_NETFILTER_XT_TARGET_LOG=y
CONFIG_NETFILTER_XT_TARGET_NFLOG=y
CONFIG_NETFILTER_XT_TARGET_TCPMSS=y
CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=y
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y
CONFIG_NETFILTER_XT_MATCH_POLICY=y
CONFIG_NETFILTER_XT_MATCH_STATE=y
CONFIG_NF_LOG_ARP=y
CONFIG_IP_NF_IPTABLES=y
CONFIG_IP_NF_FILTER=y
CONFIG_IP_NF_TARGET_REJECT=y
CONFIG_IP_NF_NAT=y
CONFIG_IP_NF_TARGET_MASQUERADE=y
CONFIG_IP_NF_MANGLE=y
CONFIG_BRIDGE=y
CONFIG_VLAN_8021Q=y
CONFIG_NET_SCHED=y
CONFIG_NET_CLS_BPF=y
CONFIG_NET_CLS_ACT=y
CONFIG_NET_ACT_BPF=y
CONFIG_BPF_JIT=y
CONFIG_HOTPLUG_PCI=y
CONFIG_HOTPLUG_PCI_RPA=y
CONFIG_HOTPLUG_PCI_RPA_DLPAR=y
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_OF_UNITTEST=y
CONFIG_PARPORT=y
CONFIG_PARPORT_PC=y
CONFIG_BLK_DEV_FD=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=65536
CONFIG_VIRTIO_BLK=y
CONFIG_CXL=y
CONFIG_OCXL=y
CONFIG_BLK_DEV_SD=y
CONFIG_CHR_DEV_ST=y
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=y
CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_FC_ATTRS=y
CONFIG_SCSI_CXGB3_ISCSI=y
CONFIG_SCSI_CXGB4_ISCSI=y
CONFIG_SCSI_BNX2_ISCSI=y
CONFIG_BE2ISCSI=y
CONFIG_CXLFLASH=y
CONFIG_SCSI_MPT2SAS=y
CONFIG_SCSI_IBMVSCSI=y
CONFIG_SCSI_IBMVFC=y
CONFIG_SCSI_SYM53C8XX_2=y
CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
CONFIG_SCSI_IPR=y
CONFIG_SCSI_QLA_FC=y
CONFIG_SCSI_QLA_ISCSI=y
CONFIG_SCSI_LPFC=y
CONFIG_SCSI_VIRTIO=y
CONFIG_SCSI_DH=y
CONFIG_SCSI_DH_RDAC=y
CONFIG_SCSI_DH_ALUA=y
CONFIG_ATA=y
CONFIG_SATA_AHCI=y
CONFIG_PATA_AMD=y
CONFIG_ATA_GENERIC=y
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
CONFIG_MD_RAID10=y
CONFIG_MD_RAID456=y
CONFIG_MD_MULTIPATH=y
CONFIG_MD_FAULTY=y
CONFIG_BLK_DEV_DM=y
CONFIG_DM_CRYPT=y
CONFIG_DM_SNAPSHOT=y
CONFIG_DM_THIN_PROVISIONING=y
CONFIG_DM_MIRROR=y
CONFIG_DM_ZERO=y
CONFIG_DM_MULTIPATH=y
CONFIG_DM_MULTIPATH_QL=y
CONFIG_DM_MULTIPATH_ST=y
CONFIG_DM_UEVENT=y
CONFIG_BONDING=y
CONFIG_DUMMY=y
CONFIG_MACVLAN=y
CONFIG_MACVTAP=y
CONFIG_VXLAN=y
CONFIG_NETCONSOLE=y
CONFIG_TUN=y
CONFIG_VETH=y
CONFIG_VIRTIO_NET=y
CONFIG_VORTEX=y
CONFIG_ACENIC=y
CONFIG_ACENIC_OMIT_TIGON_I=y
CONFIG_PCNET32=y
CONFIG_TIGON3=y
CONFIG_BNX2X=y
CONFIG_CHELSIO_T1=y
CONFIG_BE2NET=y
CONFIG_IBMVETH=y
CONFIG_E100=y
CONFIG_E1000=y
CONFIG_E1000E=y
CONFIG_IXGB=y
CONFIG_IXGBE=y
CONFIG_I40E=y
CONFIG_MLX4_EN=y
CONFIG_MYRI10GE=y
CONFIG_S2IO=y
CONFIG

Re: [PATCH v5 05/12] powerpc/eeh: EEH for pSeries hot plug

2019-09-19 Thread Oliver O'Halloran
On Fri, Sep 20, 2019 at 6:28 AM Nathan Lynch  wrote:
>
> Hello Sam,
>
> Sam Bobroff  writes:
>
> With this change, I get a crash (use after free by the looks of it) when
> I remove and then add a pci device in qemu:
>
> $ qemu-system-ppc64 -M pseries -append 'debug console=hvc0' \
>   -nographic -vga none -m 1G,slots=32,maxmem=1024G -smp 2 \
>   -kernel vmlinux -initrd ~/b/br/ppc64le-initramfs/images/rootfs.cpio \
>   -nic model=e1000

is there anything special in your kernel config? I tested this with
pseries_le_defconfig and couldn't hit the crash.

>
> ...
>
> # echo 1 > /sys/devices/pci:00/:00:00.0/remove ; \
>   echo 1 > /sys/devices/pci:00/pci_bus/:00/rescan
>
> pci :00:00.0: Removing from iommu group 0
> pci :00:00.0: [8086:100e] type 00 class 0x02
> pci :00:00.0: reg 0x10: [mem 0x20008000-0x20008001]
> pci :00:00.0: reg 0x14: [io  0x10040-0x1007f]
> pci :00:00.0: reg 0x30: [mem 0x20008004-0x20008007 pref]
> pci :00:00.0: Adding to iommu group 0
> pci :00:00.0: BAR 6: assigned [mem 0x20008000-0x20008003 pref]
> pci :00:00.0: BAR 0: assigned [mem 0x20008004-0x20008005]
> pci :00:00.0: BAR 1: assigned [io  0x1-0x1003f]
> e1000 :00:00.0 eth0: (PCI:33MHz:32-bit) 52:54:00:12:34:56
> e1000 :00:00.0 eth0: Intel(R) PRO/1000 Network Connection
> pci :00:00.0: Removing from iommu group 0
> pci :00:00.0: [8086:100e] type 00 class 0x02
> pci :00:00.0: reg 0x10: [mem 0x20008004-0x20008005]
> pci :00:00.0: reg 0x14: [io  0x1-0x1003f]
> pci :00:00.0: reg 0x30: [mem 0x20008004-0x20008007 pref]
> pci :00:00.0: BAR 6: assigned [mem 0x20008000-0x20008003 pref]
> pci :00:00.0: BAR 0: assigned [mem 0x20008004-0x20008005]
> pci :00:00.0: BAR 1: assigned [io  0x1-0x1003f]
> BUG: Unable to handle kernel data access at 0x6b6b6b6b6b6b6bfb
> Faulting instruction address: 0xc0597270
> Oops: Kernel access of bad area, sig: 11 [#1]
> LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries
> Modules linked in:
> CPU: 0 PID: 2464 Comm: pci-probe-vs-cp Not tainted 
> 5.3.0-rc2-00092-gf381d5711f09 #76
> NIP:  c0597270 LR: c0599470 CTR: c02030b0
> REGS: c0003ee4f650 TRAP: 0380   Not tainted  
> (5.3.0-rc2-00092-gf381d5711f09)
> MSR:  80009033   CR: 24002442  XER: 
> CFAR: c059946c IRQMASK: 0
> GPR00: c0599470 c0003ee4f8e0 c3317a00 6b6b6b6b6b6b6b6b
> GPR04: c1d0fa38   221a64979a66f870
> GPR08: c347b398  c336e070 
> GPR12: 2000 c406  
> GPR16: 100a78d8 7fffe9fdff96 100a7898 
> GPR20:  100e0ff0  100e0fe8
> GPR24:  01002ae50260 c1d0fa38 6b6b6b6b6b6b6b6b
> GPR28: fff2 c1d0fa38  c3118c18
> NIP [c0597270] kernfs_find_ns+0x50/0x3d0
> LR [c0599470] kernfs_remove_by_name_ns+0x60/0xe0
> Call Trace:
> [c0003ee4f8e0] [c020950c] lockdep_hardirqs_on+0x10c/0x210 
> (unreliable)
> [c0003ee4f970] [c0599470] kernfs_remove_by_name_ns+0x60/0xe0
> [c0003ee4fa00] [c059ca08] sysfs_remove_file_ns+0x28/0x40
> [c0003ee4fa20] [c0cbd70c] device_remove_file+0x2c/0x40
> [c0003ee4fa40] [c0051480] eeh_sysfs_remove_device+0x50/0xf0
> [c0003ee4fa80] [c004a594] eeh_add_device_late.part.7+0x84/0x220
> [c0003ee4fb00] [c00e94f0] pseries_pcibios_bus_add_device+0x60/0xb0
> [c0003ee4fb70] [c006fc40] pcibios_bus_add_device+0x40/0x60
> [c0003ee4fb90] [c0bc5220] pci_bus_add_device+0x30/0x100
> [c0003ee4fc00] [c0bc5344] pci_bus_add_devices+0x54/0xb0
> [c0003ee4fc40] [c0bca058] pci_rescan_bus+0x48/0x70
> [c0003ee4fc70] [c0bd9adc] dev_bus_rescan_store+0xcc/0x100
> [c0003ee4fcb0] [c0cbc9d8] dev_attr_store+0x38/0x60
> [c0003ee4fcd0] [c059c460] sysfs_kf_write+0x70/0xb0
> [c0003ee4fd10] [c059aa98] kernfs_fop_write+0xf8/0x280
> [c0003ee4fd60] [c04b3e5c] __vfs_write+0x3c/0x70
> [c0003ee4fd80] [c04b81f0] vfs_write+0xd0/0x220
> [c0003ee4fdd0] [c04b85ac] ksys_write+0x7c/0x140
> [c0003ee4fe20] [c000bc6c] system_call+0x5c/0x70
>
> FWIW during boot the EEH core reports:
>
>   EEH: No capable adapters found: recovery disabled.
>
> > diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
> > index ca8b0c58a6a7..87edac6f2fd9 100644
> > --- a/arch/powerpc/kernel/eeh.c
> > +++ b/arch/powerpc/kernel/eeh.c
> > @@ -1272,7 +1272,7 @@ void eeh_add_device_late(struct pci_dev *dev)
> >   struct pci_dn *pdn;
> >   struct eeh_dev *edev;
> >
> > - if (!dev || !eeh_enabled())
> > + if (!dev)
> > 

[PATCH] powerpc/pseries/hotplug-cpu: remove double free in error path

2019-09-19 Thread Nathan Lynch
In the unlikely event that the device tree lacks a /cpus node,
find_dlpar_cpus_to_add() oddly frees the cpu_drcs buffer it has been
passed before returning an error. Its only caller also frees the
buffer on error.

Remove the less conventional kfree() of a caller-supplied buffer from
find_dlpar_cpus_to_add().

Fixes: 90edf184b9b7 ("powerpc/pseries: Add CPU dlpar add functionality")
Signed-off-by: Nathan Lynch 
---
 arch/powerpc/platforms/pseries/hotplug-cpu.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c 
b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index bbda646b63b5..c743da343acb 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -726,7 +726,6 @@ static int find_dlpar_cpus_to_add(u32 *cpu_drcs, u32 
cpus_to_add)
parent = of_find_node_by_path("/cpus");
if (!parent) {
pr_warn("Could not find CPU root node in device tree\n");
-   kfree(cpu_drcs);
return -1;
}
 
-- 
2.20.1



[PATCH] powerpc/pseries: safely roll back failed DLPAR cpu add

2019-09-19 Thread Nathan Lynch
dlpar_online_cpu() attempts to online all threads of a core that has
been added to an LPAR. If onlining a non-primary thread
fails (e.g. due to an allocation failure), the core is left with at
least one thread online. dlpar_cpu_add() attempts to roll back the
whole operation, releasing the core back to the platform. However,
since some threads of the core being removed are still online, the
BUG_ON(cpu_online(cpu)) in pseries_remove_processor() strikes:

LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries
Modules linked in:
CPU: 3 PID: 8587 Comm: drmgr Not tainted 5.3.0-rc2-00190-g9b123d1ea237-dirty #46
NIP:  c00eeb2c LR: c00eeac4 CTR: c00ee9e0
REGS: c001f745b6c0 TRAP: 0700   Not tainted  
(5.3.0-rc2-00190-g9b123d1ea237-dirty)
MSR:  80010282b033   CR: 44002448  
XER: 
CFAR: c195d718 IRQMASK: 0
GPR00: c00eeac4 c001f745b950 c32f6200 0008
GPR04: 0008 c3349c78 0040 01ff
GPR08: 0008  0001 0007
GPR12: 84002844 c0001ecacb80  
GPR16:    
GPR20:    0008
GPR24: c3349ee0 c334a2e4 c000fca4d7a8 c1d20048
GPR28: 0001   c000fca4d7c4
NIP [c00eeb2c] pseries_smp_notifier+0x14c/0x2e0
LR [c00eeac4] pseries_smp_notifier+0xe4/0x2e0
Call Trace:
[c001f745b950] [c00eeac4] pseries_smp_notifier+0xe4/0x2e0 
(unreliable)
[c001f745ba10] [c01ac774] notifier_call_chain+0xb4/0x190
[c001f745bab0] [c01ad62c] blocking_notifier_call_chain+0x7c/0xb0
[c001f745baf0] [c167bda0] of_detach_node+0xc0/0x110
[c001f745bb50] [c00e7ae4] dlpar_detach_node+0x64/0xa0
[c001f745bb80] [c00edefc] dlpar_cpu_add+0x31c/0x360
[c001f745bc10] [c00ee980] dlpar_cpu_probe+0x50/0xb0
[c001f745bc50] [c002cf70] arch_cpu_probe+0x40/0x70
[c001f745bc70] [c0ccd808] cpu_probe_store+0x48/0x80
[c001f745bcb0] [c0cbcef8] dev_attr_store+0x38/0x60
[c001f745bcd0] [c059c980] sysfs_kf_write+0x70/0xb0
[c001f745bd10] [c059afb8] kernfs_fop_write+0xf8/0x280
[c001f745bd60] [c04b437c] __vfs_write+0x3c/0x70
[c001f745bd80] [c04b8710] vfs_write+0xd0/0x220
[c001f745bdd0] [c04b8acc] ksys_write+0x7c/0x140
[c001f745be20] [c000bbd8] system_call+0x5c/0x68

Move dlpar_offline_cpu() before dlpar_online_cpu() so the latter can
use the former to re-offline any threads it has onlined when it
encounters an error.

Signed-off-by: Nathan Lynch 
---
 arch/powerpc/platforms/pseries/hotplug-cpu.c | 118 ++-
 1 file changed, 60 insertions(+), 58 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c 
b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index bbda646b63b5..50e1a9b9b1d5 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -338,6 +338,63 @@ static void pseries_remove_processor(struct device_node 
*np)
cpu_maps_update_done();
 }
 
+static int dlpar_offline_cpu(struct device_node *dn)
+{
+   int rc = 0;
+   unsigned int cpu;
+   int len, nthreads, i;
+   const __be32 *intserv;
+   u32 thread;
+
+   intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", &len);
+   if (!intserv)
+   return -EINVAL;
+
+   nthreads = len / sizeof(u32);
+
+   cpu_maps_update_begin();
+   for (i = 0; i < nthreads; i++) {
+   thread = be32_to_cpu(intserv[i]);
+   for_each_present_cpu(cpu) {
+   if (get_hard_smp_processor_id(cpu) != thread)
+   continue;
+
+   if (get_cpu_current_state(cpu) == CPU_STATE_OFFLINE)
+   break;
+
+   if (get_cpu_current_state(cpu) == CPU_STATE_ONLINE) {
+   set_preferred_offline_state(cpu,
+   CPU_STATE_OFFLINE);
+   cpu_maps_update_done();
+   timed_topology_update(1);
+   rc = device_offline(get_cpu_device(cpu));
+   if (rc)
+   goto out;
+   cpu_maps_update_begin();
+   break;
+
+   }
+
+   /*
+* The cpu is in CPU_STATE_INACTIVE.
+* Upgrade it's state to CPU_STATE_OFFLINE.
+*/
+   set_preferred_offline_state(cpu, CPU_STATE_OFFLINE);
+   BUG_ON(plpar_hcall_norets

[PATCH 1/1] powerpc: kvm: Reduce calls to get current->mm by storing the value locally

2019-09-19 Thread Leonardo Bras
Reduces the number of calls to get_current() in order to get the value of
current->mm by doing it once and storing the value, since it is not
supposed to change inside the same process).

Signed-off-by: Leonardo Bras 
---
 arch/powerpc/kvm/book3s_64_mmu_hv.c | 11 ++-
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c 
b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index 9a75f0e1933b..f2b9aea43216 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -508,6 +508,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
struct vm_area_struct *vma;
unsigned long rcbits;
long mmio_update;
+   struct mm_struct *mm;
 
if (kvm_is_radix(kvm))
return kvmppc_book3s_radix_page_fault(run, vcpu, ea, dsisr);
@@ -584,6 +585,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
is_ci = false;
pfn = 0;
page = NULL;
+   mm = current->mm;
pte_size = PAGE_SIZE;
writing = (dsisr & DSISR_ISSTORE) != 0;
/* If writing != 0, then the HPTE must allow writing, if we get here */
@@ -592,8 +594,8 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
npages = get_user_pages_fast(hva, 1, writing ? FOLL_WRITE : 0, pages);
if (npages < 1) {
/* Check if it's an I/O mapping */
-   down_read(¤t->mm->mmap_sem);
-   vma = find_vma(current->mm, hva);
+   down_read(&mm->mmap_sem);
+   vma = find_vma(mm, hva);
if (vma && vma->vm_start <= hva && hva + psize <= vma->vm_end &&
(vma->vm_flags & VM_PFNMAP)) {
pfn = vma->vm_pgoff +
@@ -602,7 +604,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
is_ci = pte_ci(__pte((pgprot_val(vma->vm_page_prot;
write_ok = vma->vm_flags & VM_WRITE;
}
-   up_read(¤t->mm->mmap_sem);
+   up_read(&mm->mmap_sem);
if (!pfn)
goto out_put;
} else {
@@ -621,8 +623,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct 
kvm_vcpu *vcpu,
 * hugepage split and collapse.
 */
local_irq_save(flags);
-   ptep = find_current_mm_pte(current->mm->pgd,
-  hva, NULL, NULL);
+   ptep = find_current_mm_pte(mm->pgd, hva, NULL, NULL);
if (ptep) {
pte = kvmppc_read_update_linux_pte(ptep, 1);
if (__pte_write(pte))
-- 
2.20.1



Re: [PATCH v5 05/12] powerpc/eeh: EEH for pSeries hot plug

2019-09-19 Thread Nathan Lynch
Hello Sam,

Sam Bobroff  writes:
> On PowerNV and pSeries, devices currently acquire EEH support from
> several different places: Boot-time devices from eeh_probe_devices()
> and eeh_addr_cache_build(), Virtual Function devices from the pcibios
> bus add device hooks and hot plugged devices from pci_hp_add_devices()
> (with other platforms using other methods as well).  Unfortunately,
> pSeries machines currently discover hot plugged devices using
> pci_rescan_bus(), not pci_hp_add_devices(), and so those devices do
> not receive EEH support.
>
> Rather than adding another case for pci_rescan_bus(), this change
> widens the scope of the pcibios bus add device hooks so that they can
> handle all devices. As a side effect this also supports devices
> discovered after manually rescanning via /sys/bus/pci/rescan.
>
> Note that on PowerNV, this change allows the EEH subsystem to become
> enabled after boot as long as it has not been forced off, which was
> not previously possible (it was already possible on pSeries).

With this change, I get a crash (use after free by the looks of it) when
I remove and then add a pci device in qemu:

$ qemu-system-ppc64 -M pseries -append 'debug console=hvc0' \
  -nographic -vga none -m 1G,slots=32,maxmem=1024G -smp 2 \
  -kernel vmlinux -initrd ~/b/br/ppc64le-initramfs/images/rootfs.cpio \
  -nic model=e1000

...

# echo 1 > /sys/devices/pci:00/:00:00.0/remove ; \
  echo 1 > /sys/devices/pci:00/pci_bus/:00/rescan

pci :00:00.0: Removing from iommu group 0
pci :00:00.0: [8086:100e] type 00 class 0x02
pci :00:00.0: reg 0x10: [mem 0x20008000-0x20008001]
pci :00:00.0: reg 0x14: [io  0x10040-0x1007f]
pci :00:00.0: reg 0x30: [mem 0x20008004-0x20008007 pref]
pci :00:00.0: Adding to iommu group 0
pci :00:00.0: BAR 6: assigned [mem 0x20008000-0x20008003 pref]
pci :00:00.0: BAR 0: assigned [mem 0x20008004-0x20008005]
pci :00:00.0: BAR 1: assigned [io  0x1-0x1003f]
e1000 :00:00.0 eth0: (PCI:33MHz:32-bit) 52:54:00:12:34:56
e1000 :00:00.0 eth0: Intel(R) PRO/1000 Network Connection
pci :00:00.0: Removing from iommu group 0
pci :00:00.0: [8086:100e] type 00 class 0x02
pci :00:00.0: reg 0x10: [mem 0x20008004-0x20008005]
pci :00:00.0: reg 0x14: [io  0x1-0x1003f]
pci :00:00.0: reg 0x30: [mem 0x20008004-0x20008007 pref]
pci :00:00.0: BAR 6: assigned [mem 0x20008000-0x20008003 pref]
pci :00:00.0: BAR 0: assigned [mem 0x20008004-0x20008005]
pci :00:00.0: BAR 1: assigned [io  0x1-0x1003f]
BUG: Unable to handle kernel data access at 0x6b6b6b6b6b6b6bfb
Faulting instruction address: 0xc0597270
Oops: Kernel access of bad area, sig: 11 [#1]
LE PAGE_SIZE=64K MMU=Hash SMP NR_CPUS=2048 NUMA pSeries
Modules linked in:
CPU: 0 PID: 2464 Comm: pci-probe-vs-cp Not tainted 
5.3.0-rc2-00092-gf381d5711f09 #76
NIP:  c0597270 LR: c0599470 CTR: c02030b0
REGS: c0003ee4f650 TRAP: 0380   Not tainted  (5.3.0-rc2-00092-gf381d5711f09)
MSR:  80009033   CR: 24002442  XER: 
CFAR: c059946c IRQMASK: 0 
GPR00: c0599470 c0003ee4f8e0 c3317a00 6b6b6b6b6b6b6b6b 
GPR04: c1d0fa38   221a64979a66f870 
GPR08: c347b398  c336e070  
GPR12: 2000 c406   
GPR16: 100a78d8 7fffe9fdff96 100a7898  
GPR20:  100e0ff0  100e0fe8 
GPR24:  01002ae50260 c1d0fa38 6b6b6b6b6b6b6b6b 
GPR28: fff2 c1d0fa38  c3118c18 
NIP [c0597270] kernfs_find_ns+0x50/0x3d0
LR [c0599470] kernfs_remove_by_name_ns+0x60/0xe0
Call Trace:
[c0003ee4f8e0] [c020950c] lockdep_hardirqs_on+0x10c/0x210 
(unreliable)
[c0003ee4f970] [c0599470] kernfs_remove_by_name_ns+0x60/0xe0
[c0003ee4fa00] [c059ca08] sysfs_remove_file_ns+0x28/0x40
[c0003ee4fa20] [c0cbd70c] device_remove_file+0x2c/0x40
[c0003ee4fa40] [c0051480] eeh_sysfs_remove_device+0x50/0xf0
[c0003ee4fa80] [c004a594] eeh_add_device_late.part.7+0x84/0x220
[c0003ee4fb00] [c00e94f0] pseries_pcibios_bus_add_device+0x60/0xb0
[c0003ee4fb70] [c006fc40] pcibios_bus_add_device+0x40/0x60
[c0003ee4fb90] [c0bc5220] pci_bus_add_device+0x30/0x100
[c0003ee4fc00] [c0bc5344] pci_bus_add_devices+0x54/0xb0
[c0003ee4fc40] [c0bca058] pci_rescan_bus+0x48/0x70
[c0003ee4fc70] [c0bd9adc] dev_bus_rescan_store+0xcc/0x100
[c0003ee4fcb0] [c0cbc9d8] dev_attr_store+0x38/0x60
[c0003ee4fcd0] [c059c460] sysfs_kf_write+0x70/0xb0
[c0003ee4fd10] [c059aa98] kernfs_fop_write+0xf8/0x280
[c0003ee4fd60] [c04b3e5c] __vfs_write+0

Re: [PATCH v3 2/2] powerpc/irq: inline call_do_irq() and call_do_softirq()

2019-09-19 Thread Segher Boessenkool
On Thu, Sep 19, 2019 at 07:23:18AM +0200, Christophe Leroy wrote:
> Le 18/09/2019 à 18:39, Segher Boessenkool a écrit :
> >I realise the original code had this...  Loading the old stack pointer
> >value back from the stack creates a bottleneck (via the store->load
> >forwarding it requires).  It could just use
> >   addi 1,1,-(%2)
> >here, which can also be written as
> >   addi 1,1,%n2
> >(that is portable to all architectures btw).
> 
> No, we switched stack before the bl call, we replaced r1 by r3 after 
> saving r1 into r3 stack. Now we have to restore the original r1.

Yeah wow, I missed that once again.  Whoops.

Add a comment for this?  Just before the asm maybe, "we temporarily switch
r1 to a different stack" or something.

> >What about r2?  Various ABIs handle that differently.  This might make
> >it impossible to share implementation between 32-bit and 64-bit for this.
> >But we could add it to the clobber list worst case, that will always work.
> 
> Isn't r2 non-volatile on all ABIs ?

It is not.  On ELFv2 it is (or will be) optionally volatile, but like on
ELFv1 it already has special rules as well: the linker is responsible for
restoring it if it is non-volatile, and for that there needs to be a nop
after the bl, etc.

But the existing code was in a similar situation and we survived that, I
think we should be fine this way too.  And it won't be too hard to change
again if needed.

> >So anyway, it looks to me like it will work.  Nice cleanup.  Would be
> >better if you could do the call to __do_irq from C code, but maybe we
> >cannot have everything ;-)
> 
> sparc do it the following way, is there no risk that GCC adds unwanted 
> code inbetween that is not aware there the stack pointer has changed ?
> 
> void do_softirq_own_stack(void)
> {
>   void *orig_sp, *sp = softirq_stack[smp_processor_id()];
> 
>   sp += THREAD_SIZE - 192 - STACK_BIAS;
> 
>   __asm__ __volatile__("mov %%sp, %0\n\t"
>"mov %1, %%sp"
>: "=&r" (orig_sp)
>: "r" (sp));
>   __do_softirq();
>   __asm__ __volatile__("mov %0, %%sp"
>: : "r" (orig_sp));
> }
> 
> If the above is no risk, then can we do the same on powerpc ?

No, that is a quite bad idea: it depends on the stack pointer not being
used in any way between the two asms.  Which this code does not guarantee
(what if it is inlined, for example).

Doing the stack juggling and the actual call in a single asm is much more
safe and correct.  It's just that you then need asm for the actual call
that works for all ABIs you support, etc. :-)


Segher


Re: [PATCH v2 1/2] powperc/mm: read TLB Block Invalidate Characteristics

2019-09-19 Thread Laurent Dufour

Le 18/09/2019 à 15:42, Michael Ellerman a écrit :

Hi Laurent,

Comments below ...


Hi Michael,

Thanks for your review.

One comment below (at the end).



Laurent Dufour  writes:

The PAPR document specifies the TLB Block Invalidate Characteristics which
tells for each couple segment base page size, actual page size, the size of

  ^
  "pair of" again


the block the hcall H_BLOCK_REMOVE is supporting.

  ^
  "supports" is fine.


These characteristics are loaded at boot time in a new table hblkr_size.
The table is appart the mmu_psize_def because this is specific to the

^
"separate from"


pseries architecture.

   ^
   platform


A new init service, pseries_lpar_read_hblkr_characteristics() is added to

  ^
  function


read the characteristics. In that function, the size of the buffer is set
to twice the number of known page size, plus 10 bytes to ensure we have
enough place. This new init function is called from pSeries_setup_arch().

  ^
  space


Signed-off-by: Laurent Dufour 
---
  .../include/asm/book3s/64/tlbflush-hash.h |   1 +
  arch/powerpc/platforms/pseries/lpar.c | 138 ++
  arch/powerpc/platforms/pseries/setup.c|   1 +
  3 files changed, 140 insertions(+)

diff --git a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h 
b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
index 64d02a704bcb..74155cc8cf89 100644
--- a/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/tlbflush-hash.h
@@ -117,4 +117,5 @@ extern void __flush_hash_table_range(struct mm_struct *mm, 
unsigned long start,
 unsigned long end);
  extern void flush_tlb_pmd_range(struct mm_struct *mm, pmd_t *pmd,
unsigned long addr);
+extern void pseries_lpar_read_hblkr_characteristics(void);


This doesn't need "extern", and also should go in
arch/powerpc/platforms/pseries/pseries.h as it's local to that directory.

You're using "hblkr" in a few places, can we instead make it "hblkrm" -
"rm" is a well known abbreviation for "remove".



diff --git a/arch/powerpc/platforms/pseries/lpar.c 
b/arch/powerpc/platforms/pseries/lpar.c
index 36b846f6e74e..98a5c2ff9a0b 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -56,6 +56,15 @@ EXPORT_SYMBOL(plpar_hcall);
  EXPORT_SYMBOL(plpar_hcall9);
  EXPORT_SYMBOL(plpar_hcall_norets);
  
+/*

+ * H_BLOCK_REMOVE supported block size for this page size in segment who's base
+ * page size is that page size.
+ *
+ * The first index is the segment base page size, the second one is the actual
+ * page size.
+ */
+static int hblkr_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT];


Can you make that __ro_after_init, it goes at the end, eg:

static int hblkr_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT] __ro_after_init;


@@ -1311,6 +1320,135 @@ static void do_block_remove(unsigned long number, 
struct ppc64_tlb_batch *batch,
(void)call_block_remove(pix, param, true);
  }
  
+/*

+ * TLB Block Invalidate Characteristics These characteristics define the size 
of

^
newline before here?


+ * the block the hcall H_BLOCK_REMOVE is able to process for each couple 
segment
+ * base page size, actual page size.
+ *
+ * The ibm,get-system-parameter properties is returning a buffer with the
+ * following layout:
+ *
+ * [ 2 bytes size of the RTAS buffer (without these 2 bytes) ]

  ^
  "excluding"


+ * -
+ * TLB Block Invalidate Specifiers:
+ * [ 1 byte LOG base 2 of the TLB invalidate block size being specified ]
+ * [ 1 byte Number of page sizes (N) that are supported for the specified
+ *  TLB invalidate block size ]
+ * [ 1 byte Encoded segment base page size and actual page size
+ *  MSB=0 means 4k segment base page size and actual page size
+ *  MSB=1 the penc value in mmu_psize_def ]
+ * ...
+ * -
+ * Next TLB Block Invalidate Specifiers...
+ * -
+ * [ 0 ]
+ */
+static inline void __init set_hblk_bloc_size(int bpsize, int psize,
+unsigned int block_size)


"static inline" and __init are sort of contradictory.

Just make it "static void __init" and the compiler will inline it
anyway, but if it decides not to the section will be correct.

This one uses "hblk"? Should it be set_hblkrm_block_size() ?


+{
+   if (block_size > hblkr_size[bpsize][psize])
+   hblkr_size[bpsize][psize] = block_size;
+}
+
+/*
+ * Decode the Encoded segment base page size and actual page size.
+ * PAPR specifies with bit 0 as MSB:
+ *   - bit 0 is the L bit
+ *   -

Re: [PATCH v2 2/2] powerpc/mm: call H_BLOCK_REMOVE when supported

2019-09-19 Thread Laurent Dufour

Le 18/09/2019 à 15:42, Michael Ellerman a écrit :

Hi Laurent,

Few comments ...


Hi Michael,

Thanks for the review and the nitpicking ;)


Laurent Dufour  writes:

Now we do not call _BLOCK_REMOVE all the time when the feature is
exhibited.


This isn't true until after the patch is applied, ie. the tense is
wrong. The rest of the change log explains things fine, so just drop
that sentence I think.

Can you include the info about the oops in here.


Depending on the hardware and the hypervisor, the hcall H_BLOCK_REMOVE may
not be able to process all the page size for a segment base page size, as

   ^
   sizes

reported by the TLB Invalidate Characteristics.o

  ^
  stray "o"


For each couple base segment page size and actual page size, this

^
"pair of"

characteristic is telling the size of the block the hcall is supporting.

  ^  ^
  "tells us" supports


Due to the involve complexity in do_block_remove() and call_block_remove(),

  ^
  "required" is better I think

and the fact currently a 8 size block is returned by the hypervisor,  we

   ^  ^
   that   "block of size 8"

are only supporting 8 size block to the H_BLOCK_REMOVE hcall.

Furthermore a warning message is displayed at boot time in the case of an
unsupported block size.


I'm not sure we should be doing that? It could be unnecessarily spammy.


In order to identify this limitation easily in the code,a local define
HBLKR_SUPPORTED_SIZE defining the currently supported block size, and a
dedicated checking helper is_supported_hlbkr() are introduced.

For regular pages and hugetlb, the assumption is made that the page size is
equal to the base page size. For THP the page size is assumed to be 16M.

Signed-off-by: Laurent Dufour 
---
  arch/powerpc/platforms/pseries/lpar.c | 35 +--
  1 file changed, 33 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/lpar.c 
b/arch/powerpc/platforms/pseries/lpar.c
index 98a5c2ff9a0b..e2ad9b3b1097 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -65,6 +65,13 @@ EXPORT_SYMBOL(plpar_hcall_norets);
   */
  static int hblkr_size[MMU_PAGE_COUNT][MMU_PAGE_COUNT];
  
+/*

+ * Due to the involved complexity, and that the current hypervisor is only
+ * returning this value or 0, we are limiting the support of the H_BLOCK_REMOVE
+ * buffer size to 8 size block.
+ */
+#define HBLKR_SUPPORTED_BLOCK_SIZE 8
+
  #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  static u8 dtl_mask = DTL_LOG_PREEMPT;
  #else
@@ -993,6 +1000,15 @@ static void pSeries_lpar_hpte_invalidate(unsigned long 
slot, unsigned long vpn,
  #define HBLKR_CTRL_ERRNOTFOUND0x8800UL
  #define HBLKR_CTRL_ERRBUSY0xa000UL
  
+/*

+ * Returned true if we are supporting this block size for the specified segment
+ * base page size and actual page size.
+ */
+static inline bool is_supported_hlbkr(int bpsize, int psize)
+{
+   return (hblkr_size[bpsize][psize] == HBLKR_SUPPORTED_BLOCK_SIZE);
+}
+
  /**
   * H_BLOCK_REMOVE caller.
   * @idx should point to the latest @param entry set with a PTEX.
@@ -1152,7 +1168,11 @@ static inline void 
__pSeries_lpar_hugepage_invalidate(unsigned long *slot,
if (lock_tlbie)
spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
  
-	if (firmware_has_feature(FW_FEATURE_BLOCK_REMOVE))

+   /*
+* Assuming THP size is 16M, and we only support 8 bytes size buffer
+* for the momment.
+*/
+   if (is_supported_hlbkr(psize, MMU_PAGE_16M))


It's not very clear that this is correct in all cases. ie. how do we
know we're being called for THP and not regular huge page?

I think we're only called via:
   flush_hash_hugepage()
   -> mmu_hash_ops.hugepage_invalidate()
  pSeries_lpar_hugepage_invalidate()
  -> __pSeries_lpar_hugepage_invalidate()

And flush_hash_hugepage() is called via:
   __hash_page_thp()
   and
   hpte_do_hugepage_flush()

The first is presumably fine, the 2nd is called in a few places:
   __flush_hash_table_range() under if (is_thp)
   hash__pmd_hugepage_update()


But it's a little bit fragile if the code ever evolves. Not sure if
there's a better solution, other than just documenting it.


Indeed __pSeries_lpar_hugepage_invalidate() can only be called for THP.
flush_hash_hugepage() and hpte_do_hugepage_flush() are only defined (or 
valid) with CONFIG_TRANSPARENT_HUGEPAGE.


As Aneesh remind me, "hugepage" stands for THP.




hugepage_block_invalidate(slot, vpn, count, psize, ssize);
else
hugepage_bulk_invalidate(slot, vpn, count, psize, ssize);
@

[PATCH V3 3/4] ASoC: pcm_dmaengine: Extract snd_dmaengine_pcm_refine_runtime_hwparams

2019-09-19 Thread Shengjiu Wang
When set the runtime hardware parameters, we may need to query
the capability of DMA to complete the parameters.

This patch is to Extract this operation from
dmaengine_pcm_set_runtime_hwparams function to a separate function
snd_dmaengine_pcm_refine_runtime_hwparams, that other components
which need this feature can call this function.

Signed-off-by: Shengjiu Wang 
---
 include/sound/dmaengine_pcm.h |  5 ++
 sound/core/pcm_dmaengine.c| 83 +++
 sound/soc/soc-generic-dmaengine-pcm.c | 62 +++-
 3 files changed, 95 insertions(+), 55 deletions(-)

diff --git a/include/sound/dmaengine_pcm.h b/include/sound/dmaengine_pcm.h
index c679f6116580..b65220685920 100644
--- a/include/sound/dmaengine_pcm.h
+++ b/include/sound/dmaengine_pcm.h
@@ -83,6 +83,11 @@ void snd_dmaengine_pcm_set_config_from_dai_data(
const struct snd_dmaengine_dai_dma_data *dma_data,
struct dma_slave_config *config);
 
+int snd_dmaengine_pcm_refine_runtime_hwparams(
+   struct snd_pcm_substream *substream,
+   struct snd_dmaengine_dai_dma_data *dma_data,
+   struct snd_pcm_hardware *hw,
+   struct dma_chan *chan);
 
 /*
  * Try to request the DMA channel using compat_request_channel or
diff --git a/sound/core/pcm_dmaengine.c b/sound/core/pcm_dmaengine.c
index 89a05926ac73..5749a8a49784 100644
--- a/sound/core/pcm_dmaengine.c
+++ b/sound/core/pcm_dmaengine.c
@@ -369,4 +369,87 @@ int snd_dmaengine_pcm_close_release_chan(struct 
snd_pcm_substream *substream)
 }
 EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_close_release_chan);
 
+/**
+ * snd_dmaengine_pcm_refine_runtime_hwparams - Refine runtime hw params
+ * @substream: PCM substream
+ * @dma_data: DAI DMA data
+ * @hw: PCM hw params
+ * @chan: DMA channel to use for data transfers
+ *
+ * Returns 0 on success, a negative error code otherwise.
+ *
+ * This function will query DMA capability, then refine the pcm hardware
+ * parameters.
+ */
+int snd_dmaengine_pcm_refine_runtime_hwparams(
+   struct snd_pcm_substream *substream,
+   struct snd_dmaengine_dai_dma_data *dma_data,
+   struct snd_pcm_hardware *hw,
+   struct dma_chan *chan)
+{
+   struct dma_slave_caps dma_caps;
+   u32 addr_widths = BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) |
+ BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) |
+ BIT(DMA_SLAVE_BUSWIDTH_4_BYTES);
+   snd_pcm_format_t i;
+   int ret = 0;
+
+   if (!hw || !chan || !dma_data)
+   return -EINVAL;
+
+   ret = dma_get_slave_caps(chan, &dma_caps);
+   if (ret == 0) {
+   if (dma_caps.cmd_pause && dma_caps.cmd_resume)
+   hw->info |= SNDRV_PCM_INFO_PAUSE | 
SNDRV_PCM_INFO_RESUME;
+   if (dma_caps.residue_granularity <= 
DMA_RESIDUE_GRANULARITY_SEGMENT)
+   hw->info |= SNDRV_PCM_INFO_BATCH;
+
+   if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+   addr_widths = dma_caps.dst_addr_widths;
+   else
+   addr_widths = dma_caps.src_addr_widths;
+   }
+
+   /*
+* If SND_DMAENGINE_PCM_DAI_FLAG_PACK is set keep
+* hw.formats set to 0, meaning no restrictions are in place.
+* In this case it's the responsibility of the DAI driver to
+* provide the supported format information.
+*/
+   if (!(dma_data->flags & SND_DMAENGINE_PCM_DAI_FLAG_PACK))
+   /*
+* Prepare formats mask for valid/allowed sample types. If the
+* dma does not have support for the given physical word size,
+* it needs to be masked out so user space can not use the
+* format which produces corrupted audio.
+* In case the dma driver does not implement the slave_caps the
+* default assumption is that it supports 1, 2 and 4 bytes
+* widths.
+*/
+   for (i = SNDRV_PCM_FORMAT_FIRST; i <= SNDRV_PCM_FORMAT_LAST; 
i++) {
+   int bits = snd_pcm_format_physical_width(i);
+
+   /*
+* Enable only samples with DMA supported physical
+* widths
+*/
+   switch (bits) {
+   case 8:
+   case 16:
+   case 24:
+   case 32:
+   case 64:
+   if (addr_widths & (1 << (bits / 8)))
+   hw->formats |= pcm_format_to_bits(i);
+   break;
+   default:
+   /* Unsupported types */
+   break;
+   }
+   }
+
+   return ret;
+}
+EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_refine_runtime_hwparams);
+
 MODULE_LICENSE("GPL");
diff --git a/sound/soc/soc-gener

[PATCH V3 1/4] ASoC: fsl_asrc: Use in(out)put_format instead of in(out)put_word_width

2019-09-19 Thread Shengjiu Wang
snd_pcm_format_t is more formal than enum asrc_word_width, which has
two property, width and physical width, which is more accurate than
enum asrc_word_width. So it is better to use in(out)put_format
instead of in(out)put_word_width.

Signed-off-by: Shengjiu Wang 
Acked-by: Nicolin Chen 
---
 sound/soc/fsl/fsl_asrc.c | 56 +++-
 sound/soc/fsl/fsl_asrc.h |  4 +--
 2 files changed, 40 insertions(+), 20 deletions(-)

diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index cfa40ef6b1ca..4d3804a1ea55 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -265,6 +265,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
struct asrc_config *config = pair->config;
struct fsl_asrc *asrc_priv = pair->asrc_priv;
enum asrc_pair_index index = pair->index;
+   enum asrc_word_width input_word_width;
+   enum asrc_word_width output_word_width;
u32 inrate, outrate, indiv, outdiv;
u32 clk_index[2], div[2];
int in, out, channels;
@@ -283,9 +285,32 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
return -EINVAL;
}
 
-   /* Validate output width */
-   if (config->output_word_width == ASRC_WIDTH_8_BIT) {
-   pair_err("does not support 8bit width output\n");
+   switch (snd_pcm_format_width(config->input_format)) {
+   case 8:
+   input_word_width = ASRC_WIDTH_8_BIT;
+   break;
+   case 16:
+   input_word_width = ASRC_WIDTH_16_BIT;
+   break;
+   case 24:
+   input_word_width = ASRC_WIDTH_24_BIT;
+   break;
+   default:
+   pair_err("does not support this input format, %d\n",
+config->input_format);
+   return -EINVAL;
+   }
+
+   switch (snd_pcm_format_width(config->output_format)) {
+   case 16:
+   output_word_width = ASRC_WIDTH_16_BIT;
+   break;
+   case 24:
+   output_word_width = ASRC_WIDTH_24_BIT;
+   break;
+   default:
+   pair_err("does not support this output format, %d\n",
+config->output_format);
return -EINVAL;
}
 
@@ -383,8 +408,8 @@ static int fsl_asrc_config_pair(struct fsl_asrc_pair *pair)
/* Implement word_width configurations */
regmap_update_bits(asrc_priv->regmap, REG_ASRMCR1(index),
   ASRMCR1i_OW16_MASK | ASRMCR1i_IWD_MASK,
-  ASRMCR1i_OW16(config->output_word_width) |
-  ASRMCR1i_IWD(config->input_word_width));
+  ASRMCR1i_OW16(output_word_width) |
+  ASRMCR1i_IWD(input_word_width));
 
/* Enable BUFFER STALL */
regmap_update_bits(asrc_priv->regmap, REG_ASRMCR(index),
@@ -497,13 +522,13 @@ static int fsl_asrc_dai_hw_params(struct 
snd_pcm_substream *substream,
  struct snd_soc_dai *dai)
 {
struct fsl_asrc *asrc_priv = snd_soc_dai_get_drvdata(dai);
-   int width = params_width(params);
struct snd_pcm_runtime *runtime = substream->runtime;
struct fsl_asrc_pair *pair = runtime->private_data;
unsigned int channels = params_channels(params);
unsigned int rate = params_rate(params);
struct asrc_config config;
-   int word_width, ret;
+   snd_pcm_format_t format;
+   int ret;
 
ret = fsl_asrc_request_pair(channels, pair);
if (ret) {
@@ -513,15 +538,10 @@ static int fsl_asrc_dai_hw_params(struct 
snd_pcm_substream *substream,
 
pair->config = &config;
 
-   if (width == 16)
-   width = ASRC_WIDTH_16_BIT;
-   else
-   width = ASRC_WIDTH_24_BIT;
-
if (asrc_priv->asrc_width == 16)
-   word_width = ASRC_WIDTH_16_BIT;
+   format = SNDRV_PCM_FORMAT_S16_LE;
else
-   word_width = ASRC_WIDTH_24_BIT;
+   format = SNDRV_PCM_FORMAT_S24_LE;
 
config.pair = pair->index;
config.channel_num = channels;
@@ -529,13 +549,13 @@ static int fsl_asrc_dai_hw_params(struct 
snd_pcm_substream *substream,
config.outclk = OUTCLK_ASRCK1_CLK;
 
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
-   config.input_word_width   = width;
-   config.output_word_width  = word_width;
+   config.input_format   = params_format(params);
+   config.output_format  = format;
config.input_sample_rate  = rate;
config.output_sample_rate = asrc_priv->asrc_rate;
} else {
-   config.input_word_width   = word_width;
-   config.output_word_width  = width;
+   config.input_format   = format;
+   config.output_format  = params_format(params);
config.input_sample_rate  

[PATCH V3 0/4] update supported sample format

2019-09-19 Thread Shengjiu Wang
This patch serial is to update the supported format for fsl_asrc
and fix some format issue.

Shengjiu Wang (4):
  ASoC: fsl_asrc: Use in(out)put_format instead of in(out)put_word_width
  ASoC: fsl_asrc: update supported sample format
  ASoC: pcm_dmaengine: Extract snd_dmaengine_pcm_refine_runtime_hwparams
  ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8

changes in v2
- extract snd_dmaengine_pcm_set_runtime_hwparams in one
  separate path.
- 4th patch depends on 3rd patch

changes in v3
- Fix build report by kbuild test robot 
- change snd_dmaengine_pcm_set_runtime_hwparams to
  snd_dmaengine_pcm_refine_runtime_hwparams

 include/sound/dmaengine_pcm.h |  5 ++
 sound/core/pcm_dmaengine.c| 83 +++
 sound/soc/fsl/fsl_asrc.c  | 65 ++---
 sound/soc/fsl/fsl_asrc.h  |  7 ++-
 sound/soc/fsl/fsl_asrc_dma.c  | 52 ++---
 sound/soc/soc-generic-dmaengine-pcm.c | 62 +++-
 6 files changed, 188 insertions(+), 86 deletions(-)

-- 
2.21.0



[PATCH V3 4/4] ASoC: fsl_asrc: Fix error with S24_3LE format bitstream in i.MX8

2019-09-19 Thread Shengjiu Wang
There is error "aplay: pcm_write:2023: write error: Input/output error"
on i.MX8QM/i.MX8QXP platform for S24_3LE format.

In i.MX8QM/i.MX8QXP, the DMA is EDMA, which don't support 24bit
sample, but we didn't add any constraint, that cause issues.

So we need to query the caps of dma, then update the hw parameters
according to the caps.

Signed-off-by: Shengjiu Wang 
---
 sound/soc/fsl/fsl_asrc.c |  4 +--
 sound/soc/fsl/fsl_asrc.h |  3 +++
 sound/soc/fsl/fsl_asrc_dma.c | 52 +++-
 3 files changed, 50 insertions(+), 9 deletions(-)

diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 584badf956d2..0bf91a6f54b9 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -115,7 +115,7 @@ static void fsl_asrc_sel_proc(int inrate, int outrate,
  * within range [ANCA, ANCA+ANCB-1], depends on the channels of pair A
  * while pair A and pair C are comparatively independent.
  */
-static int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
+int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair)
 {
enum asrc_pair_index index = ASRC_INVALID_PAIR;
struct fsl_asrc *asrc_priv = pair->asrc_priv;
@@ -158,7 +158,7 @@ static int fsl_asrc_request_pair(int channels, struct 
fsl_asrc_pair *pair)
  *
  * It clears the resource from asrc_priv and releases the occupied channels.
  */
-static void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
+void fsl_asrc_release_pair(struct fsl_asrc_pair *pair)
 {
struct fsl_asrc *asrc_priv = pair->asrc_priv;
enum asrc_pair_index index = pair->index;
diff --git a/sound/soc/fsl/fsl_asrc.h b/sound/soc/fsl/fsl_asrc.h
index 38af485bdd22..2b57e8c53728 100644
--- a/sound/soc/fsl/fsl_asrc.h
+++ b/sound/soc/fsl/fsl_asrc.h
@@ -462,4 +462,7 @@ struct fsl_asrc {
 #define DRV_NAME "fsl-asrc-dai"
 extern struct snd_soc_component_driver fsl_asrc_component;
 struct dma_chan *fsl_asrc_get_dma_channel(struct fsl_asrc_pair *pair, bool 
dir);
+int fsl_asrc_request_pair(int channels, struct fsl_asrc_pair *pair);
+void fsl_asrc_release_pair(struct fsl_asrc_pair *pair);
+
 #endif /* _FSL_ASRC_H */
diff --git a/sound/soc/fsl/fsl_asrc_dma.c b/sound/soc/fsl/fsl_asrc_dma.c
index 01052a0808b0..c1c8ee4aca54 100644
--- a/sound/soc/fsl/fsl_asrc_dma.c
+++ b/sound/soc/fsl/fsl_asrc_dma.c
@@ -16,13 +16,11 @@
 
 #define FSL_ASRC_DMABUF_SIZE   (256 * 1024)
 
-static const struct snd_pcm_hardware snd_imx_hardware = {
+static struct snd_pcm_hardware snd_imx_hardware = {
.info = SNDRV_PCM_INFO_INTERLEAVED |
SNDRV_PCM_INFO_BLOCK_TRANSFER |
SNDRV_PCM_INFO_MMAP |
-   SNDRV_PCM_INFO_MMAP_VALID |
-   SNDRV_PCM_INFO_PAUSE |
-   SNDRV_PCM_INFO_RESUME,
+   SNDRV_PCM_INFO_MMAP_VALID,
.buffer_bytes_max = FSL_ASRC_DMABUF_SIZE,
.period_bytes_min = 128,
.period_bytes_max = 65535, /* Limited by SDMA engine */
@@ -276,6 +274,11 @@ static int fsl_asrc_dma_startup(struct snd_pcm_substream 
*substream)
struct device *dev = component->dev;
struct fsl_asrc *asrc_priv = dev_get_drvdata(dev);
struct fsl_asrc_pair *pair;
+   bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
+   u8 dir = tx ? OUT : IN;
+   struct dma_chan *tmp_chan;
+   struct snd_dmaengine_dai_dma_data *dma_data;
+   int ret;
 
pair = kzalloc(sizeof(struct fsl_asrc_pair), GFP_KERNEL);
if (!pair)
@@ -285,9 +288,44 @@ static int fsl_asrc_dma_startup(struct snd_pcm_substream 
*substream)
 
runtime->private_data = pair;
 
-   snd_pcm_hw_constraint_integer(substream->runtime,
- SNDRV_PCM_HW_PARAM_PERIODS);
-   snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware);
+   ret = snd_pcm_hw_constraint_integer(substream->runtime,
+   SNDRV_PCM_HW_PARAM_PERIODS);
+   if (ret < 0) {
+   dev_err(dev, "failed to set pcm hw params periods\n");
+   return ret;
+   }
+
+   /* Request a temp pair, which is release in the end */
+   ret = fsl_asrc_request_pair(1, pair);
+   if (ret < 0) {
+   dev_err(dev, "failed to request asrc pair\n");
+   return ret;
+   }
+
+   tmp_chan = fsl_asrc_get_dma_channel(pair, dir);
+   if (!tmp_chan) {
+   dev_err(dev, "can't get dma channel\n");
+   return -EINVAL;
+   }
+
+   dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
+
+   ret = snd_dmaengine_pcm_refine_runtime_hwparams(substream,
+   dma_data,
+   &snd_imx_hardware,
+   tmp_chan);
+   if (ret < 0) {
+   dev_err(dev, "failed to set runtime hwparams\n");
+   return ret;
+   }
+
+   ret = snd_soc_set

[PATCH V3 2/4] ASoC: fsl_asrc: update supported sample format

2019-09-19 Thread Shengjiu Wang
The ASRC support 24bit/16bit/8bit input width, which is
data width, not slot width.

For the S20_3LE format, the data with is 20bit, slot width
is 24bit, if we set ASRMCR1n.IWD to be 24bits, the result
is the volume is lower than expected, it likes 24bit data
right shift 4 bits

So replace S20_3LE with S24_3LE in supported list and add S8
format in TX supported list

Signed-off-by: Shengjiu Wang 
---
 sound/soc/fsl/fsl_asrc.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 4d3804a1ea55..584badf956d2 100644
--- a/sound/soc/fsl/fsl_asrc.c
+++ b/sound/soc/fsl/fsl_asrc.c
@@ -624,7 +624,7 @@ static int fsl_asrc_dai_probe(struct snd_soc_dai *dai)
 
 #define FSL_ASRC_FORMATS   (SNDRV_PCM_FMTBIT_S24_LE | \
 SNDRV_PCM_FMTBIT_S16_LE | \
-SNDRV_PCM_FMTBIT_S20_3LE)
+SNDRV_PCM_FMTBIT_S24_3LE)
 
 static struct snd_soc_dai_driver fsl_asrc_dai = {
.probe = fsl_asrc_dai_probe,
@@ -635,7 +635,8 @@ static struct snd_soc_dai_driver fsl_asrc_dai = {
.rate_min = 5512,
.rate_max = 192000,
.rates = SNDRV_PCM_RATE_KNOT,
-   .formats = FSL_ASRC_FORMATS,
+   .formats = FSL_ASRC_FORMATS |
+  SNDRV_PCM_FMTBIT_S8,
},
.capture = {
.stream_name = "ASRC-Capture",
-- 
2.21.0



Re: [PATCH] docs: powerpc: Add missing documentation reference

2019-09-19 Thread Michael Ellerman
On Sun, 2019-09-15 at 05:29:05 UTC, Adam Zerella wrote:
> The documentation pages for 'elfnote' and 'ultravisor'
> are not included in the powerpc documentation index, this
> generates Sphinx warnings:
> 
> WARNING: document isn't included in any toctree
> 
> Additionally, when one includes these missing doc pages,
> more Sphinx warnings appear. Unused footnote references,
> syntax highlighting and table of content ordering has
> been adjusted.
> 
> Signed-off-by: Adam Zerella 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/ad9b48c52296ddb7620e3f2b66a7479b78632dff

cheers


Re: [PATCH] powerpc: improve prom_init_check rule

2019-09-19 Thread Michael Ellerman
On Thu, 2019-09-12 at 07:40:37 UTC, Masahiro Yamada wrote:
> This slightly improves the prom_init_check rule.
> 
> [1] Avoid needless check
> 
> Currently, prom_init_check.sh is invoked every time you run 'make'
> even if you have changed nothing in prom_init.c. With this commit,
> the script is re-run only when prom_init.o is recompiled.
> 
> [2] Beautify the build log
> 
> Currently, the O= build shows the absolute path to the script:
> 
>   CALL/abs/path/to/source/of/linux/arch/powerpc/kernel/prom_init_check.sh
> 
> With this commit, it is always a relative path to the timestamp file:
> 
>   PROMCHK arch/powerpc/kernel/prom_init_check
> 
> Signed-off-by: Masahiro Yamada 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/1fdfa4c6af0cc1854b017f308af6bece94568bb6

cheers


Re: [PATCH v2] powerpc/xive: Fix bogus error code returned by OPAL

2019-09-19 Thread Michael Ellerman
On Wed, 2019-09-11 at 15:52:18 UTC, Greg Kurz wrote:
> There's a bug in skiboot that causes the OPAL_XIVE_ALLOCATE_IRQ call
> to return the 32-bit value 0x when OPAL has run out of IRQs.
> Unfortunatelty, OPAL return values are signed 64-bit entities and
> errors are supposed to be negative. If that happens, the linux code
> confusingly treats 0x as a valid IRQ number and panics at some
> point.
> 
> A fix was recently merged in skiboot:
> 
> e97391ae2bb5 ("xive: fix return value of opal_xive_allocate_irq()")
> 
> but we need a workaround anyway to support older skiboots already
> in the field.
> 
> Internally convert 0x to OPAL_RESOURCE which is the usual error
> returned upon resource exhaustion.
> 
> Cc: sta...@vger.kernel.org # v4.12+
> Signed-off-by: Greg Kurz 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/6ccb4ac2bf8a35c694ead92f8ac5530a16e8f2c8

cheers


Re: [PATCH v6 01/36] powerpc/fadump: move internal macros/definitions to a new header

2019-09-19 Thread Michael Ellerman
On Wed, 2019-09-11 at 14:46:21 UTC, Hari Bathini wrote:
> Though asm/fadump.h is meant to be used by other components dealing
> with FADump, it also has macros/definitions internal to FADump code.
> Move them to a new header file used within FADump code. This also
> makes way for refactoring platform specific FADump code.
> 
> Signed-off-by: Hari Bathini 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/ca986d7fa7e7f7b3f018f227b999f35e654fbb79

cheers


Re: [PATCH 1/4] powerpc/kvm: Move kvm_tmp into .text, shrink to 64K

2019-09-19 Thread Michael Ellerman
On Wed, 2019-09-11 at 11:57:43 UTC, Michael Ellerman wrote:
> In some configurations of KVM, guests binary patch themselves to
> avoid/reduce trapping into the hypervisor. For some instructions this
> requires replacing one instruction with a sequence of instructions.
> 
> For those cases we need to write the sequence of instructions
> somewhere and then patch the location of the original instruction to
> branch to the sequence. That requires that the location of the
> sequence be within 32MB of the original instruction.
> 
> The current solution for this is that we create a 1MB array in BSS,
> write sequences into there, and then free the remainder of the array.
> 
> This has a few problems:
>  - it confuses kmemleak.
>  - it confuses lockdep.
>  - it requires mapping kvm_tmp executable, which can cause adjacent
>areas to also be mapped executable if we're using 16M pages for the
>linear mapping.
>  - the 32MB limit can be exceeded if the kernel is big enough,
>especially with STRICT_KERNEL_RWX enabled, which then prevents the
>patching from working at all.
> 
> We can fix all those problems by making kvm_tmp just a region of
> regular .text. However currently it's 1MB in size, and we don't want
> to waste 1MB of text. In practice however I only see ~30KB of kvm_tmp
> being used even for an allyes_config. So shrink kvm_tmp to 64K, which
> ought to be enough for everyone, and move it into .text.
> 
> Signed-off-by: Michael Ellerman 

Series applied to powerpc next.

https://git.kernel.org/powerpc/c/0cb0837f9db1a6ed5b764ef61dd5f1a314b8231a

cheers


Re: [PATCH] powerpc/pseries: correctly track irq state in default idle

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-10 at 22:52:44 UTC, Nathan Lynch wrote:
> prep_irq_for_idle() is intended to be called before entering
> H_CEDE (and it is used by the pseries cpuidle driver). However the
> default pseries idle routine does not call it, leading to mismanaged
> lazy irq state when the cpuidle driver isn't in use. Manifestations of
> this include:
> 
> * Dropped IPIs in the time immediately after a cpu comes
>   online (before it has installed the cpuidle handler), making the
>   online operation block indefinitely waiting for the new cpu to
>   respond.
> 
> * Hitting this WARN_ON in arch_local_irq_restore():
>   /*
>* We should already be hard disabled here. We had bugs
>* where that wasn't the case so let's dbl check it and
>* warn if we are wrong. Only do that when IRQ tracing
>* is enabled as mfmsr() can be costly.
>*/
>   if (WARN_ON_ONCE(mfmsr() & MSR_EE))
>   __hard_irq_disable();
> 
> Call prep_irq_for_idle() from pseries_lpar_idle() and honor its
> result.
> 
> Fixes: 363edbe2614a ("powerpc: Default arch idle could cede processor on 
> pseries")
> Signed-off-by: Nathan Lynch 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/92c94dfb69e350471473fd3075c74bc68150879e

cheers


Re: [PATCH v2] powerpc/watchpoint: Disable watchpoint hit by larx/stcx instructions

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-10 at 13:15:13 UTC, Ravi Bangoria wrote:
> If watchpoint exception is generated by larx/stcx instructions, the
> reservation created by larx gets lost while handling exception, and
> thus stcx instruction always fails. Generally these instructions are
> used in a while(1) loop, for example spinlocks. And because stcx
> never succeeds, it loops forever and ultimately hangs the system.
> 
> Note that ptrace anyway works in one-shot mode and thus for ptrace
> we don't change the behaviour. It's up to ptrace user to take care
> of this.
> 
> Signed-off-by: Ravi Bangoria 
> Acked-by: Naveen N. Rao 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/bc01bdf6c5df5023272a7399962cf64f8fedc93e

cheers


Re: [PATCH] powerpc: Add attributes for setjmp/longjmp

2019-09-19 Thread Michael Ellerman
On Wed, 2019-09-04 at 14:11:07 UTC, Segher Boessenkool wrote:
> The setjmp function should be declared as "returns_twice", or bad
> things can happen[1].  This does not actually change generated code
> in my testing.
> 
> The longjmp function should be declared as "noreturn", so that the
> compiler can optimise calls to it better.  This makes the generated
> code a little shorter.
> 
> Signed-off-by: Segher Boessenkool 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/aa497d4352414aad22e792b35d012bbc37c5

cheers


Re: [PATCH 1/3] ftrace: Look up the address of return_to_handler() using helpers

2019-09-19 Thread Michael Ellerman
On Thu, 2019-09-05 at 18:20:28 UTC, "Naveen N. Rao" wrote:
> This ensures that we use the right address on architectures that use
> function descriptors.
> 
> Signed-off-by: Naveen N. Rao 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/a3db31ff6ce31f5a544a66b61613a098029031cc

cheers


Re: [PATCH 1/2] powerpc/xmon: Improve output of XIVE interrupts

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-10 at 08:18:49 UTC, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= wrote:
> When looping on the list of interrupts, add the current value of the
> PQ bits with a load on the ESB page. This has the side effect of
> faulting the ESB page of all interrupts.
> 
> Signed-off-by: Cédric Le Goater 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/5896163f7f91c0560cc41908c808661eee4c4121

cheers


Re: [PATCH v2] powerpc: dump kernel log before carrying out fadump or kdump

2019-09-19 Thread Michael Ellerman
On Wed, 2019-09-04 at 07:59:49 UTC, Ganesh Goudar wrote:
> Since commit 4388c9b3a6ee ("powerpc: Do not send system reset request
> through the oops path"), pstore dmesg file is not updated when dump is
> triggered from HMC. This commit modified system reset (sreset) handler
> to invoke fadump or kdump (if configured), without pushing dmesg to
> pstore. This leaves pstore to have old dmesg data which won't be much
> of a help if kdump fails to capture the dump. This patch fixes that by
> calling kmsg_dump() before heading to fadump ot kdump.
> 
> Fixes: 4388c9b3a6ee ("powerpc: Do not send system reset request through the 
> oops path")
> Reviewed-by: Mahesh Salgaonkar 
> Reviewed-by: Nicholas Piggin 
> Signed-off-by: Ganesh Goudar 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/e7ca44ed3ba77fc26cf32650bb71584896662474

cheers


Re: [PATCH 1/2] powerpc/memcpy: Fix stack corruption for smaller sizes

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-03 at 21:43:58 UTC, Santosh Sivaraj wrote:
> For sizes lesser than 128 bytes, the code branches out early without saving
> the stack frame, which when restored later drops frame of the caller.
> 
> Tested-by: Aneesh Kumar K.V 
> Signed-off-by: Santosh Sivaraj 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/20055a8bfaaa75f2cb9c23ecc8ab12b4abd8dc84

cheers


Re: [PATCH] powerpc/powernv: remove the unused pnv_npu_try_dma_set_bypass function

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-03 at 16:51:47 UTC, Christoph Hellwig wrote:
> Neither pnv_npu_try_dma_set_bypass nor the pnv_npu_dma_set_32 and
> pnv_npu_dma_set_bypass helpers called by it are used anywhere in the
> kernel tree, so remove them.
> 
> Signed-off-by: Christoph Hellwig 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/b4d37a7b6934c0c16930c73f43c08e9a6af22f1a

cheers


Re: [PATCH 01/14] powerpc/eeh: Clean up EEH PEs after recovery finishes

2019-09-19 Thread Michael Ellerman
On Tue, 2019-09-03 at 10:15:52 UTC, Oliver O'Halloran wrote:
> When the last device in an eeh_pe is removed the eeh_pe structure itself
> (and any empty parents) are freed since they are no longer needed. This
> results in a crash when a hotplug driver is involved since the following
> may occur:
> 
> 1. Device is suprise removed.
> 2. Driver performs an MMIO, which fails and queues and eeh_event.
> 3. Hotplug driver receives a hotplug interrupt and removes any
>pci_devs that were under the slot.
> 4. pci_dev is torn down and the eeh_pe is freed.
> 5. The EEH event handler thread processes the eeh_event and crashes
>since the eeh_pe pointer in the eeh_event structure is no
>longer valid.
> 
> Crashing is generally considered poor form. Instead of doing that use
> the fact PEs are marked as EEH_PE_INVALID to keep them around until the
> end of the recovery cycle, at which point we can safely prune any empty
> PEs.
> 
> Signed-off-by: Oliver O'Halloran 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/799abe283e5103d48e079149579b4f167c95ea0e

cheers


Re: [PATCH 1/6] powerpc/64s: remove register_process_table callback

2019-09-19 Thread Michael Ellerman
On Mon, 2019-09-02 at 15:29:26 UTC, Nicholas Piggin wrote:
> This callback is only required because the partition table init comes
> before process table allocation on powernv (aka bare metal aka native).
> 
> Change the order to allocate the process table first, and remove the
> callback.
> 
> Signed-off-by: Nicholas Piggin 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/ed6546bdc61b7c4bd926cebd82ba52d056fcefa1

cheers


Re: [PATCH v3] powerpc/imc: Dont create debugfs files for cpu-less nodes

2019-09-19 Thread Michael Ellerman
On Tue, 2019-08-27 at 10:16:35 UTC, Madhavan Srinivasan wrote:
> Commit <684d984038aa> ('powerpc/powernv: Add debugfs interface for imc-mode
> and imc') added debugfs interface for the nest imc pmu devices to support
> changing of different ucode modes. Primarily adding this capability for
> debug. But when doing so, the code did not consider the case of cpu-less
> nodes. So when reading the _cmd_ or _mode_ file of a cpu-less node
> will create this crash.
> 
...
> 
> Fixes: 684d984038aa ('powerpc/powernv: Add debugfs interface for imc-mode and 
> imc')
> Reported-by: Qian Cai 
> Suggested-by: Michael Ellerman 
> Signed-off-by: Madhavan Srinivasan 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/41ba17f20ea835c489e77bd54e2da73184e22060

cheers


Re: [PATCH v4 1/2] powerpc/powernv: Enhance opal message read interface

2019-09-19 Thread Michael Ellerman
On Mon, 2019-08-26 at 06:57:00 UTC, Vasant Hegde wrote:
> Use "opal-msg-size" device tree property to allocate memory for "opal_msg".
> 
> Cc: Mahesh Salgaonkar 
> Cc: Jeremy Kerr 
> Signed-off-by: Vasant Hegde 

Series applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/2be1d5d147955e6aea273dc73a9f0ae4510fd225

cheers


Re: [PATCH] powerpc: Remove empty comment

2019-09-19 Thread Michael Ellerman
On Tue, 2019-08-13 at 05:12:12 UTC, Jordan Niethe wrote:
> Commit 2874c5fd2842 ("treewide: Replace GPLv2 boilerplate/reference with
> SPDX - rule 152") left an empty comment in machdep.h, as the boilerplate
> was the only text in the comment. Remove the empty comment.
> 
> Signed-off-by: Jordan Niethe 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/67c87892e2e17b7083cb8b4289ed8ff69ad9ac1e

cheers


Re: [PATCH] powerpc/mm/radix: remove useless kernel messages

2019-09-19 Thread Michael Ellerman
On Fri, 2019-08-23 at 14:22:00 UTC, Qian Cai wrote:
> Booting a POWER9 PowerNV system generates a few messages below with
> "ptrval" due to the pointers printed without a specifier
> extension (i.e unadorned %p) are hashed to prevent leaking information
> about the kernel memory layout.
> 
> radix-mmu: Initializing Radix MMU
> radix-mmu: Partition table (ptrval)
> radix-mmu: Mapped 0x-0x4000 with 1.00 GiB
> pages (exec)
> radix-mmu: Mapped 0x4000-0x0020 with 1.00 GiB
> pages
> radix-mmu: Mapped 0x2000-0x2020 with 1.00 GiB
> pages
> radix-mmu: Process table (ptrval) and radix root for kernel:
> (ptrval)
> 
> Signed-off-by: Qian Cai 

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/ec5b705c48365549c483fab17d68d15d83bef265

cheers


Re: [PATCH 3/5] ocxl: Tally up the LPC memory on a link & allow it to be mapped

2019-09-19 Thread Frederic Barrat




Le 19/09/2019 à 06:55, Alastair D'Silva a écrit :

On Wed, 2019-09-18 at 16:02 +0200, Frederic Barrat wrote:


Le 17/09/2019 à 03:42, Alastair D'Silva a écrit :

From: Alastair D'Silva 

Tally up the LPC memory on an OpenCAPI link & allow it to be mapped

Signed-off-by: Alastair D'Silva 
---
   drivers/misc/ocxl/core.c  |  9 +
   drivers/misc/ocxl/link.c  | 61
+++
   drivers/misc/ocxl/ocxl_internal.h | 42 +
   3 files changed, 112 insertions(+)

diff --git a/drivers/misc/ocxl/core.c b/drivers/misc/ocxl/core.c
index b7a09b21ab36..fdfe4e0a34e1 100644
--- a/drivers/misc/ocxl/core.c
+++ b/drivers/misc/ocxl/core.c
@@ -230,8 +230,17 @@ static int configure_afu(struct ocxl_afu *afu,
u8 afu_idx, struct pci_dev *dev)
if (rc)
goto err_free_pasid;
   
+	if (afu->config.lpc_mem_size || afu-

config.special_purpose_mem_size) {

+   rc = ocxl_link_add_lpc_mem(afu->fn->link,
+   afu->config.lpc_mem_size + afu-

config.special_purpose_mem_size);


I don't think we should count the special purpose memory, as it's
not
meant to be accessed through the GPU mem BAR, but I'll check.


At least for OpenCAPI 3.0, there is no other in-spec way to access the
memory if it is not mapped by the NPU.



Yes, that's clarified now and we should take the special purpose memory 
into account when defining the full range.


  Fred




What happens when unconfiguring the AFU? We should reduce the range
(see
also below). Partial reconfig doesn't seem so far off, so we should
take
it into account.



The mapping is left until the last AFU on the link offlines it's
memory, at which point we clear the mapping from the NPU.




+   if (rc)
+   goto err_free_mmio;
+   }
+
return 0;
   
+err_free_mmio:

+   unmap_mmio_areas(afu);
   err_free_pasid:
reclaim_afu_pasid(afu);
   err_free_actag:
diff --git a/drivers/misc/ocxl/link.c b/drivers/misc/ocxl/link.c
index 58d111afd9f6..2874811a4398 100644
--- a/drivers/misc/ocxl/link.c
+++ b/drivers/misc/ocxl/link.c
@@ -84,6 +84,11 @@ struct ocxl_link {
int dev;
atomic_t irq_available;
struct spa *spa;
+   struct mutex lpc_mem_lock;
+   u64 lpc_mem_sz; /* Total amount of LPC memory presented on the
link */
+   u64 lpc_mem;
+   int lpc_consumers;
+
void *platform_data;
   };
   static struct list_head links_list = LIST_HEAD_INIT(links_list);
@@ -396,6 +401,8 @@ static int alloc_link(struct pci_dev *dev, int
PE_mask, struct ocxl_link **out_l
if (rc)
goto err_spa;
   
+	mutex_init(&link->lpc_mem_lock);

+
/* platform specific hook */
rc = pnv_ocxl_spa_setup(dev, link->spa->spa_mem, PE_mask,
&link->platform_data);
@@ -711,3 +718,57 @@ void ocxl_link_free_irq(void *link_handle, int
hw_irq)
atomic_inc(&link->irq_available);
   }
   EXPORT_SYMBOL_GPL(ocxl_link_free_irq);
+
+int ocxl_link_add_lpc_mem(void *link_handle, u64 size)
+{
+   struct ocxl_link *link = (struct ocxl_link *) link_handle;
+
+   u64 orig_size;
+   bool good = false;
+
+   mutex_lock(&link->lpc_mem_lock);
+   orig_size = link->lpc_mem_sz;
+   link->lpc_mem_sz += size;



We have a choice to make here:
1. either we only support one LPC memory-carrying AFU (and the above
is
overkill)
2. or we support multiple AFUs with LPC memory (on the same
function),
but then I think the above is too simple.

  From the opencapi spec, each AFU can define a chunk of memory with
a
starting address and a size. There's no rule which says they have to
be
contiguous. There's no rule which says it must start at 0. So to
support
multiple AFUs with LPC memory, we should record the current maximum
range instead of just the global size. Ultimately, we need to tell
the
NPU the range of permissible addresses. It starts at 0, so we need
to
take into account any intial offset and holes.

I would go for option 2, to at least be consistent within ocxl and
support multiple AFUs. Even though I don't think we'll see FPGA
images
with multiple AFUs with LPC memory any time soon.



Ill rework this to take an offset & size, the NPU will map from the
base address up to the largest offset + size provided across all AFUs
on the link.




+   good = orig_size < link->lpc_mem_sz;
+   mutex_unlock(&link->lpc_mem_lock);
+
+   // Check for overflow
+   return (good) ? 0 : -EINVAL;
+}
+EXPORT_SYMBOL_GPL(ocxl_link_add_lpc_mem);


Do the symbol really need to be exported? IIUC, the next patch
defines a
higher level ocxl_afu_map_lpc_mem() which is meant to be called by a
calling driver.



No, I'll remove it.




+
+u64 ocxl_link_lpc_map(void *link_handle, struct pci_dev *pdev)
+{
+   struct ocxl_link *link = (struct ocxl_link *) link_handle;
+
+   mutex_lock(&link->lpc_mem_lock);
+   if (link->lpc_mem) {
+   u64 lpc_mem = link->

Re: [PATCH 2/5] powerpc: Map & release OpenCAPI LPC memory

2019-09-19 Thread Frederic Barrat




Le 19/09/2019 à 02:58, Alastair D'Silva a écrit :

On Wed, 2019-09-18 at 16:03 +0200, Frederic Barrat wrote:


Le 17/09/2019 à 03:42, Alastair D'Silva a écrit :

From: Alastair D'Silva 

Map & release OpenCAPI LPC memory.

Signed-off-by: Alastair D'Silva 
---
   arch/powerpc/include/asm/pnv-ocxl.h   |  2 ++
   arch/powerpc/platforms/powernv/ocxl.c | 42
+++
   2 files changed, 44 insertions(+)

diff --git a/arch/powerpc/include/asm/pnv-ocxl.h
b/arch/powerpc/include/asm/pnv-ocxl.h
index 7de82647e761..f8f8ffb48aa8 100644
--- a/arch/powerpc/include/asm/pnv-ocxl.h
+++ b/arch/powerpc/include/asm/pnv-ocxl.h
@@ -32,5 +32,7 @@ extern int pnv_ocxl_spa_remove_pe_from_cache(void
*platform_data, int pe_handle)
   
   extern int pnv_ocxl_alloc_xive_irq(u32 *irq, u64 *trigger_addr);

   extern void pnv_ocxl_free_xive_irq(u32 irq);
+extern u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64
size);
+extern void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev);
   
   #endif /* _ASM_PNV_OCXL_H */

diff --git a/arch/powerpc/platforms/powernv/ocxl.c
b/arch/powerpc/platforms/powernv/ocxl.c
index 8c65aacda9c8..81393728d6a3 100644
--- a/arch/powerpc/platforms/powernv/ocxl.c
+++ b/arch/powerpc/platforms/powernv/ocxl.c
@@ -475,6 +475,48 @@ void pnv_ocxl_spa_release(void *platform_data)
   }
   EXPORT_SYMBOL_GPL(pnv_ocxl_spa_release);
   
+u64 pnv_ocxl_platform_lpc_setup(struct pci_dev *pdev, u64 size)

+{
+   struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   struct pci_dn *pdn = pci_get_pdn(pdev);
+   u32 bdfn = (pdn->busno << 8) | pdn->devfn;


We can spare a call to pci_get_pdn() with
bdfn = (pdev->bus->number << 8) | pdev->devfn;



Ok.




+   u64 base_addr = 0;
+
+   int rc = opal_npu_mem_alloc(phb->opal_id, bdfn, size,
&base_addr);
+
+   WARN_ON(rc);


Instead of a WARN, we should catch the error and return a null
address
to the caller.



base_addr will be 0 in the error case, are you suggesting we just
remove the WARN_ON()?



Well, we don't really have any reason to keep going if the opal call 
fails, right? And anyway, I wouldn't make any assumption on the content 
of base_addr if the call fails.
But my remark was really to avoid polluting the logs with the WARN 
output. The stack backtrace and register content is scary and is not 
going to help in that situation. A proper error message is more suitable.


  Fred




+
+   base_addr = be64_to_cpu(base_addr);
+
+   rc = check_hotplug_memory_addressable(base_addr, base_addr +
size);


That code is missing?



That's added in the following patch on the mm list:
  [PATCH v3 1/2] memory_hotplug: Add a bounds check to
check_hotplug_memory_range()




+   if (rc) {
+   dev_warn(&pdev->dev,
+"LPC memory range 0x%llx-0x%llx is not fully
addressable",
+base_addr, base_addr + size - 1);
+   return 0;
+   }
+
+
+   return base_addr;
+}
+EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_setup);
+
+void pnv_ocxl_platform_lpc_release(struct pci_dev *pdev)
+{
+   struct pci_controller *hose = pci_bus_to_host(pdev->bus);
+   struct pnv_phb *phb = hose->private_data;
+   struct pci_dn *pdn = pci_get_pdn(pdev);
+   u32 bdfn;
+   int rc;
+
+   bdfn = (pdn->busno << 8) | pdn->devfn;
+   rc = opal_npu_mem_release(phb->opal_id, bdfn);
+   WARN_ON(rc);


Same comments as above.

Fred




+}
+EXPORT_SYMBOL_GPL(pnv_ocxl_platform_lpc_release);
+
+
   int pnv_ocxl_spa_remove_pe_from_cache(void *platform_data, int
pe_handle)
   {
struct spa_data *data = (struct spa_data *) platform_data;





Re: [PATCH?] powerpc: Hard wire PT_SOFTE value to 1 in gpr_get() too

2019-09-19 Thread Michael Ellerman
Hi Oleg,

Thanks for the patch.

Oleg Nesterov  writes:
> I don't have a ppc machine, this patch wasn't even compile tested,
> could you please review?
>
> The commit a8a4b03ab95f ("powerpc: Hard wire PT_SOFTE value to 1 in
> ptrace & signals") changed ptrace_get_reg(PT_SOFTE) to report 0x1,
> but PTRACE_GETREGS still copies pt_regs->softe as is.

Ugh, that certainly seems broken. I guess we forgot/didn't-know that
there were two paths through ptrace to get the one register.

> This is not consistent and this breaks
> http://sourceware.org/systemtap/wiki/utrace/tests/user-regs-peekpoke

That's a 404 for me?

Is it this: https://sourceware.org/systemtap/wiki/utrace/tests/

That seems to point me to a CVS repo? Which then didn't build. But now I
have that one test built, and you're right it fails with:

$ ./user-regs-peekpoke 
mismatch at offset 0x138: poked 0 but peeked 1


> Reported-by: Jan Kratochvil 
> Signed-off-by: Oleg Nesterov 
> ---
>  arch/powerpc/kernel/ptrace.c | 25 +
>  1 file changed, 25 insertions(+)
>
> diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
> index 8c92feb..9e9342c 100644
> --- a/arch/powerpc/kernel/ptrace.c
> +++ b/arch/powerpc/kernel/ptrace.c
> @@ -363,11 +363,36 @@ static int gpr_get(struct task_struct *target, const 
> struct user_regset *regset,
>   BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
>offsetof(struct pt_regs, msr) + sizeof(long));
>  
> +#ifdef CONFIG_PPC64
> + if (!ret)
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> +   &target->thread.regs->orig_gpr3,
> +   offsetof(struct pt_regs, orig_gpr3),
> +   offsetof(struct pt_regs, softe));
> +
> + if (!ret) {
> + unsigned long softe = 0x1;
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
> +   offsetof(struct pt_regs, softe),
> +   offsetof(struct pt_regs, softe) +
> +   sizeof(softe));
> + }
> +
> + BUILD_BUG_ON(offsetof(struct pt_regs, trap) !=
> +  offsetof(struct pt_regs, softe) + sizeof(long));
> +
> + if (!ret)
> + ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> +   &target->thread.regs->trap,
> +   offsetof(struct pt_regs, trap),
> +   sizeof(struct user_pt_regs));
> +#else
>   if (!ret)
>   ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> &target->thread.regs->orig_gpr3,
> offsetof(struct pt_regs, orig_gpr3),
> sizeof(struct user_pt_regs));
> +#endif
>   if (!ret)
>   ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
>  sizeof(struct user_pt_regs), -1);

It would be nice if we could isolate the special logic in once place,
ie. ptrace_get_reg().

We could do it like below. I'm 50/50 though on whether it's worth it, or
if we should just go with the big ifdef like in your patch.

cheers


diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 8c92febf5f44..55510f1a7ec1 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -334,6 +334,11 @@ int ptrace_put_reg(struct task_struct *task, int regno, 
unsigned long data)
return -EIO;
 }
 
+#ifndef __powerpc64__
+/* Needed on 32-bit to make the SOFTE logic below work without ifdefs */
+#define PT_SOFTE   PT_MQ
+#endif
+
 static int gpr_get(struct task_struct *target, const struct user_regset 
*regset,
   unsigned int pos, unsigned int count,
   void *kbuf, void __user *ubuf)
@@ -367,6 +372,24 @@ static int gpr_get(struct task_struct *target, const 
struct user_regset *regset,
ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  &target->thread.regs->orig_gpr3,
  offsetof(struct pt_regs, orig_gpr3),
+ PT_SOFTE * sizeof(long));
+
+   /* SOFTE is special on 64-bit, the logic is in ptrace_get_reg() */
+   if (!ret) {
+   unsigned long val = 0;
+   ptrace_get_reg(target, PT_SOFTE, &val);
+   ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &val,
+ PT_SOFTE * sizeof(long),
+ offsetof(struct pt_regs, trap));
+   }
+
+   BUILD_BUG_ON(offsetof(struct pt_regs, trap) !=
+(PT_SOFTE * sizeof(long)) + sizeof(long));
+
+   if (!ret)
+   ret = user_regset_copyout(&pos,