Re: [PATCH RFC v11 5/6] dma: mpc512x: add device tree binding document
On Fri, 2014-04-18 at 15:29 +0400, Alexander Popov wrote: 2014-04-17 0:44 GMT+04:00 Gerhard Sittig g...@denx.de: On Tue, 2014-04-15 at 14:54 +0400, Alexander Popov wrote: +- reg: Address and size of the DMA controller's register set +- interrupts: Interrupt for the DMA controller. Generic interrupt client node + is described in interrupt-controller/interrupts.txt 'interrupts' only works in combinations with 'interrupt-parent', that actual .dts files don't have the latter in the nodes is an implementation detail but not a binding's requirement Excuse me, I didn't understand your point. and an alternative method of specifying interrupts was introduced recently, a reference to the common binding without naming one specific property name could be most appropriate Excuse me, I haven't found such an example. The 'interrupts' property is not enough in itself, it always needs the 'interrupt-parent' property, too. Because the parent (the interrupt controller) often is the same for multiple interrupts, it usually gets factored out into a parent node in the tree, and thus often gets missed in discussions. Still the 'interrupt-parent' is strictly required for 'interrupts' to work. Splitting both properties and putting them into nodes that are rather distant from each other is just an implementation detail of .dts files. This should not be reflected in bindings. The 'interrupts-extended' property was introduced only recently. See bindings/interrupt-controller/interrupts.txt for details. Although the motivation was to reference several parents from one client node, I very much like the idea of having all of the interrupt spec within a single property. Being explicit is a good thing, especially in setups with cascades. I consider this approach an improvement in readability and maintenance. You might just want to document in the binding that interrupt specs are required (or optional), which interrupts these are (the above text could be sufficient if there is only one interrupt for this IP block), and refer to the common binding for the syntax. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v11 5/6] dma: mpc512x: add device tree binding document
On Tue, 2014-04-15 at 14:54 +0400, Alexander Popov wrote:
Introduce a device tree binding document for the MPC512x DMA controller
Signed-off-by: Gerhard Sittig g...@denx.de
Signed-off-by: Alexander Popov a13xp0p0...@gmail.com
I'm not certain whether the attribution is right. Is the S-o-b
appropriate when the patch is not from me? As I've stated
before, it's OK if you pick up and extend what I provide, but
please don't pretend that I wrote what you did, and don't pretend
that I ACKed or passed along your submission when I didn't.
This binding certainly needs further improvement to become a good
one. As I've communicated in the past, I was rather ignorant
back then when I wrote v1 and v2 of the RFC. We have learned
something in the meantime. Though I admit having gone silent
after several review iterations. Assumed you would pick up
information that showed up several times on public lists.
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/mpc512x-dma.txt
@@ -0,0 +1,51 @@
+* Freescale MPC512x and MPC8308 DMA Controller
+
+The DMA controller in the Freescale MPC512x and MPC8308 SoCs can move
+blocks of memory contents between memory and peripherals or
+from memory to memory.
+
+Refer to the Generic DMA Controller and DMA request bindings in
+the dma/dma.txt file for a more detailed description of binding.
+
+* DMA controller
+
+Required properties:
+- compatible: Should be one of
+ fsl,mpc5121-dma
+ fsl,mpc8308-dma, fsl,mpc5121-dma
is this a duplicate? looks funny, needs a fix
or is it a requirement that for MPC8308 you need to provide both
compatible strings? that would be wrong, as MPC8308 certainly is
not an MPC5121
a quick search reveals: the drivers/dma/mpc512x_dma.c Linux
driver implementation is wrong, it should match on both strings;
expecting the MPC8308 to disguise as an MPC5121 when it's not is
inappropriate (and only went unnoticed because of missing
bindings, I guess)
+- reg: Address and size of the DMA controller's register set
+- interrupts: Interrupt for the DMA controller. Generic interrupt client node
+ is described in interrupt-controller/interrupts.txt
'interrupts' only works in combinations with 'interrupt-parent',
that actual .dts files don't have the latter in the nodes is an
implementation detail but not a binding's requirement
and an alternative method of specifying interrupts was introduced
recently, a reference to the common binding without naming one
specific property name could be most appropriate
+
+Optional properties:
+- #dma-cells: The length of the DMA specifier, must be 1 since
+ the DMA controller uses a fixed assignment of request lines
+ per channel. Refer to dma/dma.txt for the detailed description
+ of this property
I'm afraid that a generic/common document does not and cannot
describe the specific semantics of this provider's cells
this binding should explicitly mention that the number of cells
needs to be one, and that this one cell is the DMA channel (which
translates to peripheral request line), because these
assigments are fixed in hardware
+
+Example:
+
+ dma0: dma@14000 {
+ compatible = fsl,mpc5121-dma;
+ reg = 0x14000 0x1800;
+ interrupts = 65 0x8;
+ #dma-cells = 1;
+ };
+
+* DMA client
the DMA provider's binding probably need not discuss client
specs, a reference to the common binding should suffice if it's
appropriate at all
virtually yours
Gerhard Sittig
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Re: cscope: issue with symlinks in tools/testing/selftests/powerpc/copyloops/
[ removed cscope-devel from Cc:, non-subscriber mails get blocked anyway ] On Mon, 2014-04-07 at 14:42 +0200, Gerhard Sittig wrote: On Mon, 2014-04-07 at 06:42 -0400, Neil Horman wrote: On Thu, Apr 03, 2014 at 03:16:15PM +0200, Yann Droneaud wrote: [ ... ] cscope reports error when generating the cross-reference database: $ make ALLSOURCE_ARCHS=all O=./obj-cscope/ cscope GEN cscope cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/copyuser_power7.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/memcpy_64.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/memcpy_power7.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/copyuser_64.S And when calling cscope from ./obj-cscope/ directory, it reports errors too. Hopefully it doesn't stop it from working, so I'm still able to use cscope to browse kernel sources. No, it won't stop it from working, it just won't search those files. I don't recall exactly the reason, but IIRC there was a big discussion long ago about symlinks and our ability to support them (around version 1.94 I think). We decided to not handle symlinks, as they would either point outside our search tree, which we didn't want to include, or would point to another file in the search tree, which made loading them pointless (as we would cover the search in the pointed file). So there are valid reasons to not process those filesystem entries. Would it be useful to not emit the warnings then? Or to silent those warnings when the user knows it's perfectly legal to skip those filesytem entries? Like what you can do with the ctags(1) command and its --links option. For the record: I got a response off list (actually to the cscope list only which is closed for non-subscribers, while the Linux related recipients were removed despite the fact that the issue appears to be in Linux), see http://article.gmane.org/gmane.comp.programming.tools.cscope.devel/105 This reponse suggests that the issue is not in cscope(1) itself, but instead is in how the cscope(1) command got invoked. Which translates into the Linux infrastructure does something wrong. A quick search identifies ./scripts/tags.sh:all_target_sources() as the spot where symlinks should get filtered out. Where both paths of all_target_sources() end up calling all_sources(). virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: cscope: issue with symlinks in tools/testing/selftests/powerpc/copyloops/
On Mon, 2014-04-07 at 06:42 -0400, Neil Horman wrote: On Thu, Apr 03, 2014 at 03:16:15PM +0200, Yann Droneaud wrote: [ ... ] cscope reports error when generating the cross-reference database: $ make ALLSOURCE_ARCHS=all O=./obj-cscope/ cscope GEN cscope cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/copyuser_power7.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/memcpy_64.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/memcpy_power7.S cscope: cannot find file /home/ydroneaud/src/linux/tools/testing/selftests/powerpc/copyloops/copyuser_64.S And when calling cscope from ./obj-cscope/ directory, it reports errors too. Hopefully it doesn't stop it from working, so I'm still able to use cscope to browse kernel sources. No, it won't stop it from working, it just won't search those files. I don't recall exactly the reason, but IIRC there was a big discussion long ago about symlinks and our ability to support them (around version 1.94 I think). We decided to not handle symlinks, as they would either point outside our search tree, which we didn't want to include, or would point to another file in the search tree, which made loading them pointless (as we would cover the search in the pointed file). So there are valid reasons to not process those filesystem entries. Would it be useful to not emit the warnings then? Or to silent those warnings when the user knows it's perfectly legal to skip those filesytem entries? Like what you can do with the ctags(1) command and its --links option. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes
On Wed, Mar 05, 2014 at 09:48 +0800, Shawn Guo wrote: On Mon, Mar 03, 2014 at 10:22:31AM +0100, Gerhard Sittig wrote: On Mon, Feb 24, 2014 at 11:25 +0100, Gerhard Sittig wrote: a recent FEC binding document update that was motivated by i.MX development revealed that ARM and PowerPC implementations in Linux did not agree on the clock names to use for the FEC nodes change clock names from per to ipg in the FEC nodes of the mpc5121.dtsi include file such that the .dts specs comply with the common FEC binding this incompatible change does not break operation, because - COMMON_CLK support for MPC5121/23/25 and adjusted .dts files were only introduced in Linux v3.14-rc1, no mainline release provided these specs before - if this change won't make it for v3.14, the MPC512x CCF support provides full backwards compability, and keeps operating with device trees which lack clock specs or don't match in the names Signed-off-by: Gerhard Sittig g...@denx.de ping Are there opinions about making PowerPC users of FEC use the same clock names as ARM users do, to re-use (actually: keep sharing) the FEC binding? The alternative would be to fragment the FEC binding into several bindings for ARM and PowerPC, which I feel would be undesirable, and is not necessary. As I already said, Documentation/devicetree/bindings/net/fsl-fec.txt was created specifically for i.MX FEC controller from day one. And even as of today, it doesn't serve PowerPC, because for example the property 'phy-mode' documented as required one is not required by PowerPC FEC. My opinion would be to patch fsl-fec.txt a little bit to make it clear that it's a binding doc for i.MX FEC, and create the other one for PowerPC FEC. This is the way less confusing to people and easier for binding maintenance. Should we still try to have a common behaviour where possible? Such that even if there are two bindings, they don't diverge in unnecessary ways? But given that we already are past -rc5, I guess the suggested change is too late for v3.14 anyway. So we have to live with the fact of a mainline release of different behaviour. And the backwards compatibility support in the MPC512x CCF implementation allows to cope with a potential future ipg unification while still working with former per using device trees. There's no blocker. So nevermind. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes
On Mon, Feb 24, 2014 at 11:25 +0100, Gerhard Sittig wrote:
a recent FEC binding document update that was motivated by i.MX
development revealed that ARM and PowerPC implementations in Linux
did not agree on the clock names to use for the FEC nodes
change clock names from per to ipg in the FEC nodes of the
mpc5121.dtsi include file such that the .dts specs comply with
the common FEC binding
this incompatible change does not break operation, because
- COMMON_CLK support for MPC5121/23/25 and adjusted .dts files
were only introduced in Linux v3.14-rc1, no mainline release
provided these specs before
- if this change won't make it for v3.14, the MPC512x CCF support
provides full backwards compability, and keeps operating with
device trees which lack clock specs or don't match in the names
Signed-off-by: Gerhard Sittig g...@denx.de
ping
Are there opinions about making PowerPC users of FEC use the same
clock names as ARM users do, to re-use (actually: keep sharing)
the FEC binding? The alternative would be to fragment the FEC
binding into several bindings for ARM and PowerPC, which I feel
would be undesirable, and is not necessary.
It would be nice to ship v3.14 (the first release with proper CCF
support for MPC512x) in a shape that is consistent with other FEC
users (ARM i.MX). We are lucky to have noticed the difference
before the release, and need not introduce the incompatibility,
and need not document and support obsolete conditions but can fix
them instead.
---
arch/powerpc/boot/dts/mpc5121.dtsi |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index 2c0e1552d20b..a5a375598ed8 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -281,7 +281,7 @@
#address-cells = 1;
#size-cells = 0;
clocks = clks MPC512x_CLK_FEC;
- clock-names = per;
+ clock-names = ipg;
};
eth0: ethernet@2800 {
@@ -291,7 +291,7 @@
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = 4 0x8;
clocks = clks MPC512x_CLK_FEC;
- clock-names = per;
+ clock-names = ipg;
};
/* USB1 using external ULPI PHY */
--
1.7.10.4
virtually yours
Gerhard Sittig
--
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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[PATCH 1/3] fs_enet: update clock names to comply with FEC binding
a recent FEC binding document update that was motivated by i.MX
development revealed that ARM and PowerPC implementations in Linux
did not agree on the clock names to use for the FEC nodes
change the OF clock lookup to prefer ipg over per, which
improves compliance with the binding, and keeps compatibility
with former device trees
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index 62f042d4aaa9..ce20184b96cb 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -1037,11 +1037,20 @@ static int fs_enet_probe(struct platform_device *ofdev)
fpi-use_rmii = 1;
}
- /* make clock lookup non-fatal (the driver is shared among platforms),
+ /* the driver is shared across several PowerPC platforms, not all
+* of them provide COMMON_CLK support, and newer kernels are supposed
+* to keep working with older DT blobs, so clock lookup is non-fatal
+*
* but require enable to succeed when a clock was specified/found,
* keep a reference to the clock upon successful acquisition
+*
+* the FEC binding is shared with ARM platforms, so we lookup several
+* clock names to prefer the common naming convention yet support
+* names that were used before unification
*/
- clk = devm_clk_get(ofdev-dev, per);
+ clk = devm_clk_get(ofdev-dev, ipg);
+ if (IS_ERR(clk))
+ clk = devm_clk_get(ofdev-dev, per);
if (!IS_ERR(clk)) {
err = clk_prepare_enable(clk);
if (err) {
--
1.7.10.4
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[PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes
a recent FEC binding document update that was motivated by i.MX
development revealed that ARM and PowerPC implementations in Linux
did not agree on the clock names to use for the FEC nodes
change clock names from per to ipg in the FEC nodes of the
mpc5121.dtsi include file such that the .dts specs comply with
the common FEC binding
this incompatible change does not break operation, because
- COMMON_CLK support for MPC5121/23/25 and adjusted .dts files
were only introduced in Linux v3.14-rc1, no mainline release
provided these specs before
- if this change won't make it for v3.14, the MPC512x CCF support
provides full backwards compability, and keeps operating with
device trees which lack clock specs or don't match in the names
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5121.dtsi |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index 2c0e1552d20b..a5a375598ed8 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -281,7 +281,7 @@
#address-cells = 1;
#size-cells = 0;
clocks = clks MPC512x_CLK_FEC;
- clock-names = per;
+ clock-names = ipg;
};
eth0: ethernet@2800 {
@@ -291,7 +291,7 @@
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = 4 0x8;
clocks = clks MPC512x_CLK_FEC;
- clock-names = per;
+ clock-names = ipg;
};
/* USB1 using external ULPI PHY */
--
1.7.10.4
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[PATCH 3/3] dt/bindings: fsl-fec: add per to clock properties
a recent FEC binding document update that was motivated by i.MX development revealed that ARM and PowerPC implementations in Linux did not agree on the clock names to use for the FEC nodes update the FEC (fast ethernet controller) binding to document the per clock name as an obsolete alias for ipg Signed-off-by: Gerhard Sittig g...@denx.de --- this patch depends on dt/bindings: fsl-fec: add clock properties by Shawn Guo which introduces the context of this patch the patch only is necessary if the MPC5121 .dtsi update (switch FEC nodes from per to ipg) won't make it for v3.14 --- Documentation/devicetree/bindings/net/fsl-fec.txt |2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl-fec.txt b/Documentation/devicetree/bindings/net/fsl-fec.txt index 468736d4323d..f59b58e29da6 100644 --- a/Documentation/devicetree/bindings/net/fsl-fec.txt +++ b/Documentation/devicetree/bindings/net/fsl-fec.txt @@ -24,6 +24,8 @@ Optional properties: or external oscillator via pad depending on board design. - enet_out: the phy reference clock provided by SoC via pad, which is available on SoC like i.MX28. + - per: obsolete alias for ipg for compatibility with early + MPC5121 implementations, not recommended for new .dts files - clock-names: Must contain the clock names described just above Example: -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v7 1/6] dma: mpc512x: reorder mpc8308 specific instructions
[ removed DT from Cc: ] On Wed, Feb 12, 2014 at 17:25 +0400, Alexander Popov wrote: Concentrate the specific code for MPC8308 in the 'if' branch and handle MPC512x in the 'else' branch. This modification only reorders instructions but doesn't change behaviour. As this one is an obvious improvement and straight forward, it can be taken regardless of the remainder of the series. (I guess this formerly stated judgement is what made Alexander derive Acked-By tags from.) virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v7 2/6] dma: mpc512x: add support for peripheral transfers
));
+
+ if (!IS_ALIGNED(sg_dma_address(sg), 4))
+ goto err_prep;
You found multiple ways of encoding the 4 byte alignment, using
both the fixed number as well as (several) symbolic identifiers.
Can you look into making them use the same condition if the same
motivation is behind the test?
+
+ if (direction == DMA_DEV_TO_MEM) {
+ tcd-saddr = per_paddr;
+ tcd-daddr = sg_dma_address(sg);
+ tcd-soff = 0;
+ tcd-doff = 4;
+ } else if (direction == DMA_MEM_TO_DEV) {
+ tcd-saddr = sg_dma_address(sg);
+ tcd-daddr = per_paddr;
+ tcd-soff = 4;
+ tcd-doff = 0;
+ } else
+ goto err_prep;
+
+ tcd-ssize = MPC_DMA_TSIZE_4;
+ tcd-dsize = MPC_DMA_TSIZE_4;
+
+ len = sg_dma_len(sg);
+ tcd-nbytes = tcd_nunits * 4;
+ if (!IS_ALIGNED(len, tcd-nbytes))
+ goto err_prep;
+
+ iter = len / tcd-nbytes;
+ if (iter = 1 15) {
+ /* len is too big */
+ goto err_prep;
+ } else {
+ /* citer_linkch contains the high bits of iter */
+ tcd-biter = iter 0x1ff;
+ tcd-biter_linkch = iter 9;
+ tcd-citer = tcd-biter;
+ tcd-citer_linkch = tcd-biter_linkch;
+ }
+
+ tcd-e_sg = 0;
+ tcd-d_req = 1;
+
+ /* Place descriptor in prepared list */
+ spin_lock_irqsave(mchan-lock, iflags);
+ list_add_tail(mdesc-node, mchan-prepared);
+ spin_unlock_irqrestore(mchan-lock, iflags);
+ }
+
+ return mdesc-desc;
+
+err_prep:
+ /* Put the descriptor back */
+ spin_lock_irqsave(mchan-lock, iflags);
+ list_add_tail(mdesc-node, mchan-free);
+ spin_unlock_irqrestore(mchan-lock, iflags);
+
+ return NULL;
+}
virtually yours
Gerhard Sittig
--
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Re: [PATCH RFC v7 4/6] dma: mpc512x: add device tree binding document
On Wed, Feb 12, 2014 at 17:25 +0400, Alexander Popov wrote: From: Gerhard Sittig g...@denx.de introduce a device tree binding document for the MPC512x DMA controller Signed-off-by: Gerhard Sittig g...@denx.de [ a13xp0p0...@gmail.com: turn this into a separate patch ] As stated in the previous iteration, this one no longer is good enough. As time has passed, we have moved forward and learned something. We would not write a binding like this today. Admittedly I went dormant (did not provide an update) since v6. There are several issues. - The MPC512x DMA completely lacks a binding document, so one should get added. - The MPC8308 hardware is similar and can re-use the MPC512x binding, which should be stated. - The Linux implementation currently has no OF based channel lookup support, so '#dma-cells' is a future feature. I guess the binding can and should already discuss the feature, regardless of whether all implementations support it. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v7 6/6] HACK mmc: mxcmmc: enable clocks for the MPC512x
[ removed DT from Cc: ] On Wed, Feb 12, 2014 at 17:25 +0400, Alexander Popov wrote: QD HACK to enable SD card support without correct COMMON_CLK support, best viewed with 'git diff -w -b', NOT acceptable for mainline (NAKed) This one has become obsolete, v3.14-rc1 comes with proper COMMON_CLK support. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v7 0/6] MPC512x DMA slave s/g support, OF DMA lookup
For some reason you have kept the DMA maintainers, but dropped the dmaengine ML from Cc: -- was this intentional, given that the series is specifically about DMA and you want to get feedback? And you may want to help DT people by not sending purely Linux implementation related stuff to them (they already are drinking from the firehose). DT reviewers are foremost interested in bindings and policy and remaining OS agnostic, and leave mechanical .dts file updates to subsystem maintainers. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Please pull 'next' branch of 5xxx tree
On Wed, Jan 29, 2014 at 18:46 +1100, Benjamin Herrenschmidt wrote: On Tue, 2014-01-28 at 17:00 +1100, Benjamin Herrenschmidt wrote: On Tue, 2014-01-28 at 06:46 +0100, Anatolij Gustschin wrote: Hi Ben ! On Wed, 15 Jan 2014 22:18:59 +0100 Anatolij Gustschin ag...@denx.de wrote: Hi Ben ! please pull mpc5xxx patches for v3.14: Ping. Oops, you sent that while I was on vacation and I missed it. Next time, try to send your pull request earlier if possible, I'd like to have most stuff together before -rc5. I'll try to send this one to Linus after he has pulled my current one. Hrm, I get a merge conflicts with spi-mpc512x-psc.c, please check that I fixed it up properly in powerpc-next and let me know. Did read the merge commit (git show e9a371100dfd), did a build and run test of f878f84373ae powerpc: Wire up sched_setattr and sched_getattr syscalls and everything looks good. Thank you! virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v6 4/5] dma: mpc512x: register for device tree channel lookup
On Mon, Jan 13, 2014 at 12:17 +0400, Alexander Popov wrote: Thanks for your replies, Gerhard and Vinod. 2014/1/9 Vinod Koul vinod.k...@intel.com: On Wed, Jan 08, 2014 at 05:47:19PM +0100, Gerhard Sittig wrote: [ what is the semantics of DMA_PRIVATE capability flag? is documentation available beyond the initial commit message? need individual channels be handled instead of controllers? ] The DMA_PRIVATE means that your channels are not to be used for global memcpy, as one can do in async cases (this is hwere DMAengine came into existence) If the device has the capablity of doing genric memcpy then it should not set this. For slave dma usage the dam channel can transfer data to a specfic slave device(s), hence we should use this is geric fashion so setting DMA_PRIVATE makes sense in those cases. Each DMA channel of MPC512x DMA controller can do _both_ mem-to-mem transfers and transfers between mem and some slave peripheral (only one DMA channel is fully dedicated to DDR). All DMA channels of MPC512x DMA controller belong to one dma_device. So we _don't_ need setting DMA_PRIVATE flag for this dma_device at all, do we? I'd phrase it a little stronger. It's not that we don't _need_ the DMA_PRIVATE flag, it's actually that we _must_not_ use it (unless I'm being dense, and keep missing something). With the DMA_PRIVATE flag set, the generic allocator will refuse to use any channel of the only DMA controller, which totally eliminates general use, and only leaves us with explicitly configured uses (that would be MMC only in mainline, and nothing else). Still I see a difference in the lookup approaches: Yours applies DMA_PRIVATE globally and in advance, preventing _any_ use of DMA for memory transfers. While the __dma_request_channel() routine only applies it _temporarily_ around a dma_chan_get() operation. Allowing for use of DMA channels by both individual peripherals as well as memory transfers. No it doesnt prevent. You can still use it for memcpy once you have the channel. Vinod, what am I missing here? Before probe() there is no DMA controller. After probe() the DMA_PRIVATE flag is set and thus general allocation won't happen. How exactly does one get to have the channel for memory transfers? Aren't the channel references acquired upon demand, as the need arises? While the DMA controller has no means to know whether all memory transfer channel aquisition was done or whether all slave peripherals have their channel (if at all such a situation exists, given we have dynamically loadable modules), such that the DMA_PRIVATE toggle could get thrown one way or another? This brings me back to a question I raised earlier: Am I overestimating the benefit or importance of DMA supported memory transfers? Am I wrong assuming that there are users of this feature which need not get configured explicitly (i.e. they operate in transparent ways, using whatever they find to be available), and that the set of these users and their consumption of DMA resources is something that is dynamic (i.e. driven by demand, instead of pre-allocated and then probably inappropriate for the workload they see)? Excuse me, I don't completely understand why dma_request_channel() needs to set DMA_PRIVATE flag. If dma_request_channel() for some dma_device without DMA_PRIVATE is called before the first dmaengine_get() then no DMA channels of this dma_device will become available for memcpy by slab allocator. Could you give me a clue? Consider the fact that this driver handles both MPC5121 as well as MPC8308 hardware. Ah, yes, sorry. I should certainly fix this, if setting of DMA_PRIVATE flag is needed at all. What I meant here is that implications for all affected platforms should be considered. There is one driver source, but the driver applies to more than one platform (another issue of the driver is that this is not apparent from the doc nor the compat strings). I'll add a comment with information about the supported platforms to mpc512x_dma.c in RFC PATCH 1/5. Ok? So blocking memory transfers in mpc512x_dma.c is a total breakage for MPC8308 (removes the only previous feature and adds nothing), and is a regression for MPC512x (removes the previously supported memory transfers, while it may add peripheral supports with very few users). Yes, I see. MPC512x and MPC8308 should be treated differently. Alexander, are you suggesting to treat 512x and 8308 differently, and did you decide how to do that? Previous review feedback raised the question whether this is needed or appropriate, while there has not been an answer yet AFAICT. I would not jump to conclusions here, especially when you cannot test what you change. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989
Re: [PATCH RFC v6 4/5] dma: mpc512x: register for device tree channel lookup
[ dropping devicetree from the Cc: list ]
[ what is the semantics of DMA_PRIVATE capability flag?
is documentation available beyond the initial commit message?
need individual channels be handled instead of controllers? ]
On Sat, Jan 04, 2014 at 00:54 +0400, Alexander Popov wrote:
Hello Gerhard.
Thanks for your review.
2013/12/26 Gerhard Sittig g...@denx.de:
[ dropping devicetree, we're DMA specific here ]
On Tue, Dec 24, 2013 at 16:06 +0400, Alexander Popov wrote:
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
[ ... ]
@@ -950,6 +951,7 @@ static int mpc_dma_probe(struct platform_device *op)
INIT_LIST_HEAD(dma-channels);
dma_cap_set(DMA_MEMCPY, dma-cap_mask);
dma_cap_set(DMA_SLAVE, dma-cap_mask);
+ dma_cap_set(DMA_PRIVATE, dma-cap_mask);
for (i = 0; i dma-chancnt; i++) {
mchan = mdma-channels[i];
What are the implications of this? Is a comment due?
I've involved DMA_PRIVATE flag because new of_dma_xlate_by_chan_id()
uses dma_get_slave_channel() instead of dma_request_channel()
(PATCH RFC v6 3/5). This flag is implicitly set in dma_request_channel(),
but is not set in dma_get_slave_channel().
There are only two places in the mainline kernel, where
dma_get_slave_channel() is used. I've picked up the idea
at one of these places. Please look at this patch:
http://www.spinics.net/lists/arm-kernel/msg268718.html
I agree that the change looks simple, and there is no doubt that
other drivers apply the flag. None of this I questioned. Yet
I'm afraid that the implications are rather huge.
Unless I miss something, I'd happily learn where I'm wrong.
I haven't found documentation about the DMA_PRIVATE flag, only
saw commit 59b5ec21446b9 dmaengine: introduce
dma_request_channel and private channels.
Unfortunately I didn't find any description of DMA_PRIVATE flag too.
But the comment at the beginning of drivers/dma/dmaengine.c
may give a clue. Quotation:
* subsystem can get access to a channel by calling dmaengine_get() followed
* by dma_find_channel(), or if it has need for an exclusive channel
it can call
* dma_request_channel(). Once a channel is allocated a reference is taken
* against its corresponding driver to disable removal.
DMA_PRIVATE capability flag might indicate that the DMA controller
can provide exclusive channels to its clients. Please correct me if I'm wrong.
Alex, unless I'm
missing something this one-line change is quite a change in
semantics, and has dramatic influence on the code's behaviour
(ignores the DMA controller when looking for channels that can do
mem-to-mem transfers)
Excuse me, Gerhard, I don't see what you mean.
Could you point to the corresponding code?
You did see `git show 59b5ec21446b9`, didn't you? The commit
message strongly suggests that DMA_PRIVATE applies to the whole
DMA controller and excludes _all_ of its channels from the
general purpose allocator which mem-to-mem transfers appear to be
using. It's not just a hint, but an active decision to reject
requests.
Not only checking code references, but doing a text search,
reveals one more comment on the DMA_PRIVATE flag in a crypto
related document, which supports my interpretation:
Documentation/crypto/async-tx-api.txt:203
Can somebody ACK or NAK my interpretation? Dan, you committed
this change which introduced the DMA_PRIVATE logic. What was the
motivation for it, or the goal to achieve? Do other platforms
have several dedicated DMA controllers, some for peripherals and
some for memory transfers? Should the private flag apply to
channels and not whole controllers? Am I over-estimating the
benefit or importance of DMA supported memory transfers?
Still I see a difference in the lookup approaches: Yours applies
DMA_PRIVATE globally and in advance, preventing _any_ use of DMA
for memory transfers. While the __dma_request_channel() routine
only applies it _temporarily_ around a dma_chan_get() operation.
Allowing for use of DMA channels by both individual peripherals
as well as memory transfers.
Consider the fact that this driver
handles both MPC5121 as well as MPC8308 hardware.
Ah, yes, sorry. I should certainly fix this, if setting of DMA_PRIVATE flag
is needed at all.
What I meant here is that implications for all affected platforms
should be considered. There is one driver source, but the driver
applies to more than one platform (another issue of the driver is
that this is not apparent from the doc nor the compat strings).
MPC512x has one (GP) DMA controller, of which one channel is
dedicated to DDR, and all other channels can get used for memory
transfers as well. In addition to most channels being connected
to a specific peripheral for flow control. Which your patch set
introduces initial support for.
MPC8308 has _all_ channels for memory transfers exclusively (or
at least none of its channels supports flow control).
So blocking
Re: [PATCH RFC v6 4/5] dma: mpc512x: register for device tree channel lookup
On Tue, Dec 24, 2013 at 16:06 +0400, Alexander Popov wrote: --- /dev/null +++ b/Documentation/devicetree/bindings/dma/mpc512x-dma.txt @@ -0,0 +1,55 @@ +* Freescale MPC512x DMA Controller + +[ ... ] + +DMA controller node properties: + +Required properties: +- compatible:should be fsl,mpc5121-dma +- reg: address and size of the DMA controller's register set +- interrupts:interrupt spec for the DMA controller + +Optional properties: +- #dma-cells:must be 1, describes the number of integer cells + needed to specify the 'dmas' property in client nodes, + strongly recommended since common client helper code + uses this property Given how time has passed and that we learned something in the meantime, I guess the device tree documentation would look different today than what was written back then. - I'd reference the generic interrupt bindings as well, so DTS authors need not guess what an interrupt spec looks like - the #dma-cells would become less confusing is it referenced the generic DMA binding, and just say that the value is the length of the DMA specifier for this provider - the property's being recommended should not get hidden in the description but should reflect in the group's caption - the binding doc shold not reference implementation details of one specific user (common client helper code) [ device tree binding doc policy? ] That one Linux driver handles both MPC5121 and MPC8308 hardware and implements the same binding in both cases should get reflected in the documentation as well. But I'm not certain whether adding MPC8308 into an MPX5121 document is better than duplicating MPC5121 information in another MPC8308 document. But it might be the lesser evil. Are there opinions, established preferences? Is an exhaustive list of compatible strings good enough since text search will match regardless of the document's filename in this case? There must have been this situation before of a component being used in one SoC and getting re-used in another SoC later, too. What's the best document to get inspired from, i.e. how to best put this into binding document wording as well as filenames? +[ ... ] +Client node properties: + +Required properties: +- dmas: list of DMA specifiers, consisting each of a handle + for the DMA controller and integer cells to specify + the channel used within the DMA controller +- dma-names: list of identifier strings for the DMA specifiers, + client device driver code uses these strings to + have DMA channels looked up at the controller This certainly is wrong (it was before, I just wasn't aware back then). The phandle is not part of the specifier. And the binding should not discuss what driver code does. Since the DMA controller implements the semantics of the common DMA binding, it's unwise to duplicate the information here. Let me see how I can improve this document. Alex, it may be useful to split the code update and the binding document into separate patches. The current status already mixes the code extension and the binding update with the introduction of the document which was missing in the first place. That's why the binding doc patch is that late in the series. (Yes, my RFC template was rather dirty, which is why I flagged it as RFC in the first place.) I guess that I may have to introduce a binding doc reflecting the given current status, and update it later as new features become available. Or -- given that the hardware remains, all the knowledge is there already, just the implementations' capabilities change -- I might as well introduce a binding document including OF based DMA lookup. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v6 4/5] dma: mpc512x: register for device tree channel lookup
[ dropping devicetree, we're DMA specific here ]
On Tue, Dec 24, 2013 at 16:06 +0400, Alexander Popov wrote:
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
[ ... ]
@@ -950,6 +951,7 @@ static int mpc_dma_probe(struct platform_device *op)
INIT_LIST_HEAD(dma-channels);
dma_cap_set(DMA_MEMCPY, dma-cap_mask);
dma_cap_set(DMA_SLAVE, dma-cap_mask);
+ dma_cap_set(DMA_PRIVATE, dma-cap_mask);
for (i = 0; i dma-chancnt; i++) {
mchan = mdma-channels[i];
What are the implications of this? Is a comment due?
I haven't found documentation about the DMA_PRIVATE flag, only
saw commit 59b5ec21446b9 dmaengine: introduce
dma_request_channel and private channels. Alex, unless I'm
missing something this one-line change is quite a change in
semantics, and has dramatic influence on the code's behaviour
(ignores the DMA controller when looking for channels that can do
mem-to-mem transfers).
Please reason about this change some more, and explain what it
does and why it's needed. Consider the fact that this driver
handles both MPC5121 as well as MPC8308 hardware.
virtually yours
Gerhard Sittig
--
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
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Re: [PATCH] powerpc/512x: dts: disable MPC5125 usb module
On Thu, Dec 19, 2013 at 11:23 +0100, Matteo Facchinetti wrote:
USB controller pin-muxing is not initialized correctly and when system boot,
causes a kernel panic.
USB controller is also connected with a USB3320 ulpi tranciever and
DTS should be includes the correct dependency for initialize and activate
this component.
Signed-off-by: Matteo Facchinetti matteo.facchine...@sirius-es.it
---
arch/powerpc/boot/dts/mpc5125twr.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts
b/arch/powerpc/boot/dts/mpc5125twr.dts
index 806479f..85452a7 100644
--- a/arch/powerpc/boot/dts/mpc5125twr.dts
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -230,6 +230,9 @@
};
usb@3000 {
+ /* TODO correct pinmux config and fix USB3320 ulpi
dependency */
+ status = disabled;
+
compatible = fsl,mpc5121-usb2-dr;
reg = 0x3000 0x400;
#address-cells = 1;
--
1.8.3.2
I agree on the change to the board dts file, but suggest to
reword the commit description for improved reception.
I feel it's worth trying to phrase the subject line, the commit
message, and the patch such that they can get considered
independently from each other, as not all of them are necessarily
available at the same time. Often they get looked up from
different perspectives, like terse listing first for orientation,
log with description then to determine whether to have a closer
look, the patch only at the end after the other checks told you
to look into more details. Assuming that they always show up in
combination may turn out to be inaccurate.
So I suggest some text along those lines:
at the moment the USB controller's pin muxing is not setup
correctly and causes a kernel panic upon system startup, so
disable the USB1 device tree node in the MPC5125 tower board
dts file
the USB controller is connected to an USB3320 ULPI transceiver
and the device tree should receive an update to reflect correct
dependencies and required initialization data before the USB1
node can get re-enabled
Does that sound correct to you? Does it reflect your intention,
or did I put something in wrong terms?
A minor nit would be that other reviewers in the past suggested
to put the 'status = disabled' line last in the list of
properties (right before optional children). I don't have strong
feelings about this. Putting it first might better reflect your
motivation of only re-enabling the node after fixing the lack or
inappropriateness of existing information first.
A different matter is that I'd suggest to re-work the MPC5125
device tree. It recently escaped my attention because it did not
share any information with the MPC5121 trees. Comparing the
MPC5125 board DTS with the MPC5121 DTS include file resulted in a
lot of unnecessary differences that turned out to be whitespace
or comment style only, or differences in the order of nodes.
There were only few real differences in the information, and the
MPC5125 device tree appears to only describe a subset of what the
SoC actually contains.
It may be worth looking into
- identifying common parts that are shared among the MPC5121 and
MPC5125 (my recent CCF update lists differences, but does not
explicitly list similarities, and is from the clocks
perspective and may not cover all of the SoC components)
- putting those common parts into .dtsi files if possible
- making the MPC5125 tower board reference the DTS includes,
sharing as much as possible with the other SoC variants
This may involve another split of the mpc5121.dtsi into what's
common to all MPC512x variants, and what's exclusive to MPC5121
only.
But that is a bigger task than the above quick adjustment, and is
not a required fix but just an improvement in maintainability or
completeness of information. So I suggest to pick your USB1
disabling for -next and 3.14 now, and to address the DTS cleanup
and sharing later.
virtually yours
Gerhard Sittig
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
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Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
On Thu, Dec 12, 2013 at 17:12 +0100, Matteo Facchinetti wrote:
On 10/12/2013 14:11, Gerhard Sittig wrote:
this series improves the previously introduced common clock support for
MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
(MPC5125 turned out to be rather different from MPC5121 than I perceived
before -- there is much more than just two FECs and no MBX)
Ohhh yesss. welcome to hell! :-)
I report also these differences:
- I/O control module:
to do integration with linux pin-muxing subsystem
- GPIO module:
controller is the same of the mpc5121 but with these differences:
- 64 gpios divided in 2 banks
- input only gpios are numbers form 0 to 3 of the first bank
I'm finishing to write the patch... when done I'll post in ML
Yes, I've seen the 2x 32bits thing on MPC5125. Can't tell
whether one can just use two mpc8xxx-gpio nodes in the device
tree and be done.
MPC5121 has just one 32bits GPIO bank. And four of those pins
are GPI only as well. This may be identical to one of the two
MPC5125 banks.
- NFC: one of the biggest unsolved mystery
Is this ip-core used in others microcontrollers? Seems to be
used only in mpc5125!!!
Matteo, can you verify the crystal frequency in the DTS update, please?
Crystal frequency is ok: 33MHz.
great
And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
MPC512x plus this series for MPC5125 operate your peripherals, both with
an updated device tree as well as with a former device tree that lacks
clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
.config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
I tested all on TWR board.
Thank you! I think this qualifies as Tested-by: then. :)
In DTS, for the moment, have to comment out this block:
-usb@3000 {
-compatible = fsl,mpc5121-usb2-dr;
-reg = 0x3000 0x400;
-#address-cells = 1;
-#size-cells = 0;
-interrupts = 43 0x8;
-dr_mode = host;
-phy_type = ulpi;
-clocks = clks MPC512x_CLK_USB1;
-clock-names = ipg;
-};
Because USB controller pinout is not initialized correctly and when
system boot, causes a kernel panic.
For the rest, kernel works correctly. For MPC5125 the patches are OK.
I also check clk_summary and all clocks values are OK (except for
NFC clock value).
Since there is no user of the NFC block yet, I did not implement
the driver for the clock item. The list of clocks in debugfs
should completely lack an NFC entry since nothing was registered
with the CCF subsystem.
I notice that there are missing clock like: gpio1, gpio2, fuse, dma,
wdt, pmc, rtc.
Is this OK or should be added?
Are there registers for those clock items? Haven't seen any when
flipping through the RM's clocks chapter. If there's no
(software controllable) gate or divider, then there's no clock
item in need of software support.
virtually yours
Gerhard Sittig
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[PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node (5125)
the 'soc' node in the MPC5125 tower board .dts has an '#interrupt-cells' property although this node is not an interrupt controller remove this erroneously placed property because starting with v3.13-rc1 lookup and resolution of 'interrupts' specs for peripherals gets misled (tries to use the 'soc' as the interrupt parent which fails), emits 'no irq domain found' WARN() messages and breaks the boot process [ best viewed with 'git diff -U5' to have DT node names in the context ] Cc: Anatolij Gustschin ag...@denx.de Cc: linuxppc-dev@lists.ozlabs.org Cc: devicet...@vger.kernel.org Signed-off-by: Gerhard Sittig g...@denx.de --- note that this is not a resend of the previous MPC5121 fix, but instead is a fix for MPC5125 along the same lines of the MPC5121 fix --- arch/powerpc/boot/dts/mpc5125twr.dts |1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts b/arch/powerpc/boot/dts/mpc5125twr.dts index 4177b62240c2..0a0fe92216ae 100644 --- a/arch/powerpc/boot/dts/mpc5125twr.dts +++ b/arch/powerpc/boot/dts/mpc5125twr.dts @@ -58,7 +58,6 @@ compatible = fsl,mpc5121-immr; #address-cells = 1; #size-cells = 1; - #interrupt-cells = 2; ranges = 0x0 0x8000 0x40; reg = 0x8000 0x40; bus-frequency = 6600; // 66 MHz ips bus -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node
[ Cc: to Matteo as well ] On Tue, Dec 03, 2013 at 15:04 +0100, Anatolij Gustschin wrote: On Tue, 3 Dec 2013 11:56:52 +0100 Gerhard Sittig g...@denx.de wrote: the 'soc' node in the common .dtsi for MPC5121 has an '#interrupt-cells' property although this node is not an interrupt controller remove this erroneously placed property because starting with v3.13-rc1 lookup and resolution of 'interrupts' specs for peripherals gets misled, emits 'no irq domain found' WARN() messages and breaks the boot process irq: no irq domain found for /soc@8000 ! [ cut here ] WARNING: at /home/gsi/SRC/linux-torvalds/drivers/of/platform.c:171 [ ... ] ... irq: no irq domain found for /soc@8000 ! fsl-diu-fb 80002100.display: could not get DIU IRQ fsl-diu-fb: probe of 80002100.display failed with error -22 irq: no irq domain found for /soc@8000 ! mpc512x_dma 80014000.dma: Error mapping IRQ! mpc512x_dma: probe of 80014000.dma failed with error -22 ... irq: no irq domain found for /soc@8000 ! fs_enet: probe of 80002800.ethernet failed with error -22 ... irq: no irq domain found for /soc@8000 ! mpc5121-rtc 8a00.rtc: mpc5121_rtc_probe: could not request irq: 0 mpc5121-rtc: probe of 8a00.rtc failed with error -22 ... [ best viewed with 'git diff -U5' to have DT node names in the context ] Cc: Anatolij Gustschin ag...@denx.de Cc: linuxppc-dev@lists.ozlabs.org Cc: devicet...@vger.kernel.org Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/boot/dts/mpc5121.dtsi |1 - 1 file changed, 1 deletion(-) applied, thanks! FYI: I only noticed yesterday that MPC5125 suffers from the same issue, have sent 1386669068-2477-1-git-send-email-...@denx.de to fix that as well. Both patches may get squashed when going upstream. Don't have a dump at hand for MPC5125 as I don't have access to hardware. Matteo, can you verify that an unpatched v3.13-rc1 (up to and including -rc3) won't boot, and that the patch fixes the issue for you? Forgot to Cc: you on the MPC5125 patch, will bounce it to you. Thanks! virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node
On Tue, Dec 10, 2013 at 11:05 +0100, Gerhard Sittig wrote: FYI: I only noticed yesterday that MPC5125 suffers from the same issue, have sent 1386669068-2477-1-git-send-email-...@denx.de to fix that as well. Both patches may get squashed when going upstream. Don't have a dump at hand for MPC5125 as I don't have access to hardware. Had a thinko there, the MPC5121 fix already went upstream, while the MPC5125 fix is pending. So there is no squashing. Nevermind. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v6 00/17] add COMMON_CLK support for PowerPC MPC512x
[ trimmed Cc: list to PowerPC and CCF ] On Sat, Nov 30, 2013 at 23:51 +0100, Gerhard Sittig wrote: this series introduces support for the common clock framework (CCF, COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform, which brings device tree based clock lookup as well For the record: MPC5125 turned out to be quite different compared to MPC5121/5123 with regard to the set of peripherals and clock features, so I sent an update of this COMMON_CLK support motivated by MPC5125: From: Gerhard Sittig g...@denx.de To: linuxppc-dev@lists.ozlabs.org, linux-arm-ker...@lists.infradead.org, Anatolij Gustschin ag...@denx.de, Mike Turquette mturque...@linaro.org, Matteo Facchinetti matteo.facchine...@sirius-es.it Cc: Scott Wood scottw...@freescale.com, Detlev Zundel d...@denx.de, Gerhard Sittig g...@denx.de Subject: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125 Date: Tue, 10 Dec 2013 14:11:33 +0100 Message-Id: 1386681097-14126-1-git-send-email-...@denx.de virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1 2/4] powerpc/512x: clk: enforce even SDHC divider values
the SDHC clock is derived from CSB with a fractional divider which can address quarters; the implementation multiplies CSB by 4 and divides it by the (integer) divider value a bug in the clock domain synchronisation requires that only even divider values get setup; we achieve this by - multiplying CSB by 2 only instead of 4 - registering with CCF the divider's bit field without bit0 - the divider's lowest bit remains clear as this is the reset value and later operations won't touch it this change keeps fully utilizing common clock primitives (needs no additional support logic, and avoids an excessive divider table) and satisfies the hardware's constraint of only supporting even divider values Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/platforms/512x/clock-commonclk.c | 16 ++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 079eb1137260..b5190fcb81bb 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -560,9 +560,21 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq) /* now setup anything below SYS and CSB and IPS */ clks[MPC512x_CLK_DDR_UG] = mpc512x_clk_factor(ddr-ug, sys, 1, 2); - clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor(sdhc-x4, csb, 4, 1); + + /* +* the Reference Manual discusses that for SDHC only even divide +* ratios are supported because clock domain synchronization +* between 'per' and 'ipg' is broken; +* keep the divider's bit 0 cleared (per reset value), and only +* allow to setup the divider's bits 7:1, which results in that +* only even divide ratios can get configured upon rate changes; +* keep the x4 name because this bit shift hack is an internal +* implementation detail, the fractional divider with quarters +* semantics remains +*/ + clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor(sdhc-x4, csb, 2, 1); clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider(sdhc-ug, sdhc-x4, 0, - clkregs-scfr2, 0, 8, + clkregs-scfr2, 1, 7, CLK_DIVIDER_ONE_BASED); clks[MPC512x_CLK_DIU_x4] = mpc512x_clk_factor(diu-x4, csb, 4, 1); clks[MPC512x_CLK_DIU_UG] = mpc512x_clk_divider(diu-ug, diu-x4, 0, -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v1 4/4] powerpc/512x: dts: add MPC5125 clock specs
add clock related specs to the MPC5125 tower board DTS
- add clock providers (crystal/oscillator, clock control module)
- add consumers (the CAN, SDHC, I2C, DIU, FEC, USB, PSC peripherals)
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5125twr.dts | 53 +-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts
b/arch/powerpc/boot/dts/mpc5125twr.dts
index 0a0fe92216ae..806479ffc607 100644
--- a/arch/powerpc/boot/dts/mpc5125twr.dts
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -12,6 +12,8 @@
* option) any later version.
*/
+#include dt-bindings/clock/mpc512x-clock.h
+
/dts-v1/;
/ {
@@ -54,6 +56,17 @@
reg = 0x3000 0x08000; // 32K at 0x3000
};
+ clocks {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ osc: osc {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 3300;
+ };
+ };
+
soc@8000 {
compatible = fsl,mpc5121-immr;
#address-cells = 1;
@@ -87,9 +100,12 @@
reg = 0xe00 0x100;
};
- clock@f00 { // Clock control
+ clks: clock@f00 { // Clock control
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
+ #clock-cells = 1;
+ clocks = osc;
+ clock-names = osc;
};
pmc@1000{ // Power Management Controller
@@ -114,18 +130,33 @@
compatible = fsl,mpc5121-mscan;
interrupts = 12 0x8;
reg = 0x1300 0x80;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN0_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
can@1380 {
compatible = fsl,mpc5121-mscan;
interrupts = 13 0x8;
reg = 0x1380 0x80;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN1_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
sdhc@1500 {
compatible = fsl,mpc5121-sdhc;
interrupts = 8 0x8;
reg = 0x1500 0x100;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SDHC;
+ clock-names = ipg, per;
};
i2c@1700 {
@@ -134,6 +165,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1700 0x20;
interrupts = 0x9 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1720 {
@@ -142,6 +175,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1720 0x20;
interrupts = 0xa 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1740 {
@@ -150,6 +185,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1740 0x20;
interrupts = 0xb 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2ccontrol@1760 {
@@ -161,6 +198,8 @@
compatible = fsl,mpc5121-diu;
reg = 0x2100 0x100;
interrupts = 64 0x8;
+ clocks = clks MPC512x_CLK_DIU;
+ clock-names = ipg;
};
mdio@2800 {
@@ -180,6 +219,8 @@
interrupts = 4 0x8;
phy-handle = phy0 ;
phy-connection-type = rmii;
+ clocks = clks MPC512x_CLK_FEC;
+ clock-names = per;
};
// IO control
@@ -196,6 +237,8 @@
interrupts = 43 0x8;
dr_mode = host;
phy_type = ulpi;
+ clocks = clks MPC512x_CLK_USB1;
+ clock-names = ipg
[PATCH v1 3/4] powerpc/512x: clk: support MPC5121/5123/5125 SoC variants
improve the common clock support code for MPC512x
- expand the CCM register set declaration with MPC5125 related registers
(which reside in the previously reserved area)
- tell the MPC5121, MPC5123, and MPC5125 SoC variants apart, and derive
the availability of components and their clocks from the detected SoC
(MBX, AXE, VIU, SPDIF, PATA, SATA, PCI, second FEC, second SDHC,
number of PSC components, type of NAND flash controller,
interpretation of the CPMF bitfield, PSC/CAN mux0 stage input clocks,
output clocks on SoC pins)
- add backwards compatibility (allow operation against a device tree
which lacks clock related specs) for MPC5125 FECs, too
telling SoC variants apart and adjusting the clock tree's generation
occurs at runtime, a common generic binary supports all of the chips
the MPC5125 approach to the NFC clock (one register with two counters
for the high and low periods of the clock) is not implemented, as there
are no users and there is no common implementation which supports this
kind of clock -- the new implementation would be unused and could not
get verified, so it shall wait until there is demand
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/include/asm/mpc5121.h|7 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 339 +
include/dt-bindings/clock/mpc512x-clock.h |9 +-
3 files changed, 309 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc5121.h
b/arch/powerpc/include/asm/mpc5121.h
index 887d3d6133e3..4a69cd1d5041 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -37,7 +37,12 @@ struct mpc512x_ccm {
u32 cccr; /* CFM Clock Control Register */
u32 dccr; /* DIU Clock Control Register */
u32 mscan_ccr[4]; /* MSCAN Clock Control Registers */
- u8 res[0x98]; /* Reserved */
+ u32 out_ccr[4]; /* OUT CLK Configure Registers */
+ u32 rsv0[2];/* Reserved */
+ u32 scfr3; /* System Clock Frequency Register 3 */
+ u32 rsv1[3];/* Reserved */
+ u32 spll_lock_cnt; /* System PLL Lock Counter */
+ u8 res[0x6c]; /* Reserved */
};
/*
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index b5190fcb81bb..af8d50d58af5 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -36,7 +36,8 @@ enum {
#define NR_PSCS12
#define NR_MSCANS 4
#define NR_SPDIFS 1
-#define NR_MCLKS (NR_PSCS + NR_MSCANS + NR_SPDIFS)
+#define NR_OUTCLK 4
+#define NR_MCLKS (NR_PSCS + NR_MSCANS + NR_SPDIFS + NR_OUTCLK)
/* extend the public set of clocks by adding internal slots for management */
enum {
@@ -46,11 +47,11 @@ enum {
MPC512x_CLK_DDR,
MPC512x_CLK_MEM,
MPC512x_CLK_IIM,
- MPC512x_CLK_SDHC_2,
/* intermediates in div+gate combos or fractional dividers */
MPC512x_CLK_DDR_UG,
MPC512x_CLK_SDHC_x4,
MPC512x_CLK_SDHC_UG,
+ MPC512x_CLK_SDHC2_UG,
MPC512x_CLK_DIU_x4,
MPC512x_CLK_DIU_UG,
MPC512x_CLK_MBX_BUS_UG,
@@ -76,6 +77,144 @@ static struct clk_onecell_data clk_data;
static struct mpc512x_ccm __iomem *clkregs;
static DEFINE_SPINLOCK(clklock);
+/* SoC variants {{{ */
+
+/*
+ * tell SoC variants apart as they are rather similar yet not identical,
+ * cache the result in an enum to not repeatedly run the expensive OF test
+ *
+ * MPC5123 is an MPC5121 without the MBX graphics accelerator
+ *
+ * MPC5125 has many more differences: no MBX, no AXE, no VIU, no SPDIF,
+ * no PATA, no SATA, no PCI, two FECs (of different compatibility name),
+ * only 10 PSCs (of different compatibility name), two SDHCs, different
+ * NFC IP block, output clocks, system PLL status query, different CPMF
+ * interpretation, no CFM, different fourth PSC/CAN mux0 input -- yet
+ * those differences can get folded into this clock provider support
+ * code and don't warrant a separate highly redundant implementation
+ */
+
+static enum soc_type {
+ MPC512x_SOC_MPC5121,
+ MPC512x_SOC_MPC5123,
+ MPC512x_SOC_MPC5125,
+} soc;
+
+static void mpc512x_clk_determine_soc(void)
+{
+ if (of_machine_is_compatible(fsl,mpc5121)) {
+ soc = MPC512x_SOC_MPC5121;
+ return;
+ }
+ if (of_machine_is_compatible(fsl,mpc5123)) {
+ soc = MPC512x_SOC_MPC5123;
+ return;
+ }
+ if (of_machine_is_compatible(fsl,mpc5125)) {
+ soc = MPC512x_SOC_MPC5125;
+ return;
+ }
+}
+
+static bool soc_has_mbx(void)
+{
+ if (soc == MPC512x_SOC_MPC5121)
+ return true;
+ return false;
+}
+
+static bool soc_has_axe(void)
+{
+ if (soc == MPC512x_SOC_MPC5125
[PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
this series improves the previously introduced common clock support for
MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
(MPC5125 turned out to be rather different from MPC5121 than I perceived
before -- there is much more than just two FECs and no MBX)
thus this series depends on add COMMON_CLK support for PowerPC MPC512x
(v6 sent in 1385851897-23475-1-git-send-email-...@denx.de, applicable
on top of v3.13-rc1 or later, currently applied to mpc5xxx -next,
available at git://git.denx.de/linux-2.6-agust.git next)
this series does not address the issue of outdated or missing device
tree binding documentation for MPC512x peripherals -- that's the scope
of a pending separate series
v1 initial submission (2013-12-10)
- enforce an even divider value for SDHC (on all MPC512x variants)
- tell 5121/5123/5125 SoC variants apart and only register the
appropriate set of clock items (i.e. refuse to access unused and
reserved bits, and support those components which are only found on
MPC5125)
- update the MPC5125 tower board DTS (although the code still works in
the absence of device tree clock specs)
the series passes 'checkpatch.pl --strict' except for two warnings which
cannot get fixed because linux/clk-provider.h dictates the data type
and fixing the warning would break the build
WARNING: static const char * array should probably be static const char *
const
#256: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:500:
+static const char *parent_names_mux0_spdif[] = {
WARNING: static const char * array should probably be static const char *
const
#260: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:504:
+static const char *parent_names_mux0_canin[] = {
total: 0 errors, 2 warnings, 0 checks, 495 lines checked
the series was build-tested, and was run-tested on the MPC5121 ADS board
Matteo, can you verify the crystal frequency in the DTS update, please?
And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
MPC512x plus this series for MPC5125 operate your peripherals, both with
an updated device tree as well as with a former device tree that lacks
clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
.config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
Gerhard Sittig (4):
powerpc/512x: clk: minor comment updates
powerpc/512x: clk: enforce even SDHC divider values
powerpc/512x: clk: support MPC5121/5123/5125 SoC variants
powerpc/512x: dts: add MPC5125 clock specs
arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++-
arch/powerpc/include/asm/mpc5121.h|7 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 369 +
include/dt-bindings/clock/mpc512x-clock.h |9 +-
4 files changed, 386 insertions(+), 52 deletions(-)
--
1.7.10.4
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[PATCH v1 1/4] powerpc/512x: clk: minor comment updates
adjust (expand on or move) a few comments,
add markers for easier navigation around helpers
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index 189be4a4cb42..079eb1137260 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -76,6 +76,8 @@ static struct clk_onecell_data clk_data;
static struct mpc512x_ccm __iomem *clkregs;
static DEFINE_SPINLOCK(clklock);
+/* common clk API wrappers {{{ */
+
/* convenience wrappers around the common clk API */
static inline struct clk *mpc512x_clk_fixed(const char *name, int rate)
{
@@ -139,6 +141,8 @@ static inline struct clk *mpc512x_clk_muxed(const char
*name,
reg, pos, len, muxflags, clklock);
}
+/* }}} common clk API wrappers */
+
/* helper to isolate a bit field from a register */
static inline int get_bit_field(uint32_t __iomem *reg, uint8_t pos, uint8_t
len)
{
@@ -308,6 +312,8 @@ static void mpc512x_clk_setup_ref_clock(struct device_node
*np, int bus_freq,
}
}
+/* MCLK helpers {{{ */
+
/*
* helper code for the MCLK subtree setup
*
@@ -338,8 +344,8 @@ static void mpc512x_clk_setup_ref_clock(struct device_node
*np, int bus_freq,
/*
* note that this declaration raises a checkpatch warning, but
- * it's the very data type which linux/clk-provider.h expects,
- * making this declaration pass checkpatch will break compilation
+ * it's the very data type dictated by linux/clk-provider.h,
+ * fixing this warning will break compilation
*/
static const char *parent_names_mux0[] = {
sys, ref, psc-mclk-in, spdif-tx,
@@ -512,6 +518,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data
*entry, size_t idx)
}
}
+/* }}} MCLK helpers */
+
static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
{
int sys_mul, sys_div, ips_div;
@@ -549,8 +557,8 @@ static void mpc512x_clk_setup_clock_tree(struct device_node
*np, int busfreq)
clks[MPC512x_CLK_IPS] = mpc512x_clk_divtable(ips, csb,
clkregs-scfr1, 23, 3,
divtab_2346);
-
/* now setup anything below SYS and CSB and IPS */
+
clks[MPC512x_CLK_DDR_UG] = mpc512x_clk_factor(ddr-ug, sys, 1, 2);
clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor(sdhc-x4, csb, 4, 1);
clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider(sdhc-ug, sdhc-x4, 0,
--
1.7.10.4
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[PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node
the 'soc' node in the common .dtsi for MPC5121 has an '#interrupt-cells'
property although this node is not an interrupt controller
remove this erroneously placed property because starting with v3.13-rc1
lookup and resolution of 'interrupts' specs for peripherals gets misled,
emits 'no irq domain found' WARN() messages and breaks the boot process
irq: no irq domain found for /soc@8000 !
[ cut here ]
WARNING: at /home/gsi/SRC/linux-torvalds/drivers/of/platform.c:171
Modules linked in:
CPU: 0 PID: 1 Comm: swapper Tainted: GW3.13.0-rc1-1-g8a66234
#8
task: df823bb0 ti: df834000 task.ti: df834000
NIP: c02b5190 LR: c02b5180 CTR: c01cf4e0
REGS: df835c50 TRAP: 0700 Tainted: GW
(3.13.0-rc1-1-g8a66234)
MSR: 00029032 EE,ME,IR,DR,RI CR: 229a9d42 XER: 2000
GPR00: c02b5180 df835d00 df823bb0 df835b18 0308
GPR08: c0479cc0 c048 c0479cc0 0308 0308 c00040fc
GPR16: df850880
GPR24: df84d670 0001 df8561a0 dccc df85089c 0020 0001
NIP [c02b5190] of_device_alloc+0xf4/0x1a0
LR [c02b5180] of_device_alloc+0xe4/0x1a0
Call Trace:
[df835d00] [c02b5180] of_device_alloc+0xe4/0x1a0 (unreliable)
[df835d50] [c02b5278] of_platform_device_create_pdata+0x3c/0xc8
[df835d70] [c02b53fc] of_platform_bus_create+0xf8/0x170
[df835dc0] [c02b5448] of_platform_bus_create+0x144/0x170
[df835e10] [c02b55a8] of_platform_bus_probe+0x98/0xe8
[df835e30] [c0437508] mpc512x_init+0x28/0x1c4
[df835e70] [c0435de8] ppc_init+0x4c/0x60
[df835e80] [c0003b28] do_one_initcall+0x150/0x1a4
[df835ef0] [c0432048] kernel_init_freeable+0x114/0x1c0
[df835f30] [c0004114] kernel_init+0x18/0x124
[df835f40] [c000e910] ret_from_kernel_thread+0x5c/0x64
Instruction dump:
409effd4 57c9103a 57de2834 7c89f050 7f83e378 7c972214 7f45d378 48001f55
7c63d278 7c630034 5463d97e 687a0001 0f1a 2f99 387b0010 939b0098
---[ end trace 2257f10e5a20cbdd ]---
...
irq: no irq domain found for /soc@8000 !
fsl-diu-fb 80002100.display: could not get DIU IRQ
fsl-diu-fb: probe of 80002100.display failed with error -22
irq: no irq domain found for /soc@8000 !
mpc512x_dma 80014000.dma: Error mapping IRQ!
mpc512x_dma: probe of 80014000.dma failed with error -22
...
irq: no irq domain found for /soc@8000 !
fs_enet: probe of 80002800.ethernet failed with error -22
...
irq: no irq domain found for /soc@8000 !
mpc5121-rtc 8a00.rtc: mpc5121_rtc_probe: could not request irq: 0
mpc5121-rtc: probe of 8a00.rtc failed with error -22
...
[ best viewed with 'git diff -U5' to have DT node names in the context ]
Cc: Anatolij Gustschin ag...@denx.de
Cc: linuxppc-dev@lists.ozlabs.org
Cc: devicet...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5121.dtsi |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index bd14c00e5146..2d7cb04ac962 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -75,11 +75,10 @@
soc@8000 {
compatible = fsl,mpc5121-immr;
#address-cells = 1;
#size-cells = 1;
- #interrupt-cells = 2;
ranges = 0x0 0x8000 0x40;
reg = 0x8000 0x40;
bus-frequency = 6600; /* 66 MHz ips bus */
--
1.7.10.4
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Re: [PATCH v6 02/17] dts: mpc512x: introduce dt-bindings/clock/ header
On Mon, Dec 02, 2013 at 09:46 +, Mark Rutland wrote: On Sat, Nov 30, 2013 at 10:51:22PM +, Gerhard Sittig wrote: introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes There should be a binding document update to go with this, pointing out that this include file defines the set of clock IDs for the MPC512x clocks. It turns out the Freescale MPC512x did not have a separate clocks binding document, but just did the usual and followed the common bindings. I've sent a separate doc update patch which becomes applicable after the CCF implementation got accepted. Otherwise, this looks fine to me. So I take this as a reviewed by of yours for this dt-bindings header file patch, shall I have to re-submit the series. Thanks! virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v6 08/17] spi: mpc512x: adjust to OF based clock lookup
On Mon, Dec 02, 2013 at 09:50 +, Mark Rutland wrote: On Sat, Nov 30, 2013 at 10:51:28PM +, Gerhard Sittig wrote: after device tree based clock lookup became available, the peripheral driver need no longer construct clock names which include the PSC index, remove the psc%d_mclk template and unconditionally use 'mclk' acquire and release the 'ipg' clock item for register access as well For this and the other peripheral updates, it would be nice to have the expected clock-names entries added to the respective binding documents. Otherwise this looks fine to me. I will look into adding these 'clock-names' to binding documents for the peripherals, too (not just SPI but the others as well). Thank you for the feedback! It appears that not all of those peripherals have existing binding docs, so introducing these docs in the first place may exceed the scope of the CCF support introduction series, and I may have to create another series for the doc updates. I assume that it's OK to address the issue of missing documentation in a separate action. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v6 01/17] powerpc/fsl-pci: improve clock API use
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe(); the clock gets put upon device shutdown by the devm
approach
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree or implement a device tree based clock provider,
but failure to enable clocks after successful lookup is fatal
the driver appears to not have a remove() routine, so no reference to
the clock is kept during use, and the clock isn't released (the devm
approach will put the clock, but it won't get disabled or unprepared)
the 85xx/86xx platforms go through the probe() routine, where clock
lookup occurs and the clock gets acquired if one was specified; the
512x/83xx platforms don't pass through probe() but instead directly call
the add_bridge() routine at a point in time where the clock provider has
not been setup yet even if the platform implements one -- add comments
to the code paths as a reminder for the potential need of a workaround
in the platform's clock driver, and to keep awareness if code should get
re-arranged or moved
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/sysdev/fsl_pci.c | 52 +
1 file changed, 52 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4dfd61df8aba..bee8011d6bd7 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -17,6 +17,8 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+#include linux/clk.h
#include linux/kernel.h
#include linux/pci.h
#include linux/delay.h
@@ -756,6 +758,32 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
const int *bus_range;
int primary;
+ /*
+* 85xx/86xx platforms take the path through the probe() routine
+* as one would expect, PCI related clocks get acquired there if
+* specified
+*
+* 83xx/512x _don't_ pass through probe(), this add_bridge()
+* routine instead is called from within .setup_arch() at a
+* point in time where clock providers haven't been setup yet;
+* so clocks cannot get acquired here -- lookup would always
+* fail even on those platforms which implement the provider
+*
+* there is no counterpart for add_bridge() just like there is
+* no remove() counterpart for probe(), so in either case the
+* PCI related clock won't get released, and all of the
+* 512x/83xx/85xx/86xx platforms behave in identical ways
+*
+* this comment is here to keep the balance against the
+* probe() routine, and as a reminder to acquire clocks if the
+* add_bridge() call should move to some later point in time
+*
+* until then clock providers are expected to work around the
+* peripheral driver's not acquiring the PCI clock on those
+* platforms where clock providers exist, while nothing needs to
+* be done for those platforms without a clock provider
+*/
+
is_mpc83xx_pci = 1;
if (!of_device_is_available(dev)) {
@@ -1087,9 +1115,33 @@ void fsl_pci_assign_primary(void)
static int fsl_pci_probe(struct platform_device *pdev)
{
+ struct clk *clk;
int ret;
struct device_node *node;
+ /*
+* clock lookup is non-fatal since the driver is shared among
+* platforms and not all of them provide clocks specs in their
+* device tree, but failure to enable a specified clock is
+* considered fatal
+*
+* note that only the 85xx and 86xx platforms pass through this
+* probe() routine, while 83xx and 512x directly invoke the
+* mpc83xx_add_bridge() routine from within .setup_arch() code
+*/
+ clk = devm_clk_get(pdev-dev, ipg);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(pdev-dev, Could not enable PCI clock\n);
+ return ret;
+ }
+ /*
+* TODO where to store the 'clk' reference? there appears
+* to be no remove() routine which undoes what probe() does
+*/
+ }
+
node = pdev-dev.of_node;
ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
--
1.7.10.4
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[PATCH v6 02/17] dts: mpc512x: introduce dt-bindings/clock/ header
introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes Cc: Rob Herring rob.herr...@calxeda.com Cc: Pawel Moll pawel.m...@arm.com Cc: Mark Rutland mark.rutl...@arm.com Cc: Stephen Warren swar...@wwwdotorg.org Cc: Ian Campbell ian.campb...@citrix.com Cc: devicet...@vger.kernel.org Reviewed-by: Mike Turquette mturque...@linaro.org # for v3: w/o bdlc, PSC ipg Signed-off-by: Gerhard Sittig g...@denx.de --- include/dt-bindings/clock/mpc512x-clock.h | 69 + 1 file changed, 69 insertions(+) create mode 100644 include/dt-bindings/clock/mpc512x-clock.h diff --git a/include/dt-bindings/clock/mpc512x-clock.h b/include/dt-bindings/clock/mpc512x-clock.h new file mode 100644 index ..9e81b3b99a32 --- /dev/null +++ b/include/dt-bindings/clock/mpc512x-clock.h @@ -0,0 +1,69 @@ +/* + * This header provides constants for MPC512x clock specs in DT bindings. + */ + +#ifndef _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H +#define _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H + +#define MPC512x_CLK_DUMMY 0 +#define MPC512x_CLK_REF1 +#define MPC512x_CLK_SYS2 +#define MPC512x_CLK_DIU3 +#define MPC512x_CLK_VIU4 +#define MPC512x_CLK_CSB5 +#define MPC512x_CLK_E300 6 +#define MPC512x_CLK_IPS7 +#define MPC512x_CLK_FEC8 +#define MPC512x_CLK_SATA 9 +#define MPC512x_CLK_PATA 10 +#define MPC512x_CLK_NFC11 +#define MPC512x_CLK_LPC12 +#define MPC512x_CLK_MBX_BUS13 +#define MPC512x_CLK_MBX14 +#define MPC512x_CLK_MBX_3D 15 +#define MPC512x_CLK_AXE16 +#define MPC512x_CLK_USB1 17 +#define MPC512x_CLK_USB2 18 +#define MPC512x_CLK_I2C19 +#define MPC512x_CLK_MSCAN0_MCLK20 +#define MPC512x_CLK_MSCAN1_MCLK21 +#define MPC512x_CLK_MSCAN2_MCLK22 +#define MPC512x_CLK_MSCAN3_MCLK23 +#define MPC512x_CLK_BDLC 24 +#define MPC512x_CLK_SDHC 25 +#define MPC512x_CLK_PCI26 +#define MPC512x_CLK_PSC_MCLK_IN27 +#define MPC512x_CLK_SPDIF_TX 28 +#define MPC512x_CLK_SPDIF_RX 29 +#define MPC512x_CLK_SPDIF_MCLK 30 +#define MPC512x_CLK_SPDIF 31 +#define MPC512x_CLK_AC97 32 +#define MPC512x_CLK_PSC0_MCLK 33 +#define MPC512x_CLK_PSC1_MCLK 34 +#define MPC512x_CLK_PSC2_MCLK 35 +#define MPC512x_CLK_PSC3_MCLK 36 +#define MPC512x_CLK_PSC4_MCLK 37 +#define MPC512x_CLK_PSC5_MCLK 38 +#define MPC512x_CLK_PSC6_MCLK 39 +#define MPC512x_CLK_PSC7_MCLK 40 +#define MPC512x_CLK_PSC8_MCLK 41 +#define MPC512x_CLK_PSC9_MCLK 42 +#define MPC512x_CLK_PSC10_MCLK 43 +#define MPC512x_CLK_PSC11_MCLK 44 +#define MPC512x_CLK_PSC_FIFO 45 +#define MPC512x_CLK_PSC0 46 +#define MPC512x_CLK_PSC1 47 +#define MPC512x_CLK_PSC2 48 +#define MPC512x_CLK_PSC3 49 +#define MPC512x_CLK_PSC4 50 +#define MPC512x_CLK_PSC5 51 +#define MPC512x_CLK_PSC6 52 +#define MPC512x_CLK_PSC7 53 +#define MPC512x_CLK_PSC8 54 +#define MPC512x_CLK_PSC9 55 +#define MPC512x_CLK_PSC10 56 +#define MPC512x_CLK_PSC11 57 + +#define MPC512x_CLK_LAST_PUBLIC57 + +#endif -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v6 00/17] add COMMON_CLK support for PowerPC MPC512x
in comparison to v2 which introduced those fixes
(devm_{get,put}_clk() calls, fewer goto labels in error paths)
- fix and improve clock handling (balance allocation and release of
clocks, check for errors during setup) in all of the other drivers
which this series has touched before in naive ways: USB (03/31), NAND
flash (04/31), video capture (05/31), I2C (06/31), ethernet (08/31),
PCI (09/31), CAN (11/31)
- silence a build warning in the ethernet driver (07/31)
- eliminate all PPC_CLOCK references, use 'per' clock names for NAND
flash (25/31) and VIU (26/31) as well
- unbreak CAN operation for the period between introducing common clock
support in the platform's clock driver and introducing common clock
support in the CAN peripheral driver as well as providing clock specs
in the device tree (provide clkdev aliases for SYS and REF)
- improve common clock support for CAN (devm_{get,put}_clk() calls,
check enable() errors, keep a reference to used clocks, disable and
put clocks after use)
- reworded several commit messages to better reflect the kind of change
and because fixes were applied before adding common infrastructure
support
- point to individual numbered patches of the series in the list of
changes for v2 as well
changes in v2 (2013-07-18)
- cleanup of the UART (02/24) and SPI (01/24) clock handling before the
introduction of common clock support for the platform, as incomplete
clock handling becomes fatal or more dangerous later (which in turn
changes the context of the device tree lookup only followup patch
later)
- reordered the sequence of patches to keep the serial communication
related parts together (UART, SPI, and PSC FIFO changes after common
clock support was introduced, which have become 11-14/24 now)
- updated commit messages for the clock API use cleanup in the serial
communication drivers, updated comments and reworded commit messages
in the core clock driver to expand on the pre-enable workaround and
clkdev registration (09/24)
- keep a reference to the PSC FIFO clock during use instead of looking
up the clock again in the uninit() routine (14/24)
- remove the clkdev.h header file inclusion directive with the removal
of the clkdev registration call (13/24)
initial v1 (2013-07-15)
Gerhard Sittig (17):
powerpc/fsl-pci: improve clock API use
dts: mpc512x: introduce dt-bindings/clock/ header
dts: mpc512x: add clock related device tree specs
clk: mpc512x: introduce COMMON_CLK for MPC512x (disabled)
clk: mpc512x: add backwards compat to the CCF code
dts: mpc512x: add clock specs for client lookups
clk: mpc5xxx: switch to COMMON_CLK, retire PPC_CLOCK
spi: mpc512x: adjust to OF based clock lookup
serial: mpc512x: adjust for OF based clock lookup
serial: mpc512x: setup the PSC FIFO clock as well
USB: fsl-mph-dr-of: adjust for OF based clock lookup
mtd: mpc5121_nfc: adjust for OF based clock lookup
[media] fsl-viu: adjust for OF based clock lookup
net: can: mscan: adjust to common clock support for mpc512x
net: can: mscan: remove non-CCF code for MPC512x
powerpc/mpc512x: improve DIU related clock setup
clk: mpc512x: remove migration support workarounds
arch/powerpc/Kconfig |5 -
arch/powerpc/boot/dts/ac14xx.dts |7 +
arch/powerpc/boot/dts/mpc5121.dtsi| 113 ++-
arch/powerpc/include/asm/clk_interface.h | 20 -
arch/powerpc/kernel/Makefile |1 -
arch/powerpc/kernel/clock.c | 82 ---
arch/powerpc/platforms/512x/Kconfig |2 +-
arch/powerpc/platforms/512x/Makefile |3 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 951 +
arch/powerpc/platforms/512x/clock.c | 754
arch/powerpc/platforms/512x/mpc512x_shared.c | 169 +++--
arch/powerpc/platforms/52xx/Kconfig |2 +-
arch/powerpc/sysdev/fsl_pci.c | 52 ++
drivers/media/platform/fsl-viu.c |2 +-
drivers/mtd/nand/mpc5121_nfc.c|2 +-
drivers/net/can/mscan/mpc5xxx_can.c | 270 ---
drivers/spi/spi-mpc512x-psc.c | 26 +-
drivers/tty/serial/mpc52xx_uart.c | 90 ++-
drivers/usb/host/fsl-mph-dr-of.c | 13 +-
include/dt-bindings/clock/mpc512x-clock.h | 69 ++
include/linux/clk-provider.h | 16 +
21 files changed, 1557 insertions(+), 1092 deletions(-)
delete mode 100644 arch/powerpc/include/asm/clk_interface.h
delete mode 100644 arch/powerpc/kernel/clock.c
create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c
delete mode 100644 arch/powerpc/platforms/512x/clock.c
create mode 100644 include/dt-bindings/clock/mpc512x-clock.h
--
1.7.10.4
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[PATCH v6 05/17] clk: mpc512x: add backwards compat to the CCF code
extend the recently added COMMON_CLK platform support for MPC512x such
that it works with incomplete device tree data which lacks clock specs
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c | 173 -
1 file changed, 172 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index 818927248392..945e4609e773 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -11,6 +11,7 @@
* (at your option) any later version.
*/
+#include linux/bitops.h
#include linux/clk-provider.h
#include linux/clkdev.h
#include linux/device.h
@@ -745,7 +746,177 @@ static void mpc5121_clk_provide_migration_support(void)
*/
static void mpc5121_clk_provide_backwards_compat(void)
{
- /* TODO */
+ enum did_reg_flags {
+ DID_REG_PSC = BIT(0),
+ DID_REG_PSCFIFO = BIT(1),
+ DID_REG_NFC = BIT(2),
+ DID_REG_CAN = BIT(3),
+ DID_REG_I2C = BIT(4),
+ DID_REG_DIU = BIT(5),
+ DID_REG_VIU = BIT(6),
+ DID_REG_FEC = BIT(7),
+ DID_REG_USB = BIT(8),
+ DID_REG_PATA= BIT(9),
+ };
+
+ int did_register;
+ struct device_node *np;
+ struct resource res;
+ int idx;
+ char devname[32];
+
+ /*
+* those macros are not exactly pretty, but they encapsulate a lot
+* of copy'n'paste heavy code which is even more ugly, and reduce
+* the potential for inconsistencies in those many code copies
+*/
+
+#define FOR_NODES(compatname) \
+ for_each_compatible_node(np, NULL, compatname)
+
+#define NODE_PREP do { \
+ of_address_to_resource(np, 0, res); \
+ snprintf(devname, sizeof(devname), %08x.%s, res.start, np-name); \
+} while (0)
+
+#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
+ struct clk *clk; \
+ clk = of_clk_get_by_name(np, clkname); \
+ if (IS_ERR(clk)) { \
+ clk = clkitem; \
+ clk_register_clkdev(clk, clkname, devname); \
+ if (regnode) \
+ clk_register_clkdev(clk, clkname, np-name); \
+ did_register |= DID_REG_ ## regflag; \
+ pr_debug(clock alias name '%s' for dev '%s' pointer %p\n, \
+clkname, devname, clk); \
+ } else { \
+ clk_put(clk); \
+ } \
+} while (0)
+
+ did_register = 0;
+
+ FOR_NODES(mpc512x_select_psc_compat()) {
+ NODE_PREP;
+ idx = (res.start 8) 0xf;
+ NODE_CHK(ipg, clks[MPC512x_CLK_PSC0 + idx], 0, PSC);
+ NODE_CHK(mclk, clks[MPC512x_CLK_PSC0_MCLK + idx], 0, PSC);
+ }
+
+ FOR_NODES(fsl,mpc5121-psc-fifo) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_PSC_FIFO], 1, PSCFIFO);
+ }
+
+ FOR_NODES(fsl,mpc5121-nfc) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_NFC], 0, NFC);
+ }
+
+ FOR_NODES(fsl,mpc5121-mscan) {
+ NODE_PREP;
+ idx = 0;
+ idx += (res.start 0x2000) ? 2 : 0;
+ idx += (res.start 0x0080) ? 1 : 0;
+ NODE_CHK(ipg, clks[MPC512x_CLK_BDLC], 0, CAN);
+ NODE_CHK(mclk, clks[MPC512x_CLK_MSCAN0_MCLK + idx], 0, CAN);
+ }
+
+ /*
+* do register the 'ips', 'sys', and 'ref' names globally
+* instead of inside each individual CAN node, as there is no
+* potential for a name conflict (in contrast to 'ipg' and 'mclk')
+*/
+ if (did_register DID_REG_CAN) {
+ clk_register_clkdev(clks[MPC512x_CLK_IPS], ips, NULL);
+ clk_register_clkdev(clks[MPC512x_CLK_SYS], sys, NULL);
+ clk_register_clkdev(clks[MPC512x_CLK_REF], ref, NULL);
+ }
+
+ FOR_NODES(fsl,mpc5121-i2c) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_I2C], 0, I2C);
+ }
+
+ /*
+* workaround for the fact that the I2C driver does an anonymous
+* lookup (NULL name spec, which yields the first clock spec) for
+* which we cannot register an alias -- a _global_ 'ipg' alias that
+* is not bound to any device name and returns the I2C clock item
+* is not a good idea
+*
+* so we have the lookup in the peripheral driver fail, which is
+* silent and non-fatal, and pre-enable the clock item here such
+* that register access is possible
+*
+* see commit b3bfce2b i2c: mpc: cleanup clock API use for
+* details, adjusting s
[PATCH v6 04/17] clk: mpc512x: introduce COMMON_CLK for MPC512x (disabled)
this change implements a clock driver for the MPC512x PowerPC platform
which follows the COMMON_CLK approach and uses common clock drivers
shared with other platforms
this driver implements the publicly announced set of clocks (those
listed in the dt-bindings header file), as well as generates additional
'struct clk' items where the SoC hardware cannot easily get mapped to
the common primitives (shared code) of the clock API, or requires
intermediate clock nodes to represent clocks that have both gates and
dividers
the previous PPC_CLOCK implementation is kept in place and remains
active for the moment, the newly introduced CCF clock driver will
receive additional support for backwards compatibility in a subsequent
patch before it gets enabled and will replace the PPC_CLOCK approach
some of the clock items get pre-enabled in the clock driver to not have
them automatically disabled by the underlying clock subsystem because of
their being unused -- this approach is desirable because
- some of the clocks are useful to have for diagnostics and information
despite their not getting claimed by any drivers (CPU, internal and
external RAM, internal busses, boot media)
- some of the clocks aren't claimed by their peripheral drivers yet,
either because of missing driver support or because device tree specs
aren't available yet (but the workarounds will get removed as the
drivers get adjusted and the device tree provides the clock specs)
clkdev registration provides alias names for few clock items
- to not break those peripheral drivers which encode their component
index into the name that is used for clock lookup (UART, SPI, USB)
- to not break those drivers which use names for the clock lookup which
were encoded in the previous PPC_CLOCK implementation (NFC, VIU, CAN)
this workaround will get removed as these drivers get adjusted after
device tree based clock lookup has become available
the COMMON_CLK implementation copes with device trees which lack an
oscillator node (backwards compat), the REF clock is then derived from
the IPS bus frequency and multiplier values fetched from hardware
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Makefile |4 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 798 +
include/linux/clk-provider.h | 16 +
3 files changed, 817 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 72fb9340e09f..1e05f9def8a4 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,7 +1,9 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-y += clock.o mpc512x_shared.o
+obj-$(CONFIG_PPC_CLOCK)+= clock.o
+obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o
+obj-y += mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
obj-$(CONFIG_PDM360NG) += pdm360ng.o
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
new file mode 100644
index ..818927248392
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -0,0 +1,798 @@
+/*
+ * Copyright (C) 2013 DENX Software Engineering
+ *
+ * Gerhard Sittig, g...@denx.de
+ *
+ * common clock driver support for the MPC512x platform
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/clk-provider.h
+#include linux/clkdev.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/io.h
+#include linux/of.h
+#include linux/of_address.h
+
+#include asm/mpc5121.h
+#include dt-bindings/clock/mpc512x-clock.h
+
+#include mpc512x.h /* our public mpc5121_clk_init() API */
+
+/* helpers to keep the MCLK intermediates somewhere in our table */
+enum {
+ MCLK_IDX_MUX0,
+ MCLK_IDX_EN0,
+ MCLK_IDX_DIV0,
+ MCLK_MAX_IDX,
+};
+
+#define NR_PSCS12
+#define NR_MSCANS 4
+#define NR_SPDIFS 1
+#define NR_MCLKS (NR_PSCS + NR_MSCANS + NR_SPDIFS)
+
+/* extend the public set of clocks by adding internal slots for management */
+enum {
+ /* arrange for adjacent numbers after the public set */
+ MPC512x_CLK_START_PRIVATE = MPC512x_CLK_LAST_PUBLIC,
+ /* clocks which aren't announced to the public */
+ MPC512x_CLK_DDR,
+ MPC512x_CLK_MEM,
+ MPC512x_CLK_IIM
[PATCH v6 03/17] dts: mpc512x: add clock related device tree specs
this addresses the clock driver aka provider's side of clocks
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- the 'clock@f00' clock-control-module node references the 'osc' for
its input, and is another provider for all the clocks which the
CCM component manages
- prepare for future references to clocks from peripheral nodes
by means of the clks ID syntax and symbolic ID names which a
header file provides
- provide default values with 33MHz oscillator frequency in the
common include (the 66MHz IPS bus already was there), and add
override values for the ifm AC14xx board which deviates from
the reference design (25MHz xtal, 80MHz IPS bus)
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ian.campb...@citrix.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Reviewed-by: Mike Turquette mturque...@linaro.org # for v3, before osc
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |7 +++
arch/powerpc/boot/dts/mpc5121.dtsi | 18 +-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a543c4088cba..a1b883730b31 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -139,7 +139,14 @@
};
};
+ clocks {
+ osc {
+ clock-frequency = 2500;
+ };
+ };
+
soc@8000 {
+ bus-frequency = 8000; /* 80 MHz ips bus */
clock@f00 {
compatible = fsl,mpc5121rev2-clock,
fsl,mpc5121-clock;
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index bd14c00e5146..9bfcb7558197 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -9,6 +9,8 @@
* option) any later version.
*/
+#include dt-bindings/clock/mpc512x-clock.h
+
/dts-v1/;
/ {
@@ -73,6 +75,17 @@
ranges = 0x0 0x0 0xfc00 0x0400;
};
+ clocks {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ osc: osc {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 3300;
+ };
+ };
+
soc@8000 {
compatible = fsl,mpc5121-immr;
#address-cells = 1;
@@ -118,9 +131,12 @@
};
/* Clock control */
- clock@f00 {
+ clks: clock@f00 {
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
+ #clock-cells = 1;
+ clocks = osc;
+ clock-names = osc;
};
/* Power Management Controller */
--
1.7.10.4
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[PATCH v6 06/17] dts: mpc512x: add clock specs for client lookups
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ian.campb...@citrix.com
Cc: devicet...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Reviewed-by: Mike Turquette mturque...@linaro.org # for v3: w/o bdlc, PSC
ipg
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5121.dtsi | 95
1 file changed, 95 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index 9bfcb7558197..d8c6f967785f 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -51,6 +51,10 @@
compatible = fsl,mpc5121-mbx;
reg = 0x2000 0x4000;
interrupts = 66 0x8;
+ clocks = clks MPC512x_CLK_MBX_BUS,
+clks MPC512x_CLK_MBX_3D,
+clks MPC512x_CLK_MBX;
+ clock-names = mbx-bus, mbx-3d, mbx;
};
sram@3000 {
@@ -64,6 +68,8 @@
interrupts = 6 8;
#address-cells = 1;
#size-cells = 1;
+ clocks = clks MPC512x_CLK_NFC;
+ clock-names = ipg;
};
localbus@8020 {
@@ -156,12 +162,24 @@
compatible = fsl,mpc5121-mscan;
reg = 0x1300 0x80;
interrupts = 12 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN0_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
can@1380 {
compatible = fsl,mpc5121-mscan;
reg = 0x1380 0x80;
interrupts = 13 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN1_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
sdhc@1500 {
@@ -170,6 +188,9 @@
interrupts = 8 0x8;
dmas = dma0 30;
dma-names = rx-tx;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SDHC;
+ clock-names = ipg, per;
};
i2c@1700 {
@@ -178,6 +199,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1700 0x20;
interrupts = 9 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1720 {
@@ -186,6 +209,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1720 0x20;
interrupts = 10 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1740 {
@@ -194,6 +219,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1740 0x20;
interrupts = 11 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2ccontrol@1760 {
@@ -205,30 +232,48 @@
compatible = fsl,mpc5121-axe;
reg = 0x2000 0x100;
interrupts = 42 0x8;
+ clocks = clks MPC512x_CLK_AXE;
+ clock-names = ipg;
};
display@2100 {
compatible = fsl,mpc5121-diu;
reg = 0x2100 0x100;
interrupts = 64 0x8;
+ clocks = clks MPC512x_CLK_DIU;
+ clock-names = ipg;
};
can@2300 {
compatible = fsl,mpc5121-mscan;
reg = 0x2300 0x80;
interrupts = 90 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks
[PATCH v6 09/17] serial: mpc512x: adjust for OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the ipg clock item for register access as well
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org # for v4
Signed-off-by: Gerhard Sittig g...@denx.de
---
Greg, the difference since v4 of this patch is that v4 took the 'mclk'
and 'ipg' clock items in reverse order, and thus potentially obfuscated
the adjusted name for 'mclk' -- the updated version of the patch is
identical in content but cleaner diff-wise
---
drivers/tty/serial/mpc52xx_uart.c | 40 -
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index ec06505e3ae6..6345f377a246 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -619,29 +619,55 @@ static irqreturn_t mpc512x_psc_handle_irq(struct
uart_port *port)
}
static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];
+static struct clk *psc_ipg_clk[MPC52xx_PSC_MAXNUM];
/* called from within the .request_port() callback (allocation) */
static int mpc512x_psc_alloc_clock(struct uart_port *port)
{
int psc_num;
- char clk_name[16];
struct clk *clk;
int err;
psc_num = (port-mapbase 0xf00) 8;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- clk = devm_clk_get(port-dev, clk_name);
+
+ clk = devm_clk_get(port-dev, mclk);
if (IS_ERR(clk)) {
dev_err(port-dev, Failed to get MCLK!\n);
- return PTR_ERR(clk);
+ err = PTR_ERR(clk);
+ goto out_err;
}
err = clk_prepare_enable(clk);
if (err) {
dev_err(port-dev, Failed to enable MCLK!\n);
- return err;
+ goto out_err;
}
psc_mclk_clk[psc_num] = clk;
+
+ clk = devm_clk_get(port-dev, ipg);
+ if (IS_ERR(clk)) {
+ dev_err(port-dev, Failed to get IPG clock!\n);
+ err = PTR_ERR(clk);
+ goto out_err;
+ }
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(port-dev, Failed to enable IPG clock!\n);
+ goto out_err;
+ }
+ psc_ipg_clk[psc_num] = clk;
+
return 0;
+
+out_err:
+ if (psc_mclk_clk[psc_num]) {
+ clk_disable_unprepare(psc_mclk_clk[psc_num]);
+ psc_mclk_clk[psc_num] = NULL;
+ }
+ if (psc_ipg_clk[psc_num]) {
+ clk_disable_unprepare(psc_ipg_clk[psc_num]);
+ psc_ipg_clk[psc_num] = NULL;
+ }
+ return err;
}
/* called from within the .release_port() callback (release) */
@@ -656,6 +682,10 @@ static void mpc512x_psc_relse_clock(struct uart_port *port)
clk_disable_unprepare(clk);
psc_mclk_clk[psc_num] = NULL;
}
+ if (psc_ipg_clk[psc_num]) {
+ clk_disable_unprepare(psc_ipg_clk[psc_num]);
+ psc_ipg_clk[psc_num] = NULL;
+ }
}
/* implementation of the .clock() callback (enable/disable) */
--
1.7.10.4
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[PATCH v6 10/17] serial: mpc512x: setup the PSC FIFO clock as well
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization
devm_{get,put}_clk() doesn't apply here, as the SoC provides a
single FIFO component which is shared among several PSC components,
thus the FIFO isn't associated with a device (while the PSCs are)
provide a fallback clock lookup approach in case the OF based clock
lookup for the PSC FIFO fails, this allows for successful operation in
the presence of an outdated device tree which lacks clock specs
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org # for v4
Signed-off-by: Gerhard Sittig g...@denx.de
---
Greg, the addition since v4 is the clk_get_sys() call for the 'ipg'
clock item (backwards compat for device trees w/o clock specs)
---
drivers/tty/serial/mpc52xx_uart.c | 50 -
1 file changed, 44 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index 6345f377a246..97888f4900ec 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -421,6 +421,7 @@ struct psc_fifoc {
static struct psc_fifoc __iomem *psc_fifoc;
static unsigned int psc_fifoc_irq;
+static struct clk *psc_fifoc_clk;
static void mpc512x_psc_fifo_init(struct uart_port *port)
{
@@ -568,36 +569,73 @@ static unsigned int mpc512x_psc_set_baudrate(struct
uart_port *port,
/* Init PSC FIFO Controller */
static int __init mpc512x_psc_fifoc_init(void)
{
+ int err;
struct device_node *np;
+ struct clk *clk;
+
+ /* default error code, potentially overwritten by clock calls */
+ err = -ENODEV;
np = of_find_compatible_node(NULL, NULL,
fsl,mpc5121-psc-fifo);
if (!np) {
pr_err(%s: Can't find FIFOC node\n, __func__);
- return -ENODEV;
+ goto out_err;
+ }
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ /* backwards compat with device trees that lack clock specs */
+ clk = clk_get_sys(np-name, ipg);
+ }
+ if (IS_ERR(clk)) {
+ pr_err(%s: Can't lookup FIFO clock\n, __func__);
+ err = PTR_ERR(clk);
+ goto out_ofnode_put;
+ }
+ if (clk_prepare_enable(clk)) {
+ pr_err(%s: Can't enable FIFO clock\n, __func__);
+ clk_put(clk);
+ goto out_ofnode_put;
}
+ psc_fifoc_clk = clk;
psc_fifoc = of_iomap(np, 0);
if (!psc_fifoc) {
pr_err(%s: Can't map FIFOC\n, __func__);
- of_node_put(np);
- return -ENODEV;
+ goto out_clk_disable;
}
psc_fifoc_irq = irq_of_parse_and_map(np, 0);
- of_node_put(np);
if (psc_fifoc_irq == 0) {
pr_err(%s: Can't get FIFOC irq\n, __func__);
- iounmap(psc_fifoc);
- return -ENODEV;
+ goto out_unmap;
}
+ of_node_put(np);
return 0;
+
+out_unmap:
+ iounmap(psc_fifoc);
+out_clk_disable:
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+out_ofnode_put:
+ of_node_put(np);
+out_err:
+ return err;
}
static void __exit mpc512x_psc_fifoc_uninit(void)
{
iounmap(psc_fifoc);
+
+ /* disable the clock, errors are not fatal */
+ if (psc_fifoc_clk) {
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+ psc_fifoc_clk = NULL;
+ }
}
/* 512x specific interrupt handler. The caller holds the port lock */
--
1.7.10.4
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[PATCH v6 07/17] clk: mpc5xxx: switch to COMMON_CLK, retire PPC_CLOCK
the setup before the change was
- arch/powerpc/Kconfig had the PPC_CLOCK option, off by default
- depending on the PPC_CLOCK option the arch/powerpc/kernel/clock.c file
was built, which implements the clk.h API but always returns -ENOSYS
unless a platform registers specific callbacks
- the MPC52xx platform selected PPC_CLOCK but did not register any
callbacks, thus all clk.h API calls keep resulting in -ENOSYS errors
(which is OK, all peripheral drivers deal with the situation)
- the MPC512x platform selected PPC_CLOCK and registered specific
callbacks implemented in arch/powerpc/platforms/512x/clock.c, thus
provided real support for the clock API
- no other powerpc platform did select PPC_CLOCK
the situation after the change is
- the MPC512x platform implements the COMMON_CLK interface, and thus the
PPC_CLOCK approach in arch/powerpc/platforms/512x/clock.c has become
obsolete
- the MPC52xx platform still lacks genuine support for the clk.h API
while this is not a change against the previous situation (the error
code returned from COMMON_CLK stubs differs but every call still
results in an error)
- with all references gone, the arch/powerpc/kernel/clock.c wrapper and
the PPC_CLOCK option have become obsolete, as did the clk_interface.h
header file
the switch from PPC_CLOCK to COMMON_CLK is done for all platforms within
the same commit such that multiplatform kernels (the combination of 512x
and 52xx within one executable) keep working
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/Kconfig |5 -
arch/powerpc/include/asm/clk_interface.h | 20 -
arch/powerpc/kernel/Makefile |1 -
arch/powerpc/kernel/clock.c | 82
arch/powerpc/platforms/512x/Kconfig |2 +-
arch/powerpc/platforms/512x/Makefile |1 -
arch/powerpc/platforms/512x/clock.c | 754 --
arch/powerpc/platforms/52xx/Kconfig |2 +-
8 files changed, 2 insertions(+), 865 deletions(-)
delete mode 100644 arch/powerpc/include/asm/clk_interface.h
delete mode 100644 arch/powerpc/kernel/clock.c
delete mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index b44b52c0a8f0..26f8d940c6b8 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1037,11 +1037,6 @@ config KEYS_COMPAT
source crypto/Kconfig
-config PPC_CLOCK
- bool
- default n
- select HAVE_CLK
-
config PPC_LIB_RHEAP
bool
diff --git a/arch/powerpc/include/asm/clk_interface.h
b/arch/powerpc/include/asm/clk_interface.h
deleted file mode 100644
index ab1882c1e176..
--- a/arch/powerpc/include/asm/clk_interface.h
+++ /dev/null
@@ -1,20 +0,0 @@
-#ifndef __ASM_POWERPC_CLK_INTERFACE_H
-#define __ASM_POWERPC_CLK_INTERFACE_H
-
-#include linux/clk.h
-
-struct clk_interface {
- struct clk* (*clk_get) (struct device *dev, const char *id);
- int (*clk_enable) (struct clk *clk);
- void(*clk_disable) (struct clk *clk);
- unsigned long (*clk_get_rate) (struct clk *clk);
- void(*clk_put) (struct clk *clk);
- long(*clk_round_rate) (struct clk *clk, unsigned long rate);
- int (*clk_set_rate) (struct clk *clk, unsigned long rate);
- int (*clk_set_parent) (struct clk *clk, struct clk *parent);
- struct clk* (*clk_get_parent) (struct clk *clk);
-};
-
-extern struct clk_interface clk_functions;
-
-#endif /* __ASM_POWERPC_CLK_INTERFACE_H */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 445cb6e39d5b..f460a3b769dc 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -47,7 +47,6 @@ obj-$(CONFIG_ALTIVEC) += vecemu.o
obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o
obj-$(CONFIG_PPC_OF) += of_platform.o prom_parse.o
-obj-$(CONFIG_PPC_CLOCK)+= clock.o
procfs-y := proc_powerpc.o
obj-$(CONFIG_PROC_FS) += $(procfs-y)
rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o
diff --git a/arch/powerpc/kernel/clock.c b/arch/powerpc/kernel/clock.c
deleted file mode 100644
index a764b47791e8..
--- a/arch/powerpc/kernel/clock.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Dummy clk implementations for powerpc.
- * These need to be overridden in platform code.
- */
-
-#include linux/clk.h
-#include linux/err.h
-#include linux/errno.h
-#include linux/export.h
-#include asm/clk_interface.h
-
-struct clk_interface clk_functions;
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (clk_functions.clk_get)
- return clk_functions.clk_get(dev, id);
- return ERR_PTR
[PATCH v6 08/17] spi: mpc512x: adjust to OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the 'ipg' clock item for register access as well
Cc: Mark Brown broo...@kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 9602bbd8d7ea..de66c676c248 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -40,6 +40,7 @@ struct mpc512x_psc_spi {
unsigned int irq;
u8 bits_per_word;
struct clk *clk_mclk;
+ struct clk *clk_ipg;
u32 mclk_rate;
struct completion txisrdone;
@@ -475,8 +476,6 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
struct spi_master *master;
int ret;
void *tempp;
- int psc_num;
- char clk_name[16];
struct clk *clk;
master = spi_alloc_master(dev, sizeof *mps);
@@ -520,9 +519,7 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
goto free_master;
init_completion(mps-txisrdone);
- psc_num = master-bus_num;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- clk = devm_clk_get(dev, clk_name);
+ clk = devm_clk_get(dev, mclk);
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
goto free_irq;
@@ -533,17 +530,29 @@ static int mpc512x_psc_spi_do_probe(struct device *dev,
u32 regaddr,
mps-clk_mclk = clk;
mps-mclk_rate = clk_get_rate(clk);
+ clk = devm_clk_get(dev, ipg);
+ if (IS_ERR(clk)) {
+ ret = PTR_ERR(clk);
+ goto free_mclk_clock;
+ }
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ goto free_mclk_clock;
+ mps-clk_ipg = clk;
+
ret = mpc512x_psc_spi_port_config(master, mps);
if (ret 0)
- goto free_clock;
+ goto free_ipg_clock;
ret = devm_spi_register_master(dev, master);
if (ret 0)
- goto free_clock;
+ goto free_ipg_clock;
return ret;
-free_clock:
+free_ipg_clock:
+ clk_disable_unprepare(mps-clk_ipg);
+free_mclk_clock:
clk_disable_unprepare(mps-clk_mclk);
free_irq:
free_irq(mps-irq, mps);
@@ -561,6 +570,7 @@ static int mpc512x_psc_spi_do_remove(struct device *dev)
struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
clk_disable_unprepare(mps-clk_mclk);
+ clk_disable_unprepare(mps-clk_ipg);
free_irq(mps-irq, mps);
if (mps-psc)
iounmap(mps-psc);
--
1.7.10.4
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[PATCH v6 11/17] USB: fsl-mph-dr-of: adjust for OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the usb%d_clk template, always use ipg instead
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index abd5050a4899..9162d1b6c0a3 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -261,19 +261,8 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
struct fsl_usb2_platform_data *pdata = dev_get_platdata(pdev-dev);
struct clk *clk;
int err;
- char clk_name[10];
- int base, clk_num;
-
- base = pdev-resource-start 0xf000;
- if (base == 0x3000)
- clk_num = 1;
- else if (base == 0x4000)
- clk_num = 2;
- else
- return -ENODEV;
- snprintf(clk_name, sizeof(clk_name), usb%d_clk, clk_num);
- clk = devm_clk_get(pdev-dev.parent, clk_name);
+ clk = devm_clk_get(pdev-dev.parent, ipg);
if (IS_ERR(clk)) {
dev_err(pdev-dev, failed to get clk\n);
return PTR_ERR(clk);
--
1.7.10.4
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[PATCH v6 12/17] mtd: mpc5121_nfc: adjust for OF based clock lookup
after device tree based clock lookup became available, the NAND
flash driver need no longer use the previous global nfc_clk name,
but should use the ipg clock name specific to the OF node
Cc: David Woodhouse dw...@infradead.org
Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com
Cc: linux-...@lists.infradead.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 439bc3896418..779e60d12f89 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -731,7 +731,7 @@ static int mpc5121_nfc_probe(struct platform_device *op)
of_node_put(rootnode);
/* Enable NFC clock */
- clk = devm_clk_get(dev, nfc_clk);
+ clk = devm_clk_get(dev, ipg);
if (IS_ERR(clk)) {
dev_err(dev, Unable to acquire NFC clock!\n);
retval = PTR_ERR(clk);
--
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[PATCH v6 14/17] net: can: mscan: adjust to common clock support for mpc512x
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
acquire both the clock items for register access (ipg) as well as for
wire communication (can)
keep the previous implementation of MPC512x support in place during
migration, this results in a readable diff of the change
this change is neutral to the MPC5200 platform
Cc: Wolfgang Grandegger w...@grandegger.com
Cc: Marc Kleine-Budde m...@pengutronix.de
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 179 +++
1 file changed, 179 insertions(+)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index e59b3a392af6..f48f1297ff30 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,6 +109,177 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
+
+#if IS_ENABLED(CONFIG_COMMON_CLK)
+
+static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
+const char *clock_source, int *mscan_clksrc)
+{
+ struct device_node *np;
+ u32 clockdiv;
+ enum {
+ CLK_FROM_AUTO,
+ CLK_FROM_IPS,
+ CLK_FROM_SYS,
+ CLK_FROM_REF,
+ } clk_from;
+ struct clk *clk_in, *clk_can;
+ unsigned long freq_calc;
+ struct mscan_priv *priv;
+ struct clk *clk_ipg;
+
+ /* the caller passed in the clock source spec that was read from
+* the device tree, get the optional clock divider as well
+*/
+ np = ofdev-dev.of_node;
+ clockdiv = 1;
+ of_property_read_u32(np, fsl,mscan-clock-divider, clockdiv);
+ dev_dbg(ofdev-dev, device tree specs: clk src[%s] div[%d]\n,
+ clock_source ? clock_source : NULL, clockdiv);
+
+ /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to
+* get set, and the 'ips' clock is the input to the MSCAN
+* component
+*
+* for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC]
+* bit needs to get cleared, an optional clock-divider may have
+* been specified (the default value is 1), the appropriate
+* MSCAN related MCLK is the input to the MSCAN component
+*
+* in the absence of a clock-source spec, first an optimal clock
+* gets determined based on the 'sys' clock, if that fails the
+* 'ref' clock is used
+*/
+ clk_from = CLK_FROM_AUTO;
+ if (clock_source) {
+ /* interpret the device tree's spec for the clock source */
+ if (!strcmp(clock_source, ip))
+ clk_from = CLK_FROM_IPS;
+ else if (!strcmp(clock_source, sys))
+ clk_from = CLK_FROM_SYS;
+ else if (!strcmp(clock_source, ref))
+ clk_from = CLK_FROM_REF;
+ else
+ goto err_invalid;
+ dev_dbg(ofdev-dev, got a clk source spec[%d]\n, clk_from);
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, try the 'sys' clock; round to the
+* next MHz and see if we can get a multiple of 16MHz
+*/
+ dev_dbg(ofdev-dev, no clk source spec, trying SYS\n);
+ clk_in = devm_clk_get(ofdev-dev, sys);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ freq_calc = clk_get_rate(clk_in);
+ freq_calc += 49;
+ freq_calc /= 100;
+ freq_calc *= 100;
+ if ((freq_calc % 1600) == 0) {
+ clk_from = CLK_FROM_SYS;
+ clockdiv = freq_calc / 1600;
+ dev_dbg(ofdev-dev,
+ clk fit, sys[%lu] div[%d] freq[%lu]\n,
+ freq_calc, clockdiv, freq_calc / clockdiv);
+ }
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, use the 'ref' clock */
+ dev_dbg(ofdev-dev, no clk source spec, trying REF\n);
+ clk_in = devm_clk_get(ofdev-dev, ref);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ clk_from = CLK_FROM_REF;
+ freq_calc = clk_get_rate(clk_in);
+ dev_dbg(ofdev-dev,
+ clk fit, ref[%lu] (no div) freq[%lu]\n,
+ freq_calc, freq_calc);
+ }
+
+ /* select IPS or MCLK as the MSCAN input (returned to the caller),
+* setup the MCLK mux source and rate if applicable, apply
[PATCH v6 13/17] [media] fsl-viu: adjust for OF based clock lookup
after device tree based clock lookup became available, the VIU driver
need no longer use the previous global viu_clk name, but should use
the ipg clock name specific to the OF node
Cc: Mauro Carvalho Chehab m.che...@samsung.com
Cc: linux-me...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index 6a232239ee8c..dbf0ce38a8e7 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1580,7 +1580,7 @@ static int viu_of_probe(struct platform_device *op)
}
/* enable VIU clock */
- clk = devm_clk_get(op-dev, viu_clk);
+ clk = devm_clk_get(op-dev, ipg);
if (IS_ERR(clk)) {
dev_err(op-dev, failed to lookup the clock!\n);
ret = PTR_ERR(clk);
--
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[PATCH v6 15/17] net: can: mscan: remove non-CCF code for MPC512x
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control module
registers directly
Cc: Wolfgang Grandegger w...@grandegger.com
Cc: Marc Kleine-Budde m...@pengutronix.de
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 141 ---
1 file changed, 141 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index f48f1297ff30..6b0c9958d824 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,9 +109,6 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
-
-#if IS_ENABLED(CONFIG_COMMON_CLK)
-
static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
const char *clock_source, int *mscan_clksrc)
{
@@ -277,144 +274,6 @@ static void mpc512x_can_put_clock(struct platform_device
*ofdev)
if (priv-clk_ipg)
clk_disable_unprepare(priv-clk_ipg);
}
-
-#else /* COMMON_CLK */
-
-struct mpc512x_clockctl {
- u32 spmr; /* System PLL Mode Reg */
- u32 sccr[2];/* System Clk Ctrl Reg 1 2 */
- u32 scfr1; /* System Clk Freq Reg 1 */
- u32 scfr2; /* System Clk Freq Reg 2 */
- u32 reserved;
- u32 bcr;/* Bread Crumb Reg */
- u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */
- u32 spccr; /* SPDIF Clk Ctrl Reg */
- u32 cccr; /* CFM Clk Ctrl Reg */
- u32 dccr; /* DIU Clk Cnfg Reg */
- u32 mccr[4];/* MSCAN Clk Ctrl Reg 1-3 */
-};
-
-static struct of_device_id mpc512x_clock_ids[] = {
- { .compatible = fsl,mpc5121-clock, },
- {}
-};
-
-static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
-const char *clock_name, int *mscan_clksrc)
-{
- struct mpc512x_clockctl __iomem *clockctl;
- struct device_node *np_clock;
- struct clk *sys_clk, *ref_clk;
- int plen, clockidx, clocksrc = -1;
- u32 sys_freq, val, clockdiv = 1, freq = 0;
- const u32 *pval;
-
- np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
- if (!np_clock) {
- dev_err(ofdev-dev, couldn't find clock node\n);
- return 0;
- }
- clockctl = of_iomap(np_clock, 0);
- if (!clockctl) {
- dev_err(ofdev-dev, couldn't map clock registers\n);
- goto exit_put;
- }
-
- /* Determine the MSCAN device index from the peripheral's
-* physical address. Register address offsets against the
-* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380
-*/
- pval = of_get_property(ofdev-dev.of_node, reg, plen);
- BUG_ON(!pval || plen sizeof(*pval));
- clockidx = (*pval 0x80) ? 1 : 0;
- if (*pval 0x2000)
- clockidx += 2;
-
- /*
-* Clock source and divider selection: 3 different clock sources
-* can be selected: ip, ref or sys. For the latter two, a
-* clock divider can be defined as well. If the clock source is
-* not specified by the device tree, we first try to find an
-* optimal CAN source clock based on the system clock. If that
-* is not posslible, the reference clock will be used.
-*/
- if (clock_name !strcmp(clock_name, ip)) {
- *mscan_clksrc = MSCAN_CLKSRC_IPS;
- freq = mpc5xxx_get_bus_frequency(ofdev-dev.of_node);
- } else {
- *mscan_clksrc = MSCAN_CLKSRC_BUS;
-
- pval = of_get_property(ofdev-dev.of_node,
- fsl,mscan-clock-divider, plen);
- if (pval plen == sizeof(*pval))
- clockdiv = *pval;
- if (!clockdiv)
- clockdiv = 1;
-
- if (!clock_name || !strcmp(clock_name, sys)) {
- sys_clk = devm_clk_get(ofdev-dev, sys_clk);
- if (IS_ERR(sys_clk)) {
- dev_err(ofdev-dev, couldn't get sys_clk\n);
- goto exit_unmap;
- }
- /* Get and round up/down sys clock rate */
- sys_freq = 100 *
- ((clk_get_rate(sys_clk) + 49) / 100);
-
- if (!clock_name) {
- /* A multiple of 16 MHz would be optimal */
- if ((sys_freq % 1600) == 0) {
- clocksrc = 0;
- clockdiv = sys_freq / 1600
[PATCH v6 17/17] clk: mpc512x: remove migration support workarounds
this change removes workarounds which have become obsolete after
migration to common clock support has completed
- remove clkdev registration calls (compatibility clock item aliases)
after all peripheral drivers were adjusted for device tree based
clock lookup
- remove pre-enable workarounds after all peripheral drivers were
adjusted to acquire their respective clock items
workarounds for these clock items get removed: FEC (ethernet), I2C,
PSC (UART, SPI), PSC FIFO, USB, NFC (NAND flash), VIU (video capture),
BDLC (CAN), CAN MCLK, DIU (video output)
these clkdev registered names won't be provided any longer by the
MPC512x platform's clock driver: psc%d_mclk, mscan%d_mclk,
usb%d_clk, nfc_clk, viu_clk, sys_clk, ref_clk
the pre-enable workaround for PCI remains, but depends on the presence
of PCI related device tree nodes (disables the PCI clock in the absence
of PCI nodes, keeps the PCI clock enabled in the presence of nodes) --
moving clock acquisition into the peripheral driver isn't possible for
PCI because its initialization takes place before the platform clock
driver gets initialized, thus the clock provider isn't available then
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c | 50 -
1 file changed, 16 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index 945e4609e773..189be4a4cb42 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -696,46 +696,28 @@ static void mpc5121_clk_register_of_provider(struct
device_node *np)
*/
static void mpc5121_clk_provide_migration_support(void)
{
- int idx;
- char name[32];
-
- /*
-* provide pre-CCF alias clock names for peripheral drivers
-* which have not yet been adjusted to do OF based clock lookups
-*/
- clk_register_clkdev(clks[MPC512x_CLK_REF], ref_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_VIU], viu_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_NFC], nfc_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB1], usb1_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB2], usb2_clk, NULL);
- for (idx = 0; idx NR_PSCS; idx++) {
- snprintf(name, sizeof(name), psc%d_mclk, idx);
- clk_register_clkdev(clks[MPC512x_CLK_PSC0_MCLK + idx],
- name, NULL);
- }
- for (idx = 0; idx NR_MSCANS; idx++) {
- snprintf(name, sizeof(name), mscan%d_mclk, idx);
- clk_register_clkdev(clks[MPC512x_CLK_MSCAN0_MCLK + idx],
- name, NULL);
- }
- clk_register_clkdev(clks[MPC512x_CLK_SPDIF_MCLK], spdif_mclk, NULL);
/*
* pre-enable those clock items which are not yet appropriately
* acquired by their peripheral driver
+*
+* the PCI clock cannot get acquired by its peripheral driver,
+* because for this platform the driver won't probe(), instead
+* initialization is done from within the .setup_arch() routine
+* at a point in time where the clock provider has not been
+* setup yet and thus isn't available yet
+*
+* so we pre-enable the clock here, to not have the clock
+* subsystem automatically disable this item in a late init call
+*
+* this PCI clock pre-enable workaround only applies when there
+* are device tree nodes for PCI and thus the peripheral driver
+* has attached to bridges, otherwise the PCI clock remains
+* unused and so it gets disabled
*/
- clk_prepare_enable(clks[MPC512x_CLK_PSC_FIFO]);
clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
- clk_prepare_enable(clks[MPC512x_CLK_FEC]); /* network, NFS */
- clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */
- clk_prepare_enable(clks[MPC512x_CLK_I2C]); /* I2C */
- for (idx = 0; idx NR_PSCS; idx++) /* PSC ipg */
- clk_prepare_enable(clks[MPC512x_CLK_PSC0 + idx]);
- clk_prepare_enable(clks[MPC512x_CLK_BDLC]); /* MSCAN ipg */
- for (idx = 0; idx NR_MSCANS; idx++) /* MSCAN mclk */
- clk_prepare_enable(clks[MPC512x_CLK_MSCAN0_MCLK + idx]);
- clk_prepare_enable(clks[MPC512x_CLK_PCI]); /* PCI */
+ if (of_find_compatible_node(NULL, pci, fsl,mpc5121-pci))
+ clk_prepare_enable(clks[MPC512x_CLK_PCI]);
}
/*
--
1.7.10.4
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Re: [PATCH v5 08/17] spi: mpc512x: adjust to OF based clock lookup
On Mon, Nov 25, 2013 at 17:30 +, Mark Brown wrote: On Mon, Nov 18, 2013 at 12:06:08AM +0100, Gerhard Sittig wrote: after device tree based clock lookup became available, the peripheral driver need no longer construct clock names which include the PSC index, remove the psc%d_mclk template and unconditionally use 'mclk' Have there been other changes which make this happen? Not yet in mainline. The patch you respond to is 08/17 within the series, and depends on earlier patches in the series (namely the introduction of CCF support for the MPC512x platform, making the 'mclk' lookup against the PSC's OF node work while keeping the global 'pscN_mclk' in place during migration). This information was listed in the cover letter, but was not duplicated within the individual patches. Patches were sent to individual Cc: lists to not spam too many people, but the cover letter was CC'ed to every recipient of any part of the series. Please note that I will have to re-submit the series, since it no longer cleanly applies against v3.13-rc1 (which was not available when I sent v5). This patch won't change in its content, but may experience changes in its context (catchup with changes between v3.12 and v3.13-rc1). Thank you for considering the patch, and for your feedback on past versions! virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v5 00/17] add COMMON_CLK support for PowerPC MPC512x
On Mon, Nov 18, 2013 at 00:06 +0100, Gerhard Sittig wrote: the series is based on v3.12, but I'll rebase against v3.13-rc1 (when available) or any other subtree upon request Now that v3.13-rc1 is out, I noticed that the series no longer applies cleanly (minor context changes and conflicts) and needs minor adjustment. Compilation of 4/17 requires linux/of_address.h which no longer is included implicitly. PPC_CLOCK removal in 7/17 should remove asm/clk_interface.h as well after all references to this header file have gone. (And the context of the patch has changed.) The context of 16/17 for DIU initialization has changed. I'll wait for a few more days whether there is more feedback for v5 (especially on the device tree backwards compat approach), then will rebase and send out v6 of the series. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v5 01/17] powerpc/fsl-pci: improve clock API use
[ summary: the PCI driver change of mine looks innocent yet raises questions (not for the current situation, but in the face of potential future changes); these concerns were not introduced by me but were inherited from the former implementation, as I understand it let's drop my patch now, have the Layerscape series show up, and add proper clock handling to the PCI peripheral driver later, while in the meantime either nothing needs to be done (83xx, 85xx, 86xx) or workarounds do their job (512x) should 8xxx platforms want to introduce CCF support, they can and may apply the same workaround as 512x ] On Tue, Nov 19, 2013 at 16:41 -0600, Scott Wood wrote: On Mon, 2013-11-18 at 00:06 +0100, Gerhard Sittig wrote: make the Freescale PCI driver get, prepare and enable the PCI clock during probe(); the clock gets put upon device shutdown by the devm approach clock lookup is non-fatal as not all platforms may provide clock specs in their device tree or implement a device tree based clock provider, but failure to enable clocks after successful lookup is fatal the driver appears to not have a remove() routine, so no reference to the clock is kept during use, and the clock isn't released (the devm approach will put the clock, but it won't get disabled or unprepared) the 85xx/86xx platforms go through the probe() routine, where clock lookup occurs and the clock gets acquired if one was specified; the 512x/83xx platforms don't pass through probe() but instead directly call the add_bridge() routine at a point in time where the clock provider has not been setup yet even if the platform implements one -- add comments to the code paths as a reminder for the potential need of a workaround in the platform's clock driver, and to keep awareness if code should get re-arranged or moved Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: Kumar Gala ga...@kernel.crashing.org Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/sysdev/fsl_pci.c | 52 + 1 file changed, 52 insertions(+) Please coordinate this change with Minghuan Lian's patchset (posted Oct 23) to move the bulk of this driver outside of arch/powerpc. Ah, you Cc'ed him, good. I spotted an earlier RFC submission, but somehow missed more recent updates. With the move of the fsl_pci driver into pcie my comments partially turn into lies as the driver will grow .remove() support. What's necessary upon remove is along the lines of b3bfce2b i2c: mpc: cleanup clock API use or 2771399a fs_enet: cleanup clock API use (when clocks were not acquired at all) or something like 180890c7 mtd: mpc5121_nfc: cleanup clock API use or 7282bdb2 USB: fsl-mph-dr-of: cleanup clock API use (when clocks were acquired but not fully prepared). With the introduction of remove support this is just about keeping a reference to the acquired clock to disable and unprepare it, putting the clock is done by the devm mechanism. For the time being I'd suggest to skip this PCI driver clock API use cleanup patch of mine if the Layerscape PCI patch is more probable to make it into mainline, and I shall re-submit after the Layerscape patch was applied. If my patch is taken before the Layerscape change, then the latter would have to postprocess and update mine. Which would be straight forward but might be out of the scope of a move code commit. I'm fine with either approach, dropping my PCI patch now, or applying it and adding PCI clock release to .remove within the Layerscape series. diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index ccfb50ddfe38..efa0916f61b6 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -17,6 +17,8 @@ * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */ + +#include linux/clk.h #include linux/kernel.h #include linux/pci.h #include linux/delay.h @@ -755,6 +757,32 @@ int __init mpc83xx_add_bridge(struct device_node *dev) const int *bus_range; int primary; + /* +* 85xx/86xx platforms take the path through the probe() routine +* as one would expect, PCI related clocks get acquired there if +* specified +* +* 83xx/512x _don't_ pass through probe(), this add_bridge() +* routine instead is called from within .setup_arch() at a +* point in time where clock providers haven't been setup yet; +* so clocks cannot get acquired here -- lookup would always +* fail even on those platforms which implement the provider +* +* there is no counterpart for add_bridge() just like there is +* no remove() counterpart for probe(), so in either case the +* PCI related clock won't get released, and all of the +* 512x/83xx/85xx/86xx
[PATCH v5 01/17] powerpc/fsl-pci: improve clock API use
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe(); the clock gets put upon device shutdown by the devm
approach
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree or implement a device tree based clock provider,
but failure to enable clocks after successful lookup is fatal
the driver appears to not have a remove() routine, so no reference to
the clock is kept during use, and the clock isn't released (the devm
approach will put the clock, but it won't get disabled or unprepared)
the 85xx/86xx platforms go through the probe() routine, where clock
lookup occurs and the clock gets acquired if one was specified; the
512x/83xx platforms don't pass through probe() but instead directly call
the add_bridge() routine at a point in time where the clock provider has
not been setup yet even if the platform implements one -- add comments
to the code paths as a reminder for the potential need of a workaround
in the platform's clock driver, and to keep awareness if code should get
re-arranged or moved
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Kumar Gala ga...@kernel.crashing.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/sysdev/fsl_pci.c | 52 +
1 file changed, 52 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index ccfb50ddfe38..efa0916f61b6 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -17,6 +17,8 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+#include linux/clk.h
#include linux/kernel.h
#include linux/pci.h
#include linux/delay.h
@@ -755,6 +757,32 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
const int *bus_range;
int primary;
+ /*
+* 85xx/86xx platforms take the path through the probe() routine
+* as one would expect, PCI related clocks get acquired there if
+* specified
+*
+* 83xx/512x _don't_ pass through probe(), this add_bridge()
+* routine instead is called from within .setup_arch() at a
+* point in time where clock providers haven't been setup yet;
+* so clocks cannot get acquired here -- lookup would always
+* fail even on those platforms which implement the provider
+*
+* there is no counterpart for add_bridge() just like there is
+* no remove() counterpart for probe(), so in either case the
+* PCI related clock won't get released, and all of the
+* 512x/83xx/85xx/86xx platforms behave in identical ways
+*
+* this comment is here to keep the balance against the
+* probe() routine, and as a reminder to acquire clocks if the
+* add_bridge() call should move to some later point in time
+*
+* until then clock providers are expected to work around the
+* peripheral driver's not acquiring the PCI clock on those
+* platforms where clock providers exist, while nothing needs to
+* be done for those platforms without a clock provider
+*/
+
is_mpc83xx_pci = 1;
if (!of_device_is_available(dev)) {
@@ -1086,9 +1114,33 @@ void fsl_pci_assign_primary(void)
static int fsl_pci_probe(struct platform_device *pdev)
{
+ struct clk *clk;
int ret;
struct device_node *node;
+ /*
+* clock lookup is non-fatal since the driver is shared among
+* platforms and not all of them provide clocks specs in their
+* device tree, but failure to enable a specified clock is
+* considered fatal
+*
+* note that only the 85xx and 86xx platforms pass through this
+* probe() routine, while 83xx and 512x directly invoke the
+* mpc83xx_add_bridge() routine from within .setup_arch() code
+*/
+ clk = devm_clk_get(pdev-dev, ipg);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(pdev-dev, Could not enable PCI clock\n);
+ return ret;
+ }
+ /*
+* TODO where to store the 'clk' reference? there appears
+* to be no remove() routine which undoes what probe() does
+*/
+ }
+
node = pdev-dev.of_node;
ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
--
1.7.10.4
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[PATCH v5 00/17] add COMMON_CLK support for PowerPC MPC512x
in existing drivers, before introducing common clock support
in the platform's clock driver
- slightly rework the SPI (01/31), UART (02/31), and PSC FIFO (23/31)
clock handling in comparison to v2 which introduced those fixes
(devm_{get,put}_clk() calls, fewer goto labels in error paths)
- fix and improve clock handling (balance allocation and release of
clocks, check for errors during setup) in all of the other drivers
which this series has touched before in naive ways: USB (03/31), NAND
flash (04/31), video capture (05/31), I2C (06/31), ethernet (08/31),
PCI (09/31), CAN (11/31)
- silence a build warning in the ethernet driver (07/31)
- eliminate all PPC_CLOCK references, use 'per' clock names for NAND
flash (25/31) and VIU (26/31) as well
- unbreak CAN operation for the period between introducing common clock
support in the platform's clock driver and introducing common clock
support in the CAN peripheral driver as well as providing clock specs
in the device tree (provide clkdev aliases for SYS and REF)
- improve common clock support for CAN (devm_{get,put}_clk() calls,
check enable() errors, keep a reference to used clocks, disable and
put clocks after use)
- reworded several commit messages to better reflect the kind of change
and because fixes were applied before adding common infrastructure
support
- point to individual numbered patches of the series in the list of
changes for v2 as well
changes in v2:
- cleanup of the UART (02/24) and SPI (01/24) clock handling before the
introduction of common clock support for the platform, as incomplete
clock handling becomes fatal or more dangerous later (which in turn
changes the context of the device tree lookup only followup patch
later)
- reordered the sequence of patches to keep the serial communication
related parts together (UART, SPI, and PSC FIFO changes after common
clock support was introduced, which have become 11-14/24 now)
- updated commit messages for the clock API use cleanup in the serial
communication drivers, updated comments and reworded commit messages
in the core clock driver to expand on the pre-enable workaround and
clkdev registration (09/24)
- keep a reference to the PSC FIFO clock during use instead of looking
up the clock again in the uninit() routine (14/24)
- remove the clkdev.h header file inclusion directive with the removal
of the clkdev registration call (13/24)
Gerhard Sittig (17):
powerpc/fsl-pci: improve clock API use
dts: mpc512x: introduce dt-bindings/clock/ header
dts: mpc512x: add clock related device tree specs
clk: mpc512x: introduce COMMON_CLK for MPC512x (disabled)
clk: mpc512x: add backwards compat to the CCF code
dts: mpc512x: add clock specs for client lookups
clk: mpc5xxx: switch to COMMON_CLK, retire PPC_CLOCK
spi: mpc512x: adjust to OF based clock lookup
serial: mpc512x: adjust for OF based clock lookup
serial: mpc512x: setup the PSC FIFO clock as well
USB: fsl-mph-dr-of: adjust for OF based clock lookup
mtd: mpc5121_nfc: adjust for OF based clock lookup
[media] fsl-viu: adjust for OF based clock lookup
net: can: mscan: adjust to common clock support for mpc512x
net: can: mscan: remove non-CCF code for MPC512x
powerpc/mpc512x: improve DIU related clock setup
clk: mpc512x: remove migration support workarounds
arch/powerpc/Kconfig |5 -
arch/powerpc/boot/dts/ac14xx.dts |7 +
arch/powerpc/boot/dts/mpc5121.dtsi| 113 ++-
arch/powerpc/kernel/Makefile |1 -
arch/powerpc/kernel/clock.c | 82 ---
arch/powerpc/platforms/512x/Kconfig |2 +-
arch/powerpc/platforms/512x/Makefile |3 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 950 +
arch/powerpc/platforms/512x/clock.c | 753
arch/powerpc/platforms/512x/mpc512x_shared.c | 169 +++--
arch/powerpc/platforms/52xx/Kconfig |2 +-
arch/powerpc/sysdev/fsl_pci.c | 52 ++
drivers/media/platform/fsl-viu.c |2 +-
drivers/mtd/nand/mpc5121_nfc.c|2 +-
drivers/net/can/mscan/mpc5xxx_can.c | 270 ---
drivers/spi/spi-mpc512x-psc.c | 26 +-
drivers/tty/serial/mpc52xx_uart.c | 90 ++-
drivers/usb/host/fsl-mph-dr-of.c | 13 +-
include/dt-bindings/clock/mpc512x-clock.h | 69 ++
include/linux/clk-provider.h | 16 +
20 files changed, 1556 insertions(+), 1071 deletions(-)
delete mode 100644 arch/powerpc/kernel/clock.c
create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c
delete mode 100644 arch/powerpc/platforms/512x/clock.c
create mode 100644 include/dt-bindings/clock/mpc512x-clock.h
--
1.7.10.4
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[PATCH v5 02/17] dts: mpc512x: introduce dt-bindings/clock/ header
introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes Cc: Rob Herring rob.herr...@calxeda.com Cc: Pawel Moll pawel.m...@arm.com Cc: Mark Rutland mark.rutl...@arm.com Cc: Stephen Warren swar...@wwwdotorg.org Cc: Ian Campbell ian.campb...@citrix.com Cc: devicet...@vger.kernel.org Reviewed-by: Mike Turquette mturque...@linaro.org # for v3: w/o bdlc, PSC ipg Signed-off-by: Gerhard Sittig g...@denx.de --- include/dt-bindings/clock/mpc512x-clock.h | 69 + 1 file changed, 69 insertions(+) create mode 100644 include/dt-bindings/clock/mpc512x-clock.h diff --git a/include/dt-bindings/clock/mpc512x-clock.h b/include/dt-bindings/clock/mpc512x-clock.h new file mode 100644 index ..9e81b3b99a32 --- /dev/null +++ b/include/dt-bindings/clock/mpc512x-clock.h @@ -0,0 +1,69 @@ +/* + * This header provides constants for MPC512x clock specs in DT bindings. + */ + +#ifndef _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H +#define _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H + +#define MPC512x_CLK_DUMMY 0 +#define MPC512x_CLK_REF1 +#define MPC512x_CLK_SYS2 +#define MPC512x_CLK_DIU3 +#define MPC512x_CLK_VIU4 +#define MPC512x_CLK_CSB5 +#define MPC512x_CLK_E300 6 +#define MPC512x_CLK_IPS7 +#define MPC512x_CLK_FEC8 +#define MPC512x_CLK_SATA 9 +#define MPC512x_CLK_PATA 10 +#define MPC512x_CLK_NFC11 +#define MPC512x_CLK_LPC12 +#define MPC512x_CLK_MBX_BUS13 +#define MPC512x_CLK_MBX14 +#define MPC512x_CLK_MBX_3D 15 +#define MPC512x_CLK_AXE16 +#define MPC512x_CLK_USB1 17 +#define MPC512x_CLK_USB2 18 +#define MPC512x_CLK_I2C19 +#define MPC512x_CLK_MSCAN0_MCLK20 +#define MPC512x_CLK_MSCAN1_MCLK21 +#define MPC512x_CLK_MSCAN2_MCLK22 +#define MPC512x_CLK_MSCAN3_MCLK23 +#define MPC512x_CLK_BDLC 24 +#define MPC512x_CLK_SDHC 25 +#define MPC512x_CLK_PCI26 +#define MPC512x_CLK_PSC_MCLK_IN27 +#define MPC512x_CLK_SPDIF_TX 28 +#define MPC512x_CLK_SPDIF_RX 29 +#define MPC512x_CLK_SPDIF_MCLK 30 +#define MPC512x_CLK_SPDIF 31 +#define MPC512x_CLK_AC97 32 +#define MPC512x_CLK_PSC0_MCLK 33 +#define MPC512x_CLK_PSC1_MCLK 34 +#define MPC512x_CLK_PSC2_MCLK 35 +#define MPC512x_CLK_PSC3_MCLK 36 +#define MPC512x_CLK_PSC4_MCLK 37 +#define MPC512x_CLK_PSC5_MCLK 38 +#define MPC512x_CLK_PSC6_MCLK 39 +#define MPC512x_CLK_PSC7_MCLK 40 +#define MPC512x_CLK_PSC8_MCLK 41 +#define MPC512x_CLK_PSC9_MCLK 42 +#define MPC512x_CLK_PSC10_MCLK 43 +#define MPC512x_CLK_PSC11_MCLK 44 +#define MPC512x_CLK_PSC_FIFO 45 +#define MPC512x_CLK_PSC0 46 +#define MPC512x_CLK_PSC1 47 +#define MPC512x_CLK_PSC2 48 +#define MPC512x_CLK_PSC3 49 +#define MPC512x_CLK_PSC4 50 +#define MPC512x_CLK_PSC5 51 +#define MPC512x_CLK_PSC6 52 +#define MPC512x_CLK_PSC7 53 +#define MPC512x_CLK_PSC8 54 +#define MPC512x_CLK_PSC9 55 +#define MPC512x_CLK_PSC10 56 +#define MPC512x_CLK_PSC11 57 + +#define MPC512x_CLK_LAST_PUBLIC57 + +#endif -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v5 03/17] dts: mpc512x: add clock related device tree specs
this addresses the clock driver aka provider's side of clocks
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- the 'clock@f00' clock-control-module node references the 'osc' for
its input, and is another provider for all the clocks which the
CCM component manages
- prepare for future references to clocks from peripheral nodes
by means of the clks ID syntax and symbolic ID names which a
header file provides
- provide default values with 33MHz oscillator frequency in the
common include (the 66MHz IPS bus already was there), and add
override values for the ifm AC14xx board which deviates from
the reference design (25MHz xtal, 80MHz IPS bus)
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ian.campb...@citrix.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: devicet...@vger.kernel.org
Reviewed-by: Mike Turquette mturque...@linaro.org # for v3, before osc
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |7 +++
arch/powerpc/boot/dts/mpc5121.dtsi | 18 +-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a543c4088cba..a1b883730b31 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -139,7 +139,14 @@
};
};
+ clocks {
+ osc {
+ clock-frequency = 2500;
+ };
+ };
+
soc@8000 {
+ bus-frequency = 8000; /* 80 MHz ips bus */
clock@f00 {
compatible = fsl,mpc5121rev2-clock,
fsl,mpc5121-clock;
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index bd14c00e5146..9bfcb7558197 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -9,6 +9,8 @@
* option) any later version.
*/
+#include dt-bindings/clock/mpc512x-clock.h
+
/dts-v1/;
/ {
@@ -73,6 +75,17 @@
ranges = 0x0 0x0 0xfc00 0x0400;
};
+ clocks {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ osc: osc {
+ compatible = fixed-clock;
+ #clock-cells = 0;
+ clock-frequency = 3300;
+ };
+ };
+
soc@8000 {
compatible = fsl,mpc5121-immr;
#address-cells = 1;
@@ -118,9 +131,12 @@
};
/* Clock control */
- clock@f00 {
+ clks: clock@f00 {
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
+ #clock-cells = 1;
+ clocks = osc;
+ clock-names = osc;
};
/* Power Management Controller */
--
1.7.10.4
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[PATCH v5 04/17] clk: mpc512x: introduce COMMON_CLK for MPC512x (disabled)
this change implements a clock driver for the MPC512x PowerPC platform
which follows the COMMON_CLK approach and uses common clock drivers
shared with other platforms
this driver implements the publicly announced set of clocks (those
listed in the dt-bindings header file), as well as generates additional
'struct clk' items where the SoC hardware cannot easily get mapped to
the common primitives (shared code) of the clock API, or requires
intermediate clock nodes to represent clocks that have both gates and
dividers
the previous PPC_CLOCK implementation is kept in place and remains
active for the moment, the newly introduced CCF clock driver will
receive additional support for backwards compatibility in a subsequent
patch before it gets enabled and will replace the PPC_CLOCK approach
some of the clock items get pre-enabled in the clock driver to not have
them automatically disabled by the underlying clock subsystem because of
their being unused -- this approach is desirable because
- some of the clocks are useful to have for diagnostics and information
despite their not getting claimed by any drivers (CPU, internal and
external RAM, internal busses, boot media)
- some of the clocks aren't claimed by their peripheral drivers yet,
either because of missing driver support or because device tree specs
aren't available yet (but the workarounds will get removed as the
drivers get adjusted and the device tree provides the clock specs)
clkdev registration provides alias names for few clock items
- to not break those peripheral drivers which encode their component
index into the name that is used for clock lookup (UART, SPI, USB)
- to not break those drivers which use names for the clock lookup which
were encoded in the previous PPC_CLOCK implementation (NFC, VIU, CAN)
this workaround will get removed as these drivers get adjusted after
device tree based clock lookup has become available
the COMMON_CLK implementation copes with device trees which lack an
oscillator node (backwards compat), the REF clock is then derived from
the IPS bus frequency and multiplier values fetched from hardware
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Makefile |4 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 797 +
include/linux/clk-provider.h | 16 +
3 files changed, 816 insertions(+), 1 deletion(-)
create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 72fb9340e09f..1e05f9def8a4 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,7 +1,9 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-y += clock.o mpc512x_shared.o
+obj-$(CONFIG_PPC_CLOCK)+= clock.o
+obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o
+obj-y += mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
obj-$(CONFIG_PDM360NG) += pdm360ng.o
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
new file mode 100644
index ..ddbeaec79246
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -0,0 +1,797 @@
+/*
+ * Copyright (C) 2013 DENX Software Engineering
+ *
+ * Gerhard Sittig, g...@denx.de
+ *
+ * common clock driver support for the MPC512x platform
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include linux/clk-provider.h
+#include linux/clkdev.h
+#include linux/device.h
+#include linux/errno.h
+#include linux/io.h
+#include linux/of.h
+
+#include asm/mpc5121.h
+#include dt-bindings/clock/mpc512x-clock.h
+
+#include mpc512x.h /* our public mpc5121_clk_init() API */
+
+/* helpers to keep the MCLK intermediates somewhere in our table */
+enum {
+ MCLK_IDX_MUX0,
+ MCLK_IDX_EN0,
+ MCLK_IDX_DIV0,
+ MCLK_MAX_IDX,
+};
+
+#define NR_PSCS12
+#define NR_MSCANS 4
+#define NR_SPDIFS 1
+#define NR_MCLKS (NR_PSCS + NR_MSCANS + NR_SPDIFS)
+
+/* extend the public set of clocks by adding internal slots for management */
+enum {
+ /* arrange for adjacent numbers after the public set */
+ MPC512x_CLK_START_PRIVATE = MPC512x_CLK_LAST_PUBLIC,
+ /* clocks which aren't announced to the public */
+ MPC512x_CLK_DDR,
+ MPC512x_CLK_MEM,
+ MPC512x_CLK_IIM,
+ MPC512x_CLK_SDHC_2
[PATCH v5 05/17] clk: mpc512x: add backwards compat to the CCF code
extend the recently added COMMON_CLK platform support for MPC512x such
that it works with incomplete device tree data which lacks clock specs
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c | 173 -
1 file changed, 172 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index ddbeaec79246..c1faf3a9ea1f 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -11,6 +11,7 @@
* (at your option) any later version.
*/
+#include linux/bitops.h
#include linux/clk-provider.h
#include linux/clkdev.h
#include linux/device.h
@@ -744,7 +745,177 @@ static void mpc5121_clk_provide_migration_support(void)
*/
static void mpc5121_clk_provide_backwards_compat(void)
{
- /* TODO */
+ enum did_reg_flags {
+ DID_REG_PSC = BIT(0),
+ DID_REG_PSCFIFO = BIT(1),
+ DID_REG_NFC = BIT(2),
+ DID_REG_CAN = BIT(3),
+ DID_REG_I2C = BIT(4),
+ DID_REG_DIU = BIT(5),
+ DID_REG_VIU = BIT(6),
+ DID_REG_FEC = BIT(7),
+ DID_REG_USB = BIT(8),
+ DID_REG_PATA= BIT(9),
+ };
+
+ int did_register;
+ struct device_node *np;
+ struct resource res;
+ int idx;
+ char devname[32];
+
+ /*
+* those macros are not exactly pretty, but they encapsulate a lot
+* of copy'n'paste heavy code which is even more ugly, and reduce
+* the potential for inconsistencies in those many code copies
+*/
+
+#define FOR_NODES(compatname) \
+ for_each_compatible_node(np, NULL, compatname)
+
+#define NODE_PREP do { \
+ of_address_to_resource(np, 0, res); \
+ snprintf(devname, sizeof(devname), %08x.%s, res.start, np-name); \
+} while (0)
+
+#define NODE_CHK(clkname, clkitem, regnode, regflag) do { \
+ struct clk *clk; \
+ clk = of_clk_get_by_name(np, clkname); \
+ if (IS_ERR(clk)) { \
+ clk = clkitem; \
+ clk_register_clkdev(clk, clkname, devname); \
+ if (regnode) \
+ clk_register_clkdev(clk, clkname, np-name); \
+ did_register |= DID_REG_ ## regflag; \
+ pr_debug(clock alias name '%s' for dev '%s' pointer %p\n, \
+clkname, devname, clk); \
+ } else { \
+ clk_put(clk); \
+ } \
+} while (0)
+
+ did_register = 0;
+
+ FOR_NODES(mpc512x_select_psc_compat()) {
+ NODE_PREP;
+ idx = (res.start 8) 0xf;
+ NODE_CHK(ipg, clks[MPC512x_CLK_PSC0 + idx], 0, PSC);
+ NODE_CHK(mclk, clks[MPC512x_CLK_PSC0_MCLK + idx], 0, PSC);
+ }
+
+ FOR_NODES(fsl,mpc5121-psc-fifo) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_PSC_FIFO], 1, PSCFIFO);
+ }
+
+ FOR_NODES(fsl,mpc5121-nfc) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_NFC], 0, NFC);
+ }
+
+ FOR_NODES(fsl,mpc5121-mscan) {
+ NODE_PREP;
+ idx = 0;
+ idx += (res.start 0x2000) ? 2 : 0;
+ idx += (res.start 0x0080) ? 1 : 0;
+ NODE_CHK(ipg, clks[MPC512x_CLK_BDLC], 0, CAN);
+ NODE_CHK(mclk, clks[MPC512x_CLK_MSCAN0_MCLK + idx], 0, CAN);
+ }
+
+ /*
+* do register the 'ips', 'sys', and 'ref' names globally
+* instead of inside each individual CAN node, as there is no
+* potential for a name conflict (in contrast to 'ipg' and 'mclk')
+*/
+ if (did_register DID_REG_CAN) {
+ clk_register_clkdev(clks[MPC512x_CLK_IPS], ips, NULL);
+ clk_register_clkdev(clks[MPC512x_CLK_SYS], sys, NULL);
+ clk_register_clkdev(clks[MPC512x_CLK_REF], ref, NULL);
+ }
+
+ FOR_NODES(fsl,mpc5121-i2c) {
+ NODE_PREP;
+ NODE_CHK(ipg, clks[MPC512x_CLK_I2C], 0, I2C);
+ }
+
+ /*
+* workaround for the fact that the I2C driver does an anonymous
+* lookup (NULL name spec, which yields the first clock spec) for
+* which we cannot register an alias -- a _global_ 'ipg' alias that
+* is not bound to any device name and returns the I2C clock item
+* is not a good idea
+*
+* so we have the lookup in the peripheral driver fail, which is
+* silent and non-fatal, and pre-enable the clock item here such
+* that register access is possible
+*
+* see commit b3bfce2b i2c: mpc: cleanup clock API use for
+* details, adjusting s
[PATCH v5 06/17] dts: mpc512x: add clock specs for client lookups
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Pawel Moll pawel.m...@arm.com
Cc: Mark Rutland mark.rutl...@arm.com
Cc: Stephen Warren swar...@wwwdotorg.org
Cc: Ian Campbell ian.campb...@citrix.com
Cc: devicet...@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Reviewed-by: Mike Turquette mturque...@linaro.org # for v3: w/o bdlc, PSC
ipg
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5121.dtsi | 95
1 file changed, 95 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index 9bfcb7558197..d8c6f967785f 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -51,6 +51,10 @@
compatible = fsl,mpc5121-mbx;
reg = 0x2000 0x4000;
interrupts = 66 0x8;
+ clocks = clks MPC512x_CLK_MBX_BUS,
+clks MPC512x_CLK_MBX_3D,
+clks MPC512x_CLK_MBX;
+ clock-names = mbx-bus, mbx-3d, mbx;
};
sram@3000 {
@@ -64,6 +68,8 @@
interrupts = 6 8;
#address-cells = 1;
#size-cells = 1;
+ clocks = clks MPC512x_CLK_NFC;
+ clock-names = ipg;
};
localbus@8020 {
@@ -156,12 +162,24 @@
compatible = fsl,mpc5121-mscan;
reg = 0x1300 0x80;
interrupts = 12 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN0_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
can@1380 {
compatible = fsl,mpc5121-mscan;
reg = 0x1380 0x80;
interrupts = 13 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN1_MCLK;
+ clock-names = ipg, ips, sys, ref, mclk;
};
sdhc@1500 {
@@ -170,6 +188,9 @@
interrupts = 8 0x8;
dmas = dma0 30;
dma-names = rx-tx;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SDHC;
+ clock-names = ipg, per;
};
i2c@1700 {
@@ -178,6 +199,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1700 0x20;
interrupts = 9 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1720 {
@@ -186,6 +209,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1720 0x20;
interrupts = 10 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2c@1740 {
@@ -194,6 +219,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1740 0x20;
interrupts = 11 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = ipg;
};
i2ccontrol@1760 {
@@ -205,30 +232,48 @@
compatible = fsl,mpc5121-axe;
reg = 0x2000 0x100;
interrupts = 42 0x8;
+ clocks = clks MPC512x_CLK_AXE;
+ clock-names = ipg;
};
display@2100 {
compatible = fsl,mpc5121-diu;
reg = 0x2100 0x100;
interrupts = 64 0x8;
+ clocks = clks MPC512x_CLK_DIU;
+ clock-names = ipg;
};
can@2300 {
compatible = fsl,mpc5121-mscan;
reg = 0x2300 0x80;
interrupts = 90 0x8;
+ clocks = clks MPC512x_CLK_BDLC,
+clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks
[PATCH v5 07/17] clk: mpc5xxx: switch to COMMON_CLK, retire PPC_CLOCK
the setup before the change was
- arch/powerpc/Kconfig had the PPC_CLOCK option, off by default
- depending on the PPC_CLOCK option the arch/powerpc/kernel/clock.c file
was built, which implements the clk.h API but always returns -ENOSYS
unless a platform registers specific callbacks
- the MPC52xx platform selected PPC_CLOCK but did not register any
callbacks, thus all clk.h API calls keep resulting in -ENOSYS errors
(which is OK, all peripheral drivers deal with the situation)
- the MPC512x platform selected PPC_CLOCK and registered specific
callbacks implemented in arch/powerpc/platforms/512x/clock.c, thus
provided real support for the clock API
- no other powerpc platform did select PPC_CLOCK
the situation after the change is
- the MPC512x platform implements the COMMON_CLK interface, and thus the
PPC_CLOCK approach in arch/powerpc/platforms/512x/clock.c has become
obsolete
- the MPC52xx platform still lacks genuine support for the clk.h API
while this is not a change against the previous situation (the error
code returned from COMMON_CLK stubs differs but every call still
results in an error)
- with all references gone, the arch/powerpc/kernel/clock.c wrapper and
the PPC_CLOCK option have become obsolete
the switch from PPC_CLOCK to COMMON_CLK is done for all platforms within
the same commit such that multiplatform kernels (the combination of 512x
and 52xx within one executable) keep working
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/Kconfig |5 -
arch/powerpc/kernel/Makefile |1 -
arch/powerpc/kernel/clock.c | 82
arch/powerpc/platforms/512x/Kconfig |2 +-
arch/powerpc/platforms/512x/Makefile |1 -
arch/powerpc/platforms/512x/clock.c | 753 --
arch/powerpc/platforms/52xx/Kconfig |2 +-
7 files changed, 2 insertions(+), 844 deletions(-)
delete mode 100644 arch/powerpc/kernel/clock.c
delete mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 38f3b7e47ec5..ccf5132e61e7 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1030,11 +1030,6 @@ config KEYS_COMPAT
source crypto/Kconfig
-config PPC_CLOCK
- bool
- default n
- select HAVE_CLK
-
config PPC_LIB_RHEAP
bool
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 445cb6e39d5b..f460a3b769dc 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -47,7 +47,6 @@ obj-$(CONFIG_ALTIVEC) += vecemu.o
obj-$(CONFIG_PPC_970_NAP) += idle_power4.o
obj-$(CONFIG_PPC_P7_NAP) += idle_power7.o
obj-$(CONFIG_PPC_OF) += of_platform.o prom_parse.o
-obj-$(CONFIG_PPC_CLOCK)+= clock.o
procfs-y := proc_powerpc.o
obj-$(CONFIG_PROC_FS) += $(procfs-y)
rtaspci-$(CONFIG_PPC64)-$(CONFIG_PCI) := rtas_pci.o
diff --git a/arch/powerpc/kernel/clock.c b/arch/powerpc/kernel/clock.c
deleted file mode 100644
index a764b47791e8..
--- a/arch/powerpc/kernel/clock.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * Dummy clk implementations for powerpc.
- * These need to be overridden in platform code.
- */
-
-#include linux/clk.h
-#include linux/err.h
-#include linux/errno.h
-#include linux/export.h
-#include asm/clk_interface.h
-
-struct clk_interface clk_functions;
-
-struct clk *clk_get(struct device *dev, const char *id)
-{
- if (clk_functions.clk_get)
- return clk_functions.clk_get(dev, id);
- return ERR_PTR(-ENOSYS);
-}
-EXPORT_SYMBOL(clk_get);
-
-void clk_put(struct clk *clk)
-{
- if (clk_functions.clk_put)
- clk_functions.clk_put(clk);
-}
-EXPORT_SYMBOL(clk_put);
-
-int clk_enable(struct clk *clk)
-{
- if (clk_functions.clk_enable)
- return clk_functions.clk_enable(clk);
- return -ENOSYS;
-}
-EXPORT_SYMBOL(clk_enable);
-
-void clk_disable(struct clk *clk)
-{
- if (clk_functions.clk_disable)
- clk_functions.clk_disable(clk);
-}
-EXPORT_SYMBOL(clk_disable);
-
-unsigned long clk_get_rate(struct clk *clk)
-{
- if (clk_functions.clk_get_rate)
- return clk_functions.clk_get_rate(clk);
- return 0;
-}
-EXPORT_SYMBOL(clk_get_rate);
-
-long clk_round_rate(struct clk *clk, unsigned long rate)
-{
- if (clk_functions.clk_round_rate)
- return clk_functions.clk_round_rate(clk, rate);
- return -ENOSYS;
-}
-EXPORT_SYMBOL(clk_round_rate);
-
-int clk_set_rate(struct clk *clk, unsigned long rate)
-{
- if (clk_functions.clk_set_rate)
- return clk_functions.clk_set_rate(clk, rate);
- return -ENOSYS;
-}
-EXPORT_SYMBOL(clk_set_rate);
-
-struct clk *clk_get_parent(struct clk *clk
[PATCH v5 08/17] spi: mpc512x: adjust to OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the 'ipg' clock item for register access as well
Cc: Mark Brown broo...@kernel.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c | 26 ++
1 file changed, 18 insertions(+), 8 deletions(-)
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 6adf4e35816d..5beb30c61a39 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -39,6 +39,7 @@ struct mpc512x_psc_spi {
unsigned int irq;
u8 bits_per_word;
struct clk *clk_mclk;
+ struct clk *clk_ipg;
u32 mclk_rate;
struct completion txisrdone;
@@ -474,8 +475,6 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
struct spi_master *master;
int ret;
void *tempp;
- int psc_num;
- char clk_name[16];
struct clk *clk;
master = spi_alloc_master(dev, sizeof *mps);
@@ -519,9 +518,7 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
goto free_master;
init_completion(mps-txisrdone);
- psc_num = master-bus_num;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- clk = devm_clk_get(dev, clk_name);
+ clk = devm_clk_get(dev, mclk);
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
goto free_irq;
@@ -532,17 +529,29 @@ static int mpc512x_psc_spi_do_probe(struct device *dev,
u32 regaddr,
mps-clk_mclk = clk;
mps-mclk_rate = clk_get_rate(clk);
+ clk = devm_clk_get(dev, ipg);
+ if (IS_ERR(clk)) {
+ ret = PTR_ERR(clk);
+ goto free_mclk_clock;
+ }
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ goto free_mclk_clock;
+ mps-clk_ipg = clk;
+
ret = mpc512x_psc_spi_port_config(master, mps);
if (ret 0)
- goto free_clock;
+ goto free_ipg_clock;
ret = spi_register_master(master);
if (ret 0)
- goto free_clock;
+ goto free_ipg_clock;
return ret;
-free_clock:
+free_ipg_clock:
+ clk_disable_unprepare(mps-clk_ipg);
+free_mclk_clock:
clk_disable_unprepare(mps-clk_mclk);
free_irq:
free_irq(mps-irq, mps);
@@ -561,6 +570,7 @@ static int mpc512x_psc_spi_do_remove(struct device *dev)
spi_unregister_master(master);
clk_disable_unprepare(mps-clk_mclk);
+ clk_disable_unprepare(mps-clk_ipg);
free_irq(mps-irq, mps);
if (mps-psc)
iounmap(mps-psc);
--
1.7.10.4
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v5 09/17] serial: mpc512x: adjust for OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use 'mclk'
acquire and release the ipg clock item for register access as well
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org # for v4
Signed-off-by: Gerhard Sittig g...@denx.de
---
Greg, the difference between v4 and v5 of this patch is that v4
took the 'mclk' and 'ipg' clock items in reverse order, and thus
potentially obfuscated the adjusted name for 'mclk' -- v5 of the
patch is identical in content but cleaner diff-wise
---
drivers/tty/serial/mpc52xx_uart.c | 40 -
1 file changed, 35 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index 5be1df39f9f5..1d1dbe9d5af2 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -619,29 +619,55 @@ static irqreturn_t mpc512x_psc_handle_irq(struct
uart_port *port)
}
static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];
+static struct clk *psc_ipg_clk[MPC52xx_PSC_MAXNUM];
/* called from within the .request_port() callback (allocation) */
static int mpc512x_psc_alloc_clock(struct uart_port *port)
{
int psc_num;
- char clk_name[16];
struct clk *clk;
int err;
psc_num = (port-mapbase 0xf00) 8;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- clk = devm_clk_get(port-dev, clk_name);
+
+ clk = devm_clk_get(port-dev, mclk);
if (IS_ERR(clk)) {
dev_err(port-dev, Failed to get MCLK!\n);
- return PTR_ERR(clk);
+ err = PTR_ERR(clk);
+ goto out_err;
}
err = clk_prepare_enable(clk);
if (err) {
dev_err(port-dev, Failed to enable MCLK!\n);
- return err;
+ goto out_err;
}
psc_mclk_clk[psc_num] = clk;
+
+ clk = devm_clk_get(port-dev, ipg);
+ if (IS_ERR(clk)) {
+ dev_err(port-dev, Failed to get IPG clock!\n);
+ err = PTR_ERR(clk);
+ goto out_err;
+ }
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(port-dev, Failed to enable IPG clock!\n);
+ goto out_err;
+ }
+ psc_ipg_clk[psc_num] = clk;
+
return 0;
+
+out_err:
+ if (psc_mclk_clk[psc_num]) {
+ clk_disable_unprepare(psc_mclk_clk[psc_num]);
+ psc_mclk_clk[psc_num] = NULL;
+ }
+ if (psc_ipg_clk[psc_num]) {
+ clk_disable_unprepare(psc_ipg_clk[psc_num]);
+ psc_ipg_clk[psc_num] = NULL;
+ }
+ return err;
}
/* called from within the .release_port() callback (release) */
@@ -656,6 +682,10 @@ static void mpc512x_psc_relse_clock(struct uart_port *port)
clk_disable_unprepare(clk);
psc_mclk_clk[psc_num] = NULL;
}
+ if (psc_ipg_clk[psc_num]) {
+ clk_disable_unprepare(psc_ipg_clk[psc_num]);
+ psc_ipg_clk[psc_num] = NULL;
+ }
}
/* implementation of the .clock() callback (enable/disable) */
--
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[PATCH v5 10/17] serial: mpc512x: setup the PSC FIFO clock as well
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization
devm_{get,put}_clk() doesn't apply here, as the SoC provides a
single FIFO component which is shared among several PSC components,
thus the FIFO isn't associated with a device (while the PSCs are)
provide a fallback clock lookup approach in case the OF based clock
lookup for the PSC FIFO fails, this allows for successful operation in
the presence of an outdated device tree which lacks clock specs
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: Jiri Slaby jsl...@suse.cz
Cc: linux-ser...@vger.kernel.org
Acked-by: Greg Kroah-Hartman gre...@linuxfoundation.org # for v4
Signed-off-by: Gerhard Sittig g...@denx.de
---
Greg, the addition since v4 is the clk_get_sys() call for the 'ipg'
clock item (backwards compat for device trees w/o clock specs)
---
drivers/tty/serial/mpc52xx_uart.c | 50 -
1 file changed, 44 insertions(+), 6 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index 1d1dbe9d5af2..78c8cbadc776 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -421,6 +421,7 @@ struct psc_fifoc {
static struct psc_fifoc __iomem *psc_fifoc;
static unsigned int psc_fifoc_irq;
+static struct clk *psc_fifoc_clk;
static void mpc512x_psc_fifo_init(struct uart_port *port)
{
@@ -568,36 +569,73 @@ static unsigned int mpc512x_psc_set_baudrate(struct
uart_port *port,
/* Init PSC FIFO Controller */
static int __init mpc512x_psc_fifoc_init(void)
{
+ int err;
struct device_node *np;
+ struct clk *clk;
+
+ /* default error code, potentially overwritten by clock calls */
+ err = -ENODEV;
np = of_find_compatible_node(NULL, NULL,
fsl,mpc5121-psc-fifo);
if (!np) {
pr_err(%s: Can't find FIFOC node\n, __func__);
- return -ENODEV;
+ goto out_err;
+ }
+
+ clk = of_clk_get(np, 0);
+ if (IS_ERR(clk)) {
+ /* backwards compat with device trees that lack clock specs */
+ clk = clk_get_sys(np-name, ipg);
+ }
+ if (IS_ERR(clk)) {
+ pr_err(%s: Can't lookup FIFO clock\n, __func__);
+ err = PTR_ERR(clk);
+ goto out_ofnode_put;
+ }
+ if (clk_prepare_enable(clk)) {
+ pr_err(%s: Can't enable FIFO clock\n, __func__);
+ clk_put(clk);
+ goto out_ofnode_put;
}
+ psc_fifoc_clk = clk;
psc_fifoc = of_iomap(np, 0);
if (!psc_fifoc) {
pr_err(%s: Can't map FIFOC\n, __func__);
- of_node_put(np);
- return -ENODEV;
+ goto out_clk_disable;
}
psc_fifoc_irq = irq_of_parse_and_map(np, 0);
- of_node_put(np);
if (psc_fifoc_irq == 0) {
pr_err(%s: Can't get FIFOC irq\n, __func__);
- iounmap(psc_fifoc);
- return -ENODEV;
+ goto out_unmap;
}
+ of_node_put(np);
return 0;
+
+out_unmap:
+ iounmap(psc_fifoc);
+out_clk_disable:
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+out_ofnode_put:
+ of_node_put(np);
+out_err:
+ return err;
}
static void __exit mpc512x_psc_fifoc_uninit(void)
{
iounmap(psc_fifoc);
+
+ /* disable the clock, errors are not fatal */
+ if (psc_fifoc_clk) {
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+ psc_fifoc_clk = NULL;
+ }
}
/* 512x specific interrupt handler. The caller holds the port lock */
--
1.7.10.4
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[PATCH v5 12/17] mtd: mpc5121_nfc: adjust for OF based clock lookup
after device tree based clock lookup became available, the NAND
flash driver need no longer use the previous global nfc_clk name,
but should use the ipg clock name specific to the OF node
Cc: David Woodhouse dw...@infradead.org
Cc: Artem Bityutskiy artem.bityuts...@linux.intel.com
Cc: linux-...@lists.infradead.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 3c60a000b426..35a51a5aa537 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -729,7 +729,7 @@ static int mpc5121_nfc_probe(struct platform_device *op)
of_node_put(rootnode);
/* Enable NFC clock */
- clk = devm_clk_get(dev, nfc_clk);
+ clk = devm_clk_get(dev, ipg);
if (IS_ERR(clk)) {
dev_err(dev, Unable to acquire NFC clock!\n);
retval = PTR_ERR(clk);
--
1.7.10.4
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[PATCH v5 11/17] USB: fsl-mph-dr-of: adjust for OF based clock lookup
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the usb%d_clk template, always use ipg instead
Cc: Greg Kroah-Hartman gre...@linuxfoundation.org
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 13 +
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index abd5050a4899..9162d1b6c0a3 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -261,19 +261,8 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
struct fsl_usb2_platform_data *pdata = dev_get_platdata(pdev-dev);
struct clk *clk;
int err;
- char clk_name[10];
- int base, clk_num;
-
- base = pdev-resource-start 0xf000;
- if (base == 0x3000)
- clk_num = 1;
- else if (base == 0x4000)
- clk_num = 2;
- else
- return -ENODEV;
- snprintf(clk_name, sizeof(clk_name), usb%d_clk, clk_num);
- clk = devm_clk_get(pdev-dev.parent, clk_name);
+ clk = devm_clk_get(pdev-dev.parent, ipg);
if (IS_ERR(clk)) {
dev_err(pdev-dev, failed to get clk\n);
return PTR_ERR(clk);
--
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[PATCH v5 14/17] net: can: mscan: adjust to common clock support for mpc512x
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
acquire both the clock items for register access (ipg) as well as for
wire communication (can)
keep the previous implementation of MPC512x support in place during
migration, this results in a readable diff of the change
this change is neutral to the MPC5200 platform
Cc: Wolfgang Grandegger w...@grandegger.com
Cc: Marc Kleine-Budde m...@pengutronix.de
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 179 +++
1 file changed, 179 insertions(+)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index e59b3a392af6..f48f1297ff30 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,6 +109,177 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
+
+#if IS_ENABLED(CONFIG_COMMON_CLK)
+
+static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
+const char *clock_source, int *mscan_clksrc)
+{
+ struct device_node *np;
+ u32 clockdiv;
+ enum {
+ CLK_FROM_AUTO,
+ CLK_FROM_IPS,
+ CLK_FROM_SYS,
+ CLK_FROM_REF,
+ } clk_from;
+ struct clk *clk_in, *clk_can;
+ unsigned long freq_calc;
+ struct mscan_priv *priv;
+ struct clk *clk_ipg;
+
+ /* the caller passed in the clock source spec that was read from
+* the device tree, get the optional clock divider as well
+*/
+ np = ofdev-dev.of_node;
+ clockdiv = 1;
+ of_property_read_u32(np, fsl,mscan-clock-divider, clockdiv);
+ dev_dbg(ofdev-dev, device tree specs: clk src[%s] div[%d]\n,
+ clock_source ? clock_source : NULL, clockdiv);
+
+ /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to
+* get set, and the 'ips' clock is the input to the MSCAN
+* component
+*
+* for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC]
+* bit needs to get cleared, an optional clock-divider may have
+* been specified (the default value is 1), the appropriate
+* MSCAN related MCLK is the input to the MSCAN component
+*
+* in the absence of a clock-source spec, first an optimal clock
+* gets determined based on the 'sys' clock, if that fails the
+* 'ref' clock is used
+*/
+ clk_from = CLK_FROM_AUTO;
+ if (clock_source) {
+ /* interpret the device tree's spec for the clock source */
+ if (!strcmp(clock_source, ip))
+ clk_from = CLK_FROM_IPS;
+ else if (!strcmp(clock_source, sys))
+ clk_from = CLK_FROM_SYS;
+ else if (!strcmp(clock_source, ref))
+ clk_from = CLK_FROM_REF;
+ else
+ goto err_invalid;
+ dev_dbg(ofdev-dev, got a clk source spec[%d]\n, clk_from);
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, try the 'sys' clock; round to the
+* next MHz and see if we can get a multiple of 16MHz
+*/
+ dev_dbg(ofdev-dev, no clk source spec, trying SYS\n);
+ clk_in = devm_clk_get(ofdev-dev, sys);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ freq_calc = clk_get_rate(clk_in);
+ freq_calc += 49;
+ freq_calc /= 100;
+ freq_calc *= 100;
+ if ((freq_calc % 1600) == 0) {
+ clk_from = CLK_FROM_SYS;
+ clockdiv = freq_calc / 1600;
+ dev_dbg(ofdev-dev,
+ clk fit, sys[%lu] div[%d] freq[%lu]\n,
+ freq_calc, clockdiv, freq_calc / clockdiv);
+ }
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, use the 'ref' clock */
+ dev_dbg(ofdev-dev, no clk source spec, trying REF\n);
+ clk_in = devm_clk_get(ofdev-dev, ref);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ clk_from = CLK_FROM_REF;
+ freq_calc = clk_get_rate(clk_in);
+ dev_dbg(ofdev-dev,
+ clk fit, ref[%lu] (no div) freq[%lu]\n,
+ freq_calc, freq_calc);
+ }
+
+ /* select IPS or MCLK as the MSCAN input (returned to the caller),
+* setup the MCLK mux source and rate if applicable, apply
[PATCH v5 13/17] [media] fsl-viu: adjust for OF based clock lookup
after device tree based clock lookup became available, the VIU driver
need no longer use the previous global viu_clk name, but should use
the ipg clock name specific to the OF node
Cc: Mauro Carvalho Chehab m.che...@samsung.com
Cc: linux-me...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index fe9898ca3c84..c1e84aeb2e25 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1578,7 +1578,7 @@ static int viu_of_probe(struct platform_device *op)
}
/* enable VIU clock */
- clk = devm_clk_get(op-dev, viu_clk);
+ clk = devm_clk_get(op-dev, ipg);
if (IS_ERR(clk)) {
dev_err(op-dev, failed to lookup the clock!\n);
ret = PTR_ERR(clk);
--
1.7.10.4
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[PATCH v5 15/17] net: can: mscan: remove non-CCF code for MPC512x
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control module
registers directly
Cc: Wolfgang Grandegger w...@grandegger.com
Cc: Marc Kleine-Budde m...@pengutronix.de
Cc: linux-...@vger.kernel.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 141 ---
1 file changed, 141 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index f48f1297ff30..6b0c9958d824 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,9 +109,6 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
-
-#if IS_ENABLED(CONFIG_COMMON_CLK)
-
static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
const char *clock_source, int *mscan_clksrc)
{
@@ -277,144 +274,6 @@ static void mpc512x_can_put_clock(struct platform_device
*ofdev)
if (priv-clk_ipg)
clk_disable_unprepare(priv-clk_ipg);
}
-
-#else /* COMMON_CLK */
-
-struct mpc512x_clockctl {
- u32 spmr; /* System PLL Mode Reg */
- u32 sccr[2];/* System Clk Ctrl Reg 1 2 */
- u32 scfr1; /* System Clk Freq Reg 1 */
- u32 scfr2; /* System Clk Freq Reg 2 */
- u32 reserved;
- u32 bcr;/* Bread Crumb Reg */
- u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */
- u32 spccr; /* SPDIF Clk Ctrl Reg */
- u32 cccr; /* CFM Clk Ctrl Reg */
- u32 dccr; /* DIU Clk Cnfg Reg */
- u32 mccr[4];/* MSCAN Clk Ctrl Reg 1-3 */
-};
-
-static struct of_device_id mpc512x_clock_ids[] = {
- { .compatible = fsl,mpc5121-clock, },
- {}
-};
-
-static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
-const char *clock_name, int *mscan_clksrc)
-{
- struct mpc512x_clockctl __iomem *clockctl;
- struct device_node *np_clock;
- struct clk *sys_clk, *ref_clk;
- int plen, clockidx, clocksrc = -1;
- u32 sys_freq, val, clockdiv = 1, freq = 0;
- const u32 *pval;
-
- np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
- if (!np_clock) {
- dev_err(ofdev-dev, couldn't find clock node\n);
- return 0;
- }
- clockctl = of_iomap(np_clock, 0);
- if (!clockctl) {
- dev_err(ofdev-dev, couldn't map clock registers\n);
- goto exit_put;
- }
-
- /* Determine the MSCAN device index from the peripheral's
-* physical address. Register address offsets against the
-* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380
-*/
- pval = of_get_property(ofdev-dev.of_node, reg, plen);
- BUG_ON(!pval || plen sizeof(*pval));
- clockidx = (*pval 0x80) ? 1 : 0;
- if (*pval 0x2000)
- clockidx += 2;
-
- /*
-* Clock source and divider selection: 3 different clock sources
-* can be selected: ip, ref or sys. For the latter two, a
-* clock divider can be defined as well. If the clock source is
-* not specified by the device tree, we first try to find an
-* optimal CAN source clock based on the system clock. If that
-* is not posslible, the reference clock will be used.
-*/
- if (clock_name !strcmp(clock_name, ip)) {
- *mscan_clksrc = MSCAN_CLKSRC_IPS;
- freq = mpc5xxx_get_bus_frequency(ofdev-dev.of_node);
- } else {
- *mscan_clksrc = MSCAN_CLKSRC_BUS;
-
- pval = of_get_property(ofdev-dev.of_node,
- fsl,mscan-clock-divider, plen);
- if (pval plen == sizeof(*pval))
- clockdiv = *pval;
- if (!clockdiv)
- clockdiv = 1;
-
- if (!clock_name || !strcmp(clock_name, sys)) {
- sys_clk = devm_clk_get(ofdev-dev, sys_clk);
- if (IS_ERR(sys_clk)) {
- dev_err(ofdev-dev, couldn't get sys_clk\n);
- goto exit_unmap;
- }
- /* Get and round up/down sys clock rate */
- sys_freq = 100 *
- ((clk_get_rate(sys_clk) + 49) / 100);
-
- if (!clock_name) {
- /* A multiple of 16 MHz would be optimal */
- if ((sys_freq % 1600) == 0) {
- clocksrc = 0;
- clockdiv = sys_freq / 1600
[PATCH v5 16/17] powerpc/mpc512x: improve DIU related clock setup
adapt the DIU clock initialization to the COMMON_CLK approach:
device tree based clock lookup, prepare and unprepare for clocks,
work with frequencies not dividers, call the appropriate clk_*()
routines and don't access CCM registers
the best clock determination now completely relies on the
platform's clock driver to pick a frequency close to what the
caller requests, and merely checks whether the desired frequency
was met (fits the tolerance of the monitor)
this approach shall succeed upon first try in the usual case,
will test a few less desirable yet acceptable frequencies in
edge cases, and will fallback to best effort if none of the
previously tried frequencies pass the test
provide a fallback clock lookup approach in case the OF based clock
lookup for the DIU fails, this allows for successful operation in
the presence of an outdated device tree which lacks clock specs
Cc: Anatolij Gustschin ag...@denx.de
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/mpc512x_shared.c | 169 ++
1 file changed, 92 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index a82a41b4fd91..d8f172b710a8 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -12,6 +12,7 @@
* (at your option) any later version.
*/
+#include linux/clk.h
#include linux/kernel.h
#include linux/io.h
#include linux/irq.h
@@ -70,98 +71,112 @@ struct fsl_diu_shared_fb {
boolin_use;
};
-#define DIU_DIV_MASK 0x00ff
+/* receives a pixel clock spec in pico seconds, adjusts the DIU clock rate */
void mpc512x_set_pixel_clock(unsigned int pixclock)
{
- unsigned long bestval, bestfreq, speed, busfreq;
- unsigned long minpixclock, maxpixclock, pixval;
- struct mpc512x_ccm __iomem *ccm;
struct device_node *np;
- u32 temp;
- long err;
- int i;
+ struct clk *clk_diu;
+ unsigned long epsilon, minpixclock, maxpixclock;
+ unsigned long offset, want, got, delta;
- np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-clock);
+ /* lookup and enable the DIU clock */
+ np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-diu);
if (!np) {
- pr_err(Can't find clock control module.\n);
+ pr_err(Could not find DIU device tree node.\n);
return;
}
-
- ccm = of_iomap(np, 0);
+ clk_diu = of_clk_get(np, 0);
+ if (IS_ERR(clk_diu)) {
+ /* backwards compat with device trees that lack clock specs */
+ clk_diu = clk_get_sys(np-name, ipg);
+ }
of_node_put(np);
- if (!ccm) {
- pr_err(Can't map clock control module reg.\n);
+ if (IS_ERR(clk_diu)) {
+ pr_err(Could not lookup DIU clock.\n);
return;
}
-
- np = of_find_node_by_type(NULL, cpu);
- if (np) {
- const unsigned int *prop =
- of_get_property(np, bus-frequency, NULL);
-
- of_node_put(np);
- if (prop) {
- busfreq = *prop;
- } else {
- pr_err(Can't get bus-frequency property\n);
- return;
- }
- } else {
- pr_err(Can't find 'cpu' node.\n);
+ if (clk_prepare_enable(clk_diu)) {
+ pr_err(Could not enable DIU clock.\n);
return;
}
- /* Pixel Clock configuration */
- pr_debug(DIU: Bus Frequency = %lu\n, busfreq);
- speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
-
- /* Calculate the pixel clock with the smallest error */
- /* calculate the following in steps to avoid overflow */
- pr_debug(DIU pixclock in ps - %d\n, pixclock);
- temp = (10 / pixclock) * 1000;
- pixclock = temp;
- pr_debug(DIU pixclock freq - %u\n, pixclock);
-
- temp = temp / 20; /* pixclock * 0.05 */
- pr_debug(deviation = %d\n, temp);
- minpixclock = pixclock - temp;
- maxpixclock = pixclock + temp;
- pr_debug(DIU minpixclock - %lu\n, minpixclock);
- pr_debug(DIU maxpixclock - %lu\n, maxpixclock);
- pixval = speed/pixclock;
- pr_debug(DIU pixval = %lu\n, pixval);
-
- err = LONG_MAX;
- bestval = pixval;
- pr_debug(DIU bestval = %lu\n, bestval);
-
- bestfreq = 0;
- for (i = -1; i = 1; i++) {
- temp = speed / (pixval+i);
- pr_debug(DIU test pixval i=%d, pixval=%lu, temp freq. = %u\n,
- i, pixval, temp);
- if ((temp minpixclock) || (temp maxpixclock))
- pr_debug(DIU exceeds monitor range (%lu to %lu)\n,
- minpixclock, maxpixclock
[PATCH v5 17/17] clk: mpc512x: remove migration support workarounds
this change removes workarounds which have become obsolete after
migration to common clock support has completed
- remove clkdev registration calls (compatibility clock item aliases)
after all peripheral drivers were adjusted for device tree based
clock lookup
- remove pre-enable workarounds after all peripheral drivers were
adjusted to acquire their respective clock items
workarounds for these clock items get removed: FEC (ethernet), I2C,
PSC (UART, SPI), PSC FIFO, USB, NFC (NAND flash), VIU (video capture),
BDLC (CAN), CAN MCLK, DIU (video output)
these clkdev registered names won't be provided any longer by the
MPC512x platform's clock driver: psc%d_mclk, mscan%d_mclk,
usb%d_clk, nfc_clk, viu_clk, sys_clk, ref_clk
the pre-enable workaround for PCI remains, but depends on the presence
of PCI related device tree nodes (disables the PCI clock in the absence
of PCI nodes, keeps the PCI clock enabled in the presence of nodes) --
moving clock acquisition into the peripheral driver isn't possible for
PCI because its initialization takes place before the platform clock
driver gets initialized, thus the clock provider isn't available then
Cc: Mike Turquette mturque...@linaro.org
Cc: Anatolij Gustschin ag...@denx.de
Cc: linux-arm-ker...@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c | 50 -
1 file changed, 16 insertions(+), 34 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index c1faf3a9ea1f..b1fbdcbc68b7 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -695,46 +695,28 @@ static void mpc5121_clk_register_of_provider(struct
device_node *np)
*/
static void mpc5121_clk_provide_migration_support(void)
{
- int idx;
- char name[32];
-
- /*
-* provide pre-CCF alias clock names for peripheral drivers
-* which have not yet been adjusted to do OF based clock lookups
-*/
- clk_register_clkdev(clks[MPC512x_CLK_REF], ref_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_VIU], viu_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_NFC], nfc_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB1], usb1_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB2], usb2_clk, NULL);
- for (idx = 0; idx NR_PSCS; idx++) {
- snprintf(name, sizeof(name), psc%d_mclk, idx);
- clk_register_clkdev(clks[MPC512x_CLK_PSC0_MCLK + idx],
- name, NULL);
- }
- for (idx = 0; idx NR_MSCANS; idx++) {
- snprintf(name, sizeof(name), mscan%d_mclk, idx);
- clk_register_clkdev(clks[MPC512x_CLK_MSCAN0_MCLK + idx],
- name, NULL);
- }
- clk_register_clkdev(clks[MPC512x_CLK_SPDIF_MCLK], spdif_mclk, NULL);
/*
* pre-enable those clock items which are not yet appropriately
* acquired by their peripheral driver
+*
+* the PCI clock cannot get acquired by its peripheral driver,
+* because for this platform the driver won't probe(), instead
+* initialization is done from within the .setup_arch() routine
+* at a point in time where the clock provider has not been
+* setup yet and thus isn't available yet
+*
+* so we pre-enable the clock here, to not have the clock
+* subsystem automatically disable this item in a late init call
+*
+* this PCI clock pre-enable workaround only applies when there
+* are device tree nodes for PCI and thus the peripheral driver
+* has attached to bridges, otherwise the PCI clock remains
+* unused and so it gets disabled
*/
- clk_prepare_enable(clks[MPC512x_CLK_PSC_FIFO]);
clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
- clk_prepare_enable(clks[MPC512x_CLK_FEC]); /* network, NFS */
- clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */
- clk_prepare_enable(clks[MPC512x_CLK_I2C]); /* I2C */
- for (idx = 0; idx NR_PSCS; idx++) /* PSC ipg */
- clk_prepare_enable(clks[MPC512x_CLK_PSC0 + idx]);
- clk_prepare_enable(clks[MPC512x_CLK_BDLC]); /* MSCAN ipg */
- for (idx = 0; idx NR_MSCANS; idx++) /* MSCAN mclk */
- clk_prepare_enable(clks[MPC512x_CLK_MSCAN0_MCLK + idx]);
- clk_prepare_enable(clks[MPC512x_CLK_PCI]); /* PCI */
+ if (of_find_compatible_node(NULL, pci, fsl,mpc5121-pci))
+ clk_prepare_enable(clks[MPC512x_CLK_PCI]);
}
/*
--
1.7.10.4
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Re: [PATCH RFC v5 2/5] dma: mpc512x: add support for peripheral transfers
On Tue, Nov 12, 2013 at 16:23 +0400, Alexander Popov wrote: 2013/11/12 Gerhard Sittig g...@denx.de: It would be nice to get a response to the feedback that you are given. It may be appropriate not to obey to the feedback, but at least it should get considered. Yes, I see. My implicit response by RFCv5 was not efficient, sorry. Now should I write a detailed answer in the thread with your feedback for improving readability of the discussion? Don't you have a checklist of which feedback you got and which of it you did address and which you didn't? Reviewers don't usually do the tracking for those who do the submissions. I think that you may list pending issues or non-issues either with new submissions or at the previous version's feedback, whatever is more appropriate. Maybe pending is useful with the new announcement, while won't, need not is better kept with the reviews. As for the not yet addressed feedback: From the top of my head I can think of the execute comment which contradicts the code (which suggests that at least one of them is wrong), and the data type mismatch in the config routine (where code just happens to work by coincidence). And in bypassing I noticed that your recent submission has coding style issues (braces, indentation), which should no longer happen after several iterations as you should know how to prepare and check the next version. Again: It may be OK to not follow the advice (especially if you get multiple responses of differrent direction, or when you are more familiar with the subject than an observer). But you should state when you don't agree and why. Without feedback, reviewers may see several submissions which suffer from the same issues, and expect more to show up and thus feel that their feedback is getting ignored. Which quickly becomes tiring. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v5 1/5] dma: mpc512x: reorder mpc8308 specific instructions
[ dropping devicetree@vger from CC ] On Fri, Nov 01, 2013 at 11:04 +0100, Anatolij Gustschin wrote: On Fri, 1 Nov 2013 11:19:30 +0400 Alexander Popov a13xp0p0...@gmail.com wrote: Concentrate the specific code for MPC8308 in the 'if' branch and handle MPC512x in the 'else' branch. This modification only reorders instructions but doesn't change behaviour. Signed-off-by: Alexander Popov a13xp0p0...@gmail.com --- drivers/dma/mpc512x_dma.c | 42 +- 1 file changed, 25 insertions(+), 17 deletions(-) Acked-by: Anatolij Gustschin ag...@denx.de I feel that this patch has become stable and can be taken, regardless of the pending review of the other parts in the series. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v5 2/5] dma: mpc512x: add support for peripheral transfers
On Fri, Nov 01, 2013 at 11:19 +0400, Alexander Popov wrote: Introduce support for slave s/g transfer preparation and the associated device control callback in the MPC512x DMA controller driver, which adds support for data transfers between memory and peripheral I/O to the previously supported mem-to-mem transfers. Alexander, there is outstanding review feedback for a previous version of the series that you haven't addressed yet. Can you please either look into those issues, or state that it's OK to leave them and why this is so? It would be nice to get a response to the feedback that you are given. It may be appropriate not to obey to the feedback, but at least it should get considered. Have you noticed the recent introduction of the dmaengine@vger ML? Make sure to include it upon the next submission. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc/qe_lib: Share the qe_lib for the others architecture
On Mon, Oct 14, 2013 at 13:09 -0700, Greg Kroah-Hartman wrote: On Mon, Oct 14, 2013 at 02:40:44PM -0500, Kumar Gala wrote: Greg, Wondering your thoughts on drivers/qe vs something like drivers/soc/fsl/qe. The QuiccEngine (qe) is a communication core on some of the Freescale networking SoCs that provides the ability to do various networking/communication functionality. Channels on the QE can be used for various different things from ethernet, ATM, UART, or other functions. What makes the code QE specific? Are these devices that live on the QE bus, or are they controlling the QE controller? You may think of the QUICC as a programmable bitbang machine if you like. The very same component runs arbitrary and rather different protocols depending on how you setup its parameters. There have been serial controllers capable of different protocols like UART or SPI or I2S, but all of them are serial communication. There have been memory controllers which could bitbang different protocols (NAND, NOR/SRAM, DRAM), but all of them are memory. The QUICC is just a little more versatile, and appears to cover cases which reside in different Linux kernel subsystems (like: it's neither serial nor network exclusively, but can be either and potentially more). IIUC the question which Kumar Gala was asking is where to put code for the component which is neither a strict subset of any subsystem. Please correct me if I'm wrong. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v2 0/5] MPC512x DMA slave s/g support, OF DMA lookup
On Thu, Oct 03, 2013 at 18:00 +0400, Alexander Popov wrote: v2013/7/14 Gerhard Sittig g...@denx.de: this series - introduces slave s/g support (that's support for DMA transfers which involve peripherals in contrast to mem-to-mem transfers) - adds device tree based lookup support for DMA channels - combines floating patches and related feedback which already covered several aspects of what the suggested LPB driver needs, to demonstrate how integration might be done - carries QD SD card support to enable another DMA client during test, while this patch needs to get dropped upon pickup changes since v1: - re-order mpc8308 related code paths for improved readability, no change in behaviour, introduction of symbolic channel names here already - squash 'execute() start condition' and 'terminate all' into the introduction of 'slave s/g prep' and 'device control' support; refuse s/g lists with more than one item since slave support is operational yet proper s/g support is missing (can get addressed later) - always start transfers from software on MPC8308 as there are no external request lines for peripheral flow control - drop dt-bindings header file and symbolic channel names in OF nodes Changes since v2 (RFC v3 was badly formed, excuse me for that): Part 1/5: - use #define instead of enum since individual channels don't require special handling. Part 2/5: - add a flag will_access_peripheral to DMA transfer descriptor according recommendations of Gerhard Sittig. This flag is set in mpc_dma_prep_memcpy() and mpc_dma_prep_slave_sg() and is evaluated in mpc_dma_execute() to choose a type of start for the transfer. - prevent descriptors of transfers which involve peripherals from being chained together; each of such transfers needs hardware initiated start. - add locking while working with struct mpc_dma_chan according recommendations of Lars-Peter Clausen. - remove default nbytes value. Client kernel modules must set src_maxburst and dst_maxburst fields of struct dma_slave_config (dmaengine.h). Part 6/8: unchanged. Part 7/8: unchanged. Part 8/8: unchanged. These changes are tested on MPC5125 - with SCLPC driver (transfers between dev and mem work fine). - with dmatest module (all 64 DMA channels can perform mem-to-mem transfers which can be chained in one DMA transaction). known issues: - it's yet to get confirmed whether MPC8308 can use slave support or whether the DMA controller's driver shall actively reject it, the information that's available so far suggests that peripheral transfers to IP bus attached I/O is useful and shall not get blocked right away I'm not certain whether keeping the cover letter in threaded form is appropriate. But speaking about non-existent parts (6-8/8), not saying what the current version is, missing stats certainly isn't right. Your submission style adds more work to doing review and providing feedback than what's necessary. You assume that others would keep the history for you, or would do the archeology and collect individual pieces from the past, to recover what you fail to send out. The messages show up in an unexpected order here (3, 4, 5, 0 first on one thread, 1, 2 then in another thread, with some 2800 messages between them) and carry conflicting subjects or version numbers. Formatting was broken in transport, patches won't apply. Please do consider checking what you send out, and how you can improve the reception's side of the process. Try to help those people you want to receive help from. Try to support both kinds of review for people coming new to the subject as well as those who have seen a former version. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH RFC v4 2/5] dma: mpc512x: add support for peripheral transfers
(DMA controller).
Please consider whether a useful default can be applied in the
absence of an explicit client request. Make the driver as
interoperable as useful, don't restrict yourself to a few
specific clients or just one client that you currently are
focussed on.
+
+ if (!IS_ALIGNED(len, tcd-nbytes))
+ return NULL;
+
+ iter = len / tcd-nbytes;
+ if (iter ((1 15) - 1)) { /* maximum biter */
nit: 'iter = 1 15' is shorter and maybe easier to read (might
better reflect that you want to not exceed the 15bit field)
+ return NULL; /* len is too big */
+ } else {
+ /* citer_linkch contains the high bits of iter */
+ tcd-biter = iter 0x1ff;
+ tcd-biter_linkch = iter 9;
+ tcd-citer = tcd-biter;
+ tcd-citer_linkch = tcd-biter_linkch;
+ }
+
+ tcd-e_sg = 0;
+ tcd-d_req = 1;
+
+ /* Place descriptor in prepared list */
+ spin_lock_irqsave(mchan-lock, iflags);
+ list_add_tail(mdesc-node, mchan-prepared);
+ spin_unlock_irqrestore(mchan-lock, iflags);
+ }
+
+ return mdesc-desc;
+}
+
+static int mpc_dma_device_control(struct dma_chan *chan, enum dma_ctrl_cmd
cmd,
+ unsigned long arg)
+{
+ struct mpc_dma_chan *mchan;
+ struct mpc_dma *mdma;
+ struct dma_slave_config *cfg;
+ unsigned long flags;
+
+ mchan = dma_chan_to_mpc_dma_chan(chan);
+ switch (cmd) {
+ case DMA_TERMINATE_ALL:
+ /* disable channel requests */
+ mdma = dma_chan_to_mpc_dma(chan);
+
+ spin_lock_irqsave(mchan-lock, flags);
+
+ out_8(mdma-regs-dmacerq, chan-chan_id);
+ list_splice_tail_init(mchan-prepared, mchan-free);
+ list_splice_tail_init(mchan-queued, mchan-free);
+ list_splice_tail_init(mchan-active, mchan-free);
+
+ spin_unlock_irqrestore(mchan-lock, flags);
+
+ return 0;
+ case DMA_SLAVE_CONFIG:
+ cfg = (void *)arg;
+ if (cfg-src_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES
+ cfg-dst_addr_width != DMA_SLAVE_BUSWIDTH_4_BYTES)
+ return -EINVAL;
Ah, the addr_width is getting checked, good. I've missed this
before.
Might as well want to check maxburst values here, and optionally
apply a default?
+
+ spin_lock_irqsave(mchan-lock, flags);
+
+ if (cfg-direction == DMA_DEV_TO_MEM) {
Note that cfg-direction is of a different type than
DMA_DEV_TO_MEM (of different type than the 'direction' parameter
in the preparation routine) -- it's mere coincidence that the
numeric values happen to match at the moment.
+ mchan-per_paddr = cfg-src_addr;
+ mchan-tcd_nunits = cfg-src_maxburst;
+ } else {
+ mchan-per_paddr = cfg-dst_addr;
+ mchan-tcd_nunits = cfg-dst_maxburst;
+ }
+
+ spin_unlock_irqrestore(mchan-lock, flags);
+
+ return 0;
+ default:
+ return -ENOSYS;
+ }
+
+ return -EINVAL;
+}
+
static int mpc_dma_probe(struct platform_device *op)
{
struct device_node *dn = op-dev.of_node;
virtually yours
Gerhard Sittig
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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[PATCH v1] powerpc/mpc512x: silence build warning upon disabled DIU
a disabled Kconfig option results in a reference to a not implemented
routine when the IS_ENABLED() macro is used for both conditional
implementation of the routine as well as a C language source code test
at the call site -- the if (0) func(); construct only gets eliminated
later by the optimizer, while the compiler already has emitted its
warning about func() being undeclared
provide an empty implementation for the mpc512x_setup_diu() and
mpc512x_init_diu() routines in case of the disabled option, to avoid the
compiler warning which is considered fatal and breaks compilation
the bug appeared with commit 2a63c90ab55ca3f054772c2e5ba7df810c48
powerpc/mpc512x: move common code to shared.c file, how to reproduce:
make mpc512x_defconfig
echo CONFIG_FB_FSL_DIU=n .config make olddefconfig
make
CC arch/powerpc/platforms/512x/mpc512x_shared.o
.../arch/powerpc/platforms/512x/mpc512x_shared.c: In function
'mpc512x_init_early':
.../arch/powerpc/platforms/512x/mpc512x_shared.c:456:3: error: implicit
declaration of function 'mpc512x_init_diu'
[-Werror=implicit-function-declaration]
.../arch/powerpc/platforms/512x/mpc512x_shared.c: In function
'mpc512x_setup_arch':
.../arch/powerpc/platforms/512x/mpc512x_shared.c:469:3: error: implicit
declaration of function 'mpc512x_setup_diu'
[-Werror=implicit-function-declaration]
cc1: all warnings being treated as errors
make[4]: *** [arch/powerpc/platforms/512x/mpc512x_shared.o] Error 1
Signed-off-by: Gerhard Sittig g...@denx.de
CC: sta...@vger.kernel.org # v3.11
---
arch/powerpc/platforms/512x/mpc512x_shared.c |3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index a82a41b..1a7b1d0 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -303,6 +303,9 @@ void __init mpc512x_setup_diu(void)
diu_ops.release_bootmem = mpc512x_release_bootmem;
}
+#else
+void __init mpc512x_setup_diu(void) { /* EMPTY */ }
+void __init mpc512x_init_diu(void) { /* EMPTY */ }
#endif
void __init mpc512x_init_IRQ(void)
--
1.7.10.4
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Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
[ re-created the Cc: list, this is about the PCI clock exclusively ] Of all the preparation patches in the series (parts 01-14/31, forming the peripheral driver cleanup phase before the introduction of CCF support), this patch remains the last to get picked up. But I'd suggest to leave this patch for now (for v3.12, it's rather late). Either ignore this message and the patch, or see below for why application isn't required now, and an update of this patch is needed and will be appropriate for v3.13. I'm sorry for the confusion, the potentially perceived instability is a result of both widening the series' scope after initial submission as well as a recent extension of test coverage after the scope has been widened. Thank you for your patience! On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote: make the Freescale PCI driver get, prepare and enable the PCI clock during probe(); the clock gets put upon device close by the devm approach clock lookup is non-fatal as not all platforms may provide clock specs in their device tree, but failure to enable specified clocks are fatal the driver appears to not have a remove() routine, so no reference to the clock is kept during use, and the clock isn't released (the devm approach will put the clock, but it won't get disabled or unprepared) Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/sysdev/fsl_pci.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 46ac1dd..549ff08 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -17,6 +17,8 @@ ... What this patch 09/31 does is add a non-fatal device tree based clock lookup in the fsl_pci_probe() routine, to acquire the PCI clock item appropriately if there is a provider and a DT spec. The patch in v4 has a bug, which has an obvious fix while an update wasn't sent yet, for neither the patch nor the series. There is one more known issue in the series (not with functionality but with policy, specifically in a multi platform configuration), while I don't want to resend the series while known issues are pending. But this is not the problem here. First of all the patch is a NOP in the forseeable future. It won't harm yet its content isn't urgently needed either, to unbreak stuff or to support upcoming features that were communicated before. Further analysis has shown that the patch is incomplete. The 85xx and 86xx platforms will pass through the fsl_pci_probe() routine. That these platforms don't have OF clock providers is not a problem, the patch will remain a NOP then. Its function will kick in when these platforms may grow clock providers (things will transparently keep working, this was the actual intent of the patch). Since the series is about 512x CCF support, the patch will remain a NOP throughout the whole series, but won't harm either. The 83xx and 512x platforms in contrast _don't_ pass through the fsl_pci_probe() routine, instead they call mpc83xx_add_bridge() from within the .setup_arch() callback in platform initialization code, which iterates over the compatible OF nodes, and runs at a point in time where the platform's clock provider has not yet been setup and thus is not available. In this situation any clock lookup will fail, which is not fatal during PCI setup yet won't acquire the clock item and thus will have the common infrastructure disable the unused clock much later. There is a workaround for this lack of proper clock acquisition in the peripheral driver. The clock provider needs to pre-enable the PCI clock item upon its initialization, because the peripheral driver can't when it initializes. Checking the same condition in the provider's pre-enable workaround which the .setup_arch() routine is checking before the add_bridge() calls (the presence of compatible nodes) results in correct operation as well as most appropriate resource use (clock enabled when PCI hardware was attached to, and clock disabled in the absence of PCI hardware or driver attachment). So the update of this patch 09/31 will contain - the fix for the copy'n'paste bug in the probe() routine - an appropriate comment in the add_bridge() routine - no change in its nature, the idea remains unaffected The backend (clock provider) will contain the pre-enable workaround for the PCI clock item. As a result, the 83xx, 85xx, and 86xx platforms won't see any change (there is a NOP in probe() and a comment in add_bridge(), neither of which break any operation). The 512x platform will have proper PCI operation in the presence of common clock support. Should 8xxx platforms grow CCF support later, they will transparently keep working (85xx, 86xx), or may add the same simple yet appropriate workaround (83xx). So the outline is there, the approach is straight forward and easily can get implemented, and the resulting code will work for all platforms while
Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
[ summary for the busy or the impatient: this is a status update on the series - peripheral driver cleanup considered appropriate for v3.12 - common clock support introduction isn't ready yet - which in turn holds subsequent parts - while the overall shape of the series is looking good ] On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote: this series - fixes several drivers that are used in the MPC512x platform (UART, SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they handle clocks (appropriately acquire and setup them, hold references during use, release clocks after use) - introduces support for the common clock framework (CCF, COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform, which brings device tree based clock lookup as well although the series does touch several subsystems -- tty (serial), spi, net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of the patches are strictly clock related or trivial it appears most appropriate to take this series through either the clk or the powerpc trees after it has passed review and other subsystem maintainers ACKed the clock setup related driver modifications Since the status of this series was questioned recently, I felt that I should officially and publicly provide a status update in the absence of a v5 submission update. The series has undergone some review and has received changes as concerns were raised and feedback was provided. While I consider the nature and frequency of the changes totally appropriate -- each revision addressed all of the issues raised, and did so in an appropriate manner, but could not forsee what else would be raised upon re-submission. Actually not sending another version before _all_ concerns are addressed appropriately is what held back submission of v5. See the phase overview below for details. Adding the cleanup of existing code before the introduction of new features did widen the scope of the series, yet has heavily improved the series, and the feedback was gratefully accepted and thoroughly got addressed. Actually this driver cleanup, which only was introduced after initial submission upon Mark's request, could be considered the most desirable part of the series at this very point in time. And as I write this, the patches of the peripheral driver cleanup phase are being picked up for v3.12 after they have become stable in the review iterations. Further extension of test coverage for the series after submission of v4 has led to minimal fixes in CAN, USB, and PCI, and has revealed one problem in multi platform configurations which currently is the only remaining blocker for phase 2 and subsequent steps. While phase 1 with its obvious cleanup is stable and has become desirable and acceptable and currently is being picked up. The current status of the v4 series in detail is: Phase 1, patches 01-14/31, peripheral driver cleanup and DTS improvement: has addressed all concerns raised, and can be applied via any subtree in any order since the parts are independent from each other, with a few minor additions - USB 03/31 received another adjustment of the clock lookup 'dev' parameter, the applied version works in all three cases of the PPC_CLOCK implementation where clock names are global, the CCF implementation with clkdev registration (during migration), and the CCF implementation with device tree based clock lookup (the end result of the series); the v4 patch wasn't broken but just in need of an addendum before/within phase 3, which now was folded into phase 1 - PCI 09/31 had a compile error on 85xx/86xx due to a copy'n'paste bug in an error path; since the (fixed) patch still remains a NOP for now and within the whole series, I have suggested to leave this patch for v3.12, and to address the remaining issue of the PCI driver patch being incomplete later, see the followup for 09/31 for details (what gets added in a future version is another comment in the PCI driver and a workaround in the clock provider backend, because in the given implementation the peripheral driver cannot appropriately acquire its clock item on some platforms) - CAN 11/31 could save one more instruction by adding another jump label in the error path instead of explicit undo of a setup step, Marc's suggestion was implemented and has been applied So all parts of phase 1 (with the exception of the PCI driver change which is and remains a NOP) were applied, and followup patches for fixup were avoided. Nothing was broken, no breakage was introduced, it's all about improvements. Phase 2, patches 15-18/31, introduction of CCF support for MPC512x: works correctly for MPC512x and doesn't break other platforms, but won't work in multi platform configurations with MPC52xx (PPC_CLOCK and COMMON_CLK will collide in the linker), shall not be considered for v3.12, multi platform needs to get sorted out before
Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
On Wed, Aug 28, 2013 at 14:08 +0200, Gerhard Sittig wrote: [ re-created the Cc: list, this is about the PCI clock exclusively ] I just noticed by coincidence that the message which I received back from the linuxppc-dev ML appeared to have dropped Benjamin Herrenschmidt and Kumar Gala from the Cc: list -- while they do appear in the header of the message that I have sent and I can't see what might have caused the loss of information. :-O Do you want me to re-send the message for the benefit of potential followups, or is it OK that you receive the message via the list but potentially without the Cc: attribute? The message was mostly for your information and contained a status update, while no action is required or problems need to get resolved. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
On Thu, Aug 08, 2013 at 22:12 +0200, Anatolij Gustschin wrote:
On Tue, 6 Aug 2013 22:43:49 +0200
Gerhard Sittig g...@denx.de wrote:
...
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..549ff08 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
...
+ clk = devm_clk_get(pdev-dev, per);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(dev, Could not enable peripheral clock\n);
above line will break building. s/dev,/pdev-dev,/
Thank you for testing and for the feedback.
I've queued this fix for v5. The bug could hide because the file
gets compiled on MPC512x, but this specific routine sits behind
even more compile time switches (85xx and 86xx related).
virtually yours
Gerhard Sittig
--
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
On Wed, Aug 07, 2013 at 10:40 -0500, Kumar Gala wrote:
On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common clock framework (CCF, COMMON_CLK
Kconfig option) in the PowerPC based MPC512x platform, which brings
device tree based clock lookup as well
although the series does touch several subsystems -- tty (serial), spi,
net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of
the patches are strictly clock related or trivial
it appears most appropriate to take this series through either the clk
or the powerpc trees after it has passed review and other subsystem
maintainers ACKed the clock setup related driver modifications
the series passes 'checkpatch.pl --strict' except for one warning which
cannot get resolved, since that either breaks compilation (the data type
is preset by the clk-provider.h API) or requires a cast which shadows
real mismatches:
WARNING: static const char * array should probably be static const char *
const
#431: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:334:
+static const char *parent_names_mux0[] = {
total: 0 errors, 1 warnings, 0 checks, 807 lines checked
each step in the series was build and run tested (with a display that is
attached to the DIU as well as SPI, with an SPI attached NOR flash, with
multiple UART ports such that one is not the boot console, with EEPROMs
attached to I2C, with an SD card, booting from network)
How do the driver changes impact other PPC SoCs that use the
same drivers (i2c, fs_enet, usb) ?
For SPI and UART (the PSC component), the hardware is shared
between MPC512x and MPC5200, but only routines and data specific
to MPC512x get changed.
For USB the fsl.*usb2 hardware appears to be shared among
Freescale SoCs. AFAICS i.MX has a separate driver under arm/,
MPC83xx has a separate driver under arch/powerpc/platforms/83xx/,
and the driver I'm touching is only changed in routines specific
to MPC512x.
The NAND and VIU drivers only attach to hardware on the MPC512x
platform (checked the compatible string, only referenced from the
mpc5121.dtsi).
I2C, ethernet, PCI all are similar: A non-fatal clock lookup is
introduced, CCF platforms (512x only ATM) will carry out
appropriate clock operations, non-CCF platforms won't see a
change in behaviour (lookup fails which isn't fatal, and the
drivers assume that somebody else will have taken care of clocks
for them).
MSCAN is shared among 512x and 52xx, the common code introduces
transparent yet optional support for CCF, the 512x code path
makes use of it, 52xx sees no change in behaviour.
The DIU component (display output) is shared among platforms, but
only the platform initialization in the MPC512x code path gets
changed to make use of the CCF support, while no other platform
sees any change.
The MPC512x common clock core driver does use common primitives
and redirects the register access primitives. But the series
doesn't change register access for ARM (static inline call to the
previous hardcoded routine and thus identical object code), and
doesn't modify nor extend the shared code for gates, dividers and
multiplexers.
The device tree changes only apply to MPC512x, and only provide
hardware related information that formerly was missing.
To summarize, I see no impact for other architectures or
platforms. Although it would be good to get a second opinion
from persons with USB knowledge, to make sure I haven't missed
something.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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Re: [PATCH v4 11/31] net: can: mscan: improve clock API use
On Wed, Aug 07, 2013 at 09:28 +0200, Marc Kleine-Budde wrote:
On 08/06/2013 10:43 PM, Gerhard Sittig wrote:
[ ... ]
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index e6b4095..4f998f5 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -573,10 +573,24 @@ static int mscan_open(struct net_device *dev)
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs __iomem *regs = priv-reg_base;
+ if (priv-clk_ipg) {
+ ret = clk_prepare_enable(priv-clk_ipg);
+ if (ret)
+ goto exit_retcode;
+ }
+ if (priv-clk_can) {
+ ret = clk_prepare_enable(priv-clk_can);
+ if (ret) {
+ if (priv-clk_ipg)
+ clk_disable_unprepare(priv-clk_ipg);
+ goto exit_retcode;
Why don't you add another jump label and jump to that to disable the
ipkg clock?
You are right. I've queued this change for v5 (adding a label in
the existing error path, jumping to it instead of explicitly
disabling the clock).
+ }
+ }
+
/* common open */
ret = open_candev(dev);
if (ret)
- return ret;
+ goto exit_dis_clock;
napi_enable(priv-napi);
@@ -604,6 +618,12 @@ exit_free_irq:
exit_napi_disable:
napi_disable(priv-napi);
close_candev(dev);
+exit_dis_clock:
+ if (priv-clk_can)
+ clk_disable_unprepare(priv-clk_can);
+ if (priv-clk_ipg)
+ clk_disable_unprepare(priv-clk_ipg);
+exit_retcode:
return ret;
}
Marc
Thank you for reviewing several versions of the patch!
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de
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Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
[ no change in content, but order shuffling for better application ] On Tue, Aug 06, 2013 at 23:31 +0200, Gerhard Sittig wrote: [ this is an overview on how to split the series if necessary ] On Tue, Aug 06, 2013 at 22:43 +0200, Gerhard Sittig wrote: this series - fixes several drivers that are used in the MPC512x platform (UART, SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they handle clocks (appropriately acquire and setup them, hold references during use, release clocks after use) - introduces support for the common clock framework (CCF, COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform, which brings device tree based clock lookup as well although the series does touch several subsystems -- tty (serial), spi, net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of the patches are strictly clock related or trivial it appears most appropriate to take this series through either the clk or the powerpc trees after it has passed review and other subsystem maintainers ACKed the clock setup related driver modifications It was suggested that the series may not be kept together when applying, i.e. that individual patches may need to take separate routes through individual subsystem trees. Here is how the parts of the series interact: - parts 01-14 are apparent fixes and improvements to existing drivers, they may immediately get applied via their respective subsystems when they are considered acceptable in review (number 13 already was taken into clk-next) - parts 15-16 are device tree improvements (providing previously lacking information on the hardware, plus introducing support for symbolic references in DT nodes), and can get applied immediately via their respective subsystem - part 17 introduces the platform clock driver which provides common clock support (uses shared drivers and common infrastructure, is an OF clock provider) -- this patch introduces _and_ enables the driver which strictly depends on the device tree update from part 16, and when common clock support gets enabled all peripheral drivers shall have received their clock API use cleanup - part 18 introduces clock specs in the device tree which is used for client side lookups (from within peripheral drivers), this part must not get applied before the OF clock provider from part 17 - parts 19-21 and 23-28 further adjust peripheral drivers _after_ the common clock support and OF clock lookup have become available, they strictly depend on parts 17 and 18, finally bring peripheral drivers into the common clock world and remove workarounds in the backend which support migration - parts 22 and 29-31 finally remove remaining compat and migration stuff that has become obsolete after everything else was adjusted (I'd happily re-spin the series to move 22 to the end if eliminating this seemingly out-of-order item helps, currently it's at that position since it finishes what patch 20 and 21 have prepared, while I did not dare to squash SPI and UART related patches since they reside in different subsystems) The above results in the following stages, when the series needs to get split: - parts 01-16 could be taken immediately and need not be kept in any order, as they don't depend on each other - parts 17-18 could be taken after 01-16 all are in place (while 18 requires 17) - parts 19-28 (see the remark on 22) could be taken after 17 and 18 are in place (22 depends on 20 and 21 but may get moved to any later position at will, all other parts don't depend on each other and can get applied in any order) - parts 29-31 (and 22 if not applied so far) could be taken after all parts up to 28 were applied Here I erred. The order of the patches within phase 3 appears to actually matter. I'm sorry for bothering you again. While the _content_ of the patches (which manipulation gets done to the source) is correct and independent from neighbour patches, yet a patch in that third phase will change the _context_ of subsequent patches. The sum of all the patches applied will be identical again, but changed order of application may cause conflicts (regardless of how simple to resolve they may be). Build and run tests and the organization of v4 (immediate removal upon driver adjustment) have shown that removing a migration workaround in the very moment where driver adjustment obsoletes it keeps the system operational. I consider this a very positive feature, and would only rearrange the order if the series' content was ACKed in complete. Moving removal of the workarounds to a later point in time won't affect operation (just leaves the workaround in place a little longer, while it does not harm), and will eliminate potential for conflicts. This I would do when accepting the series was decided, to not lose the precious test feature during development
[PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
in the serial communication drivers, updated comments and reworded commit messages in the core clock driver to expand on the pre-enable workaround and clkdev registration (09/24) - keep a reference to the PSC FIFO clock during use instead of looking up the clock again in the uninit() routine (14/24) - remove the clkdev.h header file inclusion directive with the removal of the clkdev registration call (13/24) Gerhard Sittig (31): spi: mpc512x: cleanup clock API use serial: mpc512x: cleanup clock API use USB: fsl-mph-dr-of: cleanup clock API use mtd: mpc5121_nfc: cleanup clock API use [media] fsl-viu: cleanup clock API use i2c: mpc: cleanup clock API use fs_enet: silence a build warning (unused variable) fs_enet: cleanup clock API use powerpc/fsl-pci: improve clock API use net: can: mscan: add a comment on reg to idx mapping net: can: mscan: improve clock API use powerpc: mpc512x: array decl for MCLK registers in CCM clk: wrap I/O access for improved portability dts: mpc512x: prepare for preprocessor support dts: mpc512x: introduce dt-bindings/clock/ header dts: mpc512x: add clock related device tree specs clk: mpc512x: introduce COMMON_CLK for MPC512x dts: mpc512x: add clock specs for client lookups clk: mpc512x: don't pre-enable FEC and I2C clocks spi: mpc512x: switch to CCF names in clock lookup serial: mpc512x: switch to CCF names in clock lookup clk: mpc512x: remove PSC (UART, SPI) compat workarounds serial: mpc512x: setup the PSC FIFO clock as well USB: fsl-mph-dr-of: remove now obsolete clock lookup name mtd: mpc5121_nfc: remove now obsolete clock lookup name [media] fsl-viu: remove now obsolete clock lookup name net: can: mscan: add common clock support for mpc512x powerpc/mpc512x: improve DIU related clock setup clk: mpc512x: switch to COMMON_CLK, remove PPC_CLOCK net: can: mscan: remove non-CCF code for MPC512x clk: mpc512x: remove remaining migration workarounds arch/powerpc/boot/dts/ac14xx.dts |9 +- arch/powerpc/boot/dts/include/dt-bindings |1 + arch/powerpc/boot/dts/mpc5121.dtsi | 110 ++- arch/powerpc/boot/dts/mpc5121ads.dts |2 +- arch/powerpc/boot/dts/pdm360ng.dts |2 +- arch/powerpc/include/asm/mpc5121.h | 18 +- arch/powerpc/platforms/512x/Kconfig|2 +- arch/powerpc/platforms/512x/Makefile |3 +- arch/powerpc/platforms/512x/clock-commonclk.c | 716 +++ arch/powerpc/platforms/512x/clock.c| 753 arch/powerpc/platforms/512x/mpc512x_shared.c | 165 +++-- arch/powerpc/sysdev/fsl_pci.c | 22 + drivers/clk/clk-divider.c |6 +- drivers/clk/clk-gate.c |6 +- drivers/clk/clk-mux.c |6 +- drivers/i2c/busses/i2c-mpc.c | 24 + drivers/media/platform/fsl-viu.c | 23 +- drivers/mtd/nand/mpc5121_nfc.c | 21 +- drivers/net/can/mscan/mpc5xxx_can.c| 281 +--- drivers/net/can/mscan/mscan.c | 27 +- drivers/net/can/mscan/mscan.h |3 + .../net/ethernet/freescale/fs_enet/fs_enet-main.c | 21 +- drivers/spi/spi-mpc512x-psc.c | 60 +- drivers/tty/serial/mpc52xx_uart.c | 179 - drivers/usb/host/fsl-mph-dr-of.c | 27 +- include/dt-bindings/clock/mpc512x-clock.h | 69 ++ include/linux/clk-provider.h | 33 + include/linux/fs_enet_pd.h |3 + 28 files changed, 1534 insertions(+), 1058 deletions(-) create mode 12 arch/powerpc/boot/dts/include/dt-bindings create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c delete mode 100644 arch/powerpc/platforms/512x/clock.c create mode 100644 include/dt-bindings/clock/mpc512x-clock.h # uname -srm Linux 3.11.0-rc4-00031-gb38a1de ppc # cat /sys/kernel/debug/clk/clk_summary clockenable_cnt prepare_cnt rate - ac97 0 024567000 spdif_rx_in0 00 spdif_tx_in0 00 psc_mclk_in0 02500 dummy 1 10 osc1 12500 ref 1 12500 sys 6 632000 spdif-mux00 032000 spdif-en0 0 032000 spdif_mclk_div 0 08000
[PATCH v4 01/31] spi: mpc512x: cleanup clock API use
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
(bitrate) determination to reduce redundancy as well as to not exceed
the maximum text line length
- stick with the PPC_CLOCK 'psc%d_mclk' name for clock lookup, only
switch to a fixed string later after device tree based clock lookup
will have become available
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c | 48 +
1 file changed, 30 insertions(+), 18 deletions(-)
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 29fce6a..85581f3 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -38,7 +38,8 @@ struct mpc512x_psc_spi {
struct mpc512x_psc_fifo __iomem *fifo;
unsigned int irq;
u8 bits_per_word;
- u32 mclk;
+ struct clk *clk_mclk;
+ u32 mclk_rate;
struct completion txisrdone;
};
@@ -72,6 +73,7 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device
*spi)
struct mpc52xx_psc __iomem *psc = mps-psc;
u32 sicr;
u32 ccr;
+ int speed;
u16 bclkdiv;
sicr = in_be32(psc-sicr);
@@ -95,10 +97,10 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device
*spi)
ccr = in_be32(psc-ccr);
ccr = 0xFF00;
- if (cs-speed_hz)
- bclkdiv = (mps-mclk / cs-speed_hz) - 1;
- else
- bclkdiv = (mps-mclk / 100) - 1;/* default 1MHz */
+ speed = cs-speed_hz;
+ if (!speed)
+ speed = 100;/* default 1MHz */
+ bclkdiv = (mps-mclk_rate / speed) - 1;
ccr |= (((bclkdiv 0xff) 16) | (((bclkdiv 8) 0xff) 8));
out_be32(psc-ccr, ccr);
@@ -386,19 +388,11 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
{
struct mpc52xx_psc __iomem *psc = mps-psc;
struct mpc512x_psc_fifo __iomem *fifo = mps-fifo;
- struct clk *spiclk;
- int ret = 0;
- char name[32];
u32 sicr;
u32 ccr;
+ int speed;
u16 bclkdiv;
- sprintf(name, psc%d_mclk, master-bus_num);
- spiclk = clk_get(master-dev, name);
- clk_enable(spiclk);
- mps-mclk = clk_get_rate(spiclk);
- clk_put(spiclk);
-
/* Reset the PSC into a known state */
out_8(psc-command, MPC52xx_PSC_RST_RX);
out_8(psc-command, MPC52xx_PSC_RST_TX);
@@ -425,7 +419,8 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
ccr = in_be32(psc-ccr);
ccr = 0xFF00;
- bclkdiv = (mps-mclk / 100) - 1;/* default 1MHz */
+ speed = 100;/* default 1MHz */
+ bclkdiv = (mps-mclk_rate / speed) - 1;
ccr |= (((bclkdiv 0xff) 16) | (((bclkdiv 8) 0xff) 8));
out_be32(psc-ccr, ccr);
@@ -445,7 +440,7 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
mps-bits_per_word = 8;
- return ret;
+ return 0;
}
static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
@@ -479,6 +474,9 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
struct spi_master *master;
int ret;
void *tempp;
+ int psc_num;
+ char clk_name[16];
+ struct clk *clk;
master = spi_alloc_master(dev, sizeof *mps);
if (master == NULL)
@@ -521,16 +519,29 @@ static int mpc512x_psc_spi_do_probe(struct device *dev,
u32 regaddr,
goto free_master;
init_completion(mps-txisrdone);
+ psc_num = master-bus_num;
+ snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
+ clk = devm_clk_get(dev, clk_name);
+ if (IS_ERR(clk))
+ goto free_irq;
+ ret = clk_prepare_enable(clk);
+ if (ret)
+ goto free_irq;
+ mps-clk_mclk = clk;
+ mps-mclk_rate = clk_get_rate(clk);
+
ret = mpc512x_psc_spi_port_config(master, mps);
if (ret 0)
- goto free_irq;
+ goto free_clock;
ret = spi_register_master(master);
if (ret 0)
- goto free_irq;
+ goto free_clock;
return ret;
+free_clock:
+ clk_disable_unprepare(mps-clk_mclk);
free_irq:
free_irq(mps-irq, mps);
free_master:
@@ -547,6 +558,7 @@ static int mpc512x_psc_spi_do_remove(struct device *dev)
struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
spi_unregister_master(master);
+ clk_disable_unprepare(mps-clk_mclk);
free_irq(mps-irq, mps);
if (mps-psc)
iounmap(mps-psc);
--
1.7.10.4
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[PATCH v4 02/31] serial: mpc512x: cleanup clock API use
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and propagate enable errors
- fix a buffer overflow for clock names with two digit PSC index numbers
- stick with the PPC_CLOCK 'psc%d_mclk' name for clock lookup, only
switch to a fixed string later after device tree based clock lookup
will have become available
to achieve support for MPC512x which is neutral to MPC5200, the
modification was done as follows
- introduce clock alloc and clock release routines in addition to
the previous clock enable/disable routine in the psc_ops struct
- make the clock allocation a part of the port request (resource
allocation), and make clock release a part of the port release, such
that essential resources get allocated early
- just enable/disable the clock from within the .clock() callback
without any allocation or preparation as the former implementation
did, since this routine is called from within the startup and shutdown
callbacks
- all of the above remains a NOP for the MPC5200 platform (no callbacks
are provided on that platform)
- implementation note: the clock gets enabled upon allocation already
just in case the clock is not only required for bitrate generation but
for register access as well
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c | 98 ++---
1 file changed, 81 insertions(+), 17 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index e1280a2..5be1df3 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -107,6 +107,8 @@ struct psc_ops {
unsigned int(*set_baudrate)(struct uart_port *port,
struct ktermios *new,
struct ktermios *old);
+ int (*clock_alloc)(struct uart_port *port);
+ void(*clock_relse)(struct uart_port *port);
int (*clock)(struct uart_port *port, int enable);
int (*fifoc_init)(void);
void(*fifoc_uninit)(void);
@@ -616,31 +618,73 @@ static irqreturn_t mpc512x_psc_handle_irq(struct
uart_port *port)
return IRQ_NONE;
}
-static int mpc512x_psc_clock(struct uart_port *port, int enable)
+static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];
+
+/* called from within the .request_port() callback (allocation) */
+static int mpc512x_psc_alloc_clock(struct uart_port *port)
{
- struct clk *psc_clk;
int psc_num;
- char clk_name[10];
+ char clk_name[16];
+ struct clk *clk;
+ int err;
+
+ psc_num = (port-mapbase 0xf00) 8;
+ snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
+ clk = devm_clk_get(port-dev, clk_name);
+ if (IS_ERR(clk)) {
+ dev_err(port-dev, Failed to get MCLK!\n);
+ return PTR_ERR(clk);
+ }
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(port-dev, Failed to enable MCLK!\n);
+ return err;
+ }
+ psc_mclk_clk[psc_num] = clk;
+ return 0;
+}
+
+/* called from within the .release_port() callback (release) */
+static void mpc512x_psc_relse_clock(struct uart_port *port)
+{
+ int psc_num;
+ struct clk *clk;
+
+ psc_num = (port-mapbase 0xf00) 8;
+ clk = psc_mclk_clk[psc_num];
+ if (clk) {
+ clk_disable_unprepare(clk);
+ psc_mclk_clk[psc_num] = NULL;
+ }
+}
+
+/* implementation of the .clock() callback (enable/disable) */
+static int mpc512x_psc_endis_clock(struct uart_port *port, int enable)
+{
+ int psc_num;
+ struct clk *psc_clk;
+ int ret;
if (uart_console(port))
return 0;
psc_num = (port-mapbase 0xf00) 8;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- psc_clk = clk_get(port-dev, clk_name);
- if (IS_ERR(psc_clk)) {
+ psc_clk = psc_mclk_clk[psc_num];
+ if (!psc_clk) {
dev_err(port-dev, Failed to get PSC clock entry!\n);
return -ENODEV;
}
- dev_dbg(port-dev, %s %sable\n, clk_name, enable ? en : dis);
-
- if (enable)
- clk_enable(psc_clk);
- else
+ dev_dbg(port-dev, mclk %sable\n, enable ? en : dis);
+ if (enable) {
+ ret = clk_enable(psc_clk);
+ if (ret)
+ dev_err(port-dev, Failed to enable MCLK!\n);
+ return ret;
+ } else {
clk_disable(psc_clk);
-
- return 0;
+ return 0;
+ }
}
static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np)
@@ -873,7
[PATCH v4 04/31] mtd: mpc5121_nfc: cleanup clock API use
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust error code paths to correctly balance
get/put and prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 3c9cdcb..3c60a00 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -617,10 +617,8 @@ static void mpc5121_nfc_free(struct device *dev, struct
mtd_info *mtd)
struct nand_chip *chip = mtd-priv;
struct mpc5121_nfc_prv *prv = chip-priv;
- if (prv-clk) {
- clk_disable(prv-clk);
- clk_put(prv-clk);
- }
+ if (prv-clk)
+ clk_disable_unprepare(prv-clk);
if (prv-csreg)
iounmap(prv-csreg);
@@ -629,6 +627,7 @@ static void mpc5121_nfc_free(struct device *dev, struct
mtd_info *mtd)
static int mpc5121_nfc_probe(struct platform_device *op)
{
struct device_node *rootnode, *dn = op-dev.of_node;
+ struct clk *clk;
struct device *dev = op-dev;
struct mpc5121_nfc_prv *prv;
struct resource res;
@@ -730,14 +729,18 @@ static int mpc5121_nfc_probe(struct platform_device *op)
of_node_put(rootnode);
/* Enable NFC clock */
- prv-clk = clk_get(dev, nfc_clk);
- if (IS_ERR(prv-clk)) {
+ clk = devm_clk_get(dev, nfc_clk);
+ if (IS_ERR(clk)) {
dev_err(dev, Unable to acquire NFC clock!\n);
- retval = PTR_ERR(prv-clk);
+ retval = PTR_ERR(clk);
goto error;
}
-
- clk_enable(prv-clk);
+ retval = clk_prepare_enable(clk);
+ if (retval) {
+ dev_err(dev, Unable to enable NFC clock!\n);
+ goto error;
+ }
+ prv-clk = clk;
/* Reset NAND Flash controller */
nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
--
1.7.10.4
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[PATCH v4 03/31] USB: fsl-mph-dr-of: cleanup clock API use
use devm_get_clk() for automatic put upon device close, check for and
propagate errors when enabling clocks, must prepare clocks before they
can get enabled, unprepare after disable
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 11e0b79..b8a1866 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -260,6 +260,7 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
{
struct fsl_usb2_platform_data *pdata = pdev-dev.platform_data;
struct clk *clk;
+ int err;
char clk_name[10];
int base, clk_num;
@@ -272,13 +273,16 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
return -ENODEV;
snprintf(clk_name, sizeof(clk_name), usb%d_clk, clk_num);
- clk = clk_get(pdev-dev, clk_name);
+ clk = devm_clk_get(pdev-dev, clk_name);
if (IS_ERR(clk)) {
dev_err(pdev-dev, failed to get clk\n);
return PTR_ERR(clk);
}
-
- clk_enable(clk);
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(pdev-dev, failed to enable clk\n);
+ return err;
+ }
pdata-clk = clk;
if (pdata-phy_mode == FSL_USB2_PHY_UTMI_WIDE) {
@@ -302,10 +306,8 @@ static void fsl_usb2_mpc5121_exit(struct platform_device
*pdev)
pdata-regs = NULL;
- if (pdata-clk) {
- clk_disable(pdata-clk);
- clk_put(pdata-clk);
- }
+ if (pdata-clk)
+ clk_disable_unprepare(pdata-clk);
}
static struct fsl_usb2_platform_data fsl_usb2_mpc5121_pd = {
--
1.7.10.4
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[PATCH v4 05/31] [media] fsl-viu: cleanup clock API use
use devm_clk_get() for automatic put after device close, check for and
propagate errors when enabling clocks, need to prepare clocks before
they can get enabled, adjust code paths to correctly balance get/put and
prepare/unprepare and enable/disable calls
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c | 23 +--
1 file changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index 221ec42..fe9898c 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1485,6 +1485,7 @@ static int viu_of_probe(struct platform_device *op)
struct viu_reg __iomem *viu_regs;
struct i2c_adapter *ad;
int ret, viu_irq;
+ struct clk *clk;
ret = of_address_to_resource(op-dev.of_node, 0, r);
if (ret) {
@@ -1577,14 +1578,18 @@ static int viu_of_probe(struct platform_device *op)
}
/* enable VIU clock */
- viu_dev-clk = clk_get(op-dev, viu_clk);
- if (IS_ERR(viu_dev-clk)) {
- dev_err(op-dev, failed to find the clock module!\n);
- ret = -ENODEV;
+ clk = devm_clk_get(op-dev, viu_clk);
+ if (IS_ERR(clk)) {
+ dev_err(op-dev, failed to lookup the clock!\n);
+ ret = PTR_ERR(clk);
+ goto err_clk;
+ }
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(op-dev, failed to enable the clock!\n);
goto err_clk;
- } else {
- clk_enable(viu_dev-clk);
}
+ viu_dev-clk = clk;
/* reset VIU module */
viu_reset(viu_dev-vr);
@@ -1602,8 +1607,7 @@ static int viu_of_probe(struct platform_device *op)
return ret;
err_irq:
- clk_disable(viu_dev-clk);
- clk_put(viu_dev-clk);
+ clk_disable_unprepare(viu_dev-clk);
err_clk:
video_unregister_device(viu_dev-vdev);
err_vdev:
@@ -1626,8 +1630,7 @@ static int viu_of_remove(struct platform_device *op)
free_irq(dev-irq, (void *)dev);
irq_dispose_mapping(dev-irq);
- clk_disable(dev-clk);
- clk_put(dev-clk);
+ clk_disable_unprepare(dev-clk);
video_unregister_device(dev-vdev);
i2c_put_adapter(client-adapter);
--
1.7.10.4
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[PATCH v4 06/31] i2c: mpc: cleanup clock API use
make the MPC I2C driver get, prepare and enable the peripheral clock
during probe ('per' for access to the peripheral's registers); disable
and unprepare the clock upon remove(), put is done by the devm approach;
hold a reference to the clock over the period of use
clock lookup is non-fatal in this implementation as not all platforms
may provide clock specs in their device tree, but enable errors for
specified clocks are considered fatal
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/i2c/busses/i2c-mpc.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 7607dc0..4b00dd0 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -21,6 +21,7 @@
#include linux/of_i2c.h
#include linux/slab.h
+#include linux/clk.h
#include linux/io.h
#include linux/fsl_devices.h
#include linux/i2c.h
@@ -67,6 +68,7 @@ struct mpc_i2c {
#ifdef CONFIG_PM
u8 fdr, dfsrr;
#endif
+ struct clk *clk_per;
};
struct mpc_i2c_divider {
@@ -623,6 +625,8 @@ static int fsl_i2c_probe(struct platform_device *op)
u32 clock = MPC_I2C_CLOCK_LEGACY;
int result = 0;
int plen;
+ struct clk *clk;
+ int err;
match = of_match_device(mpc_i2c_of_match, op-dev);
if (!match)
@@ -653,6 +657,21 @@ static int fsl_i2c_probe(struct platform_device *op)
}
}
+ /*
+* enable clock for the I2C peripheral (non fatal),
+* keep a reference upon successful allocation
+*/
+ clk = devm_clk_get(op-dev, per);
+ if (!IS_ERR(clk)) {
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(op-dev, failed to enable clock\n);
+ goto fail_request;
+ } else {
+ i2c-clk_per = clk;
+ }
+ }
+
if (of_get_property(op-dev.of_node, fsl,preserve-clocking, NULL)) {
clock = MPC_I2C_CLOCK_PRESERVE;
} else {
@@ -696,6 +715,8 @@ static int fsl_i2c_probe(struct platform_device *op)
return result;
fail_add:
+ if (i2c-clk_per)
+ clk_disable_unprepare(i2c-clk_per);
free_irq(i2c-irq, i2c);
fail_request:
irq_dispose_mapping(i2c-irq);
@@ -711,6 +732,9 @@ static int fsl_i2c_remove(struct platform_device *op)
i2c_del_adapter(i2c-adap);
+ if (i2c-clk_per)
+ clk_disable_unprepare(i2c-clk_per);
+
if (i2c-irq)
free_irq(i2c-irq, i2c);
--
1.7.10.4
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[PATCH v4 07/31] fs_enet: silence a build warning (unused variable)
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index 8de53a1..c04eb3a 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -583,7 +583,6 @@ static struct sk_buff *tx_skb_align_workaround(struct
net_device *dev,
struct sk_buff *skb)
{
struct sk_buff *new_skb;
- struct fs_enet_private *fep = netdev_priv(dev);
/* Alloc new skb */
new_skb = netdev_alloc_skb(dev, skb-len + 4);
--
1.7.10.4
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[PATCH v4 08/31] fs_enet: cleanup clock API use
make the Freescale ethernet driver get, prepare and enable the FEC clock
during probe(); disable and unprepare the clock upon remove(), put is
done by the devm approach; hold a reference to the clock over the period
of use
clock lookup is non-fatal as not all platforms provide clock specs in
their device tree; failure to enable specified clocks is fatal
Signed-off-by: Gerhard Sittig g...@denx.de
---
.../net/ethernet/freescale/fs_enet/fs_enet-main.c | 20
include/linux/fs_enet_pd.h |3 +++
2 files changed, 23 insertions(+)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index c04eb3a..6b60582 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -999,6 +999,8 @@ static int fs_enet_probe(struct platform_device *ofdev)
struct fs_enet_private *fep;
struct fs_platform_info *fpi;
const u32 *data;
+ struct clk *clk;
+ int err;
const u8 *mac_addr;
const char *phy_connection_type;
int privsize, len, ret = -ENODEV;
@@ -1036,6 +1038,20 @@ static int fs_enet_probe(struct platform_device *ofdev)
fpi-use_rmii = 1;
}
+ /* make clock lookup non-fatal (the driver is shared among platforms),
+* but require enable to succeed when a clock was specified/found,
+* keep a reference to the clock upon successful acquisition
+*/
+ clk = devm_clk_get(ofdev-dev, per);
+ if (!IS_ERR(clk)) {
+ err = clk_prepare_enable(clk);
+ if (err) {
+ ret = err;
+ goto out_free_fpi;
+ }
+ fpi-clk_per = clk;
+ }
+
privsize = sizeof(*fep) +
sizeof(struct sk_buff **) *
(fpi-rx_ring + fpi-tx_ring);
@@ -1107,6 +1123,8 @@ out_free_dev:
free_netdev(ndev);
out_put:
of_node_put(fpi-phy_node);
+ if (fpi-clk_per)
+ clk_disable_unprepare(fpi-clk_per);
out_free_fpi:
kfree(fpi);
return ret;
@@ -1123,6 +1141,8 @@ static int fs_enet_remove(struct platform_device *ofdev)
fep-ops-cleanup_data(ndev);
dev_set_drvdata(fep-dev, NULL);
of_node_put(fep-fpi-phy_node);
+ if (fep-fpi-clk_per)
+ clk_disable_unprepare(fep-fpi-clk_per);
free_netdev(ndev);
return 0;
}
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
index 51b7934..a978d0d 100644
--- a/include/linux/fs_enet_pd.h
+++ b/include/linux/fs_enet_pd.h
@@ -16,6 +16,7 @@
#ifndef FS_ENET_PD_H
#define FS_ENET_PD_H
+#include linux/clk.h
#include linux/string.h
#include linux/of_mdio.h
#include asm/types.h
@@ -142,6 +143,8 @@ struct fs_platform_info {
int use_rmii; /* use RMII mode */
int has_phy;/* if the network is phy container as well...*/
+
+ struct clk *clk_per;/* 'per' clock for register access */
};
struct fs_mii_fec_platform_info {
u32 irq[32];
--
1.7.10.4
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[PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe(); the clock gets put upon device close by the devm approach
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree, but failure to enable specified clocks are fatal
the driver appears to not have a remove() routine, so no reference to
the clock is kept during use, and the clock isn't released (the devm
approach will put the clock, but it won't get disabled or unprepared)
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/sysdev/fsl_pci.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..549ff08 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -17,6 +17,8 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+#include linux/clk.h
#include linux/kernel.h
#include linux/pci.h
#include linux/delay.h
@@ -926,12 +928,32 @@ void fsl_pci_assign_primary(void)
static int fsl_pci_probe(struct platform_device *pdev)
{
+ struct clk *clk;
int ret;
struct device_node *node;
#ifdef CONFIG_SWIOTLB
struct pci_controller *hose;
#endif
+ /*
+* clock lookup is non-fatal since the driver is shared among
+* platforms and not all of them provide clocks specs in their
+* device tree, but failure to enable a specified clock is
+* considered fatal
+*/
+ clk = devm_clk_get(pdev-dev, per);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(dev, Could not enable peripheral clock\n);
+ return ret;
+ }
+ /*
+* TODO where to store the 'clk' reference? there appears
+* to be no remove() routine which undoes what probe() does
+*/
+ }
+
node = pdev-dev.of_node;
ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
--
1.7.10.4
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[PATCH v4 10/31] net: can: mscan: add a comment on reg to idx mapping
add a comment about the magic of deriving an MSCAN component index from the peripheral's physical address / register offset Signed-off-by: Gerhard Sittig g...@denx.de --- drivers/net/can/mscan/mpc5xxx_can.c |5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c index 5b0ee8e..bc422ba 100644 --- a/drivers/net/can/mscan/mpc5xxx_can.c +++ b/drivers/net/can/mscan/mpc5xxx_can.c @@ -148,7 +148,10 @@ static u32 mpc512x_can_get_clock(struct platform_device *ofdev, goto exit_put; } - /* Determine the MSCAN device index from the physical address */ + /* Determine the MSCAN device index from the peripheral's +* physical address. Register address offsets against the +* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380 +*/ pval = of_get_property(ofdev-dev.of_node, reg, plen); BUG_ON(!pval || plen sizeof(*pval)); clockidx = (*pval 0x80) ? 1 : 0; -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v4 11/31] net: can: mscan: improve clock API use
the .get_clock() callback is run from probe() and might allocate
resources, introduce a .put_clock() callback that is run from remove()
to undo any allocation activities
prepare and enable the clocks in open(), disable and unprepare the
clocks in close() if clocks were acquired during probe(), to not assume
knowledge about which activities are done in probe() and remove()
use devm_get_clk() to lookup the SYS and REF clocks, to have the clocks
put upon device shutdown
store pointers to data structures upon successful allocation already
instead of deferral until complete setup, such that subroutines in the
setup sequence may access those data structures as well to track their
resource acquisition
since clock allocation remains optional, the release callback as well as
the enable/disable calls in open/close are optional as well
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 18 --
drivers/net/can/mscan/mscan.c | 27 ++-
drivers/net/can/mscan/mscan.h |3 +++
3 files changed, 41 insertions(+), 7 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index bc422ba..e59b3a3 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -40,6 +40,7 @@ struct mpc5xxx_can_data {
unsigned int type;
u32 (*get_clock)(struct platform_device *ofdev, const char *clock_name,
int *mscan_clksrc);
+ void (*put_clock)(struct platform_device *ofdev);
};
#ifdef CONFIG_PPC_MPC52xx
@@ -180,7 +181,7 @@ static u32 mpc512x_can_get_clock(struct platform_device
*ofdev,
clockdiv = 1;
if (!clock_name || !strcmp(clock_name, sys)) {
- sys_clk = clk_get(ofdev-dev, sys_clk);
+ sys_clk = devm_clk_get(ofdev-dev, sys_clk);
if (IS_ERR(sys_clk)) {
dev_err(ofdev-dev, couldn't get sys_clk\n);
goto exit_unmap;
@@ -203,7 +204,7 @@ static u32 mpc512x_can_get_clock(struct platform_device
*ofdev,
}
if (clocksrc 0) {
- ref_clk = clk_get(ofdev-dev, ref_clk);
+ ref_clk = devm_clk_get(ofdev-dev, ref_clk);
if (IS_ERR(ref_clk)) {
dev_err(ofdev-dev, couldn't get ref_clk\n);
goto exit_unmap;
@@ -280,6 +281,8 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
dev = alloc_mscandev();
if (!dev)
goto exit_dispose_irq;
+ platform_set_drvdata(ofdev, dev);
+ SET_NETDEV_DEV(dev, ofdev-dev);
priv = netdev_priv(dev);
priv-reg_base = base;
@@ -296,8 +299,6 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
goto exit_free_mscan;
}
- SET_NETDEV_DEV(dev, ofdev-dev);
-
err = register_mscandev(dev, mscan_clksrc);
if (err) {
dev_err(ofdev-dev, registering %s failed (err=%d)\n,
@@ -305,8 +306,6 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
goto exit_free_mscan;
}
- platform_set_drvdata(ofdev, dev);
-
dev_info(ofdev-dev, MSCAN at 0x%p, irq %d, clock %d Hz\n,
priv-reg_base, dev-irq, priv-can.clock.freq);
@@ -324,10 +323,17 @@ exit_unmap_mem:
static int mpc5xxx_can_remove(struct platform_device *ofdev)
{
+ const struct of_device_id *match;
+ const struct mpc5xxx_can_data *data;
struct net_device *dev = platform_get_drvdata(ofdev);
struct mscan_priv *priv = netdev_priv(dev);
+ match = of_match_device(mpc5xxx_can_table, ofdev-dev);
+ data = match ? match-data : NULL;
+
unregister_mscandev(dev);
+ if (data data-put_clock)
+ data-put_clock(ofdev);
iounmap(priv-reg_base);
irq_dispose_mapping(dev-irq);
free_candev(dev);
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index e6b4095..4f998f5 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -573,10 +573,24 @@ static int mscan_open(struct net_device *dev)
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs __iomem *regs = priv-reg_base;
+ if (priv-clk_ipg) {
+ ret = clk_prepare_enable(priv-clk_ipg);
+ if (ret)
+ goto exit_retcode;
+ }
+ if (priv-clk_can) {
+ ret = clk_prepare_enable(priv-clk_can);
+ if (ret) {
+ if (priv-clk_ipg)
+ clk_disable_unprepare(priv-clk_ipg);
+ goto exit_retcode;
+ }
+ }
+
/* common open */
ret = open_candev(dev);
if (ret
[PATCH v4 12/31] powerpc: mpc512x: array decl for MCLK registers in CCM
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC controller
or CAN controller component number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN CCR fields declared here aren't referenced anywhere
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/include/asm/mpc5121.h | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc5121.h
b/arch/powerpc/include/asm/mpc5121.h
index 8ae133e..887d3d6 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -32,25 +32,11 @@ struct mpc512x_ccm {
u32 scfr2; /* System Clock Frequency Register 2 */
u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
u32 bcr;/* Bread Crumb Register */
- u32 p0ccr; /* PSC0 Clock Control Register */
- u32 p1ccr; /* PSC1 CCR */
- u32 p2ccr; /* PSC2 CCR */
- u32 p3ccr; /* PSC3 CCR */
- u32 p4ccr; /* PSC4 CCR */
- u32 p5ccr; /* PSC5 CCR */
- u32 p6ccr; /* PSC6 CCR */
- u32 p7ccr; /* PSC7 CCR */
- u32 p8ccr; /* PSC8 CCR */
- u32 p9ccr; /* PSC9 CCR */
- u32 p10ccr; /* PSC10 CCR */
- u32 p11ccr; /* PSC11 CCR */
+ u32 psc_ccr[12];/* PSC Clock Control Registers */
u32 spccr; /* SPDIF Clock Control Register */
u32 cccr; /* CFM Clock Control Register */
u32 dccr; /* DIU Clock Control Register */
- u32 m1ccr; /* MSCAN1 CCR */
- u32 m2ccr; /* MSCAN2 CCR */
- u32 m3ccr; /* MSCAN3 CCR */
- u32 m4ccr; /* MSCAN4 CCR */
+ u32 mscan_ccr[4]; /* MSCAN Clock Control Registers */
u8 res[0x98]; /* Reserved */
};
--
1.7.10.4
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[PATCH v4 14/31] dts: mpc512x: prepare for preprocessor support
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
arch/powerpc/boot/dts/include/dt-bindings |1 +
arch/powerpc/boot/dts/mpc5121ads.dts |2 +-
arch/powerpc/boot/dts/pdm360ng.dts|2 +-
4 files changed, 4 insertions(+), 3 deletions(-)
create mode 12 arch/powerpc/boot/dts/include/dt-bindings
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a27a460..a543c40 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -10,7 +10,7 @@
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = ac14xx;
diff --git a/arch/powerpc/boot/dts/include/dt-bindings
b/arch/powerpc/boot/dts/include/dt-bindings
new file mode 12
index 000..08c00e4
--- /dev/null
+++ b/arch/powerpc/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 7d3cb79..c228a0a 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -9,7 +9,7 @@
* option) any later version.
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = mpc5121ads;
diff --git a/arch/powerpc/boot/dts/pdm360ng.dts
b/arch/powerpc/boot/dts/pdm360ng.dts
index 7433740..871c16d 100644
--- a/arch/powerpc/boot/dts/pdm360ng.dts
+++ b/arch/powerpc/boot/dts/pdm360ng.dts
@@ -13,7 +13,7 @@
* option) any later version.
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = pdm360ng;
--
1.7.10.4
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[PATCH v4 13/31] clk: wrap I/O access for improved portability
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/clk/clk-divider.c|6 +++---
drivers/clk/clk-gate.c |6 +++---
drivers/clk/clk-mux.c|6 +++---
include/linux/clk-provider.h | 17 +
4 files changed, 26 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -104,7 +104,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw
*hw,
struct clk_divider *divider = to_clk_divider(hw);
unsigned int div, val;
- val = readl(divider-reg) divider-shift;
+ val = clk_readl(divider-reg) divider-shift;
val = div_mask(divider);
div = _get_div(divider, val);
@@ -230,11 +230,11 @@ static int clk_divider_set_rate(struct clk_hw *hw,
unsigned long rate,
if (divider-flags CLK_DIVIDER_HIWORD_MASK) {
val = div_mask(divider) (divider-shift + 16);
} else {
- val = readl(divider-reg);
+ val = clk_readl(divider-reg);
val = ~(div_mask(divider) divider-shift);
}
val |= value divider-shift;
- writel(val, divider-reg);
+ clk_writel(val, divider-reg);
if (divider-lock)
spin_unlock_irqrestore(divider-lock, flags);
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 790306e..b7fbd96 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -58,7 +58,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
if (set)
reg |= BIT(gate-bit_idx);
} else {
- reg = readl(gate-reg);
+ reg = clk_readl(gate-reg);
if (set)
reg |= BIT(gate-bit_idx);
@@ -66,7 +66,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
reg = ~BIT(gate-bit_idx);
}
- writel(reg, gate-reg);
+ clk_writel(reg, gate-reg);
if (gate-lock)
spin_unlock_irqrestore(gate-lock, flags);
@@ -89,7 +89,7 @@ static int clk_gate_is_enabled(struct clk_hw *hw)
u32 reg;
struct clk_gate *gate = to_clk_gate(hw);
- reg = readl(gate-reg);
+ reg = clk_readl(gate-reg);
/* if a set bit disables this clk, flip it before masking */
if (gate-flags CLK_GATE_SET_TO_DISABLE)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 61c..02ef506 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -42,7 +42,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
* OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
* val = 0x4 really means bit 2, index starts at bit 0
*/
- val = readl(mux-reg) mux-shift;
+ val = clk_readl(mux-reg) mux-shift;
val = mux-mask;
if (mux-table) {
@@ -89,11 +89,11 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
if (mux-flags CLK_MUX_HIWORD_MASK) {
val = mux-mask (mux-shift + 16);
} else {
- val = readl(mux-reg);
+ val = clk_readl(mux-reg);
val = ~(mux-mask mux-shift);
}
val |= index mux-shift;
- writel(val, mux-reg);
+ clk_writel(val, mux-reg);
if (mux-lock)
spin_unlock_irqrestore(mux-lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 1ec14a7..c4f7799 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -12,6 +12,7 @@
#define __LINUX_CLK_PROVIDER_H
#include linux/clk.h
+#include linux/io.h
#ifdef CONFIG_COMMON_CLK
@@ -490,5 +491,21 @@ static inline const char *of_clk_get_parent_name(struct
device_node *np,
#define of_clk_init(matches) \
{ while (0); }
#endif /* CONFIG_OF */
+
+/*
+ * wrap access to peripherals in accessor routines
+ * for improved portability across platforms
+ */
+
+static inline u32 clk_readl(u32 __iomem *reg)
+{
+ return readl(reg);
+}
+
+static inline void clk_writel(u32 val, u32 __iomem *reg)
+{
+ writel(val, reg);
+}
+
#endif /* CONFIG_COMMON_CLK */
#endif /* CLK_PROVIDER_H */
--
1.7.10.4
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