Re: [PATCH 10/15] csky, hexagon: fix broken sys_sync_file_range
On Fri, Jun 21, 2024 at 12:24 AM Arnd Bergmann wrote: > > From: Arnd Bergmann > > Both of these architectures require u64 function arguments to be > passed in even/odd pairs of registers or stack slots, which in case of > sync_file_range would result in a seven-argument system call that is > not currently possible. The system call is therefore incompatible with > all existing binaries. > > While it would be possible to implement support for seven arguments > like on mips, it seems better to use a six-argument version, either > with the normal argument order but misaligned as on most architectures > or with the reordered sync_file_range2() calling conventions as on > arm and powerpc. > > Cc: sta...@vger.kernel.org > Signed-off-by: Arnd Bergmann > --- > arch/csky/include/uapi/asm/unistd.h| 1 + > arch/hexagon/include/uapi/asm/unistd.h | 1 + > 2 files changed, 2 insertions(+) > > diff --git a/arch/csky/include/uapi/asm/unistd.h > b/arch/csky/include/uapi/asm/unistd.h > index 7ff6a2466af1..e0594b6370a6 100644 > --- a/arch/csky/include/uapi/asm/unistd.h > +++ b/arch/csky/include/uapi/asm/unistd.h > @@ -6,6 +6,7 @@ > #define __ARCH_WANT_SYS_CLONE3 > #define __ARCH_WANT_SET_GET_RLIMIT > #define __ARCH_WANT_TIME32_SYSCALLS > +#define __ARCH_WANT_SYNC_FILE_RANGE2 For csky part. Acked-by: Guo Ren > #include > > #define __NR_set_thread_area (__NR_arch_specific_syscall + 0) > diff --git a/arch/hexagon/include/uapi/asm/unistd.h > b/arch/hexagon/include/uapi/asm/unistd.h > index 432c4db1b623..21ae22306b5d 100644 > --- a/arch/hexagon/include/uapi/asm/unistd.h > +++ b/arch/hexagon/include/uapi/asm/unistd.h > @@ -36,5 +36,6 @@ > #define __ARCH_WANT_SYS_VFORK > #define __ARCH_WANT_SYS_FORK > #define __ARCH_WANT_TIME32_SYSCALLS > +#define __ARCH_WANT_SYNC_FILE_RANGE2 > > #include > -- > 2.39.2 > -- Best Regards Guo Ren
Re: [PATCH v3] kprobe/ftrace: bail out if ftrace was killed
On Thu, May 2, 2024 at 12:30 AM Stephen Brennan wrote: > > If an error happens in ftrace, ftrace_kill() will prevent disarming > kprobes. Eventually, the ftrace_ops associated with the kprobes will be > freed, yet the kprobes will still be active, and when triggered, they > will use the freed memory, likely resulting in a page fault and panic. > > This behavior can be reproduced quite easily, by creating a kprobe and > then triggering a ftrace_kill(). For simplicity, we can simulate an > ftrace error with a kernel module like [1]: > > [1]: https://github.com/brenns10/kernel_stuff/tree/master/ftrace_killer > > sudo perf probe --add commit_creds > sudo perf trace -e probe:commit_creds > # In another terminal > make > sudo insmod ftrace_killer.ko # calls ftrace_kill(), simulating bug > # Back to perf terminal > # ctrl-c > sudo perf probe --del commit_creds > > After a short period, a page fault and panic would occur as the kprobe > continues to execute and uses the freed ftrace_ops. While ftrace_kill() > is supposed to be used only in extreme circumstances, it is invoked in > FTRACE_WARN_ON() and so there are many places where an unexpected bug > could be triggered, yet the system may continue operating, possibly > without the administrator noticing. If ftrace_kill() does not panic the > system, then we should do everything we can to continue operating, > rather than leave a ticking time bomb. > > Signed-off-by: Stephen Brennan > --- > Changes in v3: > Don't expose ftrace_is_dead(). Create a "kprobe_ftrace_disabled" > variable and check it directly in the kprobe handlers. > Link to v1/v2 discussion: > > https://lore.kernel.org/all/20240426225834.993353-1-stephen.s.bren...@oracle.com/ > > arch/csky/kernel/probes/ftrace.c | 3 +++ > arch/loongarch/kernel/ftrace_dyn.c | 3 +++ > arch/parisc/kernel/ftrace.c | 3 +++ > arch/powerpc/kernel/kprobes-ftrace.c | 3 +++ > arch/riscv/kernel/probes/ftrace.c| 3 +++ > arch/s390/kernel/ftrace.c| 3 +++ > arch/x86/kernel/kprobes/ftrace.c | 3 +++ > include/linux/kprobes.h | 7 +++ > kernel/kprobes.c | 6 ++ > kernel/trace/ftrace.c| 1 + > 10 files changed, 35 insertions(+) > > diff --git a/arch/csky/kernel/probes/ftrace.c > b/arch/csky/kernel/probes/ftrace.c > index 834cffcfbce3..7ba4b98076de 100644 > --- a/arch/csky/kernel/probes/ftrace.c > +++ b/arch/csky/kernel/probes/ftrace.c > @@ -12,6 +12,9 @@ void kprobe_ftrace_handler(unsigned long ip, unsigned long > parent_ip, > struct kprobe_ctlblk *kcb; > struct pt_regs *regs; > > + if (unlikely(kprobe_ftrace_disabled)) > + return; > + For csky part. Acked-by: Guo Ren > bit = ftrace_test_recursion_trylock(ip, parent_ip); > if (bit < 0) > return; > diff --git a/arch/loongarch/kernel/ftrace_dyn.c > b/arch/loongarch/kernel/ftrace_dyn.c > index 73858c9029cc..bff058317062 100644 > --- a/arch/loongarch/kernel/ftrace_dyn.c > +++ b/arch/loongarch/kernel/ftrace_dyn.c > @@ -287,6 +287,9 @@ void kprobe_ftrace_handler(unsigned long ip, unsigned > long parent_ip, > struct kprobe *p; > struct kprobe_ctlblk *kcb; > > + if (unlikely(kprobe_ftrace_disabled)) > + return; > + > bit = ftrace_test_recursion_trylock(ip, parent_ip); > if (bit < 0) > return; > diff --git a/arch/parisc/kernel/ftrace.c b/arch/parisc/kernel/ftrace.c > index 621a4b386ae4..c91f9c2e61ed 100644 > --- a/arch/parisc/kernel/ftrace.c > +++ b/arch/parisc/kernel/ftrace.c > @@ -206,6 +206,9 @@ void kprobe_ftrace_handler(unsigned long ip, unsigned > long parent_ip, > struct kprobe *p; > int bit; > > + if (unlikely(kprobe_ftrace_disabled)) > + return; > + > bit = ftrace_test_recursion_trylock(ip, parent_ip); > if (bit < 0) > return; > diff --git a/arch/powerpc/kernel/kprobes-ftrace.c > b/arch/powerpc/kernel/kprobes-ftrace.c > index 072ebe7f290b..f8208c027148 100644 > --- a/arch/powerpc/kernel/kprobes-ftrace.c > +++ b/arch/powerpc/kernel/kprobes-ftrace.c > @@ -21,6 +21,9 @@ void kprobe_ftrace_handler(unsigned long nip, unsigned long > parent_nip, > struct pt_regs *regs; > int bit; > > + if (unlikely(kprobe_ftrace_disabled)) > + return; > + > bit = ftrace_test_recursion_trylock(nip, parent_nip); > if (bit < 0) > return; > diff --git a/arch/riscv/kernel/probes/ftrace.c > b/arch/riscv/kernel/probes/ftrace.
Re: [PATCH 3/4] arch: define CONFIG_PAGE_SIZE_*KB on all architectures
On Tue, Feb 27, 2024 at 12:15 AM Arnd Bergmann wrote: > > From: Arnd Bergmann > > Most architectures only support a single hardcoded page size. In order > to ensure that each one of these sets the corresponding Kconfig symbols, > change over the PAGE_SHIFT definition to the common one and allow > only the hardware page size to be selected. > > Signed-off-by: Arnd Bergmann > --- > arch/alpha/Kconfig | 1 + > arch/alpha/include/asm/page.h | 2 +- > arch/arm/Kconfig | 1 + > arch/arm/include/asm/page.h| 2 +- > arch/csky/Kconfig | 1 + > arch/csky/include/asm/page.h | 2 +- > arch/m68k/Kconfig | 3 +++ > arch/m68k/Kconfig.cpu | 2 ++ > arch/m68k/include/asm/page.h | 6 +- > arch/microblaze/Kconfig| 1 + > arch/microblaze/include/asm/page.h | 2 +- > arch/nios2/Kconfig | 1 + > arch/nios2/include/asm/page.h | 2 +- > arch/openrisc/Kconfig | 1 + > arch/openrisc/include/asm/page.h | 2 +- > arch/riscv/Kconfig | 1 + > arch/riscv/include/asm/page.h | 2 +- > arch/s390/Kconfig | 1 + > arch/s390/include/asm/page.h | 2 +- > arch/sparc/Kconfig | 2 ++ > arch/sparc/include/asm/page_32.h | 2 +- > arch/sparc/include/asm/page_64.h | 3 +-- > arch/um/Kconfig| 1 + > arch/um/include/asm/page.h | 2 +- > arch/x86/Kconfig | 1 + > arch/x86/include/asm/page_types.h | 2 +- > arch/xtensa/Kconfig| 1 + > arch/xtensa/include/asm/page.h | 2 +- > 28 files changed, 32 insertions(+), 19 deletions(-) > > diff --git a/arch/alpha/Kconfig b/arch/alpha/Kconfig > index d6968d090d49..4f490250d323 100644 > --- a/arch/alpha/Kconfig > +++ b/arch/alpha/Kconfig > @@ -14,6 +14,7 @@ config ALPHA > select PCI_DOMAINS if PCI > select PCI_SYSCALL if PCI > select HAVE_ASM_MODVERSIONS > + select HAVE_PAGE_SIZE_8KB > select HAVE_PCSPKR_PLATFORM > select HAVE_PERF_EVENTS > select NEED_DMA_MAP_STATE > diff --git a/arch/alpha/include/asm/page.h b/arch/alpha/include/asm/page.h > index 4db1ebc0ed99..70419e6be1a3 100644 > --- a/arch/alpha/include/asm/page.h > +++ b/arch/alpha/include/asm/page.h > @@ -6,7 +6,7 @@ > #include > > /* PAGE_SHIFT determines the page size */ > -#define PAGE_SHIFT 13 > +#define PAGE_SHIFT CONFIG_PAGE_SHIFT > #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) > #define PAGE_MASK (~(PAGE_SIZE-1)) > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 0af6709570d1..9d52ba3a8ad1 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -116,6 +116,7 @@ config ARM > select HAVE_MOD_ARCH_SPECIFIC > select HAVE_NMI > select HAVE_OPTPROBES if !THUMB2_KERNEL > + select HAVE_PAGE_SIZE_4KB > select HAVE_PCI if MMU > select HAVE_PERF_EVENTS > select HAVE_PERF_REGS > diff --git a/arch/arm/include/asm/page.h b/arch/arm/include/asm/page.h > index 119aa85d1feb..62af9f7f9e96 100644 > --- a/arch/arm/include/asm/page.h > +++ b/arch/arm/include/asm/page.h > @@ -8,7 +8,7 @@ > #define _ASMARM_PAGE_H > > /* PAGE_SHIFT determines the page size */ > -#define PAGE_SHIFT 12 > +#define PAGE_SHIFT CONFIG_PAGE_SHIFT > #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) > #define PAGE_MASK (~((1 << PAGE_SHIFT) - 1)) > > diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig > index cf2a6fd7dff8..9c2723ab1c94 100644 > --- a/arch/csky/Kconfig > +++ b/arch/csky/Kconfig > @@ -89,6 +89,7 @@ config CSKY > select HAVE_KPROBES if !CPU_CK610 > select HAVE_KPROBES_ON_FTRACE if !CPU_CK610 > select HAVE_KRETPROBES if !CPU_CK610 > + select HAVE_PAGE_SIZE_4KB > select HAVE_PERF_EVENTS > select HAVE_PERF_REGS > select HAVE_PERF_USER_STACK_DUMP > diff --git a/arch/csky/include/asm/page.h b/arch/csky/include/asm/page.h > index 4a0502e324a6..f70f37402d75 100644 > --- a/arch/csky/include/asm/page.h > +++ b/arch/csky/include/asm/page.h > @@ -10,7 +10,7 @@ > /* > * PAGE_SHIFT determines the page size: 4KB > */ > -#define PAGE_SHIFT 12 > +#define PAGE_SHIFT CONFIG_PAGE_SHIFT LGTM, thx. Acked-by: Guo Ren > #define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT) > #define PAGE_MASK (~(PAGE_SIZE - 1)) > #define THREAD_SIZE(PAGE_SIZE * 2) > diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig > index 4b3e93cac723..7b709453d5e7 100644 > --- a/arch/m68k/Kconfig > +++ b/arch/m68k
Re: [PATCH 12/22] csky: fix arch_jump_label_transform_static override
On Wed, Nov 8, 2023 at 8:02 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> The arch_jump_label_transform_static() function in csky was originally meant
> to
> override the generic __weak function, but that got changed to an #ifndef
> check.
>
> This showed up as a missing-prototype warning:
> arch/csky/kernel/jump_label.c:43:6: error: no previous prototype for
> 'arch_jump_label_transform_static' [-Werror=missing-prototypes]
>
> Change the method to use the new method of having a #define and a prototype
> for the global function.
>
> Fixes: 7e6b9db27de9 ("jump_label: make initial NOP patching the special case")
> Fixes: 4e8bb4ba5a55 ("csky: Add jump-label implementation")
> Signed-off-by: Arnd Bergmann
> ---
> arch/csky/include/asm/jump_label.h | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/csky/include/asm/jump_label.h
> b/arch/csky/include/asm/jump_label.h
> index d488ba6084bc..98a3f4b168bd 100644
> --- a/arch/csky/include/asm/jump_label.h
> +++ b/arch/csky/include/asm/jump_label.h
> @@ -43,5 +43,10 @@ static __always_inline bool arch_static_branch_jump(struct
> static_key *key,
> return true;
> }
>
> +enum jump_label_type;
> +void arch_jump_label_transform_static(struct jump_entry *entry,
> + enum jump_label_type type);
> +#define arch_jump_label_transform_static arch_jump_label_transform_static
> +
> #endif /* __ASSEMBLY__ */
> #endif /* __ASM_CSKY_JUMP_LABEL_H */
> --
> 2.39.2
>
>
Thank you!
Reviewed-by: Guo Ren
--
Best Regards
Guo Ren
Re: [PATCH 8/8] c-sky: rm sentinel element from ctl_talbe array
Acked-by: Guo Ren
On Wed, Sep 6, 2023 at 6:04 PM Joel Granados via B4 Relay
wrote:
>
> From: Joel Granados
>
> This commit comes at the tail end of a greater effort to remove the
> empty elements at the end of the ctl_table arrays (sentinels) which
> will reduce the overall build time size of the kernel and run time
> memory bloat by ~64 bytes per sentinel (further information Link :
> https://lore.kernel.org/all/zo5yx5jfoggi%2f...@bombadil.infradead.org/)
>
> Remove sentinel from alignment_tbl ctl_table array.
>
> Signed-off-by: Joel Granados
> ---
> arch/csky/abiv1/alignment.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/arch/csky/abiv1/alignment.c b/arch/csky/abiv1/alignment.c
> index b60259daed1b..0d75ce7b0328 100644
> --- a/arch/csky/abiv1/alignment.c
> +++ b/arch/csky/abiv1/alignment.c
> @@ -328,8 +328,7 @@ static struct ctl_table alignment_tbl[5] = {
> .maxlen = sizeof(align_usr_count),
> .mode = 0666,
> .proc_handler = _dointvec
> - },
> - {}
> + }
> };
>
> static int __init csky_alignment_init(void)
>
> --
> 2.30.2
>
--
Best Regards
Guo Ren
Re: [PATCH v3 22/34] csky: Convert __pte_free_tlb() to use ptdescs
Acked-by: Guo Ren
On Thu, Jun 1, 2023 at 5:34 AM Vishal Moola (Oracle)
wrote:
>
> Part of the conversions to replace pgtable constructor/destructors with
> ptdesc equivalents.
>
> Signed-off-by: Vishal Moola (Oracle)
> ---
> arch/csky/include/asm/pgalloc.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/csky/include/asm/pgalloc.h b/arch/csky/include/asm/pgalloc.h
> index 7d57e5da0914..9c84c9012e53 100644
> --- a/arch/csky/include/asm/pgalloc.h
> +++ b/arch/csky/include/asm/pgalloc.h
> @@ -63,8 +63,8 @@ static inline pgd_t *pgd_alloc(struct mm_struct *mm)
>
> #define __pte_free_tlb(tlb, pte, address) \
> do { \
> - pgtable_pte_page_dtor(pte); \
> - tlb_remove_page(tlb, pte); \
> + pagetable_pte_dtor(page_ptdesc(pte)); \
> + tlb_remove_page_ptdesc(tlb, page_ptdesc(pte)); \
> } while (0)
>
> extern void pagetable_init(void);
> --
> 2.40.1
>
--
Best Regards
Guo Ren
Re: [PATCH] irq_work: consolidate arch_irq_work_raise prototypes
On Wed, May 17, 2023 at 4:03 AM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> The prototype was hidden on x86, which causes a warning:
>
> kernel/irq_work.c:72:13: error: no previous prototype for
> 'arch_irq_work_raise' [-Werror=missing-prototypes]
>
> Fix this by providing it in only one place that is always visible.
>
> Signed-off-by: Arnd Bergmann
> ---
> arch/arm/include/asm/irq_work.h | 2 --
> arch/arm64/include/asm/irq_work.h | 2 --
> arch/csky/include/asm/irq_work.h| 2 +-
> arch/powerpc/include/asm/irq_work.h | 1 -
> arch/riscv/include/asm/irq_work.h | 2 +-
> arch/s390/include/asm/irq_work.h| 2 --
> arch/x86/include/asm/irq_work.h | 1 -
> include/linux/irq_work.h| 3 +++
> 8 files changed, 5 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm/include/asm/irq_work.h b/arch/arm/include/asm/irq_work.h
> index 3149e4dc1b54..8895999834cc 100644
> --- a/arch/arm/include/asm/irq_work.h
> +++ b/arch/arm/include/asm/irq_work.h
> @@ -9,6 +9,4 @@ static inline bool arch_irq_work_has_interrupt(void)
> return is_smp();
> }
>
> -extern void arch_irq_work_raise(void);
> -
> #endif /* _ASM_ARM_IRQ_WORK_H */
> diff --git a/arch/arm64/include/asm/irq_work.h
> b/arch/arm64/include/asm/irq_work.h
> index 81bbfa3a035b..a1020285ea75 100644
> --- a/arch/arm64/include/asm/irq_work.h
> +++ b/arch/arm64/include/asm/irq_work.h
> @@ -2,8 +2,6 @@
> #ifndef __ASM_IRQ_WORK_H
> #define __ASM_IRQ_WORK_H
>
> -extern void arch_irq_work_raise(void);
> -
> static inline bool arch_irq_work_has_interrupt(void)
> {
> return true;
> diff --git a/arch/csky/include/asm/irq_work.h
> b/arch/csky/include/asm/irq_work.h
> index 33aaf39d6f94..d39fcc1f5395 100644
> --- a/arch/csky/include/asm/irq_work.h
> +++ b/arch/csky/include/asm/irq_work.h
> @@ -7,5 +7,5 @@ static inline bool arch_irq_work_has_interrupt(void)
> {
> return true;
> }
> -extern void arch_irq_work_raise(void);
> +
Acked-by: Guo Ren
> #endif /* __ASM_CSKY_IRQ_WORK_H */
> diff --git a/arch/powerpc/include/asm/irq_work.h
> b/arch/powerpc/include/asm/irq_work.h
> index b8b0be8f1a07..c6d3078bd8c3 100644
> --- a/arch/powerpc/include/asm/irq_work.h
> +++ b/arch/powerpc/include/asm/irq_work.h
> @@ -6,6 +6,5 @@ static inline bool arch_irq_work_has_interrupt(void)
> {
> return true;
> }
> -extern void arch_irq_work_raise(void);
>
> #endif /* _ASM_POWERPC_IRQ_WORK_H */
> diff --git a/arch/riscv/include/asm/irq_work.h
> b/arch/riscv/include/asm/irq_work.h
> index b53891964ae0..b27a4d64fc6a 100644
> --- a/arch/riscv/include/asm/irq_work.h
> +++ b/arch/riscv/include/asm/irq_work.h
> @@ -6,5 +6,5 @@ static inline bool arch_irq_work_has_interrupt(void)
> {
> return IS_ENABLED(CONFIG_SMP);
> }
> -extern void arch_irq_work_raise(void);
> +
> #endif /* _ASM_RISCV_IRQ_WORK_H */
> diff --git a/arch/s390/include/asm/irq_work.h
> b/arch/s390/include/asm/irq_work.h
> index 603783766d0a..f00c9f610d5a 100644
> --- a/arch/s390/include/asm/irq_work.h
> +++ b/arch/s390/include/asm/irq_work.h
> @@ -7,6 +7,4 @@ static inline bool arch_irq_work_has_interrupt(void)
> return true;
> }
>
> -void arch_irq_work_raise(void);
> -
> #endif /* _ASM_S390_IRQ_WORK_H */
> diff --git a/arch/x86/include/asm/irq_work.h b/arch/x86/include/asm/irq_work.h
> index 800ffce0db29..6b4d36c95165 100644
> --- a/arch/x86/include/asm/irq_work.h
> +++ b/arch/x86/include/asm/irq_work.h
> @@ -9,7 +9,6 @@ static inline bool arch_irq_work_has_interrupt(void)
> {
> return boot_cpu_has(X86_FEATURE_APIC);
> }
> -extern void arch_irq_work_raise(void);
> #else
> static inline bool arch_irq_work_has_interrupt(void)
> {
> diff --git a/include/linux/irq_work.h b/include/linux/irq_work.h
> index 8cd11a223260..136f2980cba3 100644
> --- a/include/linux/irq_work.h
> +++ b/include/linux/irq_work.h
> @@ -66,6 +66,9 @@ void irq_work_sync(struct irq_work *work);
> void irq_work_run(void);
> bool irq_work_needs_cpu(void);
> void irq_work_single(void *arg);
> +
> +void arch_irq_work_raise(void);
> +
> #else
> static inline bool irq_work_needs_cpu(void) { return false; }
> static inline void irq_work_run(void) { }
> --
> 2.39.2
>
--
Best Regards
Guo Ren
Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA
On Fri, May 5, 2023 at 9:19 PM Arnd Bergmann wrote: > > On Fri, May 5, 2023, at 07:47, Guo Ren wrote: > > On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote: > > >> > >> riscv also invalidates the caches before the transfer, which does > >> not appear to serve any purpose. > > Yes, we can't guarantee the CPU pre-load cache lines randomly during > > dma working. > > > > But I've two purposes to keep invalidates before dma transfer: > > - We clearly tell the CPU these cache lines are invalid. The caching > > algorithm would use these invalid slots first instead of replacing > > valid ones. > > - Invalidating is very cheap. Actually, flush and clean have the same > > performance in our machine. > > The main purpose of the series was to get consistent behavior on > all machines, so I really don't want a custom optimization on > one architecture. You make a good point about cacheline reuse > after invalidation, but if we do that, I'd suggest doing this > across all architectures. Yes, invalidation of DMA_FROM_DEVICE-for_device is a proposal for all architectures. > > > So, how about: > > > > diff --git a/arch/riscv/mm/dma-noncoherent.c > > b/arch/riscv/mm/dma-noncoherent.c > > index d919efab6eba..2c52fbc15064 100644 > > --- a/arch/riscv/mm/dma-noncoherent.c > > +++ b/arch/riscv/mm/dma-noncoherent.c > > @@ -22,8 +22,6 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t > > size, > > ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); > > break; > > case DMA_FROM_DEVICE: > > - ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); > > - break; > > case DMA_BIDIRECTIONAL: > > ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); > > break; > > This is something we can consider. Unfortunately, this is something > that no architecture (except pa-risc, which has other problems) > does at the moment, so we'd probably need to have a proper debate > about this. > > We already have two conflicting ways to handle DMA_FROM_DEVICE, > either invalidate/invalidate, or clean/invalidate. I can see I vote to invalidate/invalidate. My key point is to let DMA_FROM_DEVICE-for_device invalidate, and DMA_BIDIRECTIONAL contains DMA_FROM_DEVICE. So I also agree: @@ -22,8 +22,6 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); break; case DMA_FROM_DEVICE: - ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); + ALT_CMO_OP(invalidate, vaddr, size, riscv_cbom_block_size); break; case DMA_BIDIRECTIONAL: ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); break; > that flush/invalidate may be a sensible option as well, but I'd > want to have that discussion after the series is complete, so > we can come to a generic solution that has the same documented > behavior across all architectures. Yes, I agree to unify them into a generic solution first. My proposal could be another topic in the future. For that purpose, I give Acked-by: Guo Ren > > In particular, if we end up moving arm64 and riscv back to the > traditional invalidate/invalidate for DMA_FROM_DEVICE and > document that driver must not rely on buffers getting cleaned After invalidation, the cache lines are also cleaned, right? So why do we need to document it additionally? > before a partial DMA_FROM_DEVICE, the question between clean > or flush becomes moot as well. > > > @@ -42,7 +40,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, > > break; > > case DMA_FROM_DEVICE: > > case DMA_BIDIRECTIONAL: > > /* I'm not sure all drivers have guaranteed cacheline > > alignment. If not, this inval would cause problems */ > > - ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); > > + ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size); > > break; > > This is my original patch, and I would not mix it with the other > change. The problem with non-aligned DMA_BIDIRECTIONAL buffers in > is that both flush and inval would be wrong if you get simultaneous > writes from device and cpu to the same cache line, so there is > no way to win this. Using inval instead of flush would at least > work if the CPU data in the cacheline is read-only from the CPU, > so that seems better than something that is always wrong. If CPU data in the cacheline is read-only, the cacheline would never be dirty. Yes, It's always saf
Re: [PATCH 09/21] riscv: dma-mapping: skip invalidation before bidirectional DMA
On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote: > > From: Arnd Bergmann > > For a DMA_BIDIRECTIONAL transfer, the caches have to be cleaned > first to let the device see data written by the CPU, and invalidated > after the transfer to let the CPU see data written by the device. > > riscv also invalidates the caches before the transfer, which does > not appear to serve any purpose. Yes, we can't guarantee the CPU pre-load cache lines randomly during dma working. But I've two purposes to keep invalidates before dma transfer: - We clearly tell the CPU these cache lines are invalid. The caching algorithm would use these invalid slots first instead of replacing valid ones. - Invalidating is very cheap. Actually, flush and clean have the same performance in our machine. So, how about: diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c index d919efab6eba..2c52fbc15064 100644 --- a/arch/riscv/mm/dma-noncoherent.c +++ b/arch/riscv/mm/dma-noncoherent.c @@ -22,8 +22,6 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t size, ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); break; case DMA_FROM_DEVICE: - ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); - break; case DMA_BIDIRECTIONAL: ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); break; @@ -42,7 +40,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, break; case DMA_FROM_DEVICE: case DMA_BIDIRECTIONAL: /* I'm not sure all drivers have guaranteed cacheline alignment. If not, this inval would cause problems */ - ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); + ALT_CMO_OP(inval, vaddr, size, riscv_cbom_block_size); break; default: break; > > Signed-off-by: Arnd Bergmann > --- > arch/riscv/mm/dma-noncoherent.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c > index 640f4c496d26..69c80b2155a1 100644 > --- a/arch/riscv/mm/dma-noncoherent.c > +++ b/arch/riscv/mm/dma-noncoherent.c > @@ -25,7 +25,7 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t > size, > ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); > break; > case DMA_BIDIRECTIONAL: > - ALT_CMO_OP(flush, vaddr, size, riscv_cbom_block_size); > + ALT_CMO_OP(clean, vaddr, size, riscv_cbom_block_size); > break; > default: > break; > -- > 2.39.2 > -- Best Regards Guo Ren
Re: [PATCH 10/21] csky: dma-mapping: skip invalidating before DMA from device
On Mon, Mar 27, 2023 at 8:15 PM Arnd Bergmann wrote:
>
> From: Arnd Bergmann
>
> csky is the only architecture that does a full flush for the
> dma_sync_*_for_device(..., DMA_FROM_DEVICE) operation. The requirement
> is only make sure there are no dirty cache lines for the buffer,
> which can be either done through an invalidate operation (as on most
> architectures including arm32, mips and arc), or a writeback (as on
> arm64 and riscv). The cache also has to be invalidated eventually but
> csky already does that after the transfer.
>
> Use a 'clean' operation here for consistency with arm64 and riscv.
>
> Signed-off-by: Arnd Bergmann
> ---
> arch/csky/mm/dma-mapping.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/csky/mm/dma-mapping.c b/arch/csky/mm/dma-mapping.c
> index 82447029feb4..c90f912e2822 100644
> --- a/arch/csky/mm/dma-mapping.c
> +++ b/arch/csky/mm/dma-mapping.c
> @@ -60,11 +60,9 @@ void arch_sync_dma_for_device(phys_addr_t paddr, size_t
> size,
> {
> switch (dir) {
> case DMA_TO_DEVICE:
> - cache_op(paddr, size, dma_wb_range);
> - break;
> case DMA_FROM_DEVICE:
> case DMA_BIDIRECTIONAL:
> - cache_op(paddr, size, dma_wbinv_range);
> + cache_op(paddr, size, dma_wb_range);
Reviewed-by: Guo Ren
> break;
> default:
> BUG();
> --
> 2.39.2
>
--
Best Regards
Guo Ren
Re: [PATCH 05/22] csky/cpu: Make sure arch_cpu_idle_dead() doesn't return
On Sat, Feb 4, 2023 at 10:29 AM Josh Poimboeuf wrote: > > On Sat, Feb 04, 2023 at 09:12:31AM +0800, Guo Ren wrote: > > On Sat, Feb 4, 2023 at 6:05 AM Josh Poimboeuf wrote: > > > > > > arch_cpu_idle_dead() doesn't return. Make that more explicit with a > > > BUG(). > > > > > > BUG() is preferable to unreachable() because BUG() is a more explicit > > > failure mode and avoids undefined behavior like falling off the edge of > > > the function into whatever code happens to be next. > > > > > > Signed-off-by: Josh Poimboeuf > > > --- > > > arch/csky/kernel/smp.c | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c > > > index b45d1073307f..0ec20efaf5fd 100644 > > > --- a/arch/csky/kernel/smp.c > > > +++ b/arch/csky/kernel/smp.c > > > @@ -317,5 +317,7 @@ void arch_cpu_idle_dead(void) > > > "jmpi csky_start_secondary" > > > : > > > : "r" (secondary_stack)); > > > + > > > + BUG(); > > Why not: > > diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c > > index f26ab2675f7d..1d3bf903add2 100644 > > --- a/kernel/sched/idle.c > > +++ b/kernel/sched/idle.c > > @@ -285,6 +285,7 @@ static void do_idle(void) > > tick_nohz_idle_stop_tick(); > > cpuhp_report_idle_dead(); > > arch_cpu_idle_dead(); > > + BUG(); > > Without the BUG() in csky arch_cpu_idle_dead(), the compiler will warn > about arch_cpu_idle_dead() returning, because it's marked __noreturn but > doesn't clearly return (as far as the compiler knows). > > And we want it marked __noreturn so we'll be more likely to catch such > bugs at build time. > > And as a bonus we get better code generation and clearer code semantics > which helps both humans and tooling understand the intent of the code. Thx for the clarification. Acked-by: Guo Ren > > -- > Josh -- Best Regards Guo Ren
Re: [PATCH 05/22] csky/cpu: Make sure arch_cpu_idle_dead() doesn't return
On Sat, Feb 4, 2023 at 6:05 AM Josh Poimboeuf wrote:
>
> arch_cpu_idle_dead() doesn't return. Make that more explicit with a
> BUG().
>
> BUG() is preferable to unreachable() because BUG() is a more explicit
> failure mode and avoids undefined behavior like falling off the edge of
> the function into whatever code happens to be next.
>
> Signed-off-by: Josh Poimboeuf
> ---
> arch/csky/kernel/smp.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
> index b45d1073307f..0ec20efaf5fd 100644
> --- a/arch/csky/kernel/smp.c
> +++ b/arch/csky/kernel/smp.c
> @@ -317,5 +317,7 @@ void arch_cpu_idle_dead(void)
> "jmpi csky_start_secondary"
> :
> : "r" (secondary_stack));
> +
> + BUG();
Why not:
diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c
index f26ab2675f7d..1d3bf903add2 100644
--- a/kernel/sched/idle.c
+++ b/kernel/sched/idle.c
@@ -285,6 +285,7 @@ static void do_idle(void)
tick_nohz_idle_stop_tick();
cpuhp_report_idle_dead();
arch_cpu_idle_dead();
+ BUG();
}
arch_cpu_idle_enter();
> }
> #endif
> --
> 2.39.0
>
--
Best Regards
Guo Ren
Re: [PATCH 3/3] mm, arch: add generic implementation of pfn_valid() for FLATMEM
On Thu, Jan 26, 2023 at 3:08 AM Mike Rapoport wrote:
>
> From: "Mike Rapoport (IBM)"
>
> Every architecture that supports FLATMEM memory model defines its own
> version of pfn_valid() that essentially compares a pfn to max_mapnr.
>
> Use mips/powerpc version implemented as static inline as a generic
> implementation of pfn_valid() and drop its per-architecture definitions
>
> Signed-off-by: Mike Rapoport (IBM)
> ---
> arch/alpha/include/asm/page.h | 4
> arch/arc/include/asm/page.h| 1 -
> arch/csky/include/asm/page.h | 1 -
> arch/hexagon/include/asm/page.h| 1 -
> arch/ia64/include/asm/page.h | 4
> arch/loongarch/include/asm/page.h | 13 -
> arch/m68k/include/asm/page_no.h| 2 --
> arch/microblaze/include/asm/page.h | 1 -
> arch/mips/include/asm/page.h | 13 -
> arch/nios2/include/asm/page.h | 9 -
> arch/openrisc/include/asm/page.h | 2 --
> arch/parisc/include/asm/page.h | 4
> arch/powerpc/include/asm/page.h| 9 -
> arch/riscv/include/asm/page.h | 5 -
> arch/sh/include/asm/page.h | 3 ---
> arch/sparc/include/asm/page_32.h | 1 -
> arch/um/include/asm/page.h | 1 -
> arch/x86/include/asm/page_32.h | 4
> arch/x86/include/asm/page_64.h | 4
> arch/xtensa/include/asm/page.h | 2 --
> include/asm-generic/memory_model.h | 12
> include/asm-generic/page.h | 2 --
> 22 files changed, 12 insertions(+), 86 deletions(-)
>
> diff --git a/arch/alpha/include/asm/page.h b/arch/alpha/include/asm/page.h
> index 8f3f5eecba28..227d32b6b75f 100644
> --- a/arch/alpha/include/asm/page.h
> +++ b/arch/alpha/include/asm/page.h
> @@ -87,10 +87,6 @@ typedef struct page *pgtable_t;
> #define virt_to_page(kaddr)pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
> #define virt_addr_valid(kaddr) pfn_valid((__pa(kaddr) >> PAGE_SHIFT))
>
> -#ifdef CONFIG_FLATMEM
> -#define pfn_valid(pfn) ((pfn) < max_mapnr)
> -#endif /* CONFIG_FLATMEM */
> -
> #include
> #include
>
> diff --git a/arch/arc/include/asm/page.h b/arch/arc/include/asm/page.h
> index 9a62e1d87967..e43fe27ec54d 100644
> --- a/arch/arc/include/asm/page.h
> +++ b/arch/arc/include/asm/page.h
> @@ -109,7 +109,6 @@ extern int pfn_valid(unsigned long pfn);
> #else /* CONFIG_HIGHMEM */
>
> #define ARCH_PFN_OFFSETvirt_to_pfn(CONFIG_LINUX_RAM_BASE)
> -#define pfn_valid(pfn) (((pfn) - ARCH_PFN_OFFSET) < max_mapnr)
>
> #endif /* CONFIG_HIGHMEM */
>
> diff --git a/arch/csky/include/asm/page.h b/arch/csky/include/asm/page.h
> index ed7451478b1b..b23e3006a9e0 100644
> --- a/arch/csky/include/asm/page.h
> +++ b/arch/csky/include/asm/page.h
> @@ -39,7 +39,6 @@
>
> #define virt_addr_valid(kaddr) ((void *)(kaddr) >= (void *)PAGE_OFFSET && \
> (void *)(kaddr) < high_memory)
> -#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && ((pfn) -
> ARCH_PFN_OFFSET) < max_mapnr)
For csky part:
Acked-by: Guo Ren
>
> extern void *memset(void *dest, int c, size_t l);
> extern void *memcpy(void *to, const void *from, size_t l);
> diff --git a/arch/hexagon/include/asm/page.h b/arch/hexagon/include/asm/page.h
> index d7d4f9fca327..9c03b9965f07 100644
> --- a/arch/hexagon/include/asm/page.h
> +++ b/arch/hexagon/include/asm/page.h
> @@ -95,7 +95,6 @@ struct page;
> /* Default vm area behavior is non-executable. */
> #define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_NON_EXEC
>
> -#define pfn_valid(pfn) ((pfn) < max_mapnr)
> #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
>
> /* Need to not use a define for linesize; may move this to another file. */
> diff --git a/arch/ia64/include/asm/page.h b/arch/ia64/include/asm/page.h
> index 1b990466d540..783eceab5df3 100644
> --- a/arch/ia64/include/asm/page.h
> +++ b/arch/ia64/include/asm/page.h
> @@ -97,10 +97,6 @@ do { \
>
> #include
>
> -#ifdef CONFIG_FLATMEM
> -# define pfn_valid(pfn)((pfn) < max_mapnr)
> -#endif
> -
> #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
> #define virt_to_page(kaddr)pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
> #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
> diff --git a/arch/loongarch/include/asm/page.h
> b/arch/loongarch/include/asm/page.h
> index 53f284a96182..fb5338b352e6 100644
> --- a/arch/loongarch/include/asm/page.h
> +++ b/arch/loongarch/include/asm/page.h
> @@ -82,19 +82,6 @@ typedef struct { unsigned long pgprot; } pgprot_t;
>
>
Re: [PATCH v1 2/2] stackprotector: actually use get_random_canary()
On Mon, Oct 24, 2022 at 4:32 AM Jason A. Donenfeld wrote:
>
> The RNG always mixes in the Linux version extremely early in boot. It
> also always includes a cycle counter, not only during early boot, but
> each and every time it is invoked prior to being fully initialized.
> Together, this means that the use of additional xors inside of the
> various stackprotector.h files is superfluous and over-complicated.
> Instead, we can get exactly the same thing, but better, by just calling
> `get_random_canary()`.
>
> Signed-off-by: Jason A. Donenfeld
> ---
> arch/arm/include/asm/stackprotector.h | 9 +
> arch/arm64/include/asm/stackprotector.h | 9 +
> arch/csky/include/asm/stackprotector.h| 10 +-
> arch/mips/include/asm/stackprotector.h| 9 +
> arch/powerpc/include/asm/stackprotector.h | 10 +-
> arch/riscv/include/asm/stackprotector.h | 10 +-
> arch/sh/include/asm/stackprotector.h | 10 +-
> arch/x86/include/asm/stackprotector.h | 14 +-
> arch/xtensa/include/asm/stackprotector.h | 7 +--
> 9 files changed, 9 insertions(+), 79 deletions(-)
>
> diff --git a/arch/arm/include/asm/stackprotector.h
> b/arch/arm/include/asm/stackprotector.h
> index 088d03161be5..0bd4979759f1 100644
> --- a/arch/arm/include/asm/stackprotector.h
> +++ b/arch/arm/include/asm/stackprotector.h
> @@ -15,9 +15,6 @@
> #ifndef _ASM_STACKPROTECTOR_H
> #define _ASM_STACKPROTECTOR_H 1
>
> -#include
> -#include
> -
> #include
>
> extern unsigned long __stack_chk_guard;
> @@ -30,11 +27,7 @@ extern unsigned long __stack_chk_guard;
> */
> static __always_inline void boot_init_stack_canary(void)
> {
> - unsigned long canary;
> -
> - /* Try to get a semi random initial value. */
> - get_random_bytes(, sizeof(canary));
> - canary ^= LINUX_VERSION_CODE;
> + unsigned long canary = get_random_canary();
>
> current->stack_canary = canary;
> #ifndef CONFIG_STACKPROTECTOR_PER_TASK
> diff --git a/arch/arm64/include/asm/stackprotector.h
> b/arch/arm64/include/asm/stackprotector.h
> index 33f1bb453150..ae3ad80f51fe 100644
> --- a/arch/arm64/include/asm/stackprotector.h
> +++ b/arch/arm64/include/asm/stackprotector.h
> @@ -13,8 +13,6 @@
> #ifndef __ASM_STACKPROTECTOR_H
> #define __ASM_STACKPROTECTOR_H
>
> -#include
> -#include
> #include
>
> extern unsigned long __stack_chk_guard;
> @@ -28,12 +26,7 @@ extern unsigned long __stack_chk_guard;
> static __always_inline void boot_init_stack_canary(void)
> {
> #if defined(CONFIG_STACKPROTECTOR)
> - unsigned long canary;
> -
> - /* Try to get a semi random initial value. */
> - get_random_bytes(, sizeof(canary));
> - canary ^= LINUX_VERSION_CODE;
> - canary &= CANARY_MASK;
> + unsigned long canary = get_random_canary();
>
> current->stack_canary = canary;
> if (!IS_ENABLED(CONFIG_STACKPROTECTOR_PER_TASK))
> diff --git a/arch/csky/include/asm/stackprotector.h
> b/arch/csky/include/asm/stackprotector.h
> index d7cd4e51edd9..d23747447166 100644
> --- a/arch/csky/include/asm/stackprotector.h
> +++ b/arch/csky/include/asm/stackprotector.h
> @@ -2,9 +2,6 @@
> #ifndef _ASM_STACKPROTECTOR_H
> #define _ASM_STACKPROTECTOR_H 1
>
> -#include
> -#include
> -
> extern unsigned long __stack_chk_guard;
>
> /*
> @@ -15,12 +12,7 @@ extern unsigned long __stack_chk_guard;
> */
> static __always_inline void boot_init_stack_canary(void)
> {
> - unsigned long canary;
> -
> - /* Try to get a semi random initial value. */
> - get_random_bytes(, sizeof(canary));
> - canary ^= LINUX_VERSION_CODE;
> - canary &= CANARY_MASK;
> + unsigned long canary = get_random_canary();
Acked-by: Guo Ren #csky part
>
> current->stack_canary = canary;
> __stack_chk_guard = current->stack_canary;
> diff --git a/arch/mips/include/asm/stackprotector.h
> b/arch/mips/include/asm/stackprotector.h
> index 68d4be9e1254..518c192ad982 100644
> --- a/arch/mips/include/asm/stackprotector.h
> +++ b/arch/mips/include/asm/stackprotector.h
> @@ -15,9 +15,6 @@
> #ifndef _ASM_STACKPROTECTOR_H
> #define _ASM_STACKPROTECTOR_H 1
>
> -#include
> -#include
> -
> extern unsigned long __stack_chk_guard;
>
> /*
> @@ -28,11 +25,7 @@ extern unsigned long __stack_chk_guard;
> */
> static __always_inline void boot_init_stack_canary(void)
> {
> - unsigned long canary;
> -
> - /* Try to get a semi random initial value. */
> - get_random_bytes(, sizeof(canary));
> -
Re: [PATCH] mm: remove kern_addr_valid() completely
ndex 71a1af42f0e8..4873c1d6e7d0 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -1021,8 +1021,6 @@ static inline pmd_t pmdp_establish(struct
> vm_area_struct *vma,
> */
> #define MAX_SWAPFILES_CHECK() BUILD_BUG_ON(MAX_SWAPFILES_SHIFT >
> __SWP_TYPE_BITS)
>
> -extern int kern_addr_valid(unsigned long addr);
> -
> #ifdef CONFIG_ARM64_MTE
>
> #define __HAVE_ARCH_PREPARE_TO_SWAP
> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> index 9a7c38965154..556154d821bf 100644
> --- a/arch/arm64/mm/mmu.c
> +++ b/arch/arm64/mm/mmu.c
> @@ -814,53 +814,6 @@ void __init paging_init(void)
> create_idmap();
> }
>
> -/*
> - * Check whether a kernel address is valid (derived from arch/x86/).
> - */
> -int kern_addr_valid(unsigned long addr)
> -{
> - pgd_t *pgdp;
> - p4d_t *p4dp;
> - pud_t *pudp, pud;
> - pmd_t *pmdp, pmd;
> - pte_t *ptep, pte;
> -
> - addr = arch_kasan_reset_tag(addr);
> - if long)addr) >> VA_BITS) != -1UL)
> - return 0;
> -
> - pgdp = pgd_offset_k(addr);
> - if (pgd_none(READ_ONCE(*pgdp)))
> - return 0;
> -
> - p4dp = p4d_offset(pgdp, addr);
> - if (p4d_none(READ_ONCE(*p4dp)))
> - return 0;
> -
> - pudp = pud_offset(p4dp, addr);
> - pud = READ_ONCE(*pudp);
> - if (pud_none(pud))
> - return 0;
> -
> - if (pud_sect(pud))
> - return pfn_valid(pud_pfn(pud));
> -
> - pmdp = pmd_offset(pudp, addr);
> - pmd = READ_ONCE(*pmdp);
> - if (pmd_none(pmd))
> - return 0;
> -
> - if (pmd_sect(pmd))
> - return pfn_valid(pmd_pfn(pmd));
> -
> - ptep = pte_offset_kernel(pmdp, addr);
> - pte = READ_ONCE(*ptep);
> - if (pte_none(pte))
> - return 0;
> -
> - return pfn_valid(pte_pfn(pte));
> -}
> -
> #ifdef CONFIG_MEMORY_HOTPLUG
> static void free_hotplug_page_range(struct page *page, size_t size,
> struct vmem_altmap *altmap)
> diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
> index d107c3d434e2..0a741a910a6a 100644
> --- a/arch/arm64/mm/pageattr.c
> +++ b/arch/arm64/mm/pageattr.c
> @@ -201,8 +201,7 @@ void __kernel_map_pages(struct page *page, int numpages,
> int enable)
>
> /*
> * This function is used to determine if a linear map page has been marked as
> - * not-valid. Walk the page table and check the PTE_VALID bit. This is based
> - * on kern_addr_valid(), which almost does what we need.
> + * not-valid. Walk the page table and check the PTE_VALID bit.
> *
> * Because this is only called on the kernel linear map, p?d_sect() implies
> * p?d_present(). When debug_pagealloc is enabled, sections mappings are
> diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h
> index c3d9b92cbe61..77bc6caff2d2 100644
> --- a/arch/csky/include/asm/pgtable.h
> +++ b/arch/csky/include/asm/pgtable.h
> @@ -249,9 +249,6 @@ extern void paging_init(void);
> void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
> pte_t *pte);
>
> -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
> -#define kern_addr_valid(addr) (1)
> -
Clean is good for me.
Acked-by: Guo Ren # csky part
> #define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
> remap_pfn_range(vma, vaddr, pfn, size, prot)
>
> diff --git a/arch/hexagon/include/asm/page.h b/arch/hexagon/include/asm/page.h
> index 7cbf719c578e..d7d4f9fca327 100644
> --- a/arch/hexagon/include/asm/page.h
> +++ b/arch/hexagon/include/asm/page.h
> @@ -131,13 +131,6 @@ static inline void clear_page(void *page)
>
> #define page_to_virt(page) __va(page_to_phys(page))
>
> -/*
> - * For port to Hexagon Virtual Machine, MAYBE we check for attempts
> - * to reference reserved HVM space, but in any case, the VM will be
> - * protected.
> - */
> -#define kern_addr_valid(addr) (1)
> -
> #include
> #include
> /* XXX Todo: implement assembly-optimized version of getorder. */
> diff --git a/arch/ia64/include/asm/pgtable.h b/arch/ia64/include/asm/pgtable.h
> index 6925e28ae61d..01517a5e6778 100644
> --- a/arch/ia64/include/asm/pgtable.h
> +++ b/arch/ia64/include/asm/pgtable.h
> @@ -181,22 +181,6 @@ ia64_phys_addr_valid (unsigned long addr)
> return (addr & (local_cpu_data->unimpl_pa_mask)) == 0;
> }
>
> -/*
> - * kern_addr_valid(ADDR) tests if ADDR is pointing to valid kernel
> - * memory. For the return value to be meaningful, ADD
Re: [RFC PATCH 5/5] treewide: Rename and trace arch-definitions of smp_send_reschedule()
On Fri, Oct 7, 2022 at 11:46 PM Valentin Schneider wrote:
>
> To be able to trace invocations of smp_send_reschedule(), rename the
> arch-specific definitions of it to arch_smp_send_reschedule() and wrap it
> into an smp_send_reschedule() that contains a tracepoint.
>
> Signed-off-by: Valentin Schneider
> ---
> arch/alpha/kernel/smp.c | 2 +-
> arch/arc/kernel/smp.c| 2 +-
> arch/arm/kernel/smp.c| 2 +-
> arch/arm64/kernel/smp.c | 2 +-
> arch/csky/kernel/smp.c | 2 +-
> arch/hexagon/kernel/smp.c| 2 +-
> arch/ia64/kernel/smp.c | 4 ++--
> arch/loongarch/include/asm/smp.h | 2 +-
> arch/mips/include/asm/smp.h | 2 +-
> arch/openrisc/kernel/smp.c | 2 +-
> arch/parisc/kernel/smp.c | 4 ++--
> arch/powerpc/kernel/smp.c| 4 ++--
> arch/riscv/kernel/smp.c | 4 ++--
> arch/s390/kernel/smp.c | 2 +-
> arch/sh/kernel/smp.c | 2 +-
> arch/sparc/kernel/smp_32.c | 2 +-
> arch/sparc/kernel/smp_64.c | 2 +-
> arch/x86/include/asm/smp.h | 2 +-
> arch/xtensa/kernel/smp.c | 2 +-
> include/linux/smp.h | 1 +
> kernel/smp.c | 6 ++
> 21 files changed, 30 insertions(+), 23 deletions(-)
>
> diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c
> index f4e20f75438f..38637eb9eebd 100644
> --- a/arch/alpha/kernel/smp.c
> +++ b/arch/alpha/kernel/smp.c
> @@ -562,7 +562,7 @@ handle_ipi(struct pt_regs *regs)
> }
>
> void
> -smp_send_reschedule(int cpu)
> +arch_smp_send_reschedule(int cpu)
> {
> #ifdef DEBUG_IPI_MSG
> if (cpu == hard_smp_processor_id())
> diff --git a/arch/arc/kernel/smp.c b/arch/arc/kernel/smp.c
> index ab9e75e90f72..ae2e6a312361 100644
> --- a/arch/arc/kernel/smp.c
> +++ b/arch/arc/kernel/smp.c
> @@ -292,7 +292,7 @@ static void ipi_send_msg(const struct cpumask *callmap,
> enum ipi_msg_type msg)
> ipi_send_msg_one(cpu, msg);
> }
>
> -void smp_send_reschedule(int cpu)
> +void arch_smp_send_reschedule(int cpu)
> {
> ipi_send_msg_one(cpu, IPI_RESCHEDULE);
> }
> diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c
> index 3b280d55c1c4..f216ac890b6f 100644
> --- a/arch/arm/kernel/smp.c
> +++ b/arch/arm/kernel/smp.c
> @@ -745,7 +745,7 @@ void __init set_smp_ipi_range(int ipi_base, int n)
> ipi_setup(smp_processor_id());
> }
>
> -void smp_send_reschedule(int cpu)
> +void arch_smp_send_reschedule(int cpu)
> {
> smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
> }
> diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
> index 937d2623e06b..8d108edc4a89 100644
> --- a/arch/arm64/kernel/smp.c
> +++ b/arch/arm64/kernel/smp.c
> @@ -976,7 +976,7 @@ void __init set_smp_ipi_range(int ipi_base, int n)
> ipi_setup(smp_processor_id());
> }
>
> -void smp_send_reschedule(int cpu)
> +void arch_smp_send_reschedule(int cpu)
> {
> smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
> }
> diff --git a/arch/csky/kernel/smp.c b/arch/csky/kernel/smp.c
> index 4b605aa2e1d6..fd7f81be16dd 100644
> --- a/arch/csky/kernel/smp.c
> +++ b/arch/csky/kernel/smp.c
> @@ -140,7 +140,7 @@ void smp_send_stop(void)
> on_each_cpu(ipi_stop, NULL, 1);
> }
>
> -void smp_send_reschedule(int cpu)
> +void arch_smp_send_reschedule(int cpu)
For csky part, Acked-by: Guo Ren
> {
> send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
> }
> diff --git a/arch/hexagon/kernel/smp.c b/arch/hexagon/kernel/smp.c
> index 4ba93e59370c..4e8bee25b8c6 100644
> --- a/arch/hexagon/kernel/smp.c
> +++ b/arch/hexagon/kernel/smp.c
> @@ -217,7 +217,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
> }
> }
>
> -void smp_send_reschedule(int cpu)
> +void arch_smp_send_reschedule(int cpu)
> {
> send_ipi(cpumask_of(cpu), IPI_RESCHEDULE);
> }
> diff --git a/arch/ia64/kernel/smp.c b/arch/ia64/kernel/smp.c
> index e2cc59db86bc..ea4f009a232b 100644
> --- a/arch/ia64/kernel/smp.c
> +++ b/arch/ia64/kernel/smp.c
> @@ -220,11 +220,11 @@ kdump_smp_send_init(void)
> * Called with preemption disabled.
> */
> void
> -smp_send_reschedule (int cpu)
> +arch_smp_send_reschedule (int cpu)
> {
> ia64_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0);
> }
> -EXPORT_SYMBOL_GPL(smp_send_reschedule);
> +EXPORT_SYMBOL_GPL(arch_smp_send_reschedule);
>
> /*
> * Called with preemption disabled.
> diff --git a/arch/loongarch/include/asm/smp.h
> b/arch/loongarch/include/asm/smp.h
> index 71189b28bfb2..3fcca134dfb1 100644
> --- a/arch/loongarch/include/asm/smp.h
>
Re: [PATCH v2 07/44] cpuidle,psci: Push RCU-idle into driver
Reviewed-by: Guo Ren On Mon, Sep 19, 2022 at 6:17 PM Peter Zijlstra wrote: > > Doing RCU-idle outside the driver, only to then temporarily enable it > again, at least twice, before going idle is daft. > > Signed-off-by: Peter Zijlstra (Intel) > --- > drivers/cpuidle/cpuidle-psci.c |9 + > 1 file changed, 5 insertions(+), 4 deletions(-) > > --- a/drivers/cpuidle/cpuidle-psci.c > +++ b/drivers/cpuidle/cpuidle-psci.c > @@ -69,12 +69,12 @@ static int __psci_enter_domain_idle_stat > return -1; > > /* Do runtime PM to manage a hierarchical CPU toplogy. */ > - ct_irq_enter_irqson(); > if (s2idle) > dev_pm_genpd_suspend(pd_dev); > else > pm_runtime_put_sync_suspend(pd_dev); > - ct_irq_exit_irqson(); > + > + ct_idle_enter(); > > state = psci_get_domain_state(); > if (!state) > @@ -82,12 +82,12 @@ static int __psci_enter_domain_idle_stat > > ret = psci_cpu_suspend_enter(state) ? -1 : idx; > > - ct_irq_enter_irqson(); > + ct_idle_exit(); > + > if (s2idle) > dev_pm_genpd_resume(pd_dev); > else > pm_runtime_get_sync(pd_dev); > - ct_irq_exit_irqson(); > > cpu_pm_exit(); > > @@ -240,6 +240,7 @@ static int psci_dt_cpu_init_topology(str > * of a shared state for the domain, assumes the domain states are all > * deeper states. > */ > + drv->states[state_count - 1].flags |= CPUIDLE_FLAG_RCU_IDLE; > drv->states[state_count - 1].enter = psci_enter_domain_idle_state; > drv->states[state_count - 1].enter_s2idle = > psci_enter_s2idle_domain_idle_state; > psci_cpuidle_use_cpuhp = true; > > -- Best Regards Guo Ren
Re: [PATCH v2 21/44] arch/idle: Change arch_cpu_idle() IRQ behaviour
On Mon, Sep 19, 2022 at 6:18 PM Peter Zijlstra wrote:
>
> Current arch_cpu_idle() is called with IRQs disabled, but will return
> with IRQs enabled.
>
> However, the very first thing the generic code does after calling
> arch_cpu_idle() is raw_local_irq_disable(). This means that
> architectures that can idle with IRQs disabled end up doing a
> pointless 'enable-disable' dance.
>
> Therefore, push this IRQ disabling into the idle function, meaning
> that those architectures can avoid the pointless IRQ state flipping.
>
> Signed-off-by: Peter Zijlstra (Intel)
> Reviewed-by: Gautham R. Shenoy
> Acked-by: Mark Rutland [arm64]
> Acked-by: Rafael J. Wysocki
> ---
> arch/alpha/kernel/process.c |1 -
> arch/arc/kernel/process.c|3 +++
> arch/arm/kernel/process.c|1 -
> arch/arm/mach-gemini/board-dt.c |3 ++-
> arch/arm64/kernel/idle.c |1 -
> arch/csky/kernel/process.c |1 -
> arch/csky/kernel/smp.c |2 +-
> arch/hexagon/kernel/process.c|1 -
> arch/ia64/kernel/process.c |1 +
> arch/loongarch/kernel/idle.c |1 +
> arch/microblaze/kernel/process.c |1 -
> arch/mips/kernel/idle.c |8 +++-
> arch/nios2/kernel/process.c |1 -
> arch/openrisc/kernel/process.c |1 +
> arch/parisc/kernel/process.c |2 --
> arch/powerpc/kernel/idle.c |5 ++---
> arch/riscv/kernel/process.c |1 -
> arch/s390/kernel/idle.c |1 -
> arch/sh/kernel/idle.c|1 +
> arch/sparc/kernel/leon_pmc.c |4
> arch/sparc/kernel/process_32.c |1 -
> arch/sparc/kernel/process_64.c |3 ++-
> arch/um/kernel/process.c |1 -
> arch/x86/coco/tdx/tdx.c |3 +++
> arch/x86/kernel/process.c| 15 ---
> arch/xtensa/kernel/process.c |1 +
> kernel/sched/idle.c |2 --
> 27 files changed, 29 insertions(+), 37 deletions(-)
>
> --- a/arch/alpha/kernel/process.c
> +++ b/arch/alpha/kernel/process.c
> @@ -57,7 +57,6 @@ EXPORT_SYMBOL(pm_power_off);
> void arch_cpu_idle(void)
> {
> wtint(0);
> - raw_local_irq_enable();
> }
>
> void arch_cpu_idle_dead(void)
> --- a/arch/arc/kernel/process.c
> +++ b/arch/arc/kernel/process.c
> @@ -114,6 +114,8 @@ void arch_cpu_idle(void)
> "sleep %0 \n"
> :
> :"I"(arg)); /* can't be "r" has to be embedded const */
> +
> + raw_local_irq_disable();
> }
>
> #else /* ARC700 */
> @@ -122,6 +124,7 @@ void arch_cpu_idle(void)
> {
> /* sleep, but enable both set E1/E2 (levels of interrupts) before
> committing */
> __asm__ __volatile__("sleep 0x3 \n");
> + raw_local_irq_disable();
> }
>
> #endif
> --- a/arch/arm/kernel/process.c
> +++ b/arch/arm/kernel/process.c
> @@ -78,7 +78,6 @@ void arch_cpu_idle(void)
> arm_pm_idle();
> else
> cpu_do_idle();
> - raw_local_irq_enable();
> }
>
> void arch_cpu_idle_prepare(void)
> --- a/arch/arm/mach-gemini/board-dt.c
> +++ b/arch/arm/mach-gemini/board-dt.c
> @@ -42,8 +42,9 @@ static void gemini_idle(void)
> */
>
> /* FIXME: Enabling interrupts here is racy! */
> - local_irq_enable();
> + raw_local_irq_enable();
> cpu_do_idle();
> + raw_local_irq_disable();
> }
>
> static void __init gemini_init_machine(void)
> --- a/arch/arm64/kernel/idle.c
> +++ b/arch/arm64/kernel/idle.c
> @@ -42,5 +42,4 @@ void noinstr arch_cpu_idle(void)
> * tricks
> */
> cpu_do_idle();
> - raw_local_irq_enable();
> }
> --- a/arch/csky/kernel/process.c
> +++ b/arch/csky/kernel/process.c
> @@ -100,6 +100,5 @@ void arch_cpu_idle(void)
> #ifdef CONFIG_CPU_PM_STOP
> asm volatile("stop\n");
> #endif
> - raw_local_irq_enable();
Acked-by: Guo Ren
> }
> #endif
> --- a/arch/csky/kernel/smp.c
> +++ b/arch/csky/kernel/smp.c
> @@ -309,7 +309,7 @@ void arch_cpu_idle_dead(void)
> while (!secondary_stack)
> arch_cpu_idle();
>
> - local_irq_disable();
> + raw_local_irq_disable();
Acked-by ..., because:
local_irq_disable();
if (cpu_is_offline(cpu)) {
tick_nohz_idle_stop_tick();
cpuhp_report_idle_dead();
arch_cpu_idle_dead();
}
>
> asm volatile(
> "movsp, %0\n"
> --- a/arch/hexagon/kernel/pro
Re: [PATCH] kernel: exit: cleanup release_thread()
For csky part
Acked-by: Guo Ren
On Fri, Aug 19, 2022 at 9:39 AM Kefeng Wang wrote:
>
> Only x86 has own release_thread(), introduce a new weak
> release_thread() function to clean empty definitions in
> other ARCHs.
>
> Signed-off-by: Kefeng Wang
> ---
> arch/alpha/include/asm/processor.h | 2 --
> arch/alpha/kernel/process.c | 5 -
> arch/arc/include/asm/processor.h| 3 ---
> arch/arm/include/asm/processor.h| 3 ---
> arch/arm/kernel/process.c | 4
> arch/arm64/include/asm/processor.h | 3 ---
> arch/arm64/kernel/process.c | 4
> arch/csky/include/asm/processor.h | 5 -
> arch/hexagon/include/asm/processor.h| 4
> arch/hexagon/kernel/process.c | 7 ---
> arch/ia64/include/asm/processor.h | 7 ---
> arch/loongarch/include/asm/processor.h | 3 ---
> arch/m68k/include/asm/processor.h | 5 -
> arch/microblaze/include/asm/processor.h | 5 -
> arch/mips/include/asm/processor.h | 3 ---
> arch/nios2/include/asm/processor.h | 5 -
> arch/openrisc/include/asm/processor.h | 1 -
> arch/openrisc/kernel/process.c | 4
> arch/parisc/include/asm/processor.h | 3 ---
> arch/parisc/kernel/process.c| 4
> arch/powerpc/include/asm/processor.h| 1 -
> arch/powerpc/kernel/process.c | 5 -
> arch/riscv/include/asm/processor.h | 5 -
> arch/s390/include/asm/processor.h | 3 ---
> arch/sh/include/asm/processor_32.h | 3 ---
> arch/sh/kernel/process_32.c | 5 -
> arch/sparc/include/asm/processor_32.h | 3 ---
> arch/sparc/include/asm/processor_64.h | 3 ---
> arch/um/include/asm/processor-generic.h | 4
> arch/x86/include/asm/processor.h| 3 ---
> arch/xtensa/include/asm/processor.h | 3 ---
> include/linux/sched/task.h | 3 +++
> kernel/exit.c | 4
> 33 files changed, 7 insertions(+), 118 deletions(-)
>
> diff --git a/arch/alpha/include/asm/processor.h
> b/arch/alpha/include/asm/processor.h
> index 43e234c518b1..714abe494e5f 100644
> --- a/arch/alpha/include/asm/processor.h
> +++ b/arch/alpha/include/asm/processor.h
> @@ -36,8 +36,6 @@ extern void start_thread(struct pt_regs *, unsigned long,
> unsigned long);
>
> /* Free all resources held by a thread. */
> struct task_struct;
> -extern void release_thread(struct task_struct *);
> -
> unsigned long __get_wchan(struct task_struct *p);
>
> #define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
> diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c
> index e2e25f8b5e76..dbf1bc5e2ad2 100644
> --- a/arch/alpha/kernel/process.c
> +++ b/arch/alpha/kernel/process.c
> @@ -225,11 +225,6 @@ flush_thread(void)
> current_thread_info()->pcb.unique = 0;
> }
>
> -void
> -release_thread(struct task_struct *dead_task)
> -{
> -}
> -
> /*
> * Copy architecture-specific thread state
> */
> diff --git a/arch/arc/include/asm/processor.h
> b/arch/arc/include/asm/processor.h
> index 54db9d7bb562..fb844fce1ab6 100644
> --- a/arch/arc/include/asm/processor.h
> +++ b/arch/arc/include/asm/processor.h
> @@ -43,9 +43,6 @@ struct task_struct;
> #define task_pt_regs(p) \
> ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
>
> -/* Free all resources held by a thread */
> -#define release_thread(thread) do { } while (0)
> -
> /*
> * A lot of busy-wait loops in SMP are based off of non-volatile data
> otherwise
> * get optimised away by gcc
> diff --git a/arch/arm/include/asm/processor.h
> b/arch/arm/include/asm/processor.h
> index bdc35c0e8dfb..326864f79d18 100644
> --- a/arch/arm/include/asm/processor.h
> +++ b/arch/arm/include/asm/processor.h
> @@ -81,9 +81,6 @@ static inline void arch_thread_struct_whitelist(unsigned
> long *offset,
> /* Forward declaration, a strange C thing */
> struct task_struct;
>
> -/* Free all resources held by a thread. */
> -extern void release_thread(struct task_struct *);
> -
> unsigned long __get_wchan(struct task_struct *p);
>
> #define task_pt_regs(p) \
> diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c
> index 3d9cace63884..712d3e6d9be9 100644
> --- a/arch/arm/kernel/process.c
> +++ b/arch/arm/kernel/process.c
> @@ -232,10 +232,6 @@ void flush_thread(void)
> thread_notify(THREAD_NOTIFY_FLUSH, thread);
> }
>
> -void release_thread(struct task_struct *dead_task)
> -{
> -}
> -
> asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
>
> int copy_thread(struct task_struct *p, const struct kernel_clon
Re: [PATCH] arch: mm: rename FORCE_MAX_ZONEORDER to ARCH_FORCE_MAX_ORDER
For csky part Acked-by: Guo Ren On Mon, Aug 15, 2022 at 10:40 PM Zi Yan wrote: > > From: Zi Yan > > This Kconfig option is used by individual arch to set its desired > MAX_ORDER. Rename it to reflect its actual use. > > Acked-by: Mike Rapoport > Signed-off-by: Zi Yan > Cc: Vineet Gupta > Cc: Shawn Guo > Cc: Taichi Sugaya > Cc: Neil Armstrong > Cc: Qin Jian > Cc: Catalin Marinas > Cc: Guo Ren > Cc: Huacai Chen > Cc: Geert Uytterhoeven > Cc: Thomas Bogendoerfer > Cc: Dinh Nguyen > Cc: Christophe Leroy > Cc: Yoshinori Sato > Cc: "David S. Miller" > Cc: Chris Zankel > Cc: Arnd Bergmann > Cc: Ley Foon Tan > Cc: Andrew Morton > Cc: NXP Linux Team > Cc: linux-snps-...@lists.infradead.org > Cc: linux-arm-ker...@lists.infradead.org > Cc: linux-ox...@groups.io > Cc: linux-c...@vger.kernel.org > Cc: linux-i...@vger.kernel.org > Cc: loonga...@lists.linux.dev > Cc: linux-m...@lists.linux-m68k.org > Cc: linux-m...@vger.kernel.org > Cc: linuxppc-dev@lists.ozlabs.org > Cc: linux...@vger.kernel.org > Cc: sparcli...@vger.kernel.org > Cc: linux-xte...@linux-xtensa.org > Cc: linux...@kvack.org > Cc: linux-ker...@vger.kernel.org > --- > arch/arc/Kconfig | 2 +- > arch/arm/Kconfig | 2 +- > arch/arm/configs/imx_v6_v7_defconfig | 2 +- > arch/arm/configs/milbeaut_m10v_defconfig | 2 +- > arch/arm/configs/oxnas_v6_defconfig | 2 +- > arch/arm/configs/pxa_defconfig | 2 +- > arch/arm/configs/sama7_defconfig | 2 +- > arch/arm/configs/sp7021_defconfig| 2 +- > arch/arm64/Kconfig | 2 +- > arch/csky/Kconfig| 2 +- > arch/ia64/Kconfig| 2 +- > arch/ia64/include/asm/sparsemem.h| 6 +++--- > arch/loongarch/Kconfig | 2 +- > arch/m68k/Kconfig.cpu| 2 +- > arch/mips/Kconfig| 2 +- > arch/nios2/Kconfig | 2 +- > arch/powerpc/Kconfig | 2 +- > arch/powerpc/configs/85xx/ge_imp3a_defconfig | 2 +- > arch/powerpc/configs/fsl-emb-nonhw.config| 2 +- > arch/sh/configs/ecovec24_defconfig | 2 +- > arch/sh/mm/Kconfig | 2 +- > arch/sparc/Kconfig | 2 +- > arch/xtensa/Kconfig | 2 +- > include/linux/mmzone.h | 4 ++-- > 24 files changed, 27 insertions(+), 27 deletions(-) > > diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig > index 9e3653253ef2..d9a13ccf89a3 100644 > --- a/arch/arc/Kconfig > +++ b/arch/arc/Kconfig > @@ -554,7 +554,7 @@ config ARC_BUILTIN_DTB_NAME > > endmenu # "ARC Architecture Configuration" > > -config FORCE_MAX_ZONEORDER > +config ARCH_FORCE_MAX_ORDER > int "Maximum zone order" > default "12" if ARC_HUGEPAGE_16M > default "11" > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 87badeae3181..e6c8ee56ac52 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -1434,7 +1434,7 @@ config ARM_MODULE_PLTS > Disabling this is usually safe for small single-platform > configurations. If unsure, say y. > > -config FORCE_MAX_ZONEORDER > +config ARCH_FORCE_MAX_ORDER > int "Maximum zone order" > default "12" if SOC_AM33XX > default "9" if SA > diff --git a/arch/arm/configs/imx_v6_v7_defconfig > b/arch/arm/configs/imx_v6_v7_defconfig > index 01012537a9b9..fb283059daa0 100644 > --- a/arch/arm/configs/imx_v6_v7_defconfig > +++ b/arch/arm/configs/imx_v6_v7_defconfig > @@ -31,7 +31,7 @@ CONFIG_SOC_VF610=y > CONFIG_SMP=y > CONFIG_ARM_PSCI=y > CONFIG_HIGHMEM=y > -CONFIG_FORCE_MAX_ZONEORDER=14 > +CONFIG_ARCH_FORCE_MAX_ORDER=14 > CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" > CONFIG_KEXEC=y > CONFIG_CPU_FREQ=y > diff --git a/arch/arm/configs/milbeaut_m10v_defconfig > b/arch/arm/configs/milbeaut_m10v_defconfig > index 58810e98de3d..8620061e19a8 100644 > --- a/arch/arm/configs/milbeaut_m10v_defconfig > +++ b/arch/arm/configs/milbeaut_m10v_defconfig > @@ -26,7 +26,7 @@ CONFIG_THUMB2_KERNEL=y > # CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11 is not set > # CONFIG_ARM_PATCH_IDIV is not set > CONFIG_HIGHMEM=y > -CONFIG_FORCE_MAX_ZONEORDER=12 > +CONFIG_ARCH_FORCE_MAX_ORDER=12 > CONFIG_SECCOMP=y > CONFIG_KEXEC=y > CONFIG_EFI=y > diff --git a/arch/arm/configs/oxnas_v6_defconfig > b/arch/arm/configs/oxnas_v6_defconfig > index 600f
Re: [PATCH V4 17/26] csky/mm: Enable ARCH_HAS_VM_GET_PAGE_PROT
For csky part.
Acked-by: Guo Ren
On Fri, Jun 24, 2022 at 12:48 PM Anshuman Khandual
wrote:
>
> This enables ARCH_HAS_VM_GET_PAGE_PROT on the platform and exports standard
> vm_get_page_prot() implementation via DECLARE_VM_GET_PAGE_PROT, which looks
> up a private and static protection_map[] array. Subsequently all __SXXX and
> __PXXX macros can be dropped which are no longer needed.
>
> Cc: Geert Uytterhoeven
> Cc: linux-c...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org
> Signed-off-by: Anshuman Khandual
> ---
> arch/csky/Kconfig | 1 +
> arch/csky/include/asm/pgtable.h | 18 --
> arch/csky/mm/init.c | 20
> 3 files changed, 21 insertions(+), 18 deletions(-)
>
> diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
> index 21d72b078eef..588b8a9c68ed 100644
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -6,6 +6,7 @@ config CSKY
> select ARCH_HAS_GCOV_PROFILE_ALL
> select ARCH_HAS_SYNC_DMA_FOR_CPU
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> + select ARCH_HAS_VM_GET_PAGE_PROT
> select ARCH_USE_BUILTIN_BSWAP
> select ARCH_USE_QUEUED_RWLOCKS
> select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 &&
> $(cc-option,-mbacktrace)
> diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h
> index bbe24511..229a5f4ad7fc 100644
> --- a/arch/csky/include/asm/pgtable.h
> +++ b/arch/csky/include/asm/pgtable.h
> @@ -77,24 +77,6 @@
> #define MAX_SWAPFILES_CHECK() \
> BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
>
> -#define __P000 PAGE_NONE
> -#define __P001 PAGE_READ
> -#define __P010 PAGE_READ
> -#define __P011 PAGE_READ
> -#define __P100 PAGE_READ
> -#define __P101 PAGE_READ
> -#define __P110 PAGE_READ
> -#define __P111 PAGE_READ
> -
> -#define __S000 PAGE_NONE
> -#define __S001 PAGE_READ
> -#define __S010 PAGE_WRITE
> -#define __S011 PAGE_WRITE
> -#define __S100 PAGE_READ
> -#define __S101 PAGE_READ
> -#define __S110 PAGE_WRITE
> -#define __S111 PAGE_WRITE
> -
> extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
> #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
>
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index bf2004aa811a..1bf7b2a748fd 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -197,3 +197,23 @@ void __init fixaddr_init(void)
> vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
> fixrange_init(vaddr, vaddr + PMD_SIZE, swapper_pg_dir);
> }
> +
> +static pgprot_t protection_map[16] __ro_after_init = {
> + [VM_NONE] = PAGE_NONE,
> + [VM_READ] = PAGE_READ,
> + [VM_WRITE] = PAGE_READ,
> + [VM_WRITE | VM_READ]= PAGE_READ,
> + [VM_EXEC] = PAGE_READ,
> + [VM_EXEC | VM_READ] = PAGE_READ,
> + [VM_EXEC | VM_WRITE]= PAGE_READ,
> + [VM_EXEC | VM_WRITE | VM_READ] = PAGE_READ,
> + [VM_SHARED] = PAGE_NONE,
> + [VM_SHARED | VM_READ] = PAGE_READ,
> + [VM_SHARED | VM_WRITE] = PAGE_WRITE,
> + [VM_SHARED | VM_WRITE | VM_READ]= PAGE_WRITE,
> + [VM_SHARED | VM_EXEC] = PAGE_READ,
> + [VM_SHARED | VM_EXEC | VM_READ] = PAGE_READ,
> + [VM_SHARED | VM_EXEC | VM_WRITE]= PAGE_WRITE,
> + [VM_SHARED | VM_EXEC | VM_WRITE | VM_READ] = PAGE_WRITE
> +};
> +DECLARE_VM_GET_PAGE_PROT
> --
> 2.25.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V12 02/20] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h
On Wed, Jun 8, 2022 at 5:41 PM Eugene Syromiatnikov wrote: > > On Tue, Apr 05, 2022 at 03:12:56PM +0800, guo...@kernel.org wrote: > > From: Christoph Hellwig > > > > Note that before this change they were never visible to userspace due > > to the fact that CONFIG_64BIT is only set for kernel builds. > > > -#ifndef CONFIG_64BIT > > +#if __BITS_PER_LONG == 32 || defined(__KERNEL__) > > Actually, it's quite the opposite: "ifndef" usage made it vailable at all > times > to the userspace, and this change has actually broken building strace > with the latest kernel headers[1][2]. There could be some debate > whether having these F_*64 definitions exposed to the user space 64-bit > applications, but it seems that were no harm (as they were exposed already > for quite some time), and they are useful at least for strace for compat > application tracing purposes. > > [1] > https://github.com/strace/strace/runs/6779763146?check_suite_focus=true#step:4:3222 > [2] > https://pipelines.actions.githubusercontent.com/serviceHosts/e5309ebd-8a2f-43f4-a212-b52080275b5d/_apis/pipelines/1/runs/1473/signedlogcontent/12?urlExpires=2022-06-08T09%3A37%3A13.9248496Z=HMACV1=fIT7vd0O4NNRwzwKWLXY4UVZBIIF3XiVI9skAsGvV0I%3D > Yes, there is no CONFIG_64BIT in userspace, we shouldn't limit it with (__BITS_PER_LONG == 32 || defined(__KERNEL__)) to break the compatibility. Just export F_*64 definitions permanently. -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH] kprobes: Enable tracing for mololithic kernel images
IG_KCMP) += kcmp.o
> obj-$(CONFIG_FREEZER) += freezer.o
> diff --git a/kernel/kprobes.c b/kernel/kprobes.c
> index f214f8c088ed..3f9876374cd3 100644
> --- a/kernel/kprobes.c
> +++ b/kernel/kprobes.c
> @@ -1569,6 +1569,7 @@ static int check_kprobe_address_safe(struct kprobe *p,
> goto out;
> }
>
> +#ifdef CONFIG_MODULES
> /* Check if 'p' is probing a module. */
> *probed_mod = __module_text_address((unsigned long) p->addr);
> if (*probed_mod) {
> @@ -1592,6 +1593,8 @@ static int check_kprobe_address_safe(struct kprobe *p,
> ret = -ENOENT;
> }
> }
> +#endif
> +
> out:
> preempt_enable();
> jump_label_unlock();
> @@ -2475,6 +2478,7 @@ int kprobe_add_area_blacklist(unsigned long start,
> unsigned long end)
> return 0;
> }
>
> +#ifdef CONFIG_MODULES
> /* Remove all symbols in given area from kprobe blacklist */
> static void kprobe_remove_area_blacklist(unsigned long start, unsigned long
> end)
> {
> @@ -2492,6 +2496,7 @@ static void kprobe_remove_ksym_blacklist(unsigned long
> entry)
> {
> kprobe_remove_area_blacklist(entry, entry + 1);
> }
> +#endif /* CONFIG_MODULES */
>
> int __weak arch_kprobe_get_kallsym(unsigned int *symnum, unsigned long
> *value,
>char *type, char *sym)
> @@ -2557,6 +2562,7 @@ static int __init populate_kprobe_blacklist(unsigned
> long *start,
> return ret ? : arch_populate_kprobe_blacklist();
> }
>
> +#ifdef CONFIG_MODULES
> static void add_module_kprobe_blacklist(struct module *mod)
> {
> unsigned long start, end;
> @@ -2658,6 +2664,7 @@ static struct notifier_block kprobe_module_nb = {
> .notifier_call = kprobes_module_callback,
> .priority = 0
> };
> +#endif /* CONFIG_MODULES */
>
> void kprobe_free_init_mem(void)
> {
> @@ -2717,8 +2724,11 @@ static int __init init_kprobes(void)
> err = arch_init_kprobes();
> if (!err)
> err = register_die_notifier(_exceptions_nb);
> +
> +#ifdef CONFIG_MODULES
> if (!err)
> err = register_module_notifier(_module_nb);
> +#endif
>
> kprobes_initialized = (err == 0);
> kprobe_sysctls_init();
> diff --git a/kernel/module/main.c b/kernel/module/main.c
> index fed58d30725d..7fa182b78550 100644
> --- a/kernel/module/main.c
> +++ b/kernel/module/main.c
> @@ -1121,16 +1121,6 @@ resolve_symbol_wait(struct module *mod,
> return ksym;
> }
>
> -void __weak module_memfree(void *module_region)
> -{
> - /*
> -* This memory may be RO, and freeing RO memory in an interrupt is not
> -* supported by vmalloc.
> -*/
> - WARN_ON(in_interrupt());
> - vfree(module_region);
> -}
> -
> void __weak module_arch_cleanup(struct module *mod)
> {
> }
> @@ -1606,13 +1596,6 @@ static void dynamic_debug_remove(struct module *mod,
> struct _ddebug *debug)
> ddebug_remove_module(mod->name);
> }
>
> -void * __weak module_alloc(unsigned long size)
> -{
> - return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,
> - GFP_KERNEL, PAGE_KERNEL_EXEC, VM_FLUSH_RESET_PERMS,
> - NUMA_NO_NODE, __builtin_return_address(0));
> -}
> -
> bool __weak module_init_section(const char *name)
> {
> return strstarts(name, ".init");
> diff --git a/kernel/module_alloc.c b/kernel/module_alloc.c
> new file mode 100644
> index ..26a4c60998ad
> --- /dev/null
> +++ b/kernel/module_alloc.c
> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Copyright (C) 2002 Richard Henderson
> + * Copyright (C) 2001 Rusty Russell, 2002, 2010 Rusty Russell IBM.
> + */
> +
> +#include
> +#include
> +#include
> +
> +void * __weak module_alloc(unsigned long size)
> +{
> + return __vmalloc_node_range(size, 1, VMALLOC_START, VMALLOC_END,
> + GFP_KERNEL, PAGE_KERNEL_EXEC, VM_FLUSH_RESET_PERMS,
> + NUMA_NO_NODE, __builtin_return_address(0));
> +}
> +
> +void __weak module_memfree(void *module_region)
> +{
> + /*
> +* This memory may be RO, and freeing RO memory in an interrupt is not
> +* supported by vmalloc.
> +*/
> + WARN_ON(in_interrupt());
> + vfree(module_region);
> +}
> diff --git a/kernel/trace/trace_kprobe.c b/kernel/trace/trace_kprobe.c
> index 93507330462c..050b2975332e 100644
> --- a/kernel/trace/trace_kprobe.c
> +++ b/kernel/trace/trace_kprobe.c
> @@ -101,6 +101,7 @@ static nokprobe_inline bool trace_kprobe_has_gone(struct
> trace_kprobe *tk)
> return kprobe_gone(>rp.kp);
> }
>
> +#ifdef CONFIG_MODULES
> static nokprobe_inline bool trace_kprobe_within_module(struct trace_kprobe
> *tk,
> struct module *mod)
> {
> @@ -109,11 +110,13 @@ static nokprobe_inline bool
> trace_kprobe_within_module(struct trace_kprobe *tk,
>
> return strncmp(module_name(mod), name, len) == 0 && name[len] == ':';
> }
> +#endif /* CONFIG_MODULES */
>
> static nokprobe_inline bool trace_kprobe_module_exist(struct trace_kprobe
> *tk)
> {
> + bool ret = false;
> +#ifdef CONFIG_MODULES
> char *p;
> - bool ret;
>
> if (!tk->symbol)
> return false;
> @@ -125,6 +128,7 @@ static nokprobe_inline bool
> trace_kprobe_module_exist(struct trace_kprobe *tk)
> ret = !!find_module(tk->symbol);
> rcu_read_unlock_sched();
> *p = ':';
> +#endif /* CONFIG_MODULES */
>
> return ret;
> }
> @@ -668,6 +672,7 @@ static int register_trace_kprobe(struct trace_kprobe *tk)
> return ret;
> }
>
> +#ifdef CONFIG_MODULES
> /* Module notifier call back, checking event on the module */
> static int trace_kprobe_module_callback(struct notifier_block *nb,
>unsigned long val, void *data)
> @@ -702,6 +707,7 @@ static struct notifier_block trace_kprobe_module_nb = {
> .notifier_call = trace_kprobe_module_callback,
> .priority = 1 /* Invoked after kprobe module callback */
> };
> +#endif /* CONFIG_MODULES */
>
> static int __trace_kprobe_create(int argc, const char *argv[])
> {
> @@ -1896,8 +1902,10 @@ static __init int init_kprobe_trace_early(void)
> if (ret)
> return ret;
>
> +#ifdef CONFIG_MODULES
> if (register_module_notifier(_kprobe_module_nb))
> return -EINVAL;
> +#endif /* CONFIG_MODULES */
>
> return 0;
> }
> --
> 2.36.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/6] csky/mm: Enable ARCH_HAS_VM_GET_PAGE_PROT
Acked-by: Guo Ren
On Fri, Jun 3, 2022 at 6:15 PM Anshuman Khandual
wrote:
>
> This defines and exports a platform specific custom vm_get_page_prot() via
> subscribing ARCH_HAS_VM_GET_PAGE_PROT. Subsequently all __SXXX and __PXXX
> macros can be dropped which are no longer needed.
>
> Cc: Geert Uytterhoeven
> Cc: linux-c...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org
> Acked-by: Guo Ren
> Signed-off-by: Anshuman Khandual
> ---
> arch/csky/Kconfig | 1 +
> arch/csky/include/asm/pgtable.h | 18 --
> arch/csky/mm/init.c | 32
> 3 files changed, 33 insertions(+), 18 deletions(-)
>
> diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
> index 21d72b078eef..588b8a9c68ed 100644
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -6,6 +6,7 @@ config CSKY
> select ARCH_HAS_GCOV_PROFILE_ALL
> select ARCH_HAS_SYNC_DMA_FOR_CPU
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> + select ARCH_HAS_VM_GET_PAGE_PROT
> select ARCH_USE_BUILTIN_BSWAP
> select ARCH_USE_QUEUED_RWLOCKS
> select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 &&
> $(cc-option,-mbacktrace)
> diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h
> index bbe24511..229a5f4ad7fc 100644
> --- a/arch/csky/include/asm/pgtable.h
> +++ b/arch/csky/include/asm/pgtable.h
> @@ -77,24 +77,6 @@
> #define MAX_SWAPFILES_CHECK() \
> BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
>
> -#define __P000 PAGE_NONE
> -#define __P001 PAGE_READ
> -#define __P010 PAGE_READ
> -#define __P011 PAGE_READ
> -#define __P100 PAGE_READ
> -#define __P101 PAGE_READ
> -#define __P110 PAGE_READ
> -#define __P111 PAGE_READ
> -
> -#define __S000 PAGE_NONE
> -#define __S001 PAGE_READ
> -#define __S010 PAGE_WRITE
> -#define __S011 PAGE_WRITE
> -#define __S100 PAGE_READ
> -#define __S101 PAGE_READ
> -#define __S110 PAGE_WRITE
> -#define __S111 PAGE_WRITE
> -
> extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
> #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
>
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index bf2004aa811a..f9babbed17d4 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -197,3 +197,35 @@ void __init fixaddr_init(void)
> vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
> fixrange_init(vaddr, vaddr + PMD_SIZE, swapper_pg_dir);
> }
> +
> +pgprot_t vm_get_page_prot(unsigned long vm_flags)
> +{
> + switch (vm_flags & (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)) {
> + case VM_NONE:
> + return PAGE_NONE;
> + case VM_READ:
> + case VM_WRITE:
> + case VM_WRITE | VM_READ:
> + case VM_EXEC:
> + case VM_EXEC | VM_READ:
> + case VM_EXEC | VM_WRITE:
> + case VM_EXEC | VM_WRITE | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED:
> + return PAGE_NONE;
> + case VM_SHARED | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED | VM_WRITE:
> + case VM_SHARED | VM_WRITE | VM_READ:
> + return PAGE_WRITE;
> + case VM_SHARED | VM_EXEC:
> + case VM_SHARED | VM_EXEC | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED | VM_EXEC | VM_WRITE:
> + case VM_SHARED | VM_EXEC | VM_WRITE | VM_READ:
> + return PAGE_WRITE;
> + default:
> + BUILD_BUG();
> + }
> +}
> +EXPORT_SYMBOL(vm_get_page_prot);
> --
> 2.25.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH v3] mm: Avoid unnecessary page fault retires on shared memory types
e.com>, Thomas Gleixner , linux-al...@vger.kernel.org,
Andrew Morton , Vlastimil Babka ,
Richard Henderson , Chris Zankel , Michal
Simek , Thomas Bogendoerfer ,
Parisc List , Max Filippov ,
Linux Kernel Mailing List , Dinh Nguyen
, Palmer Dabbelt , Sven Schnelle
, Borislav Petkov , Johannes Berg
, linuxppc-dev ,
"David S . Miller"
Errors-To: linuxppc-dev-bounces+archive=mail-archive@lists.ozlabs.org
Sender: "Linuxppc-dev"
For csky part.
Acked-by: Guo Ren
On Wed, May 25, 2022 at 7:45 AM Peter Xu wrote:
>
> I observed that for each of the shared file-backed page faults, we're very
> likely to retry one more time for the 1st write fault upon no page. It's
> because we'll need to release the mmap lock for dirty rate limit purpose
> with balance_dirty_pages_ratelimited() (in fault_dirty_shared_page()).
>
> Then after that throttling we return VM_FAULT_RETRY.
>
> We did that probably because VM_FAULT_RETRY is the only way we can return
> to the fault handler at that time telling it we've released the mmap lock.
>
> However that's not ideal because it's very likely the fault does not need
> to be retried at all since the pgtable was well installed before the
> throttling, so the next continuous fault (including taking mmap read lock,
> walk the pgtable, etc.) could be in most cases unnecessary.
>
> It's not only slowing down page faults for shared file-backed, but also add
> more mmap lock contention which is in most cases not needed at all.
>
> To observe this, one could try to write to some shmem page and look at
> "pgfault" value in /proc/vmstat, then we should expect 2 counts for each
> shmem write simply because we retried, and vm event "pgfault" will capture
> that.
>
> To make it more efficient, add a new VM_FAULT_COMPLETED return code just to
> show that we've completed the whole fault and released the lock. It's also
> a hint that we should very possibly not need another fault immediately on
> this page because we've just completed it.
>
> This patch provides a ~12% perf boost on my aarch64 test VM with a simple
> program sequentially dirtying 400MB shmem file being mmap()ed and these are
> the time it needs:
>
> Before: 650.980 ms (+-1.94%)
> After: 569.396 ms (+-1.38%)
>
> I believe it could help more than that.
>
> We need some special care on GUP and the s390 pgfault handler (for gmap
> code before returning from pgfault), the rest changes in the page fault
> handlers should be relatively straightforward.
>
> Another thing to mention is that mm_account_fault() does take this new
> fault as a generic fault to be accounted, unlike VM_FAULT_RETRY.
>
> I explicitly didn't touch hmm_vma_fault() and break_ksm() because they do
> not handle VM_FAULT_RETRY even with existing code, so I'm literally keeping
> them as-is.
>
> Signed-off-by: Peter Xu
> ---
>
> v3:
> - Rebase to akpm/mm-unstable
> - Copy arch maintainers
> ---
> arch/alpha/mm/fault.c | 4
> arch/arc/mm/fault.c | 4
> arch/arm/mm/fault.c | 4
> arch/arm64/mm/fault.c | 4
> arch/csky/mm/fault.c | 4
> arch/hexagon/mm/vm_fault.c| 4
> arch/ia64/mm/fault.c | 4
> arch/m68k/mm/fault.c | 4
> arch/microblaze/mm/fault.c| 4
> arch/mips/mm/fault.c | 4
> arch/nios2/mm/fault.c | 4
> arch/openrisc/mm/fault.c | 4
> arch/parisc/mm/fault.c| 4
> arch/powerpc/mm/copro_fault.c | 5 +
> arch/powerpc/mm/fault.c | 5 +
> arch/riscv/mm/fault.c | 4
> arch/s390/mm/fault.c | 12 +++-
> arch/sh/mm/fault.c| 4
> arch/sparc/mm/fault_32.c | 4
> arch/sparc/mm/fault_64.c | 5 +
> arch/um/kernel/trap.c | 4
> arch/x86/mm/fault.c | 4
> arch/xtensa/mm/fault.c| 4
> include/linux/mm_types.h | 2 ++
> mm/gup.c | 34 +-
> mm/memory.c | 2 +-
> 26 files changed, 138 insertions(+), 3 deletions(-)
>
> diff --git a/arch/alpha/mm/fault.c b/arch/alpha/mm/fault.c
> index ec20c1004abf..ef427a6bdd1a 100644
> --- a/arch/alpha/mm/fault.c
> +++ b/arch/alpha/mm/fault.c
> @@ -155,6 +155,10 @@ do_page_fault(unsigned long address, unsigned long mmcsr,
> if (fault_signal_pending(fault, regs))
> return;
>
> + /* The fault is fully completed (including releasing mmap lock) */
> + if (fault & VM_FAULT_COMPLETED)
> + return;
> +
> if (unlikely(fault & VM_FAULT_ERROR)) {
>
Re: [PATCH V9 20/20] riscv: compat: Add COMPAT Kbuild skeletal support
On Thu, May 26, 2022 at 3:37 AM Heiko Stübner wrote: > > Am Mittwoch, 25. Mai 2022, 18:08:22 CEST schrieb Guo Ren: > > Thx Heiko & Guenter, > > > > On Wed, May 25, 2022 at 7:10 PM Heiko Stübner wrote: > > > > > > Am Mittwoch, 25. Mai 2022, 12:57:30 CEST schrieb Heiko Stübner: > > > > Am Mittwoch, 25. Mai 2022, 00:06:46 CEST schrieb Guenter Roeck: > > > > > On Wed, May 25, 2022 at 01:46:38AM +0800, Guo Ren wrote: > > > > > [ ... ] > > > > > > > > > > > > The problem is come from "__dls3's vdso decode part in musl's > > > > > > > ldso/dynlink.c". The ehdr->e_phnum & ehdr->e_phentsize are wrong. > > > > > > > > > > > > > > I think the root cause is from musl's implementation with the > > > > > > > wrong > > > > > > > elf parser. I would fix that soon. > > > > > > Not elf parser, it's "aux vector just past environ[]". I think I > > > > > > could > > > > > > solve this, but anyone who could help dig in is welcome. > > > > > > > > > > > > > > > > I am not sure I understand what you are saying here. Point is that my > > > > > root file system, generated with musl a year or so ago, crashes with > > > > > your patch set applied. That is a regression, even if there is a bug > > > > > in musl. > > Thx for the report, it's a valuable regression for riscv-compat. > > > > > > > > > > Also as I said in the other part of the thread, the rootfs seems > > > > innocent, > > > > as my completely-standard Debian riscv64 rootfs is also affected. > > > > > > > > The merged version seems to be v12 [0] - not sure how we this discussion > > > > ended up in v9, but I just tested this revision in two variants: > > > > > > > > - v5.17 + this v9 -> works nicely > > > > > > I take that back ... now going back to that build I somehow also run into > > > that issue here ... will investigate more. > > Yeah, it's my fault. I've fixed up it, please have a try: > > > > https://lore.kernel.org/linux-riscv/20220525160404.2930984-1-guo...@kernel.org/T/#u > > very cool that you found the issue. > I've tested your patch and it seems to fix the issue for me. > > Thanks for figuring out the cause I should thx Guenter Roeck, It just surprised me that compat_vdso could work with quite a lot of rv64 apps. > Heiko > > > > > > - v5.18-rc6 + this v9 (rebased onto it) -> breaks the boot > > > > The only rebase-conflict was with the introduction of restartable > > > > sequences and removal of the tracehook include, but turning > > > > CONFIG_RSEQ > > > > off doesn't seem to affect the breakage. > > > > > > > > So it looks like something changed between 5.17 and 5.18 that causes > > > > the issue. > > > > > > > > > > > > Heiko > > > > > > > > > > > > [0] > > > > https://lore.kernel.org/all/20220405071314.3225832-1-guo...@kernel.org/ > > > > > > > > > > > > > > > > > > > > > > > > > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V9 20/20] riscv: compat: Add COMPAT Kbuild skeletal support
Thx Heiko & Guenter, On Wed, May 25, 2022 at 7:10 PM Heiko Stübner wrote: > > Am Mittwoch, 25. Mai 2022, 12:57:30 CEST schrieb Heiko Stübner: > > Am Mittwoch, 25. Mai 2022, 00:06:46 CEST schrieb Guenter Roeck: > > > On Wed, May 25, 2022 at 01:46:38AM +0800, Guo Ren wrote: > > > [ ... ] > > > > > > > > The problem is come from "__dls3's vdso decode part in musl's > > > > > ldso/dynlink.c". The ehdr->e_phnum & ehdr->e_phentsize are wrong. > > > > > > > > > > I think the root cause is from musl's implementation with the wrong > > > > > elf parser. I would fix that soon. > > > > Not elf parser, it's "aux vector just past environ[]". I think I could > > > > solve this, but anyone who could help dig in is welcome. > > > > > > > > > > I am not sure I understand what you are saying here. Point is that my > > > root file system, generated with musl a year or so ago, crashes with > > > your patch set applied. That is a regression, even if there is a bug > > > in musl. Thx for the report, it's a valuable regression for riscv-compat. > > > > Also as I said in the other part of the thread, the rootfs seems innocent, > > as my completely-standard Debian riscv64 rootfs is also affected. > > > > The merged version seems to be v12 [0] - not sure how we this discussion > > ended up in v9, but I just tested this revision in two variants: > > > > - v5.17 + this v9 -> works nicely > > I take that back ... now going back to that build I somehow also run into > that issue here ... will investigate more. Yeah, it's my fault. I've fixed up it, please have a try: https://lore.kernel.org/linux-riscv/20220525160404.2930984-1-guo...@kernel.org/T/#u > > > > - v5.18-rc6 + this v9 (rebased onto it) -> breaks the boot > > The only rebase-conflict was with the introduction of restartable > > sequences and removal of the tracehook include, but turning CONFIG_RSEQ > > off doesn't seem to affect the breakage. > > > > So it looks like something changed between 5.17 and 5.18 that causes the > > issue. > > > > > > Heiko > > > > > > [0] https://lore.kernel.org/all/20220405071314.3225832-1-guo...@kernel.org/ > > > > > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V9 20/20] riscv: compat: Add COMPAT Kbuild skeletal support
On Wed, May 25, 2022 at 1:42 AM Guo Ren wrote: > > On Mon, May 23, 2022 at 1:45 PM Guenter Roeck wrote: > > > > On Tue, Mar 22, 2022 at 10:40:03PM +0800, guo...@kernel.org wrote: > > > From: Guo Ren > > > > > > Adds initial skeletal COMPAT Kbuild (Running 32bit U-mode on > > > 64bit S-mode) support. > > > - Setup kconfig & dummy functions for compiling. > > > - Implement compat_start_thread by the way. > > > > > > Signed-off-by: Guo Ren > > > Signed-off-by: Guo Ren > > > Reviewed-by: Arnd Bergmann > > > Tested-by: Heiko Stuebner > > > Cc: Palmer Dabbelt > > > > With this patch in linux-next, all my riscv64 emulations crash. > > > > [ 11.600082] Run /sbin/init as init process > > [ 11.628561] init[1]: unhandled signal 11 code 0x1 at 0x > > in libc.so[ff8ad39000+a4000] > > [ 11.629398] CPU: 0 PID: 1 Comm: init Not tainted > > 5.18.0-rc7-next-20220520 #1 > > [ 11.629462] Hardware name: riscv-virtio,qemu (DT) > > [ 11.629546] epc : 00ff8ada1100 ra : 00ff8ada13c8 sp : > > 00ffc58199f0 > > [ 11.629586] gp : 00ff8ad39000 tp : 00ff8ade0998 t0 : > > > > [ 11.629598] t1 : 00ffc5819fd0 t2 : s0 : > > 00ff8ade0cc0 > > [ 11.629610] s1 : 00ff8ade0cc0 a0 : a1 : > > 00ffc5819a00 > > [ 11.629622] a2 : 0001 a3 : 001e a4 : > > 00ffc5819b00 > > [ 11.629634] a5 : 00ffc5819b00 a6 : a7 : > > > > [ 11.629645] s2 : 00ff8ade0ac8 s3 : 00ff8ade0ec8 s4 : > > 00ff8ade0728 > > [ 11.629656] s5 : 00ff8ade0a90 s6 : s7 : > > 00ffc5819e40 > > [ 11.629667] s8 : 00ff8ade0ca0 s9 : 00ff8addba50 s10: > > > > [ 11.629678] s11: t3 : 0002 t4 : > > 0001 > > [ 11.629688] t5 : 0002 t6 : > > [ 11.629699] status: 4020 badaddr: cause: > > 000d > > [ 11.633421] Kernel panic - not syncing: Attempted to kill init! > > exitcode=0x000b > > [ 11.633664] CPU: 0 PID: 1 Comm: init Not tainted > > 5.18.0-rc7-next-20220520 #1 > > [ 11.633784] Hardware name: riscv-virtio,qemu (DT) > > [ 11.633881] Call Trace: > > [ 11.633960] [] dump_backtrace+0x1c/0x24 > > [ 11.634162] [] show_stack+0x2c/0x38 > > [ 11.634274] [] dump_stack_lvl+0x60/0x8e > > [ 11.634386] [] dump_stack+0x14/0x1c > > [ 11.634491] [] panic+0x116/0x2e2 > > [ 11.634596] [] do_exit+0x7ce/0x7d4 > > [ 11.634707] [] do_group_exit+0x24/0x7c > > [ 11.634817] [] get_signal+0x7ee/0x830 > > [ 11.634924] [] do_notify_resume+0x6c/0x41c > > [ 11.635037] [] ret_from_exception+0x0/0x10 > The problem is come from "__dls3's vdso decode part in musl's > ldso/dynlink.c". The ehdr->e_phnum & ehdr->e_phentsize are wrong. > > I think the root cause is from musl's implementation with the wrong > elf parser. I would fix that soon. Not elf parser, it's "aux vector just past environ[]". I think I could solve this, but anyone who could help dig in is welcome. > > If you CONFIG_COMPAT=n, the bug would be bypassed. > > > > > Guenter > > > > --- > > # bad: [18ecd30af1a8402c162cca1bd58771c0e5be7815] Add linux-next specific > > files for 20220520 > > # good: [42226c989789d8da4af1de0c31070c96726d990c] Linux 5.18-rc7 > > git bisect start 'HEAD' 'v5.18-rc7' > > # bad: [f9b63740b666dd9887eb0282d21b5f65bb0cadd0] Merge branch 'master' of > > git://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git > > git bisect bad f9b63740b666dd9887eb0282d21b5f65bb0cadd0 > > # bad: [7db97132097c5973ff77466d0ee681650af653de] Merge branch 'for-next' > > of git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux > > git bisect bad 7db97132097c5973ff77466d0ee681650af653de > > # good: [2b7d17d4b7c1ff40f58b0d32be40fc0bb6c582fb] soc: document merges > > git bisect good 2b7d17d4b7c1ff40f58b0d32be40fc0bb6c582fb > > # good: [69c9668f853fdd409bb8abbb37d615785510b29a] Merge branch 'clk-next' > > of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git > > git bisect good 69c9668f853fdd409bb8abbb37d615785510b29a > > # bad: [1577f290aa0d4c5b29c03c46ef52e4952a21bfbb] Merge branch 'for-next' > > of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git > > git bisect bad 1577f290aa0d4c5b29c03c46ef52e4952a21bfbb
Re: [PATCH V9 20/20] riscv: compat: Add COMPAT Kbuild skeletal support
On Mon, May 23, 2022 at 1:45 PM Guenter Roeck wrote: > > On Tue, Mar 22, 2022 at 10:40:03PM +0800, guo...@kernel.org wrote: > > From: Guo Ren > > > > Adds initial skeletal COMPAT Kbuild (Running 32bit U-mode on > > 64bit S-mode) support. > > - Setup kconfig & dummy functions for compiling. > > - Implement compat_start_thread by the way. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Reviewed-by: Arnd Bergmann > > Tested-by: Heiko Stuebner > > Cc: Palmer Dabbelt > > With this patch in linux-next, all my riscv64 emulations crash. > > [ 11.600082] Run /sbin/init as init process > [ 11.628561] init[1]: unhandled signal 11 code 0x1 at 0x in > libc.so[ff8ad39000+a4000] > [ 11.629398] CPU: 0 PID: 1 Comm: init Not tainted 5.18.0-rc7-next-20220520 > #1 > [ 11.629462] Hardware name: riscv-virtio,qemu (DT) > [ 11.629546] epc : 00ff8ada1100 ra : 00ff8ada13c8 sp : > 00ffc58199f0 > [ 11.629586] gp : 00ff8ad39000 tp : 00ff8ade0998 t0 : > > [ 11.629598] t1 : 00ffc5819fd0 t2 : s0 : > 00ff8ade0cc0 > [ 11.629610] s1 : 00ff8ade0cc0 a0 : a1 : > 00ffc5819a00 > [ 11.629622] a2 : 0001 a3 : 001e a4 : > 00ffc5819b00 > [ 11.629634] a5 : 00ffc5819b00 a6 : a7 : > > [ 11.629645] s2 : 00ff8ade0ac8 s3 : 00ff8ade0ec8 s4 : > 00ff8ade0728 > [ 11.629656] s5 : 00ff8ade0a90 s6 : s7 : > 00ffc5819e40 > [ 11.629667] s8 : 00ff8ade0ca0 s9 : 00ff8addba50 s10: > > [ 11.629678] s11: t3 : 0002 t4 : > 0001 > [ 11.629688] t5 : 0002 t6 : > [ 11.629699] status: 4020 badaddr: cause: > 000d > [ 11.633421] Kernel panic - not syncing: Attempted to kill init! > exitcode=0x000b > [ 11.633664] CPU: 0 PID: 1 Comm: init Not tainted 5.18.0-rc7-next-20220520 > #1 > [ 11.633784] Hardware name: riscv-virtio,qemu (DT) > [ 11.633881] Call Trace: > [ 11.633960] [] dump_backtrace+0x1c/0x24 > [ 11.634162] [] show_stack+0x2c/0x38 > [ 11.634274] [] dump_stack_lvl+0x60/0x8e > [ 11.634386] [] dump_stack+0x14/0x1c > [ 11.634491] [] panic+0x116/0x2e2 > [ 11.634596] [] do_exit+0x7ce/0x7d4 > [ 11.634707] [] do_group_exit+0x24/0x7c > [ 11.634817] [] get_signal+0x7ee/0x830 > [ 11.634924] [] do_notify_resume+0x6c/0x41c > [ 11.635037] [] ret_from_exception+0x0/0x10 The problem is come from "__dls3's vdso decode part in musl's ldso/dynlink.c". The ehdr->e_phnum & ehdr->e_phentsize are wrong. I think the root cause is from musl's implementation with the wrong elf parser. I would fix that soon. If you CONFIG_COMPAT=n, the bug would be bypassed. > > Guenter > > --- > # bad: [18ecd30af1a8402c162cca1bd58771c0e5be7815] Add linux-next specific > files for 20220520 > # good: [42226c989789d8da4af1de0c31070c96726d990c] Linux 5.18-rc7 > git bisect start 'HEAD' 'v5.18-rc7' > # bad: [f9b63740b666dd9887eb0282d21b5f65bb0cadd0] Merge branch 'master' of > git://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git > git bisect bad f9b63740b666dd9887eb0282d21b5f65bb0cadd0 > # bad: [7db97132097c5973ff77466d0ee681650af653de] Merge branch 'for-next' of > git://git.kernel.org/pub/scm/linux/kernel/git/cel/linux > git bisect bad 7db97132097c5973ff77466d0ee681650af653de > # good: [2b7d17d4b7c1ff40f58b0d32be40fc0bb6c582fb] soc: document merges > git bisect good 2b7d17d4b7c1ff40f58b0d32be40fc0bb6c582fb > # good: [69c9668f853fdd409bb8abbb37d615785510b29a] Merge branch 'clk-next' of > git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux.git > git bisect good 69c9668f853fdd409bb8abbb37d615785510b29a > # bad: [1577f290aa0d4c5b29c03c46ef52e4952a21bfbb] Merge branch 'for-next' of > git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux.git > git bisect bad 1577f290aa0d4c5b29c03c46ef52e4952a21bfbb > # good: [34f0971f8ca73d7e5502b4cf299788a9402120f7] powerpc/powernv/flash: > Check OPAL flash calls exist before using > git bisect good 34f0971f8ca73d7e5502b4cf299788a9402120f7 > # good: [0349d7dfc70a26b3facd8ca97de34980d4b60954] Merge branch 'mips-next' > of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git > git bisect good 0349d7dfc70a26b3facd8ca97de34980d4b60954 > # bad: [20bfb54d3b121699674c17a854c5ebc7a8f97d81] Merge branch 'for-next' of > git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git > git bisect bad 20bfb54d3b121699674c17a854c5ebc7a8f97d81 > # bad: [9be8459298eadb39b9fe9974b8
Re: [PATCH V9 20/20] riscv: compat: Add COMPAT Kbuild skeletal support
I tested Palmer's branch, it's okay: 8810d7feee5a (HEAD -> for-next, palmer/for-next) riscv: Don't output a bogus mmu-type on a no MMU kernel I also tested linux-next, it's okay: rv64_rootfs: # uname -a Linux buildroot 5.18.0-next-20220523 #7 SMP Mon May 23 11:15:17 EDT 2022 riscv64 GNU/Linux # # # # ls /lib ld-uClibc-1.0.39.so libatomic.so.1 libgcc_s.so ld-uClibc.so.0 libatomic.so.1.2.0 libgcc_s.so.1 ld-uClibc.so.1 libc.so.0libuClibc-1.0.39.so libatomic.so libc.so.1modules rv32_rootfs: buildroot login: root # uname -a Linux buildroot 5.18.0-next-20220523 #7 SMP Mon May 23 11:15:17 EDT 2022 riscv64 GNU/Linux # ls /lib ld-linux-riscv32-ilp32d.so.1 libm.so.6 libanl.so.1 libnss_dns.so.2 libatomic.so libnss_files.so.2 libatomic.so.1libpthread.so.0 libatomic.so.1.2.0libresolv.so.2 libc.so.6 librt.so.1 libcrypt.so.1 libthread_db.so.1 libdl.so.2libutil.so.1 libgcc_s.so modules libgcc_s.so.1 Here is my qemu version: commit 19f13a92cef8405052e0f73d5289f9e15474dad3 (HEAD -> riscv-to-apply.next, alistair/riscv-to-apply.next) Author: Tsukasa OI Date: Sun May 15 11:56:11 2022 +0900 target/riscv: Move/refactor ISA extension checks We should separate "check" and "configure" steps as possible. This commit separates both steps except vector/Zfinx-related checks. Signed-off-by: Tsukasa OI Reviewed-by: Alistair Francis Message-Id: Signed-off-by: Alistair Francis On Mon, May 23, 2022 at 1:45 PM Guenter Roeck wrote: > > On Tue, Mar 22, 2022 at 10:40:03PM +0800, guo...@kernel.org wrote: > > From: Guo Ren > > > > Adds initial skeletal COMPAT Kbuild (Running 32bit U-mode on > > 64bit S-mode) support. > > - Setup kconfig & dummy functions for compiling. > > - Implement compat_start_thread by the way. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Reviewed-by: Arnd Bergmann > > Tested-by: Heiko Stuebner > > Cc: Palmer Dabbelt > > With this patch in linux-next, all my riscv64 emulations crash. > > [ 11.600082] Run /sbin/init as init process > [ 11.628561] init[1]: unhandled signal 11 code 0x1 at 0x in > libc.so[ff8ad39000+a4000] > [ 11.629398] CPU: 0 PID: 1 Comm: init Not tainted 5.18.0-rc7-next-20220520 > #1 > [ 11.629462] Hardware name: riscv-virtio,qemu (DT) > [ 11.629546] epc : 00ff8ada1100 ra : 00ff8ada13c8 sp : > 00ffc58199f0 > [ 11.629586] gp : 00ff8ad39000 tp : 00ff8ade0998 t0 : > > [ 11.629598] t1 : 00ffc5819fd0 t2 : s0 : > 00ff8ade0cc0 > [ 11.629610] s1 : 00ff8ade0cc0 a0 : a1 : > 00ffc5819a00 > [ 11.629622] a2 : 0001 a3 : 001e a4 : > 00ffc5819b00 > [ 11.629634] a5 : 00ffc5819b00 a6 : a7 : > > [ 11.629645] s2 : 00ff8ade0ac8 s3 : 00ff8ade0ec8 s4 : > 00ff8ade0728 > [ 11.629656] s5 : 00ff8ade0a90 s6 : s7 : > 00ffc5819e40 > [ 11.629667] s8 : 00ff8ade0ca0 s9 : 00ff8addba50 s10: > > [ 11.629678] s11: t3 : 0002 t4 : > 0001 > [ 11.629688] t5 : 0002 t6 : > [ 11.629699] status: 4020 badaddr: cause: > 000d > [ 11.633421] Kernel panic - not syncing: Attempted to kill init! > exitcode=0x000b > [ 11.633664] CPU: 0 PID: 1 Comm: init Not tainted 5.18.0-rc7-next-20220520 > #1 > [ 11.633784] Hardware name: riscv-virtio,qemu (DT) > [ 11.633881] Call Trace: > [ 11.633960] [] dump_backtrace+0x1c/0x24 > [ 11.634162] [] show_stack+0x2c/0x38 > [ 11.634274] [] dump_stack_lvl+0x60/0x8e > [ 11.634386] [] dump_stack+0x14/0x1c > [ 11.634491] [] panic+0x116/0x2e2 > [ 11.634596] [] do_exit+0x7ce/0x7d4 > [ 11.634707] [] do_group_exit+0x24/0x7c > [ 11.634817] [] get_signal+0x7ee/0x830 > [ 11.634924] [] do_notify_resume+0x6c/0x41c > [ 11.635037] [] ret_from_exception+0x0/0x10 > > Guenter > > --- > # bad: [18ecd30af1a8402c162cca1bd58771c0e5be7815] Add linux-next specific > files for 20220520 > # good: [42226c989789d8da4af1de0c31070c96726d990c] Linux 5.18-rc7 > git bisect start 'HEAD' 'v5.18-rc7' > # bad: [f9b63740b666dd9887eb0282d21b5f65bb0cadd0] Merge branch 'master' of > git://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git > git bisect bad f9b63740b666dd9887eb0282d21b5f65bb0cadd0 > # bad: [7db97132097c5973ff77466d0ee681650af653de] Merge branch 'for-next' of > git://g
Re: [PATCH V12 00/20] riscv: Add COMPAT mode support for 64BIT
On Fri, May 20, 2022 at 1:50 AM Palmer Dabbelt wrote: > > On Tue, 05 Apr 2022 00:12:54 PDT (-0700), guo...@kernel.org wrote: > > From: Guo Ren > > > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > > s390, mips, sparc) have supported COMPAT mode. But they all have > > history issues and can't use standard linux unistd.h. RISC-V would > > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > > /unistd.h. > > > > The patchset are based on v5.18-rc1, you can compare rv64-compat > > v.s. rv32-native in qemu with following steps: > > > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org > >$ git clone git://git.busybox.net/buildroot > >$ cd buildroot > >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig > >$ make -C qemu_riscv32_virt_defconfig > >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig > >$ make -C qemu_riscv64_virt_defconfig > >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > > > - Prepare Linux rv32 & rv64 Image > >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v12 > > linux > >$ cd linux > >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig > >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ rv32_defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ Image > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ Image > > > > - Prepare Qemu: > >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux > >$ cd qemu > >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" > >$ make > > > > Now let's compare rv64-compat with rv32-native memory footprint with almost > > the same > > defconfig, rootfs, opensbi in one qemu. > > > > - Run rv64 with rv32 rootfs in compat mode: > >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > > qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > > -drive file > > qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device > > virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > > virtio-net-device,netdev=net0 > > > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > > OpenSBI v0.9 > > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > > [0.00] Machine model: riscv-virtio,qemu > > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > > [0.00] printk: bootconsole [sbi0] enabled > > [0.00] efi: UEFI not found. > > [0.00] Zone ranges: > > [0.00] DMA32[mem 0x8020-0x83ff] > > [0.00] Normal empty > > [0.00] Movable zone start for each node > > [0.00] Early memory node ranges > > [0.00] node 0: [mem 0x8020-0x83ff] > > [0.00] Initmem setup node 0 [mem > > 0x8020-0x83ff] > > [0.00] SBI specification v0.2 detected > > [0.00] SBI implementation ID=0x1 Version=0x9 > > [0.00] SBI TIME extension detected > > [0.00] SBI IPI extension detected > > [0.00] SBI RFENCE extension detected > > [0.00] SBI v0.2 HSM extension detected > > [0.00] riscv: ISA extensions acdfhimsu > > [0.00] riscv: ELF capabilities acdfim > > [0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632 > > [0.00] Built 1 zonelists, mobility grouping on. Total pages: 15655 > > [0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 > > earlycon=sbi > > [0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 > > bytes, linear) > > [0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, > > linear) > > [0.00] mem auto-init: stack:off, heap
Re: [PATCH V12 00/20] riscv: Add COMPAT mode support for 64BIT
On Fri, Apr 29, 2022 at 2:22 AM Palmer Dabbelt wrote: > > On Thu, 28 Apr 2022 05:25:19 PDT (-0700), guo...@kernel.org wrote: > > Hi Palmer, > > > > I see you have taken v12 into your riscv-compat branch and added > > asm/signal32.h. Do you need me help put compat_sigcontext & > > compat_ucontext & compat_rt_sigframe into signal32.h? And could we > > rename signal32.h to compat_signal.h to match compat_signal.c? > > > > In the end, thx for taking care of compat patch series. > > No problem. I was just trying to get something clean through all the > autobuilders before making it look good, I think it didn't fail this > time so I'll do a bit more refactoring. Shouldn't be too much longer at > this point. Cool, thank you. Hope it could be in v5.19. > > > > > > > On Tue, Apr 5, 2022 at 3:13 PM wrote: > >> > >> From: Guo Ren > >> > >> Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > >> s390, mips, sparc) have supported COMPAT mode. But they all have > >> history issues and can't use standard linux unistd.h. RISC-V would > >> be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > >> /unistd.h. > >> > >> The patchset are based on v5.18-rc1, you can compare rv64-compat > >> v.s. rv32-native in qemu with following steps: > >> > >> - Prepare rv32 rootfs & fw_jump.bin by buildroot.org > >>$ git clone git://git.busybox.net/buildroot > >>$ cd buildroot > >>$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig > >>$ make -C qemu_riscv32_virt_defconfig > >>$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig > >>$ make -C qemu_riscv64_virt_defconfig > >>(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > >> > >> - Prepare Linux rv32 & rv64 Image > >>$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v12 > >> linux > >>$ cd linux > >>$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig > >>$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig > >>$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > >> O=../build-rv32/ rv32_defconfig > >>$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > >> O=../build-rv32/ Image > >>$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > >> O=../build-rv64/ defconfig > >>$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > >> O=../build-rv64/ Image > >> > >> - Prepare Qemu: > >>$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux > >>$ cd qemu > >>$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" > >>$ make > >> > >> Now let's compare rv64-compat with rv32-native memory footprint with > >> almost the same > >> defconfig, rootfs, opensbi in one qemu. > >> > >> - Run rv64 with rv32 rootfs in compat mode: > >>$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > >> qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > >> -drive file > >> qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device > >> virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > >> console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > >> virtio-net-device,netdev=net0 > >> > >> QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > >> OpenSBI v0.9 > >> [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > >> (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU > >> ld (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > >> [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > >> [0.00] Machine model: riscv-virtio,qemu > >> [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > >> [0.00] printk: bootconsole [sbi0] enabled > >> [0.00] efi: UEFI not found. > >> [0.00] Zone ranges: > >> [0.00] DMA32[mem 0x8020-0x83ff] > >> [0.00] Normal empty > >> [0.00] Movable zone start for each node > >> [0.00] Early memory node ranges > >> [0.00] node 0: [mem 0x8020-0x83ff] > >> [0.0
Re: [PATCH V12 00/20] riscv: Add COMPAT mode support for 64BIT
Hi Palmer, I see you have taken v12 into your riscv-compat branch and added asm/signal32.h. Do you need me help put compat_sigcontext & compat_ucontext & compat_rt_sigframe into signal32.h? And could we rename signal32.h to compat_signal.h to match compat_signal.c? In the end, thx for taking care of compat patch series. On Tue, Apr 5, 2022 at 3:13 PM wrote: > > From: Guo Ren > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > s390, mips, sparc) have supported COMPAT mode. But they all have > history issues and can't use standard linux unistd.h. RISC-V would > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > /unistd.h. > > The patchset are based on v5.18-rc1, you can compare rv64-compat > v.s. rv32-native in qemu with following steps: > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org >$ git clone git://git.busybox.net/buildroot >$ cd buildroot >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig >$ make -C qemu_riscv32_virt_defconfig >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig >$ make -C qemu_riscv64_virt_defconfig >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > - Prepare Linux rv32 & rv64 Image >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v12 linux >$ cd linux >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ rv32_defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ Image >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ Image > > - Prepare Qemu: >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux >$ cd qemu >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" >$ make > > Now let's compare rv64-compat with rv32-native memory footprint with almost > the same > defconfig, rootfs, opensbi in one qemu. > > - Run rv64 with rv32 rootfs in compat mode: >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > -drive file qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 > -device virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > virtio-net-device,netdev=net0 > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > OpenSBI v0.9 > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > [0.00] Machine model: riscv-virtio,qemu > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > [0.00] printk: bootconsole [sbi0] enabled > [0.00] efi: UEFI not found. > [0.00] Zone ranges: > [0.00] DMA32[mem 0x8020-0x83ff] > [0.00] Normal empty > [0.00] Movable zone start for each node > [0.00] Early memory node ranges > [0.00] node 0: [mem 0x8020-0x83ff] > [0.00] Initmem setup node 0 [mem > 0x8020-0x83ff] > [0.00] SBI specification v0.2 detected > [0.00] SBI implementation ID=0x1 Version=0x9 > [0.00] SBI TIME extension detected > [0.00] SBI IPI extension detected > [0.00] SBI RFENCE extension detected > [0.00] SBI v0.2 HSM extension detected > [0.00] riscv: ISA extensions acdfhimsu > [0.00] riscv: ELF capabilities acdfim > [0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632 > [0.00] Built 1 zonelists, mobility grouping on. Total pages: 15655 > [0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 > earlycon=sbi > [0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 bytes, > linear) > [0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, > linear) > [0.00] mem auto-init: stack:off, heap alloc:off, heap free:off > [0.00] Virtual kernel memory layout: > [0.00] fixmap : 0xffcefee0 - 0xffceff00 (2048 > kB) > [0.00] pci io
Re: [PATCH V11 00/20] riscv: Add COMPAT mode support for rv64
Hi Palmer, On Tue, Apr 5, 2022 at 7:06 AM Palmer Dabbelt wrote: > > On Mon, 04 Apr 2022 07:28:50 PDT (-0700), guo...@kernel.org wrote: > > On Sat, Apr 2, 2022 at 10:04 PM Guo Ren wrote: > >> > >> Hi Palmer, > >> > >> Sorry for the late reply, I still want COMPAT to catch up at 5.18.. > >> I've pushed it into my next branch, and it would get in linux-next the > >> next day. You could have a look at that. The repo is: > >> https://github.com/c-sky/csky-linux/tree/linux-next > >> > >> We still need your sending pull request for COMPAT, thank you very much. > > Sorry, but it was still failing the autobuilders on the previous > versions and Saturday night is way, way too late for a respin of a big > patch set. It's my fault to miss the arm64 auto builder problem, and I've fixed it in v12. > > > Seems we have already missed 5.18, I just prepared the 5.18-rc1 for > > you. It solved the arm64 compile problem and some conflicts, Hope you > > could put it into your for-next (5.19-rc1). > > https://github.com/c-sky/csky-linux/tree/riscv_compat_v12 > > This says v11, but that says v12. I'm going to put the v11 that was > sent to the lists in a branch for the autobuilders to test again, but > LMK if there's a difference (maybe by sending the v12?). Might take a > bit for me to get everything bumped and tested, my machine's super flaky > right now... v11 is based on 5.17-rc8, so you could abandon it.: https://github.com/c-sky/csky-linux/commits/riscv_compat_v11 v12 is based on 5.18-rc1 (I haven't sent patches series to the list): https://github.com/c-sky/csky-linux/commits/riscv_compat_v12 A new compile problem has been reported by Nathan and I've fixed it in v12. I will soon send out the v12 patchset series in the mail list. > > > > >> > >> On Sat, Apr 2, 2022 at 9:53 PM wrote: > >> > > >> > From: Guo Ren > >> > > >> > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > >> > s390, mips, sparc) have supported COMPAT mode. But they all have > >> > history issues and can't use standard linux unistd.h. RISC-V would > >> > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > >> > /unistd.h. > >> > > >> > The patchset are based on v5.17-rc8, you can compare rv64-compat > >> > v.s. rv32-native in qemu with following steps: > >> > > >> > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org > >> >$ git clone git://git.busybox.net/buildroot > >> >$ cd buildroot > >> >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig > >> >$ make -C qemu_riscv32_virt_defconfig > >> >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig > >> >$ make -C qemu_riscv64_virt_defconfig > >> >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > >> > > >> > - Prepare Linux rv32 & rv64 Image > >> >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v11 > >> > linux > >> >$ cd linux > >> >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig > >> >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig > >> >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > >> > O=../build-rv32/ rv32_defconfig > >> >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > >> > O=../build-rv32/ Image > >> >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > >> > O=../build-rv64/ defconfig > >> >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > >> > O=../build-rv64/ Image > >> > > >> > - Prepare Qemu: > >> >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux > >> >$ cd qemu > >> >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" > >> >$ make > >> > > >> > Now let's compare rv64-compat with rv32-native memory footprint with > >> > almost the same > >> > defconfig, rootfs, opensbi in one qemu. > >> > > >> > - Run rv64 with rv32 rootfs in compat mode: > >> >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic > >> > -bios qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel > >> > build-rv64/Image -drive file > >> > qemu_riscv
Re: [PATCH V11 00/20] riscv: Add COMPAT mode support for rv64
On Sat, Apr 2, 2022 at 10:04 PM Guo Ren wrote: > > Hi Palmer, > > Sorry for the late reply, I still want COMPAT to catch up at 5.18.. > I've pushed it into my next branch, and it would get in linux-next the > next day. You could have a look at that. The repo is: > https://github.com/c-sky/csky-linux/tree/linux-next > > We still need your sending pull request for COMPAT, thank you very much. Seems we have already missed 5.18, I just prepared the 5.18-rc1 for you. It solved the arm64 compile problem and some conflicts, Hope you could put it into your for-next (5.19-rc1). https://github.com/c-sky/csky-linux/tree/riscv_compat_v12 > > On Sat, Apr 2, 2022 at 9:53 PM wrote: > > > > From: Guo Ren > > > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > > s390, mips, sparc) have supported COMPAT mode. But they all have > > history issues and can't use standard linux unistd.h. RISC-V would > > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > > /unistd.h. > > > > The patchset are based on v5.17-rc8, you can compare rv64-compat > > v.s. rv32-native in qemu with following steps: > > > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org > >$ git clone git://git.busybox.net/buildroot > >$ cd buildroot > >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig > >$ make -C qemu_riscv32_virt_defconfig > >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig > >$ make -C qemu_riscv64_virt_defconfig > >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > > > - Prepare Linux rv32 & rv64 Image > >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v11 > > linux > >$ cd linux > >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig > >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ rv32_defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ Image > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ Image > > > > - Prepare Qemu: > >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux > >$ cd qemu > >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" > >$ make > > > > Now let's compare rv64-compat with rv32-native memory footprint with almost > > the same > > defconfig, rootfs, opensbi in one qemu. > > > > - Run rv64 with rv32 rootfs in compat mode: > >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > > qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > > -drive file > > qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device > > virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > > virtio-net-device,netdev=net0 > > > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > > OpenSBI v0.9 > > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > > [0.00] Machine model: riscv-virtio,qemu > > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > > [0.00] printk: bootconsole [sbi0] enabled > > [0.00] efi: UEFI not found. > > [0.00] Zone ranges: > > [0.00] DMA32[mem 0x8020-0x83ff] > > [0.00] Normal empty > > [0.00] Movable zone start for each node > > [0.00] Early memory node ranges > > [0.00] node 0: [mem 0x8020-0x83ff] > > [0.00] Initmem setup node 0 [mem > > 0x8020-0x83ff] > > [0.00] SBI specification v0.2 detected > > [0.00] SBI implementation ID=0x1 Version=0x9 > > [0.00] SBI TIME extension detected > > [0.00] SBI IPI extension detected > > [0.00] SBI RFENCE extension detected > > [0.00] SBI v0.2 HSM extension detected > > [0.00] riscv: ISA extensions acdfhimsu > &
Re: [PATCH V11 00/20] riscv: Add COMPAT mode support for rv64
Hi Palmer, Sorry for the late reply, I still want COMPAT to catch up at 5.18.. I've pushed it into my next branch, and it would get in linux-next the next day. You could have a look at that. The repo is: https://github.com/c-sky/csky-linux/tree/linux-next We still need your sending pull request for COMPAT, thank you very much. On Sat, Apr 2, 2022 at 9:53 PM wrote: > > From: Guo Ren > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > s390, mips, sparc) have supported COMPAT mode. But they all have > history issues and can't use standard linux unistd.h. RISC-V would > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > /unistd.h. > > The patchset are based on v5.17-rc8, you can compare rv64-compat > v.s. rv32-native in qemu with following steps: > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org >$ git clone git://git.busybox.net/buildroot >$ cd buildroot >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig >$ make -C qemu_riscv32_virt_defconfig >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig >$ make -C qemu_riscv64_virt_defconfig >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > - Prepare Linux rv32 & rv64 Image >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v11 linux >$ cd linux >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ rv32_defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ Image >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ Image > > - Prepare Qemu: >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux >$ cd qemu >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" >$ make > > Now let's compare rv64-compat with rv32-native memory footprint with almost > the same > defconfig, rootfs, opensbi in one qemu. > > - Run rv64 with rv32 rootfs in compat mode: >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > -drive file qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 > -device virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > virtio-net-device,netdev=net0 > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > OpenSBI v0.9 > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > [0.00] Machine model: riscv-virtio,qemu > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > [0.00] printk: bootconsole [sbi0] enabled > [0.00] efi: UEFI not found. > [0.00] Zone ranges: > [0.00] DMA32[mem 0x8020-0x83ff] > [0.00] Normal empty > [0.00] Movable zone start for each node > [0.00] Early memory node ranges > [0.00] node 0: [mem 0x8020-0x83ff] > [0.00] Initmem setup node 0 [mem > 0x8020-0x83ff] > [0.00] SBI specification v0.2 detected > [0.00] SBI implementation ID=0x1 Version=0x9 > [0.00] SBI TIME extension detected > [0.00] SBI IPI extension detected > [0.00] SBI RFENCE extension detected > [0.00] SBI v0.2 HSM extension detected > [0.00] riscv: ISA extensions acdfhimsu > [0.00] riscv: ELF capabilities acdfim > [0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632 > [0.00] Built 1 zonelists, mobility grouping on. Total pages: 15655 > [0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 > earlycon=sbi > [0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 bytes, > linear) > [0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, > linear) > [0.00] mem auto-init: stack:off, heap alloc:off, heap free:off > [0.00] Virtual kernel memory layout: > [0.00] fixmap : 0xffcefee0 - 0xffceff00 (2048 > kB) > [0.00] pci io : 0x
Re: [PATCH V10 04/20] kconfig: Add SYSVIPC_COMPAT for all architectures
On Sat, Apr 2, 2022 at 9:39 PM Masahiro Yamada wrote: > > On Sat, Apr 2, 2022 at 10:36 PM wrote: > > > > From: Guo Ren > > > > The existing per-arch definitions are pretty much historic cruft. > > Move SYSVIPC_COMPAT into init/Kconfig. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Acked-by: Arnd Bergmann > > Reviewed-by: Christoph Hellwig > > Tested-by: Heiko Stuebner > > Cc: Palmer Dabbelt > > --- > > Please use "arch:" or something for the commit subject. > > I want to see "kconfig:" for > changes under scripts/kconfig/. Okay > > > > -- > Best Regards > Masahiro Yamada -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V9 00/20] riscv: compat: Add COMPAT Kbuild skeletal support
I got that. I fixed up it in v10.
CC arch/arm64/kernel/asm-offsets.s
In file included from
/home/guoren/source/kernel/riscv-linux/arch/arm64/include/asm/stat.h:13,
from
/home/guoren/source/kernel/riscv-linux/include/linux/stat.h:6,
from
/home/guoren/source/kernel/riscv-linux/include/linux/sysfs.h:22,
from
/home/guoren/source/kernel/riscv-linux/include/linux/kobject.h:20,
from
/home/guoren/source/kernel/riscv-linux/include/linux/of.h:17,
from
/home/guoren/source/kernel/riscv-linux/include/linux/irqdomain.h:35,
from
/home/guoren/source/kernel/riscv-linux/include/linux/acpi.h:13,
from
/home/guoren/source/kernel/riscv-linux/include/acpi/apei.h:9,
from
/home/guoren/source/kernel/riscv-linux/include/acpi/ghes.h:5,
from
/home/guoren/source/kernel/riscv-linux/include/linux/arm_sdei.h:8,
from
/home/guoren/source/kernel/riscv-linux/arch/arm64/kernel/asm-offsets.c:10:
/home/guoren/source/kernel/riscv-linux/arch/arm64/include/asm/compat.h:69:8:
error: redefinition of ‘struct compat_statfs’
69 | struct compat_statfs {
|^
In file included from
/home/guoren/source/kernel/riscv-linux/arch/arm64/include/asm/compat.h:18,
from
/home/guoren/source/kernel/riscv-linux/arch/arm64/include/asm/stat.h:13,
from
/home/guoren/source/kernel/riscv-linux/include/linux/stat.h:6,
from
/home/guoren/source/kernel/riscv-linux/include/linux/sysfs.h:22,
from
/home/guoren/source/kernel/riscv-linux/include/linux/kobject.h:20,
from
/home/guoren/source/kernel/riscv-linux/include/linux/of.h:17,
from
/home/guoren/source/kernel/riscv-linux/include/linux/irqdomain.h:35,
from
/home/guoren/source/kernel/riscv-linux/include/linux/acpi.h:13,
from
/home/guoren/source/kernel/riscv-linux/include/acpi/apei.h:9,
from
/home/guoren/source/kernel/riscv-linux/include/acpi/ghes.h:5,
from
/home/guoren/source/kernel/riscv-linux/include/linux/arm_sdei.h:8,
from
/home/guoren/source/kernel/riscv-linux/arch/arm64/kernel/asm-offsets.c:10:
/home/guoren/source/kernel/riscv-linux/include/asm-generic/compat.h:87:8:
note: originally defined here
87 | struct compat_statfs {
|^
make[2]: *** [/home/guoren/source/kernel/riscv-linux/scripts/Makefile.build:121:
arch/arm64/kernel/asm-offsets.s] Error 1
make[1]: *** [/home/guoren/source/kernel/riscv-linux/Makefile:1191:
prepare0] Error 2
make[1]: Leaving directory '/home/guoren/source/kernel/build-arm64'
On Sat, Apr 2, 2022 at 8:53 PM Guo Ren wrote:
>
> On Wed, Mar 23, 2022 at 5:00 AM Palmer Dabbelt wrote:
> >
> > On Tue, 22 Mar 2022 07:39:43 PDT (-0700), guo...@kernel.org wrote:
> > > From: Guo Ren
> > >
> > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64,
> > > s390, mips, sparc) have supported COMPAT mode. But they all have
> > > history issues and can't use standard linux unistd.h. RISC-V would
> > > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic
> > > /unistd.h.
> > >
> > > The patchset are based on v5.17-rc8, you can compare rv64-compat
> > > v.s. rv32-native in qemu with following steps:
> > >
> > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org
> > >$ git clone git://git.busybox.net/buildroot
> > >$ cd buildroot
> > >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig
> > >$ make -C qemu_riscv32_virt_defconfig
> > >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig
> > >$ make -C qemu_riscv64_virt_defconfig
> > >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images)
> > >
> > > - Prepare Linux rv32 & rv64 Image
> > >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v8
> > > linux
> > >$ cd linux
> > >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig
> > >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig
> > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu-
> > > O=../build-rv32/ rv32_defconfig
> > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu-
> > > O=../build-rv32/ Image
> > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu-
> > > O=../build-rv64/ defconfig
> > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu-
> > > O=../build-rv64/ Image
> > >
> > > - Prepare Qemu:
>
Re: [PATCH V9 00/20] riscv: compat: Add COMPAT Kbuild skeletal support
On Wed, Mar 23, 2022 at 5:00 AM Palmer Dabbelt wrote: > > On Tue, 22 Mar 2022 07:39:43 PDT (-0700), guo...@kernel.org wrote: > > From: Guo Ren > > > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > > s390, mips, sparc) have supported COMPAT mode. But they all have > > history issues and can't use standard linux unistd.h. RISC-V would > > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > > /unistd.h. > > > > The patchset are based on v5.17-rc8, you can compare rv64-compat > > v.s. rv32-native in qemu with following steps: > > > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org > >$ git clone git://git.busybox.net/buildroot > >$ cd buildroot > >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig > >$ make -C qemu_riscv32_virt_defconfig > >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig > >$ make -C qemu_riscv64_virt_defconfig > >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > > > - Prepare Linux rv32 & rv64 Image > >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v8 linux > >$ cd linux > >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig > >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ rv32_defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > > O=../build-rv32/ Image > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ defconfig > >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > > O=../build-rv64/ Image > > > > - Prepare Qemu: > >$ git clone https://gitlab.com/qemu-project/qemu.git -b master linux > >$ cd qemu > >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" > >$ make > > > > Now let's compare rv64-compat with rv32-native memory footprint with almost > > the same > > defconfig, rootfs, opensbi in one qemu. > > > > - Run rv64 with rv32 rootfs in compat mode: > >$ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios > > qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > > -drive file > > qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device > > virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > > virtio-net-device,netdev=net0 > > > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > > OpenSBI v0.9 > > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > > [0.00] Machine model: riscv-virtio,qemu > > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > > [0.00] printk: bootconsole [sbi0] enabled > > [0.00] efi: UEFI not found. > > [0.00] Zone ranges: > > [0.00] DMA32[mem 0x8020-0x83ff] > > [0.00] Normal empty > > [0.00] Movable zone start for each node > > [0.00] Early memory node ranges > > [0.00] node 0: [mem 0x8020-0x83ff] > > [0.00] Initmem setup node 0 [mem > > 0x8020-0x83ff] > > [0.00] SBI specification v0.2 detected > > [0.00] SBI implementation ID=0x1 Version=0x9 > > [0.00] SBI TIME extension detected > > [0.00] SBI IPI extension detected > > [0.00] SBI RFENCE extension detected > > [0.00] SBI v0.2 HSM extension detected > > [0.00] riscv: ISA extensions acdfhimsu > > [0.00] riscv: ELF capabilities acdfim > > [0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632 > > [0.00] Built 1 zonelists, mobility grouping on. Total pages: 15655 > > [0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 > > earlycon=sbi > > [0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 > > bytes, linear) > > [0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, > > linear) > > [0.00] mem auto-init: stack:off, heap alloc
Re: [PATCH V9 11/20] riscv: compat: syscall: Add compat_sys_call_table implementation
Hi Palmer & Arnd,
Fixup fadvise64_64 arguments problem.
On Tue, Mar 22, 2022 at 10:41 PM wrote:
>
> From: Guo Ren
>
> Implement compat sys_call_table and some system call functions:
> truncate64, ftruncate64, fallocate, pread64, pwrite64,
> sync_file_range, readahead, fadvise64_64 which need argument
> translation.
>
> Signed-off-by: Guo Ren
> Signed-off-by: Guo Ren
> Reviewed-by: Arnd Bergmann
> Tested-by: Heiko Stuebner
> Cc: Palmer Dabbelt
> ---
> arch/riscv/include/asm/syscall.h | 1 +
> arch/riscv/include/asm/unistd.h | 11 +++
> arch/riscv/include/uapi/asm/unistd.h | 2 +-
> arch/riscv/kernel/Makefile | 1 +
> arch/riscv/kernel/compat_syscall_table.c | 19
> arch/riscv/kernel/sys_riscv.c| 6 ++--
> fs/open.c| 24 +++
> fs/read_write.c | 16 ++
> fs/sync.c| 9 ++
> include/asm-generic/compat.h | 7 +
> include/linux/compat.h | 37
> mm/fadvise.c | 11 +++
> mm/readahead.c | 7 +
> 13 files changed, 148 insertions(+), 3 deletions(-)
> create mode 100644 arch/riscv/kernel/compat_syscall_table.c
>
> diff --git a/arch/riscv/include/asm/syscall.h
> b/arch/riscv/include/asm/syscall.h
> index 7ac6a0e275f2..384a63b86420 100644
> --- a/arch/riscv/include/asm/syscall.h
> +++ b/arch/riscv/include/asm/syscall.h
> @@ -16,6 +16,7 @@
>
> /* The array of function pointers for syscalls. */
> extern void * const sys_call_table[];
> +extern void * const compat_sys_call_table[];
>
> /*
> * Only the low 32 bits of orig_r0 are meaningful, so we return int.
> diff --git a/arch/riscv/include/asm/unistd.h b/arch/riscv/include/asm/unistd.h
> index 6c316093a1e5..5ddac412b578 100644
> --- a/arch/riscv/include/asm/unistd.h
> +++ b/arch/riscv/include/asm/unistd.h
> @@ -11,6 +11,17 @@
> #define __ARCH_WANT_SYS_CLONE
> #define __ARCH_WANT_MEMFD_SECRET
>
> +#ifdef CONFIG_COMPAT
> +#define __ARCH_WANT_COMPAT_TRUNCATE64
> +#define __ARCH_WANT_COMPAT_FTRUNCATE64
> +#define __ARCH_WANT_COMPAT_FALLOCATE
> +#define __ARCH_WANT_COMPAT_PREAD64
> +#define __ARCH_WANT_COMPAT_PWRITE64
> +#define __ARCH_WANT_COMPAT_SYNC_FILE_RANGE
> +#define __ARCH_WANT_COMPAT_READAHEAD
> +#define __ARCH_WANT_COMPAT_FADVISE64_64
> +#endif
> +
> #include
>
> #define NR_syscalls (__NR_syscalls)
> diff --git a/arch/riscv/include/uapi/asm/unistd.h
> b/arch/riscv/include/uapi/asm/unistd.h
> index 8062996c2dfd..c9e50eed14aa 100644
> --- a/arch/riscv/include/uapi/asm/unistd.h
> +++ b/arch/riscv/include/uapi/asm/unistd.h
> @@ -15,7 +15,7 @@
> * along with this program. If not, see <https://www.gnu.org/licenses/>.
> */
>
> -#ifdef __LP64__
> +#if defined(__LP64__) && !defined(__SYSCALL_COMPAT)
> #define __ARCH_WANT_NEW_STAT
> #define __ARCH_WANT_SET_GET_RLIMIT
> #endif /* __LP64__ */
> diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile
> index ffc87e76b1dd..3b3e425aadd2 100644
> --- a/arch/riscv/kernel/Makefile
> +++ b/arch/riscv/kernel/Makefile
> @@ -68,3 +68,4 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
> obj-$(CONFIG_JUMP_LABEL) += jump_label.o
>
> obj-$(CONFIG_EFI) += efi.o
> +obj-$(CONFIG_COMPAT) += compat_syscall_table.o
> diff --git a/arch/riscv/kernel/compat_syscall_table.c
> b/arch/riscv/kernel/compat_syscall_table.c
> new file mode 100644
> index ..651f2b009c28
> --- /dev/null
> +++ b/arch/riscv/kernel/compat_syscall_table.c
> @@ -0,0 +1,19 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +
> +#define __SYSCALL_COMPAT
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#undef __SYSCALL
> +#define __SYSCALL(nr, call) [nr] = (call),
> +
> +asmlinkage long compat_sys_rt_sigreturn(void);
> +
> +void * const compat_sys_call_table[__NR_syscalls] = {
> + [0 ... __NR_syscalls - 1] = sys_ni_syscall,
> +#include
> +};
> diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
> index 12f8a7fce78b..9c0194f176fc 100644
> --- a/arch/riscv/kernel/sys_riscv.c
> +++ b/arch/riscv/kernel/sys_riscv.c
> @@ -33,7 +33,9 @@ SYSCALL_DEFINE6(mmap, unsigned long, addr, unsigned long,
> len,
> {
> return riscv_sys_mmap(addr, len, prot, flags, fd, offset, 0);
> }
> -#else
> +#endif
> +
> +#if defined(CONFIG_32BIT) || defined(CONFIG_COMPAT)
> SYSCALL_DEFINE6(mmap2, unsigned long, addr, unsigned long, len,
> unsigned long, p
Re: [PATCH V8 10/20] riscv: compat: Re-implement TASK_SIZE for COMPAT_32BIT
For this patch, we need to add below to fixup the rv32 call rv64 elf segment fault. diff --git a/arch/riscv/include/asm/processor.h b/arch/riscv/include/asm/processor.h index 0749924d9e55..21c8072dce17 100644 --- a/arch/riscv/include/asm/processor.h +++ b/arch/riscv/include/asm/processor.h @@ -19,7 +19,11 @@ #define TASK_UNMAPPED_BASE PAGE_ALIGN(TASK_SIZE / 3) #define STACK_TOP TASK_SIZE -#define STACK_TOP_MAX STACK_TOP +#ifdef CONFIG_64BIT +#define STACK_TOP_MAX TASK_SIZE_64 +#else +#define STACK_TOP_MAX TASK_SIZE +#endif #define STACK_ALIGN16 #ifndef __ASSEMBLY__ On Wed, Mar 16, 2022 at 3:04 PM wrote: > > From: Guo Ren > > Make TASK_SIZE from const to dynamic detect TIF_32BIT flag > function. Refer to arm64 to implement DEFAULT_MAP_WINDOW_64 for > efi-stub. > > Limit 32-bit compatible process in 0-2GB virtual address range > (which is enough for real scenarios), because it could avoid > address sign extend problem when 32-bit enter 64-bit and ease > software design. > > The standard 32-bit TASK_SIZE is 0x9dc0:FIXADDR_START, and > compared to a compatible 32-bit, it increases 476MB for the > application's virtual address. > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Reviewed-by: Arnd Bergmann > Tested-by: Heiko Stuebner > --- > arch/riscv/include/asm/pgtable.h | 13 +++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/arch/riscv/include/asm/pgtable.h > b/arch/riscv/include/asm/pgtable.h > index e3549e50de95..afdc9ece2ba4 100644 > --- a/arch/riscv/include/asm/pgtable.h > +++ b/arch/riscv/include/asm/pgtable.h > @@ -705,8 +705,17 @@ static inline pmd_t pmdp_establish(struct vm_area_struct > *vma, > * 63–48 all equal to bit 47, or else a page-fault exception will occur." > */ > #ifdef CONFIG_64BIT > -#define TASK_SIZE (PGDIR_SIZE * PTRS_PER_PGD / 2) > -#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) > +#define TASK_SIZE_64 (PGDIR_SIZE * PTRS_PER_PGD / 2) > +#define TASK_SIZE_MIN (PGDIR_SIZE_L3 * PTRS_PER_PGD / 2) > + > +#ifdef CONFIG_COMPAT > +#define TASK_SIZE_32 (_AC(0x8000, UL) - PAGE_SIZE) > +#define TASK_SIZE (test_thread_flag(TIF_32BIT) ? \ > +TASK_SIZE_32 : TASK_SIZE_64) > +#else > +#define TASK_SIZE TASK_SIZE_64 > +#endif > + > #else > #define TASK_SIZE FIXADDR_START > #define TASK_SIZE_MIN TASK_SIZE > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 13/20] riscv: compat: process: Add UXL_32 support in start_thread
On Sat, Mar 12, 2022 at 4:36 PM Arnd Bergmann wrote:
>
> On Sat, Mar 12, 2022 at 3:13 AM Guo Ren wrote:
> > On Fri, Mar 11, 2022 at 9:38 PM Ben Dooks wrote:
> > > On 11/03/2022 02:38, Guo Ren wrote:
> > > >> --- a/arch/riscv/kernel/process.c
> > > >> +++ b/arch/riscv/kernel/process.c
> > > >> @@ -97,6 +97,11 @@ void start_thread(struct pt_regs *regs, unsigned
> > > >> long pc,
> > > >> }
> > > >> regs->epc = pc;
> > > >> regs->sp = sp;
> > > >> +
> > > > FIxup:
> > > >
> > > > + #ifdef CONFIG_COMPAT
> > > >> + if (is_compat_task())
> > > >> + regs->status = (regs->status & ~SR_UXL) | SR_UXL_32;
> > > >> + else
> > > >> + regs->status = (regs->status & ~SR_UXL) | SR_UXL_64;
> > > > + #endif
> > > >
> > > > We still need "#ifdef CONFIG_COMPAT" here, because for rv32 we can't
> > > > set SR_UXL at all. SR_UXL is BIT[32, 33].
> > >
> > > would an if (IS_ENABLED(CONFIG_COMPAT)) { } around the lot be better
> > > than an #ifdef here?
> >
> > I don't think, seems #ifdef CONFIG_COMPAT is more commonly used in arch/*
>
> We used to require an #ifdef check around is_compat_task(), so there are
> a lot of stale #ifdefs that could be removed. In general, 'if (IS_ENABLED())'
> is considered more readable than #ifdef inside of a function. In this case
> there are a number of better ways to write the function if you want to get
> into the details:
>
> - firstly, you should remove the #ifdef check around the definition of
>SR_UXL, otherwise the IS_ENABLED() check does not work.
>
> - you can use an 'if (!IS_ENABLED(CONFIG_COMPAT)) \\ return;' ahead of the
>assignment since that is at the end of the function.
>
> - you can remove the bit masking since 'regs->status' is initialized above
> it,
>adding in only the one bit, shortening it to
>
> if (IS_ENABLED(CONFIG_COMPAT))
>regs->status |= is_compat_task()) ? SR_UXL_32 : SR_UXL_64;
>
> - to make this more logical, I would suggest always assigning the SR_UXL
>bits regardless of CONFIG_COMPAT, and instead make it something like
>
> if (IS_ENABLED(CONFIG_32BIT) || is_compat_task())
> regs->status = | SR_UXL_32;
> else
> regs->status = | SR_UXL_64;
When CONFIG_32BIT=y, regs->status is 32bit width but SR_UXL_32 is
34bit width. That's wrong in type. (Only CONFIG_64BIT has SR_UXL).
>
>Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 13/20] riscv: compat: process: Add UXL_32 support in start_thread
On Fri, Mar 11, 2022 at 9:38 PM Ben Dooks wrote:
>
> On 11/03/2022 02:38, Guo Ren wrote:
> > Hi Arnd,
> >
> > On Mon, Feb 28, 2022 at 12:30 AM wrote:
> >>
> >> From: Guo Ren
> >>
> >> If the current task is in COMPAT mode, set SR_UXL_32 in status for
> >> returning userspace. We need CONFIG _COMPAT to prevent compiling
> >> errors with rv32 defconfig.
> >>
> >> Signed-off-by: Guo Ren
> >> Signed-off-by: Guo Ren
> >> Cc: Arnd Bergmann
> >> Cc: Palmer Dabbelt
> >> ---
> >> arch/riscv/kernel/process.c | 5 +
> >> 1 file changed, 5 insertions(+)
> >>
> >> diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> >> index 03ac3aa611f5..54787ca9806a 100644
> >> --- a/arch/riscv/kernel/process.c
> >> +++ b/arch/riscv/kernel/process.c
> >> @@ -97,6 +97,11 @@ void start_thread(struct pt_regs *regs, unsigned long
> >> pc,
> >> }
> >> regs->epc = pc;
> >> regs->sp = sp;
> >> +
> > FIxup:
> >
> > + #ifdef CONFIG_COMPAT
> >> + if (is_compat_task())
> >> + regs->status = (regs->status & ~SR_UXL) | SR_UXL_32;
> >> + else
> >> + regs->status = (regs->status & ~SR_UXL) | SR_UXL_64;
> > + #endif
> >
> > We still need "#ifdef CONFIG_COMPAT" here, because for rv32 we can't
> > set SR_UXL at all. SR_UXL is BIT[32, 33].
>
> would an if (IS_ENABLED(CONFIG_COMPAT)) { } around the lot be better
> than an #ifdef here?
I don't think, seems #ifdef CONFIG_COMPAT is more commonly used in arch/*
>
> >> }
> >>
> >> void flush_thread(void)
> >> --
> >> 2.25.1
> >>
> >
> >
>
>
> --
> Ben Dooks http://www.codethink.co.uk/
> Senior Engineer Codethink - Providing Genius
>
> https://www.codethink.co.uk/privacy.html
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 13/20] riscv: compat: process: Add UXL_32 support in start_thread
Hi Arnd, On Mon, Feb 28, 2022 at 12:30 AM wrote: > > From: Guo Ren > > If the current task is in COMPAT mode, set SR_UXL_32 in status for > returning userspace. We need CONFIG _COMPAT to prevent compiling > errors with rv32 defconfig. > > Signed-off-by: Guo Ren > Signed-off-by: Guo Ren > Cc: Arnd Bergmann > Cc: Palmer Dabbelt > --- > arch/riscv/kernel/process.c | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > index 03ac3aa611f5..54787ca9806a 100644 > --- a/arch/riscv/kernel/process.c > +++ b/arch/riscv/kernel/process.c > @@ -97,6 +97,11 @@ void start_thread(struct pt_regs *regs, unsigned long pc, > } > regs->epc = pc; > regs->sp = sp; > + FIxup: + #ifdef CONFIG_COMPAT > + if (is_compat_task()) > + regs->status = (regs->status & ~SR_UXL) | SR_UXL_32; > + else > + regs->status = (regs->status & ~SR_UXL) | SR_UXL_64; + #endif We still need "#ifdef CONFIG_COMPAT" here, because for rv32 we can't set SR_UXL at all. SR_UXL is BIT[32, 33]. > } > > void flush_thread(void) > -- > 2.25.1 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 14/20] riscv: compat: Add elf.h implementation
Hi Palmer & Arnd
Seems we need a more strict check to distinguish ELFCLASS32/64 RISC in
elf for the elf_check_arch & compat_elf_check_arch. SET_PERSONALITY is
not enough.
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index d87d3bcc758d..2fcd854fb516 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -33,7 +33,8 @@
/*
* This is used to ensure we don't load something for the wrong architecture.
*/
-#define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#define elf_check_arch(x) (((x)->e_machine == EM_RISCV) && \
+ ((x)->e_ident[EI_CLASS] == ELF_CLASS))
/*
* Use the same code with elf_check_arch, because elf32_hdr &
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 8caa5f48d0a1..f46016e96235 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -88,7 +88,9 @@ static bool compat_mode_supported __read_mostly;
bool compat_elf_check_arch(Elf32_Ehdr *hdr)
{
- return compat_mode_supported && hdr->e_machine == EM_RISCV;
+ return compat_mode_supported &&
+ hdr->e_machine == EM_RISCV &&
+ hdr->e_ident[EI_CLASS] == ELFCLASS32;
}
static int __init compat_mode_detect(void)
On Mon, Feb 28, 2022 at 12:30 AM wrote:
>
> From: Guo Ren
>
> Implement necessary type and macro for compat elf. See the code
> comment for detail.
>
> Signed-off-by: Guo Ren
> Signed-off-by: Guo Ren
> Reviewed-by: Arnd Bergmann
> ---
> arch/riscv/include/asm/elf.h | 46 +++-
> 1 file changed, 45 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> index f53c40026c7a..aee40040917b 100644
> --- a/arch/riscv/include/asm/elf.h
> +++ b/arch/riscv/include/asm/elf.h
> @@ -8,6 +8,8 @@
> #ifndef _ASM_RISCV_ELF_H
> #define _ASM_RISCV_ELF_H
>
> +#include
> +#include
> #include
> #include
> #include
> @@ -18,11 +20,13 @@
> */
> #define ELF_ARCH EM_RISCV
>
> +#ifndef ELF_CLASS
> #ifdef CONFIG_64BIT
> #define ELF_CLASS ELFCLASS64
> #else
> #define ELF_CLASS ELFCLASS32
> #endif
> +#endif
>
> #define ELF_DATA ELFDATA2LSB
>
> @@ -31,6 +35,13 @@
> */
> #define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
>
> +/*
> + * Use the same code with elf_check_arch, because elf32_hdr &
> + * elf64_hdr e_machine's offset are different. The checker is
> + * a little bit simple compare to other architectures.
> + */
> +#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
> +
> #define CORE_DUMP_USE_REGSET
> #define ELF_EXEC_PAGESIZE (PAGE_SIZE)
>
> @@ -43,8 +54,14 @@
> #define ELF_ET_DYN_BASE((TASK_SIZE / 3) * 2)
>
> #ifdef CONFIG_64BIT
> +#ifdef CONFIG_COMPAT
> +#define STACK_RND_MASK (test_thread_flag(TIF_32BIT) ? \
> +0x7ff >> (PAGE_SHIFT - 12) : \
> +0x3 >> (PAGE_SHIFT - 12))
> +#else
> #define STACK_RND_MASK (0x3 >> (PAGE_SHIFT - 12))
> #endif
> +#endif
> /*
> * This yields a mask that user programs can use to figure out what
> * instruction set this CPU supports. This could be done in user space,
> @@ -60,11 +77,19 @@ extern unsigned long elf_hwcap;
> */
> #define ELF_PLATFORM (NULL)
>
> +#define COMPAT_ELF_PLATFORM(NULL)
> +
> #ifdef CONFIG_MMU
> #define ARCH_DLINFO\
> do { \
> + /* \
> +* Note that we add ulong after elf_addr_t because \
> +* casting current->mm->context.vdso triggers a cast\
> +* warning of cast from pointer to integer for \
> +* COMPAT ELFCLASS32. \
> +*/ \
> NEW_AUX_ENT(AT_SYSINFO_EHDR,\
> - (elf_addr_t)current->mm->context.vdso); \
> + (elf_addr_t)(ulong)current->mm->context.vdso); \
> NEW_AUX_ENT(AT_L1I_CACHESIZE, \
> get_cache_size(1, CACHE_TYPE_INST));\
> NEW_AUX_ENT(AT_L1I_CACHEGEOMETRY, \
> @@ -90,4 +115,23 @@ do {
> \
> *(struct user_regs_struct *)regs; \
> } while (0);
>
> +#ifdef CONFIG_COMPAT
> +
> +#define SET_PERSONALITY(ex)
Re: [PATCH V3 19/30] csky/mm: Enable ARCH_HAS_VM_GET_PAGE_PROT
Acked-by: Guo Ren
On Mon, Feb 28, 2022 at 7:10 PM Anshuman Khandual
wrote:
>
> This defines and exports a platform specific custom vm_get_page_prot() via
> subscribing ARCH_HAS_VM_GET_PAGE_PROT. Subsequently all __SXXX and __PXXX
> macros can be dropped which are no longer needed.
>
> Cc: Geert Uytterhoeven
> Cc: linux-c...@vger.kernel.org
> Cc: linux-ker...@vger.kernel.org
> Signed-off-by: Anshuman Khandual
> ---
> arch/csky/Kconfig | 1 +
> arch/csky/include/asm/pgtable.h | 18 --
> arch/csky/mm/init.c | 32
> 3 files changed, 33 insertions(+), 18 deletions(-)
>
> diff --git a/arch/csky/Kconfig b/arch/csky/Kconfig
> index 132f43f12dd8..209dac5686dd 100644
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -6,6 +6,7 @@ config CSKY
> select ARCH_HAS_GCOV_PROFILE_ALL
> select ARCH_HAS_SYNC_DMA_FOR_CPU
> select ARCH_HAS_SYNC_DMA_FOR_DEVICE
> + select ARCH_HAS_VM_GET_PAGE_PROT
> select ARCH_USE_BUILTIN_BSWAP
> select ARCH_USE_QUEUED_RWLOCKS
> select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 &&
> $(cc-option,-mbacktrace)
> diff --git a/arch/csky/include/asm/pgtable.h b/arch/csky/include/asm/pgtable.h
> index 151607ed5158..2c6b1cfb1cce 100644
> --- a/arch/csky/include/asm/pgtable.h
> +++ b/arch/csky/include/asm/pgtable.h
> @@ -76,24 +76,6 @@
> #define MAX_SWAPFILES_CHECK() \
> BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
>
> -#define __P000 PAGE_NONE
> -#define __P001 PAGE_READ
> -#define __P010 PAGE_READ
> -#define __P011 PAGE_READ
> -#define __P100 PAGE_READ
> -#define __P101 PAGE_READ
> -#define __P110 PAGE_READ
> -#define __P111 PAGE_READ
> -
> -#define __S000 PAGE_NONE
> -#define __S001 PAGE_READ
> -#define __S010 PAGE_WRITE
> -#define __S011 PAGE_WRITE
> -#define __S100 PAGE_READ
> -#define __S101 PAGE_READ
> -#define __S110 PAGE_WRITE
> -#define __S111 PAGE_WRITE
> -
> extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
> #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
>
> diff --git a/arch/csky/mm/init.c b/arch/csky/mm/init.c
> index bf2004aa811a..f9babbed17d4 100644
> --- a/arch/csky/mm/init.c
> +++ b/arch/csky/mm/init.c
> @@ -197,3 +197,35 @@ void __init fixaddr_init(void)
> vaddr = __fix_to_virt(__end_of_fixed_addresses - 1) & PMD_MASK;
> fixrange_init(vaddr, vaddr + PMD_SIZE, swapper_pg_dir);
> }
> +
> +pgprot_t vm_get_page_prot(unsigned long vm_flags)
> +{
> + switch (vm_flags & (VM_READ | VM_WRITE | VM_EXEC | VM_SHARED)) {
> + case VM_NONE:
> + return PAGE_NONE;
> + case VM_READ:
> + case VM_WRITE:
> + case VM_WRITE | VM_READ:
> + case VM_EXEC:
> + case VM_EXEC | VM_READ:
> + case VM_EXEC | VM_WRITE:
> + case VM_EXEC | VM_WRITE | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED:
> + return PAGE_NONE;
> + case VM_SHARED | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED | VM_WRITE:
> + case VM_SHARED | VM_WRITE | VM_READ:
> + return PAGE_WRITE;
> + case VM_SHARED | VM_EXEC:
> + case VM_SHARED | VM_EXEC | VM_READ:
> + return PAGE_READ;
> + case VM_SHARED | VM_EXEC | VM_WRITE:
> + case VM_SHARED | VM_EXEC | VM_WRITE | VM_READ:
> + return PAGE_WRITE;
> + default:
> + BUILD_BUG();
> + }
> +}
> +EXPORT_SYMBOL(vm_get_page_prot);
> --
> 2.25.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 03/20] compat: consolidate the compat_flock{, 64} definition
On Mon, Feb 28, 2022 at 8:02 PM David Laight wrote:
>
> From: Guo Ren
> > Sent: 28 February 2022 11:52
> >
> > On Mon, Feb 28, 2022 at 2:40 PM David Laight
> > wrote:
> > >
> > > From: guo...@kernel.org
> > > > Sent: 27 February 2022 16:28
> > > >
> > > > From: Christoph Hellwig
> > > >
> > > > Provide a single common definition for the compat_flock and
> > > > compat_flock64 structures using the same tricks as for the native
> > > > variants. Another extra define is added for the packing required on
> > > > x86.
> > > ...
> > > > diff --git a/arch/x86/include/asm/compat.h
> > > > b/arch/x86/include/asm/compat.h
> > > ...
> > > > /*
> > > > - * IA32 uses 4 byte alignment for 64 bit quantities,
> > > > - * so we need to pack this structure.
> > > > + * IA32 uses 4 byte alignment for 64 bit quantities, so we need to
> > > > pack the
> > > > + * compat flock64 structure.
> > > > */
> > > ...
> > > > +#define __ARCH_NEED_COMPAT_FLOCK64_PACKED
> > > >
> > > > struct compat_statfs {
> > > > int f_type;
> > > > diff --git a/include/linux/compat.h b/include/linux/compat.h
> > > > index 1c758b0e0359..a0481fe6c5d5 100644
> > > > --- a/include/linux/compat.h
> > > > +++ b/include/linux/compat.h
> > > > @@ -258,6 +258,37 @@ struct compat_rlimit {
> > > > compat_ulong_t rlim_max;
> > > > };
> > > >
> > > > +#ifdef __ARCH_NEED_COMPAT_FLOCK64_PACKED
> > > > +#define __ARCH_COMPAT_FLOCK64_PACK __attribute__((packed))
> > > > +#else
> > > > +#define __ARCH_COMPAT_FLOCK64_PACK
> > > > +#endif
> > > ...
> > > > +struct compat_flock64 {
> > > > + short l_type;
> > > > + short l_whence;
> > > > + compat_loff_t l_start;
> > > > + compat_loff_t l_len;
> > > > + compat_pid_tl_pid;
> > > > +#ifdef __ARCH_COMPAT_FLOCK64_PAD
> > > > + __ARCH_COMPAT_FLOCK64_PAD
> > > > +#endif
> > > > +} __ARCH_COMPAT_FLOCK64_PACK;
> > > > +
> > >
> > > Provided compat_loff_t are correctly defined with __aligned__(4)
> > See include/asm-generic/compat.h
> >
> > typedef s64 compat_loff_t;
> >
> > Only:
> > #ifdef CONFIG_COMPAT_FOR_U64_ALIGNMENT
> > typedef s64 __attribute__((aligned(4))) compat_s64;
> >
> > So how do you think compat_loff_t could be defined with __aligned__(4)?
>
> compat_loff_t should be compat_s64 not s64.
>
> The same should be done for all 64bit 'compat' types.
Changing
typedef s64 compat_loff_t;
to
typedef compat_s64 compat_loff_t;
should be another patch and it affects all architectures, I don't
think we should involve it in this series.
look at kernel/power/user.c:
struct compat_resume_swap_area {
compat_loff_t offset;
u32 dev;
} __packed;
I thnk keep "typedef s64 compat_loff_t;" is a sensible choice for
COMPAT support patchset series.
>
> David
>
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1
> 1PT, UK
> Registration No: 1397386 (Wales)
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V7 03/20] compat: consolidate the compat_flock{, 64} definition
On Mon, Feb 28, 2022 at 2:40 PM David Laight wrote:
>
> From: guo...@kernel.org
> > Sent: 27 February 2022 16:28
> >
> > From: Christoph Hellwig
> >
> > Provide a single common definition for the compat_flock and
> > compat_flock64 structures using the same tricks as for the native
> > variants. Another extra define is added for the packing required on
> > x86.
> ...
> > diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
> ...
> > /*
> > - * IA32 uses 4 byte alignment for 64 bit quantities,
> > - * so we need to pack this structure.
> > + * IA32 uses 4 byte alignment for 64 bit quantities, so we need to pack the
> > + * compat flock64 structure.
> > */
> ...
> > +#define __ARCH_NEED_COMPAT_FLOCK64_PACKED
> >
> > struct compat_statfs {
> > int f_type;
> > diff --git a/include/linux/compat.h b/include/linux/compat.h
> > index 1c758b0e0359..a0481fe6c5d5 100644
> > --- a/include/linux/compat.h
> > +++ b/include/linux/compat.h
> > @@ -258,6 +258,37 @@ struct compat_rlimit {
> > compat_ulong_t rlim_max;
> > };
> >
> > +#ifdef __ARCH_NEED_COMPAT_FLOCK64_PACKED
> > +#define __ARCH_COMPAT_FLOCK64_PACK __attribute__((packed))
> > +#else
> > +#define __ARCH_COMPAT_FLOCK64_PACK
> > +#endif
> ...
> > +struct compat_flock64 {
> > + short l_type;
> > + short l_whence;
> > + compat_loff_t l_start;
> > + compat_loff_t l_len;
> > + compat_pid_tl_pid;
> > +#ifdef __ARCH_COMPAT_FLOCK64_PAD
> > + __ARCH_COMPAT_FLOCK64_PAD
> > +#endif
> > +} __ARCH_COMPAT_FLOCK64_PACK;
> > +
>
> Provided compat_loff_t are correctly defined with __aligned__(4)
See include/asm-generic/compat.h
typedef s64 compat_loff_t;
Only:
#ifdef CONFIG_COMPAT_FOR_U64_ALIGNMENT
typedef s64 __attribute__((aligned(4))) compat_s64;
So how do you think compat_loff_t could be defined with __aligned__(4)?
> marking the structure packed isn't needed.
> I believe compat_u64 and compat_s64 both have aligned(4).
> It is also wrong, consider:
>
> struct foo {
> char x;
> struct compat_flock64 fl64;
> };
>
> There should be 3 bytes of padding after 'x'.
> But you've removed it.
>
> David
>
> -
> Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1
> 1PT, UK
> Registration No: 1397386 (Wales)
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V6 16/20] riscv: compat: vdso: Add rv32 VDSO base code implementation
On Fri, Feb 25, 2022 at 11:50 PM Arnd Bergmann wrote: > > On Fri, Feb 25, 2022 at 4:42 PM Guo Ren wrote: > > > > Hi Arnd & Palmer, > > > > Here is the new modified compat_vdso/Makefile, please have a look, > > first. Then I would update it to v7: > > === > > # SPDX-License-Identifier: GPL-2.0-only > > # > > # Makefile for compat_vdso > > # > > > > # Symbols present in the compat_vdso > > compat_vdso-syms = rt_sigreturn > > compat_vdso-syms += getcpu > > compat_vdso-syms += flush_icache > > > > ifdef CROSS_COMPILE_COMPAT > > COMPAT_CC := $(CROSS_COMPILE_COMPAT)gcc > > COMPAT_LD := $(CROSS_COMPILE_COMPAT)ld > > else > > COMPAT_CC := $(CC) > > COMPAT_LD := $(LD) > > endif > > > > COMPAT_CC_FLAGS := -march=rv32g -mabi=ilp32 > > COMPAT_LD_FLAGS := -melf32lriscv > > Have you come across a case in which a separate cross toolchain > is required? If not, I would leave this out and just set the flags for the > normal toolchain. Okay > > I also think it would be a nicer split to build the two vdso variants > as vdso64/vdso32 rather than vdso/compat_vdso. That way, > the build procedure can be kept as close as possible to the > native 32-bit build. Yes, current native 32-bit vdso & 64-bit vdso use the same vdso/Makfile. So, I think it could be another patch for this cleanup. > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V6 16/20] riscv: compat: vdso: Add rv32 VDSO base code implementation
ren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso -I ./arch/riscv/kernel/compat_vdso-march=rv32g -mabi=ilp3 2 -c -o arch/riscv/kernel/compat_vdso/rt_sigreturn.o /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso/rt_sigreturn.S riscv64-unknown-linux-gnu-gcc -Wp,-MMD,arch/riscv/kernel/compat_vdso/.getcpu.o.d -nostdinc -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include -I./arch/riscv/include/generated -I/home/guoren/source/kernel/riscv-linux/include -I./include -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include/uapi -I./arch/riscv/include/generated/uapi -I/home/guoren/source/kernel/riscv-linux/include/uapi -I./include/generate d/uapi -include /home/guoren/source/kernel/riscv-linux/include/linux/compiler-version.h -include /home/guoren/source/kernel/riscv-linux/include/linux/kconfig.h -D__KERNEL__ -fmacro-prefix-map=/home/guoren/source/kernel/riscv-linux/= -D__ASSEMBLY__ -fno-PIE -mabi=lp64 -march=rv64imafdc -I /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso -I ./arch/riscv/kernel/compat_vdso-march=rv32g -mabi=ilp32 -c - o arch/riscv/kernel/compat_vdso/getcpu.o /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso/getcpu.S riscv64-unknown-linux-gnu-gcc -Wp,-MMD,arch/riscv/kernel/compat_vdso/.flush_icache.o.d -nostdinc -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include -I./arch/riscv/include/generated -I/home/guoren/source/kernel/riscv-linux/include -I./include -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include/uapi -I./arch/riscv/include/generated/uapi -I/home/guoren/source/kernel/riscv-linux/include/uapi -I./include/ge nerated/uapi -include /home/guoren/source/kernel/riscv-linux/include/linux/compiler-version.h -include /home/guoren/source/kernel/riscv-linux/include/linux/kconfig.h -D__KERNEL__ -fmacro-prefix-map=/home/guoren/source/kernel/riscv-linux/= -D__ASSEMBLY__ -fno-PIE -mabi=lp64 -march=rv64imafdc -I /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso -I ./arch/riscv/kernel/compat_vdso-march=rv32g -mabi=ilp3 2 -c -o arch/riscv/kernel/compat_vdso/flush_icache.o /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso/flush_icache.S riscv64-unknown-linux-gnu-gcc -Wp,-MMD,arch/riscv/kernel/compat_vdso/.note.o.d -nostdinc -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include -I./arch/riscv/include/generated -I/home/guoren/source/kernel/riscv-linux/include -I./include -I/home/guoren/source/kernel/riscv-linux/arch/riscv/include/uapi -I./arch/riscv/include/generated/uapi -I/home/guoren/source/kernel/riscv-linux/include/uapi -I./include/generated/ uapi -include /home/guoren/source/kernel/riscv-linux/include/linux/compiler-version.h -include /home/guoren/source/kernel/riscv-linux/include/linux/kconfig.h -D__KERNEL__ -fmacro-prefix-map=/home/guoren/source/kernel/riscv-linux/= -D__ASSEMBLY__ -fno-PIE -mabi=lp64 -march=rv64imafdc -I /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso -I ./arch/riscv/kernel/compat_vdso-march=rv32g -mabi=ilp32 -c -o arch/riscv/kernel/compat_vdso/note.o /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso/note.S riscv64-unknown-linux-gnu-ld -melf64lriscv -shared -S -soname=linux-compat_vdso.so.1 --build-id=sha1 --hash-style=both --eh-frame-hdr -melf32lriscv -T arch/riscv/kernel/compat_vdso/compat_vdso.lds arch/riscv/kernel/compat_vdso/rt_sigreturn.o arch/riscv/kernel/compat_vdso/getcpu.o arch/riscv/kernel/compat_vdso/flush_icache.o arch/riscv/kernel/compat_vdso/note.o -o arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg.tmp & & riscv64-unknown-linux-gnu-objcopy -G __compat_vdso_rt_sigreturn -G __compat_vdso_getcpu -G __compat_vdso_flush_icache arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg.tmp arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg && rm arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg.tmp riscv64-unknown-linux-gnu-nm arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg | /home/guoren/source/kernel/riscv-linux/arch/riscv/kernel/compat_vdso/gen_compat_vdso_offsets.sh | LC_ALL=C sort > include/generated/compat_vdso-offsets.h On Thu, Feb 24, 2022 at 6:13 PM Arnd Bergmann wrote: > > On Thu, Feb 24, 2022 at 9:54 AM wrote: > > > > From: Guo Ren > > > > There is no vgettimeofday supported in rv32 that makes simple to > > generate rv32 vdso code which only needs riscv64 compiler. Other > > architectures need change compiler or -m (machine parameter) to > > support vdso32 compiling. If rv32 support vgettimeofday (which > > cause C compile) in future, we would add CROSS_COMPILE to support > > that makes more requirement on compiler enviornment. > > I think it's just a bug that rv32 doesn't have the vdso version of the > time syscalls. Fixing that is of course independent of the compat support, > but I think you need that anyway, and it would be better to start > out by building the compa
Re: [PATCH V6 17/20] riscv: compat: vdso: Add setup additional pages implementation
On Fri, Feb 25, 2022 at 1:57 AM Palmer Dabbelt wrote:
>
> On Thu, 24 Feb 2022 00:54:07 PST (-0800), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Reconstruct __setup_additional_pages() by appending vdso info
> > pointer argument to meet compat_vdso_info requirement. And change
> > vm_special_mapping *dm, *cm initialization into static.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Reviewed-by: Palmer Dabbelt
> > Cc: Arnd Bergmann
> > ---
> > arch/riscv/include/asm/elf.h | 5 ++
> > arch/riscv/include/asm/mmu.h | 1 +
> > arch/riscv/kernel/vdso.c | 103 +++
> > 3 files changed, 74 insertions(+), 35 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> > index 3a4293dc7229..d87d3bcc758d 100644
> > --- a/arch/riscv/include/asm/elf.h
> > +++ b/arch/riscv/include/asm/elf.h
> > @@ -134,5 +134,10 @@ do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32)
> > \
> > typedef compat_ulong_t compat_elf_greg_t;
> > typedef compat_elf_greg_tcompat_elf_gregset_t[ELF_NGREG];
> >
> > +extern int compat_arch_setup_additional_pages(struct linux_binprm *bprm,
> > + int uses_interp);
> > +#define compat_arch_setup_additional_pages \
> > + compat_arch_setup_additional_pages
> > +
> > #endif /* CONFIG_COMPAT */
> > #endif /* _ASM_RISCV_ELF_H */
> > diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h
> > index 0099dc116168..cedcf8ea3c76 100644
> > --- a/arch/riscv/include/asm/mmu.h
> > +++ b/arch/riscv/include/asm/mmu.h
> > @@ -16,6 +16,7 @@ typedef struct {
> > atomic_long_t id;
> > #endif
> > void *vdso;
> > + void *vdso_info;
> > #ifdef CONFIG_SMP
> > /* A local icache flush is needed before user execution can resume. */
> > cpumask_t icache_stale_mask;
> > diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c
> > index a9436a65161a..f864811aa011 100644
> > --- a/arch/riscv/kernel/vdso.c
> > +++ b/arch/riscv/kernel/vdso.c
> > @@ -23,6 +23,9 @@ struct vdso_data {
> > #endif
> >
> > extern char vdso_start[], vdso_end[];
> > +#ifdef CONFIG_COMPAT
> > +extern char compat_vdso_start[], compat_vdso_end[];
> > +#endif
> >
> > enum vvar_pages {
> > VVAR_DATA_PAGE_OFFSET,
> > @@ -30,6 +33,11 @@ enum vvar_pages {
> > VVAR_NR_PAGES,
> > };
> >
> > +enum rv_vdso_map {
> > + RV_VDSO_MAP_VVAR,
> > + RV_VDSO_MAP_VDSO,
> > +};
> > +
> > #define VVAR_SIZE (VVAR_NR_PAGES << PAGE_SHIFT)
> >
> > /*
> > @@ -52,12 +60,6 @@ struct __vdso_info {
> > struct vm_special_mapping *cm;
> > };
> >
> > -static struct __vdso_info vdso_info __ro_after_init = {
> > - .name = "vdso",
> > - .vdso_code_start = vdso_start,
> > - .vdso_code_end = vdso_end,
> > -};
> > -
> > static int vdso_mremap(const struct vm_special_mapping *sm,
> > struct vm_area_struct *new_vma)
> > {
> > @@ -66,37 +68,33 @@ static int vdso_mremap(const struct vm_special_mapping
> > *sm,
> > return 0;
> > }
> >
> > -static int __init __vdso_init(void)
> > +static void __init __vdso_init(struct __vdso_info *vdso_info)
> > {
> > unsigned int i;
> > struct page **vdso_pagelist;
> > unsigned long pfn;
> >
> > - if (memcmp(vdso_info.vdso_code_start, "\177ELF", 4)) {
> > - pr_err("vDSO is not a valid ELF object!\n");
> > - return -EINVAL;
> > - }
> > + if (memcmp(vdso_info->vdso_code_start, "\177ELF", 4))
> > + panic("vDSO is not a valid ELF object!\n");
> >
> > - vdso_info.vdso_pages = (
> > - vdso_info.vdso_code_end -
> > - vdso_info.vdso_code_start) >>
> > + vdso_info->vdso_pages = (
> > + vdso_info->vdso_code_end -
> > + vdso_info->vdso_code_start) >>
> > PAGE_SHIFT;
> >
> > - vdso_pagelist = kcalloc(vdso_info.vdso_pages,
> > + vdso_pagelist = kcalloc(vdso_info->vdso_pages,
> > sizeof(struct page *),
> > GFP_KERNEL);
> > if (vdso_pagelist == NULL)
>
Re: [PATCH V6 11/20] riscv: compat: syscall: Add compat_sys_call_table implementation
On Thu, Feb 24, 2022 at 5:38 PM Arnd Bergmann wrote: > > On Thu, Feb 24, 2022 at 9:54 AM wrote: > > > > From: Guo Ren > > > > Implement compat sys_call_table and some system call functions: > > truncate64, ftruncate64, fallocate, pread64, pwrite64, > > sync_file_range, readahead, fadvise64_64 which need argument > > translation. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > Cc: Palmer Dabbelt > > Here, I was hoping you'd convert some of the other architectures to use > the same code, but the changes you did do look correct. > > Please at least add the missing bit for big-endian architectures here: > > +#if !defined(compat_arg_u64) && !defined(CONFIG_CPU_BIG_ENDIAN) > +#define compat_arg_u64(name) u32 name##_lo, u32 name##_hi > +#define compat_arg_u64_dual(name) u32, name##_lo, u32, name##_hi > +#define compat_arg_u64_glue(name) (((u64)name##_hi << 32) | \ > +((u64)name##_lo & 0xUL)) > +#endif > > with the lo/hi words swapped. With that change: Got it, I would change it in next version of patch. > > Reviewed-by: Arnd Bergmann -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V5 17/21] riscv: compat: vdso: Add setup additional pages implementation
On Wed, Feb 23, 2022 at 9:42 AM Palmer Dabbelt wrote:
>
> On Tue, 01 Feb 2022 07:05:41 PST (-0800), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Reconstruct __setup_additional_pages() by appending vdso info
> > pointer argument to meet compat_vdso_info requirement. And change
> > vm_special_mapping *dm, *cm initialization into static.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
> > Cc: Palmer Dabbelt
> > ---
> > arch/riscv/include/asm/elf.h | 5 ++
> > arch/riscv/include/asm/mmu.h | 1 +
> > arch/riscv/kernel/vdso.c | 104 +--
> > 3 files changed, 81 insertions(+), 29 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> > index 3a4293dc7229..d87d3bcc758d 100644
> > --- a/arch/riscv/include/asm/elf.h
> > +++ b/arch/riscv/include/asm/elf.h
> > @@ -134,5 +134,10 @@ do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32)
> > \
> > typedef compat_ulong_t compat_elf_greg_t;
> > typedef compat_elf_greg_tcompat_elf_gregset_t[ELF_NGREG];
> >
> > +extern int compat_arch_setup_additional_pages(struct linux_binprm *bprm,
> > + int uses_interp);
> > +#define compat_arch_setup_additional_pages \
> > + compat_arch_setup_additional_pages
> > +
> > #endif /* CONFIG_COMPAT */
> > #endif /* _ASM_RISCV_ELF_H */
> > diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h
> > index 0099dc116168..cedcf8ea3c76 100644
> > --- a/arch/riscv/include/asm/mmu.h
> > +++ b/arch/riscv/include/asm/mmu.h
> > @@ -16,6 +16,7 @@ typedef struct {
> > atomic_long_t id;
> > #endif
> > void *vdso;
> > + void *vdso_info;
> > #ifdef CONFIG_SMP
> > /* A local icache flush is needed before user execution can resume. */
> > cpumask_t icache_stale_mask;
> > diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c
> > index a9436a65161a..deca69524799 100644
> > --- a/arch/riscv/kernel/vdso.c
> > +++ b/arch/riscv/kernel/vdso.c
> > @@ -23,6 +23,9 @@ struct vdso_data {
> > #endif
> >
> > extern char vdso_start[], vdso_end[];
> > +#ifdef CONFIG_COMPAT
> > +extern char compat_vdso_start[], compat_vdso_end[];
> > +#endif
> >
> > enum vvar_pages {
> > VVAR_DATA_PAGE_OFFSET,
> > @@ -30,6 +33,11 @@ enum vvar_pages {
> > VVAR_NR_PAGES,
> > };
> >
> > +enum rv_vdso_map {
> > + RV_VDSO_MAP_VVAR,
> > + RV_VDSO_MAP_VDSO,
> > +};
> > +
> > #define VVAR_SIZE (VVAR_NR_PAGES << PAGE_SHIFT)
> >
> > /*
> > @@ -52,12 +60,6 @@ struct __vdso_info {
> > struct vm_special_mapping *cm;
> > };
> >
> > -static struct __vdso_info vdso_info __ro_after_init = {
> > - .name = "vdso",
> > - .vdso_code_start = vdso_start,
> > - .vdso_code_end = vdso_end,
> > -};
> > -
> > static int vdso_mremap(const struct vm_special_mapping *sm,
> > struct vm_area_struct *new_vma)
> > {
> > @@ -66,35 +68,35 @@ static int vdso_mremap(const struct vm_special_mapping
> > *sm,
> > return 0;
> > }
> >
> > -static int __init __vdso_init(void)
> > +static int __init __vdso_init(struct __vdso_info *vdso_info)
> > {
> > unsigned int i;
> > struct page **vdso_pagelist;
> > unsigned long pfn;
> >
> > - if (memcmp(vdso_info.vdso_code_start, "\177ELF", 4)) {
> > + if (memcmp(vdso_info->vdso_code_start, "\177ELF", 4)) {
> > pr_err("vDSO is not a valid ELF object!\n");
> > return -EINVAL;
> > }
> >
> > - vdso_info.vdso_pages = (
> > - vdso_info.vdso_code_end -
> > - vdso_info.vdso_code_start) >>
> > + vdso_info->vdso_pages = (
> > + vdso_info->vdso_code_end -
> > + vdso_info->vdso_code_start) >>
> > PAGE_SHIFT;
> >
> > - vdso_pagelist = kcalloc(vdso_info.vdso_pages,
> > + vdso_pagelist = kcalloc(vdso_info->vdso_pages,
> > sizeof(struct page *),
> > GFP_KERNEL);
> > if (vdso_pagelist == NULL)
> > return -ENOMEM;
> >
> > /* Grab the vDSO code pages. */
>
Re: [PATCH V5 17/21] riscv: compat: vdso: Add setup additional pages implementation
On Wed, Feb 23, 2022 at 8:19 PM Rolf Eike Beer wrote:
>
> > @@ -66,35 +68,35 @@ static int vdso_mremap(const struct vm_special_mapping
> > *sm, return 0;
> > }
> >
> > -static int __init __vdso_init(void)
> > +static int __init __vdso_init(struct __vdso_info *vdso_info)
> > {
> > unsigned int i;
> > struct page **vdso_pagelist;
> > unsigned long pfn;
> >
> > - if (memcmp(vdso_info.vdso_code_start, "\177ELF", 4)) {
> > + if (memcmp(vdso_info->vdso_code_start, "\177ELF", 4)) {
> > pr_err("vDSO is not a valid ELF object!\n");
> > return -EINVAL;
> > }
> >
>
> Does anyone actually guarantee that this is at least this 4 bytes long?
You can ref:
arch/arm64/kernel/vdso.c
arch/arm/kernel/vdso.c
arch/nds32/kernel/vdso.c
and in arch/powerpc/boot/elf.h:
arch/powerpc/kernel/fadump.c: memcpy(elf->e_ident, ELFMAG, SELFMAG);
arch/powerpc/boot/elf.h:#define ELFMAG0 0x7f/* EI_MAG */
arch/powerpc/boot/elf.h:#define ELFMAG1 'E'
arch/powerpc/boot/elf.h:#define ELFMAG2 'L'
arch/powerpc/boot/elf.h:#define ELFMAG3 'F'
arch/powerpc/boot/elf.h:#define ELFMAG "\177ELF"
arch/powerpc/boot/elf.h:#define SELFMAG 4
>
> Eike
> --
> Rolf Eike Beer, emlix GmbH, https://www.emlix.com
> Fon +49 551 30664-0, Fax +49 551 30664-11
> Gothaer Platz 3, 37083 Göttingen, Germany
> Sitz der Gesellschaft: Göttingen, Amtsgericht Göttingen HR B 3160
> Geschäftsführung: Heike Jordan, Dr. Uwe Kracke – Ust-IdNr.: DE 205 198 055
>
> emlix - smart embedded open source
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V5 17/21] riscv: compat: vdso: Add setup additional pages implementation
On Wed, Feb 23, 2022 at 9:42 AM Palmer Dabbelt wrote:
>
> On Tue, 01 Feb 2022 07:05:41 PST (-0800), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Reconstruct __setup_additional_pages() by appending vdso info
> > pointer argument to meet compat_vdso_info requirement. And change
> > vm_special_mapping *dm, *cm initialization into static.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
> > Cc: Palmer Dabbelt
> > ---
> > arch/riscv/include/asm/elf.h | 5 ++
> > arch/riscv/include/asm/mmu.h | 1 +
> > arch/riscv/kernel/vdso.c | 104 +--
> > 3 files changed, 81 insertions(+), 29 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> > index 3a4293dc7229..d87d3bcc758d 100644
> > --- a/arch/riscv/include/asm/elf.h
> > +++ b/arch/riscv/include/asm/elf.h
> > @@ -134,5 +134,10 @@ do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32)
> > \
> > typedef compat_ulong_t compat_elf_greg_t;
> > typedef compat_elf_greg_tcompat_elf_gregset_t[ELF_NGREG];
> >
> > +extern int compat_arch_setup_additional_pages(struct linux_binprm *bprm,
> > + int uses_interp);
> > +#define compat_arch_setup_additional_pages \
> > + compat_arch_setup_additional_pages
> > +
> > #endif /* CONFIG_COMPAT */
> > #endif /* _ASM_RISCV_ELF_H */
> > diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h
> > index 0099dc116168..cedcf8ea3c76 100644
> > --- a/arch/riscv/include/asm/mmu.h
> > +++ b/arch/riscv/include/asm/mmu.h
> > @@ -16,6 +16,7 @@ typedef struct {
> > atomic_long_t id;
> > #endif
> > void *vdso;
> > + void *vdso_info;
> > #ifdef CONFIG_SMP
> > /* A local icache flush is needed before user execution can resume. */
> > cpumask_t icache_stale_mask;
> > diff --git a/arch/riscv/kernel/vdso.c b/arch/riscv/kernel/vdso.c
> > index a9436a65161a..deca69524799 100644
> > --- a/arch/riscv/kernel/vdso.c
> > +++ b/arch/riscv/kernel/vdso.c
> > @@ -23,6 +23,9 @@ struct vdso_data {
> > #endif
> >
> > extern char vdso_start[], vdso_end[];
> > +#ifdef CONFIG_COMPAT
> > +extern char compat_vdso_start[], compat_vdso_end[];
> > +#endif
> >
> > enum vvar_pages {
> > VVAR_DATA_PAGE_OFFSET,
> > @@ -30,6 +33,11 @@ enum vvar_pages {
> > VVAR_NR_PAGES,
> > };
> >
> > +enum rv_vdso_map {
> > + RV_VDSO_MAP_VVAR,
> > + RV_VDSO_MAP_VDSO,
> > +};
> > +
> > #define VVAR_SIZE (VVAR_NR_PAGES << PAGE_SHIFT)
> >
> > /*
> > @@ -52,12 +60,6 @@ struct __vdso_info {
> > struct vm_special_mapping *cm;
> > };
> >
> > -static struct __vdso_info vdso_info __ro_after_init = {
> > - .name = "vdso",
> > - .vdso_code_start = vdso_start,
> > - .vdso_code_end = vdso_end,
> > -};
> > -
> > static int vdso_mremap(const struct vm_special_mapping *sm,
> > struct vm_area_struct *new_vma)
> > {
> > @@ -66,35 +68,35 @@ static int vdso_mremap(const struct vm_special_mapping
> > *sm,
> > return 0;
> > }
> >
> > -static int __init __vdso_init(void)
> > +static int __init __vdso_init(struct __vdso_info *vdso_info)
> > {
> > unsigned int i;
> > struct page **vdso_pagelist;
> > unsigned long pfn;
> >
> > - if (memcmp(vdso_info.vdso_code_start, "\177ELF", 4)) {
> > + if (memcmp(vdso_info->vdso_code_start, "\177ELF", 4)) {
> > pr_err("vDSO is not a valid ELF object!\n");
> > return -EINVAL;
> > }
> >
> > - vdso_info.vdso_pages = (
> > - vdso_info.vdso_code_end -
> > - vdso_info.vdso_code_start) >>
> > + vdso_info->vdso_pages = (
> > + vdso_info->vdso_code_end -
> > + vdso_info->vdso_code_start) >>
> > PAGE_SHIFT;
> >
> > - vdso_pagelist = kcalloc(vdso_info.vdso_pages,
> > + vdso_pagelist = kcalloc(vdso_info->vdso_pages,
> > sizeof(struct page *),
> > GFP_KERNEL);
> > if (vdso_pagelist == NULL)
> > return -ENOMEM;
> >
> > /* Grab the vDSO code pages. */
>
Re: [PATCH V5 16/21] riscv: compat: vdso: Add rv32 VDSO base code implementation
On Wed, Feb 23, 2022 at 9:42 AM Palmer Dabbelt wrote: > > On Tue, 01 Feb 2022 07:05:40 PST (-0800), guo...@kernel.org wrote: > > From: Guo Ren > > > > There is no vgettimeofday supported in rv32 that makes simple to > > generate rv32 vdso code which only needs riscv64 compiler. Other > > architectures need change compiler or -m (machine parameter) to > > support vdso32 compiling. If rv32 support vgettimeofday (which > > cause C compile) in future, we would add CROSS_COMPILE to support > > that makes more requirement on compiler enviornment. > > IMO this is the wrong way to go, as there's some subtle differences > between elf32 and elf64 (the .gnu.hash layout, for example). I'm kind > of surprised userspace tolerates this sort of thing at all, but given > how easy it is to target rv32 from all toolchains (we don't need > libraries here, so just -march should do it) I don't think it's worth > chasing around the likely long-tail issues that will arise. I would keep the patch in next version. When "multi-arch toolchain" or "rv32 HAVE_GENERIC_VDSO" isready in the future, let's switch to the rv32 compiler. > > > linux-rv64/arch/riscv/kernel/compat_vdso/compat_vdso.so.dbg: > > file format elf64-littleriscv > > > > Disassembly of section .text: > > > > 0800 <__vdso_rt_sigreturn>: > > 800: 08b00893li a7,139 > > 804: 0073ecall > > 808: unimp > > ... > > > > 080c <__vdso_getcpu>: > > 80c: 0a800893li a7,168 > > 810: 0073ecall > > 814: 8082ret > > ... > > > > 0818 <__vdso_flush_icache>: > > 818: 10300893li a7,259 > > 81c: 0073ecall > > 820: 8082ret > > > > linux-rv32/arch/riscv/kernel/vdso/vdso.so.dbg: > > file format elf32-littleriscv > > > > Disassembly of section .text: > > > > 0800 <__vdso_rt_sigreturn>: > > 800: 08b00893li a7,139 > > 804: 0073ecall > > 808: unimp > > ... > > > > 080c <__vdso_getcpu>: > > 80c: 0a800893li a7,168 > > 810: 0073ecall > > 814: 8082ret > > ... > > > > 0818 <__vdso_flush_icache>: > > 818: 10300893li a7,259 > > 81c: 0073ecall > > 820: 8082ret > > > > Finally, reuse all *.S from vdso in compat_vdso that makes > > implementation clear and readable. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > Cc: Palmer Dabbelt > > --- > > arch/riscv/Makefile | 5 ++ > > arch/riscv/include/asm/vdso.h | 9 +++ > > arch/riscv/kernel/Makefile| 1 + > > arch/riscv/kernel/compat_vdso/.gitignore | 2 + > > arch/riscv/kernel/compat_vdso/Makefile| 68 +++ > > arch/riscv/kernel/compat_vdso/compat_vdso.S | 8 +++ > > .../kernel/compat_vdso/compat_vdso.lds.S | 3 + > > arch/riscv/kernel/compat_vdso/flush_icache.S | 3 + > > .../compat_vdso/gen_compat_vdso_offsets.sh| 5 ++ > > arch/riscv/kernel/compat_vdso/getcpu.S| 3 + > > arch/riscv/kernel/compat_vdso/note.S | 3 + > > arch/riscv/kernel/compat_vdso/rt_sigreturn.S | 3 + > > arch/riscv/kernel/vdso/vdso.S | 6 +- > > 13 files changed, 118 insertions(+), 1 deletion(-) > > create mode 100644 arch/riscv/kernel/compat_vdso/.gitignore > > create mode 100644 arch/riscv/kernel/compat_vdso/Makefile > > create mode 100644 arch/riscv/kernel/compat_vdso/compat_vdso.S > > create mode 100644 arch/riscv/kernel/compat_vdso/compat_vdso.lds.S > > create mode 100644 arch/riscv/kernel/compat_vdso/flush_icache.S > > create mode 100755 arch/riscv/kernel/compat_vdso/gen_compat_vdso_offsets.sh > > create mode 100644 arch/riscv/kernel/compat_vdso/getcpu.S > > create mode 100644 arch/riscv/kernel/compat_vdso/note.S > > create mode 100644 arch/riscv/kernel/compat_vdso/rt_sigreturn.S > > > > diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile > > index a02e588c4947..f73d50552e09 100644 > > --- a/arch/riscv/Makefile > > +++ b/arch/riscv/Makefile > > @@ -106,12 +106,17 @@ li
Re: [PATCH V5 13/21] riscv: compat: process: Add UXL_32 support in start_thread
On Wed, Feb 23, 2022 at 9:42 AM Palmer Dabbelt wrote: > > On Tue, 01 Feb 2022 07:05:37 PST (-0800), guo...@kernel.org wrote: > > From: Guo Ren > > > > If the current task is in COMPAT mode, set SR_UXL_32 in status for > > returning userspace. We need CONFIG _COMPAT to prevent compiling > > errors with rv32 defconfig. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > Cc: Palmer Dabbelt > > --- > > arch/riscv/kernel/process.c | 5 + > > 1 file changed, 5 insertions(+) > > > > diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c > > index 03ac3aa611f5..1a666ad299b4 100644 > > --- a/arch/riscv/kernel/process.c > > +++ b/arch/riscv/kernel/process.c > > @@ -97,6 +97,11 @@ void start_thread(struct pt_regs *regs, unsigned long pc, > > } > > regs->epc = pc; > > regs->sp = sp; > > + > > +#ifdef CONFIG_COMPAT > > + if (is_compat_task()) > > + regs->status |= SR_UXL_32; > > Not sure if I'm just misunderstanding the bit ops here, but aren't we > trying to set the UXL field to 1 (for UXL=32)? That should be a bit > field set op, not just an OR. You are right, I would modify like this: + if (is_compat_task()) + regs->status = （regs->status & ~SR_UXL) | SR_UXL_32; + else +.regs->status = （regs->status & ~SR_UXL) | SR_UXL_64; > > > +#endif > > } > > > > void flush_thread(void) > > Additionally: this isn't really an issue so much with this patch, but it > does bring up that we're relying on someone else to have set UXL=64 on > CONFIG_COMPAT=n systems. I don't see that in any spec anywhere, so we > should really be setting UXL in Linux for all systems (ie, not just those with > COMPAT=y). -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V5 09/21] riscv: compat: Add basic compat data type implementation
On Wed, Feb 23, 2022 at 9:42 AM Palmer Dabbelt wrote:
>
> On Tue, 01 Feb 2022 07:05:33 PST (-0800), guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Implement riscv asm/compat.h for struct compat_xxx,
> > is_compat_task, compat_user_regset, regset convert.
> >
> > The rv64 compat.h has inherited most of the structs
> > from the generic one.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
> > Cc: Palmer Dabbelt
> > ---
> > arch/riscv/include/asm/compat.h | 129 +++
> > arch/riscv/include/asm/thread_info.h | 1 +
> > 2 files changed, 130 insertions(+)
> > create mode 100644 arch/riscv/include/asm/compat.h
> >
> > diff --git a/arch/riscv/include/asm/compat.h
> > b/arch/riscv/include/asm/compat.h
> > new file mode 100644
> > index ..2ac955b51148
> > --- /dev/null
> > +++ b/arch/riscv/include/asm/compat.h
> > @@ -0,0 +1,129 @@
> > +/* SPDX-License-Identifier: GPL-2.0-only */
> > +#ifndef __ASM_COMPAT_H
> > +#define __ASM_COMPAT_H
> > +
> > +#define COMPAT_UTS_MACHINE "riscv\0\0"
> > +
> > +/*
> > + * Architecture specific compatibility types
> > + */
> > +#include
> > +#include
> > +#include
> > +#include
> > +
> > +static inline int is_compat_task(void)
> > +{
> > + return test_thread_flag(TIF_32BIT);
> > +}
> > +
> > +struct compat_user_regs_struct {
> > + compat_ulong_t pc;
> > + compat_ulong_t ra;
> > + compat_ulong_t sp;
> > + compat_ulong_t gp;
> > + compat_ulong_t tp;
> > + compat_ulong_t t0;
> > + compat_ulong_t t1;
> > + compat_ulong_t t2;
> > + compat_ulong_t s0;
> > + compat_ulong_t s1;
> > + compat_ulong_t a0;
> > + compat_ulong_t a1;
> > + compat_ulong_t a2;
> > + compat_ulong_t a3;
> > + compat_ulong_t a4;
> > + compat_ulong_t a5;
> > + compat_ulong_t a6;
> > + compat_ulong_t a7;
> > + compat_ulong_t s2;
> > + compat_ulong_t s3;
> > + compat_ulong_t s4;
> > + compat_ulong_t s5;
> > + compat_ulong_t s6;
> > + compat_ulong_t s7;
> > + compat_ulong_t s8;
> > + compat_ulong_t s9;
> > + compat_ulong_t s10;
> > + compat_ulong_t s11;
> > + compat_ulong_t t3;
> > + compat_ulong_t t4;
> > + compat_ulong_t t5;
> > + compat_ulong_t t6;
> > +};
> > +
> > +static inline void regs_to_cregs(struct compat_user_regs_struct *cregs,
> > + struct pt_regs *regs)
> > +{
> > + cregs->pc = (compat_ulong_t) regs->epc;
> > + cregs->ra = (compat_ulong_t) regs->ra;
> > + cregs->sp = (compat_ulong_t) regs->sp;
> > + cregs->gp = (compat_ulong_t) regs->gp;
> > + cregs->tp = (compat_ulong_t) regs->tp;
> > + cregs->t0 = (compat_ulong_t) regs->t0;
> > + cregs->t1 = (compat_ulong_t) regs->t1;
> > + cregs->t2 = (compat_ulong_t) regs->t2;
> > + cregs->s0 = (compat_ulong_t) regs->s0;
> > + cregs->s1 = (compat_ulong_t) regs->s1;
> > + cregs->a0 = (compat_ulong_t) regs->a0;
> > + cregs->a1 = (compat_ulong_t) regs->a1;
> > + cregs->a2 = (compat_ulong_t) regs->a2;
> > + cregs->a3 = (compat_ulong_t) regs->a3;
> > + cregs->a4 = (compat_ulong_t) regs->a4;
> > + cregs->a5 = (compat_ulong_t) regs->a5;
> > + cregs->a6 = (compat_ulong_t) regs->a6;
> > + cregs->a7 = (compat_ulong_t) regs->a7;
> > + cregs->s2 = (compat_ulong_t) regs->s2;
> > + cregs->s3 = (compat_ulong_t) regs->s3;
> > + cregs->s4 = (compat_ulong_t) regs->s4;
> > + cregs->s5 = (compat_ulong_t) regs->s5;
> > + cregs->s6 = (compat_ulong_t) regs->s6;
> > + cregs->s7 = (compat_ulong_t) regs->s7;
> > + cregs->s8 = (compat_ulong_t) regs->s8;
> > + cregs->s9 = (compat_ulong_t) regs->s9;
> > + cregs->s10 = (compat_ulong_t) regs->s10;
> > + cregs->s11 = (compat_ulong_t) regs->s11;
> > + cregs->t3 = (compat_ulong_t) regs->t3;
> > + cregs->t4 = (compat_ulong_t) regs->t4;
> > + creg
Re: [PATCH V5 00/21] riscv: compat: Add COMPAT mode support for rv64
On Tue, Feb 1, 2022 at 11:06 PM wrote: > > From: Guo Ren > > Currently, most 64-bit architectures (x86, parisc, powerpc, arm64, > s390, mips, sparc) have supported COMPAT mode. But they all have > history issues and can't use standard linux unistd.h. RISC-V would > be first standard __SYSCALL_COMPAT user of include/uapi/asm-generic > /unistd.h. > > The patchset are based on v5.17-rc2, you can compare rv64-compat32 > v.s. rv32-whole in qemu with following step: > > - Prepare rv32 rootfs & fw_jump.bin by buildroot.org >$ git clone git://git.busybox.net/buildroot >$ cd buildroot >$ make qemu_riscv32_virt_defconfig O=qemu_riscv32_virt_defconfig >$ make -C qemu_riscv32_virt_defconfig >$ make qemu_riscv64_virt_defconfig O=qemu_riscv64_virt_defconfig >$ make -C qemu_riscv64_virt_defconfig >(Got fw_jump.bin & rootfs.ext2 in qemu_riscvXX_virt_defconfig/images) > > - Prepare Linux rv32 & rv64 Image >$ git clone g...@github.com:c-sky/csky-linux.git -b riscv_compat_v5 linux >$ cd linux >$ echo "CONFIG_STRICT_KERNEL_RWX=n" >> arch/riscv/configs/defconfig >$ echo "CONFIG_STRICT_MODULE_RWX=n" >> arch/riscv/configs/defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ rv32_defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv32-buildroot-linux-gnu- > O=../build-rv32/ Image >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ defconfig >$ make ARCH=riscv CROSS_COMPILE=riscv64-buildroot-linux-gnu- > O=../build-rv64/ Image > > - Prepare Qemu: (made by LIU Zhiwei ) >$ git clone g...@github.com:alistair23/qemu.git -b > riscv-to-apply.for-upstream linux >$ cd qemu >$ ./configure --target-list="riscv64-softmmu riscv32-softmmu" >$ make > > Now let's compare rv32-compat with rv32-native memory footprint. Kernel with > rv32 = rv64 > defconfig, rootfs, opensbi, Qemu are the same. > > - Run rv64 with rv32 rootfs in compat mode: >$ ./build/qemu-system-riscv64 -cpu rv64,x-h=true -M virt -m 64m -nographic > -bios qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image > -drive file qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 > -device virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro > console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device > virtio-net-device,netdev=net0 Fixup qemu cmdline (Remove x-h=true): $ ./build/qemu-system-riscv64 -cpu rv64 -M virt -m 64m -nographic -bios qemu_riscv64_virt_defconfig/images/fw_jump.bin -kernel build-rv64/Image -drive file qemu_riscv32_virt_defconfig/images/rootfs.ext2,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 -append "rootwait root=/dev/vda ro console=ttyS0 earlycon=sbi" -netdev user,id=net0 -device virtio-net-device,netdev=net0 > > QEMU emulator version 6.2.50 (v6.2.0-29-g196d7182c8) > OpenSBI v0.9 > [0.00] Linux version 5.16.0-rc6-00017-g750f87086bdd-dirty > (guoren@guoren-Z87-HD3) (riscv64-unknown-linux-gnu-gcc (GCC) 10.2.0, GNU ld > (GNU Binutils) 2.37) #96 SMP Tue Dec 28 21:01:55 CST 2021 > [0.00] OF: fdt: Ignoring memory range 0x8000 - 0x8020 > [0.00] Machine model: riscv-virtio,qemu > [0.00] earlycon: sbi0 at I/O port 0x0 (options '') > [0.00] printk: bootconsole [sbi0] enabled > [0.00] efi: UEFI not found. > [0.00] Zone ranges: > [0.00] DMA32[mem 0x8020-0x83ff] > [0.00] Normal empty > [0.00] Movable zone start for each node > [0.00] Early memory node ranges > [0.00] node 0: [mem 0x8020-0x83ff] > [0.00] Initmem setup node 0 [mem > 0x8020-0x83ff] > [0.00] SBI specification v0.2 detected > [0.00] SBI implementation ID=0x1 Version=0x9 > [0.00] SBI TIME extension detected > [0.00] SBI IPI extension detected > [0.00] SBI RFENCE extension detected > [0.00] SBI v0.2 HSM extension detected > [0.00] riscv: ISA extensions acdfhimsu > [0.00] riscv: ELF capabilities acdfim > [0.00] percpu: Embedded 17 pages/cpu s30696 r8192 d30744 u69632 > [0.00] Built 1 zonelists, mobility grouping on. Total pages: 15655 > [0.00] Kernel command line: rootwait root=/dev/vda ro console=ttyS0 > earlycon=sbi > [0.00] Dentry cache hash table entries: 8192 (order: 4, 65536 bytes, > linear) > [0.00] Inode-cache hash table entries: 4096 (order: 3, 32768 bytes, > linear) > [0.00] mem auto-init: stack:off, heap alloc:off, heap free:off > [0.0
Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf
On Wed, Feb 2, 2022 at 3:52 PM Christoph Hellwig wrote:
>
> On Tue, Feb 01, 2022 at 11:05:39PM +0800, guo...@kernel.org wrote:
> > +bool compat_elf_check_arch(Elf32_Ehdr *hdr)
> > +{
> > + if (compat_mode_support && (hdr->e_machine == EM_RISCV))
> > + return true;
> > + else
> > + return false;
> > +}
>
> This can be simplified to:
>
> return compat_mode_support && hdr->e_machine == EM_RISCV;
Good point.
>
> I'd also rename compat_mode_support to compat_mode_supported
Okay
>
> > +
> > +static int compat_mode_detect(void)
> > +{
> > + unsigned long tmp = csr_read(CSR_STATUS);
> > +
> > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32);
> > +
> > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) {
> > + pr_info("riscv: 32bit compat mode detect failed\n");
> > + compat_mode_support = false;
> > + } else {
> > + compat_mode_support = true;
> > + pr_info("riscv: 32bit compat mode detected\n");
> > + }
>
> I don't think we need these printks here.
Okay
>
> Also this could be simplified to:
>
> compat_mode_supported = (csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32;
Okay
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V5 15/21] riscv: compat: Add hw capability check for elf
On Tue, Feb 1, 2022 at 11:07 PM wrote:
>
> From: Guo Ren
>
> Detect hardware COMPAT (32bit U-mode) capability in rv64. If not
> support COMPAT mode in hw, compat_elf_check_arch would return
> false by compat_binfmt_elf.c
>
> Signed-off-by: Guo Ren
> Signed-off-by: Guo Ren
> Cc: Arnd Bergmann
> Cc: Christoph Hellwig
> ---
> arch/riscv/include/asm/elf.h | 3 ++-
> arch/riscv/kernel/process.c | 32
> 2 files changed, 34 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
> index aee40040917b..3a4293dc7229 100644
> --- a/arch/riscv/include/asm/elf.h
> +++ b/arch/riscv/include/asm/elf.h
> @@ -40,7 +40,8 @@
> * elf64_hdr e_machine's offset are different. The checker is
> * a little bit simple compare to other architectures.
> */
> -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
> +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr);
> +#define compat_elf_check_arch compat_elf_check_arch
>
> #define CORE_DUMP_USE_REGSET
> #define ELF_EXEC_PAGESIZE (PAGE_SIZE)
> diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
> index 1a666ad299b4..758847cba391 100644
> --- a/arch/riscv/kernel/process.c
> +++ b/arch/riscv/kernel/process.c
> @@ -83,6 +83,38 @@ void show_regs(struct pt_regs *regs)
> dump_backtrace(regs, NULL, KERN_DEFAULT);
> }
>
> +#ifdef CONFIG_COMPAT
> +static bool compat_mode_support __read_mostly;
> +
> +bool compat_elf_check_arch(Elf32_Ehdr *hdr)
> +{
> + if (compat_mode_support && (hdr->e_machine == EM_RISCV))
> + return true;
> + else
> + return false;
> +}
> +
> +static int compat_mode_detect(void)
Forgot __init, here
> +{
> + unsigned long tmp = csr_read(CSR_STATUS);
> +
> + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32);
> +
> + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) {
> + pr_info("riscv: 32bit compat mode detect failed\n");
> + compat_mode_support = false;
> + } else {
> + compat_mode_support = true;
> + pr_info("riscv: 32bit compat mode detected\n");
> + }
> +
> + csr_write(CSR_STATUS, tmp);
> +
> + return 0;
> +}
> +arch_initcall(compat_mode_detect);
> +#endif
> +
> void start_thread(struct pt_regs *regs, unsigned long pc,
> unsigned long sp)
> {
> --
> 2.25.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V5 21/21] KVM: compat: riscv: Prevent KVM_COMPAT from being selected
On Wed, Feb 2, 2022 at 12:11 AM Anup Patel wrote: > > On Tue, Feb 1, 2022 at 9:31 PM Paolo Bonzini wrote: > > > > On 2/1/22 16:44, Anup Patel wrote: > > > +Paolo > > > > > > On Tue, Feb 1, 2022 at 8:38 PM wrote: > > >> > > >> From: Guo Ren > > >> > > >> Current riscv doesn't support the 32bit KVM API. Let's make it > > >> clear by not selecting KVM_COMPAT. > > >> > > >> Signed-off-by: Guo Ren > > >> Signed-off-by: Guo Ren > > >> Cc: Arnd Bergmann > > >> Cc: Anup Patel > > > > > > This looks good to me. > > > > > > Reviewed-by: Anup Patel > > > > Hi Anup, > > > > feel free to send this via a pull request (perhaps together with Mark > > Rutland's entry/exit rework). > > Sure, I will do like you suggested. Great, thx. > > Regards, > Anup > > > > > Paolo > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 16/17] riscv: compat: Add COMPAT Kbuild skeletal support
On Tue, Feb 1, 2022 at 7:48 PM Arnd Bergmann wrote:
>
> On Tue, Feb 1, 2022 at 11:26 AM Guo Ren wrote:
> >
> > Hi Arnd & Christoph,
> >
> > The UXL field controls the value of XLEN for U-mode, termed UXLEN,
> > which may differ from the
> > value of XLEN for S-mode, termed SXLEN. The encoding of UXL is the
> > same as that of the MXL
> > field of misa, shown in Table 3.1.
> >
> > Here is the patch. (We needn't exception helper, because we are in
> > S-mode and UXL wouldn't affect.)
>
> Looks good to me, just a few details that could be improved
>
> > -#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
> > +#ifdef CONFIG_COMPAT
> > +#define compat_elf_check_arch compat_elf_check_arch
> > +extern bool compat_elf_check_arch(Elf32_Ehdr *hdr);
> > +#endif
>
> No need for the #ifdef
Okay
> > +}
>
> > +void compat_mode_detect(void)
>
> __init
Okay
>
> > +{
> > + unsigned long tmp = csr_read(CSR_STATUS);
> > + csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32);
> > +
> > + if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) {
> > + csr_write(CSR_STATUS, tmp);
> > + return;
> > + }
> > +
> > + csr_write(CSR_STATUS, tmp);
> > + compat_mode_support = true;
> > +
> > + pr_info("riscv: compat: 32bit U-mode applications support\n");
> > +}
>
> I think an entry in /proc/cpuinfo would be more helpful than the pr_info at
> boot time. Maybe a follow-up patch though, as there is no obvious place
> to put it. On other architectures, you typically have a set of space
> separated feature names, but riscv has a single string that describes
> the ISA, and this feature is technically the support for a second ISA.
Yes, it should be another patch after discussion.
>
> Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 16/17] riscv: compat: Add COMPAT Kbuild skeletal support
Hi Arnd & Christoph,
The UXL field controls the value of XLEN for U-mode, termed UXLEN,
which may differ from the
value of XLEN for S-mode, termed SXLEN. The encoding of UXL is the
same as that of the MXL
field of misa, shown in Table 3.1.
Here is the patch. (We needn't exception helper, because we are in
S-mode and UXL wouldn't affect.)
arch/riscv/include/asm/elf.h | 5 -
arch/riscv/include/asm/processor.h | 1 +
arch/riscv/kernel/process.c| 22 ++
arch/riscv/kernel/setup.c | 5 +
4 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h
index 37f1cbdaa242..6baa49c4fba1 100644
--- a/arch/riscv/include/asm/elf.h
+++ b/arch/riscv/include/asm/elf.h
@@ -35,7 +35,10 @@
*/
#define elf_check_arch(x) ((x)->e_machine == EM_RISCV)
-#define compat_elf_check_arch(x) ((x)->e_machine == EM_RISCV)
+#ifdef CONFIG_COMPAT
+#define compat_elf_check_arch compat_elf_check_arch
+extern bool compat_elf_check_arch(Elf32_Ehdr *hdr);
+#endif
#define CORE_DUMP_USE_REGSET
#define ELF_EXEC_PAGESIZE (PAGE_SIZE)
diff --git a/arch/riscv/include/asm/processor.h
b/arch/riscv/include/asm/processor.h
index 9544c138d9ce..8b288ac0d704 100644
--- a/arch/riscv/include/asm/processor.h
+++ b/arch/riscv/include/asm/processor.h
@@ -64,6 +64,7 @@ extern void start_thread(struct pt_regs *regs,
#ifdef CONFIG_COMPAT
extern void compat_start_thread(struct pt_regs *regs,
unsigned long pc, unsigned long sp);
+extern void compat_mode_detect(void);
#define DEFAULT_MAP_WINDOW_64 TASK_SIZE_64
#else
diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c
index 9ebf9a95e5ea..496d09c5d384 100644
--- a/arch/riscv/kernel/process.c
+++ b/arch/riscv/kernel/process.c
@@ -101,6 +101,28 @@ void start_thread(struct pt_regs *regs, unsigned long pc,
}
#ifdef CONFIG_COMPAT
+static bool compat_mode_support __read_mostly = false;
+
+bool compat_elf_check_arch(Elf32_Ehdr *hdr)
+{
+ if (compat_mode_support && (hdr->e_machine == EM_RISCV))
+ return true;
+
+ return false;
+}
+
+void compat_mode_detect(void)
+{
+ unsigned long tmp = csr_read(CSR_STATUS);
+ csr_write(CSR_STATUS, (tmp & ~SR_UXL) | SR_UXL_32);
+
+ if ((csr_read(CSR_STATUS) & SR_UXL) != SR_UXL_32) {
+ csr_write(CSR_STATUS, tmp);
+ return;
+ }
+
+ csr_write(CSR_STATUS, tmp);
+ compat_mode_support = true;
+
+ pr_info("riscv: compat: 32bit U-mode applications support\n");
+}
+
void compat_start_thread(struct pt_regs *regs, unsigned long pc,
unsigned long sp)
{
diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c
index b42bfdc67482..be131219d549 100644
--- a/arch/riscv/kernel/setup.c
+++ b/arch/riscv/kernel/setup.c
@@ -12,6 +12,7 @@
#include
#include
#include
+#include
#include
#include
#include
@@ -294,6 +295,10 @@ void __init setup_arch(char **cmdline_p)
setup_smp();
#endif
+#ifdef CONFIG_COMPAT
+ compat_mode_detect();
+#endif
+
riscv_fill_hwcap();
}
On Tue, Feb 1, 2022 at 5:36 PM Arnd Bergmann wrote:
>
> On Tue, Feb 1, 2022 at 10:13 AM Guo Ren wrote:
> > On Tue, Feb 1, 2022 at 3:45 PM Christoph Hellwig wrote:
> > > On Mon, Jan 31, 2022 at 09:50:58PM +0800, Guo Ren wrote:
> > > > On Mon, Jan 31, 2022 at 8:26 PM Christoph Hellwig
> > > > wrote:
> > > > >
> > > > > Given that most rv64 implementations can't run in rv32 mode, what is
> > > > > the
> > > > > failure mode if someone tries it with the compat mode enabled?
> > > > A static linked simple hello_world could still run on a non-compat
> > > > support hardware. But most rv32 apps would meet different userspace
> > > > segment faults.
> > > >
> > > > Current code would let the machine try the rv32 apps without detecting
> > > > whether hw support or not.
> > >
> > > Hmm, we probably want some kind of check for not even offer running
> > > rv32 binaries. I guess trying to write UXL some time during early
> > > boot and catching the resulting exception would be the way to go?
> >
> > Emm... I think it's unnecessary. Free rv32 app running won't cause
> > system problem, just as a wrong elf running. They are U-mode
> > privileged.
>
> While it's not a security issue, I think it would be helpful to get a
> user-readable error message and a machine-readable /proc/cpuinfo
> flag to see if a particular system can run rv32 binaries rather than
> relying on SIGILL to kill a process.
--
2.25.1
>
> Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 16/17] riscv: compat: Add COMPAT Kbuild skeletal support
On Tue, Feb 1, 2022 at 3:45 PM Christoph Hellwig wrote: > > On Mon, Jan 31, 2022 at 09:50:58PM +0800, Guo Ren wrote: > > On Mon, Jan 31, 2022 at 8:26 PM Christoph Hellwig > > wrote: > > > > > > Given that most rv64 implementations can't run in rv32 mode, what is the > > > failure mode if someone tries it with the compat mode enabled? > > A static linked simple hello_world could still run on a non-compat > > support hardware. But most rv32 apps would meet different userspace > > segment faults. > > > > Current code would let the machine try the rv32 apps without detecting > > whether hw support or not. > > Hmm, we probably want some kind of check for not even offer running > rv32 binaries. I guess trying to write UXL some time during early > boot and catching the resulting exception would be the way to go? Emm... I think it's unnecessary. Free rv32 app running won't cause system problem, just as a wrong elf running. They are U-mode privileged. > > > > > > > -- > > Best Regards > > Guo Ren > > > > ML: https://lore.kernel.org/linux-csky/ > ---end quoted text--- -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/5] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h
On Tue, Feb 1, 2022 at 11:02 AM Guo Ren wrote:
>
> On Mon, Jan 31, 2022 at 2:49 PM Christoph Hellwig wrote:
> >
> > The F_GETLK64/F_SETLK64/F_SETLKW64 fcntl opcodes are only implemented
> > for the 32-bit syscall APIs, but are also needed for compat handling
> > on 64-bit kernels.
> >
> > Consolidate them in unistd.h instead of definining the internal compat
> > definitions in compat.h, which is rather errror prone (e.g. parisc
> > gets the values wrong currently).
> >
> > Note that before this change they were never visible to userspace due
> > to the fact that CONFIG_64BIT is only set for kernel builds.
> >
> > Signed-off-by: Christoph Hellwig
> > ---
> > arch/arm64/include/asm/compat.h| 4
> > arch/mips/include/asm/compat.h | 4
> > arch/mips/include/uapi/asm/fcntl.h | 4 ++--
> > arch/powerpc/include/asm/compat.h | 4
> > arch/s390/include/asm/compat.h | 4
> > arch/sparc/include/asm/compat.h| 4
> > arch/x86/include/asm/compat.h | 4
> > include/uapi/asm-generic/fcntl.h | 4 ++--
> > tools/include/uapi/asm-generic/fcntl.h | 2 --
> > 9 files changed, 4 insertions(+), 30 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/compat.h
> > b/arch/arm64/include/asm/compat.h
> > index eaa6ca062d89b..2763287654081 100644
> > --- a/arch/arm64/include/asm/compat.h
> > +++ b/arch/arm64/include/asm/compat.h
> > @@ -73,10 +73,6 @@ struct compat_flock {
> > compat_pid_tl_pid;
> > };
> >
> > -#define F_GETLK64 12 /* using 'struct flock64' */
> > -#define F_SETLK64 13
> > -#define F_SETLKW64 14
> > -
> > struct compat_flock64 {
> > short l_type;
> > short l_whence;
> > diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
> > index bbb3bc5a42fd8..6a350c1f70d7e 100644
> > --- a/arch/mips/include/asm/compat.h
> > +++ b/arch/mips/include/asm/compat.h
> > @@ -65,10 +65,6 @@ struct compat_flock {
> > s32 pad[4];
> > };
> >
> > -#define F_GETLK64 33
> > -#define F_SETLK64 34
> > -#define F_SETLKW64 35
> Oops we can't remove above, right?
No problem, I missing, it's okay.
All come from arch/mips/include/uapi/asm/fcntl.h
>
> > -
> > struct compat_flock64 {
> > short l_type;
> > short l_whence;
> > diff --git a/arch/mips/include/uapi/asm/fcntl.h
> > b/arch/mips/include/uapi/asm/fcntl.h
> > index 9e44ac810db94..0369a38e3d4f2 100644
> > --- a/arch/mips/include/uapi/asm/fcntl.h
> > +++ b/arch/mips/include/uapi/asm/fcntl.h
> > @@ -44,11 +44,11 @@
> > #define F_SETOWN 24 /* for sockets. */
> > #define F_GETOWN 23 /* for sockets. */
> >
> > -#ifndef __mips64
> > +#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
> > #define F_GETLK64 33 /* using 'struct flock64' */
> > #define F_SETLK64 34
> > #define F_SETLKW64 35
> > -#endif
> > +#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
> >
> > #if _MIPS_SIM != _MIPS_SIM_ABI64
> > #define __ARCH_FLOCK_EXTRA_SYSID long l_sysid;
> > diff --git a/arch/powerpc/include/asm/compat.h
> > b/arch/powerpc/include/asm/compat.h
> > index 7afc96fb6524b..83d8f70779cbc 100644
> > --- a/arch/powerpc/include/asm/compat.h
> > +++ b/arch/powerpc/include/asm/compat.h
> > @@ -52,10 +52,6 @@ struct compat_flock {
> > compat_pid_tl_pid;
> > };
> >
> > -#define F_GETLK64 12 /* using 'struct flock64' */
> > -#define F_SETLK64 13
> > -#define F_SETLKW64 14
> > -
> > struct compat_flock64 {
> > short l_type;
> > short l_whence;
> > diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
> > index cdc7ae72529d8..0f14b3188b1bb 100644
> > --- a/arch/s390/include/asm/compat.h
> > +++ b/arch/s390/include/asm/compat.h
> > @@ -110,10 +110,6 @@ struct compat_flock {
> > compat_pid_tl_pid;
> > };
> >
> > -#define F_GETLK64 12
> > -#define F_SETLK64 13
> > -#define F_SETLKW64 14
> > -
> > struct compat_flock64 {
> > short l_type;
> > short l_whence;
> > diff --git a/arch/sparc/include/asm/compat.h
> > b/arch/sparc/include/asm/compat.h
> > index bd949fcf9d63b..108078751bb5a 10064
Re: [PATCH 4/5] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h
_GETLK64 12 /* using 'struct flock64' */ > -#define F_SETLK64 13 > -#define F_SETLKW64 14 > - > /* > * IA32 uses 4 byte alignment for 64 bit quantities, > * so we need to pack this structure. > diff --git a/include/uapi/asm-generic/fcntl.h > b/include/uapi/asm-generic/fcntl.h > index 98f4ff165b776..8c05d3d89ff18 100644 > --- a/include/uapi/asm-generic/fcntl.h > +++ b/include/uapi/asm-generic/fcntl.h > @@ -116,13 +116,13 @@ > #define F_GETSIG 11 /* for sockets. */ > #endif > > -#ifndef CONFIG_64BIT > +#if __BITS_PER_LONG == 32 || defined(__KERNEL__) > #ifndef F_GETLK64 > #define F_GETLK64 12 /* using 'struct flock64' */ > #define F_SETLK64 13 > #define F_SETLKW64 14 > #endif > -#endif > +#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */ > > #ifndef F_SETOWN_EX > #define F_SETOWN_EX15 > diff --git a/tools/include/uapi/asm-generic/fcntl.h > b/tools/include/uapi/asm-generic/fcntl.h > index bf961a71802e0..6e16722026f39 100644 > --- a/tools/include/uapi/asm-generic/fcntl.h > +++ b/tools/include/uapi/asm-generic/fcntl.h > @@ -115,13 +115,11 @@ > #define F_GETSIG 11 /* for sockets. */ > #endif > > -#ifndef CONFIG_64BIT > #ifndef F_GETLK64 > #define F_GETLK64 12 /* using 'struct flock64' */ > #define F_SETLK64 13 > #define F_SETLKW64 14 > #endif > -#endif > > #ifndef F_SETOWN_EX > #define F_SETOWN_EX15 > -- > 2.30.2 > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 1/5] uapi: remove the unused HAVE_ARCH_STRUCT_FLOCK64 define
This patch should be:
diff --git a/include/uapi/asm-generic/fcntl.h b/include/uapi/asm-generic/fcntl.h
index ecd0f5bdfc1d..220ae6d32e7b 100644
--- a/include/uapi/asm-generic/fcntl.h
+++ b/include/uapi/asm-generic/fcntl.h
@@ -193,32 +193,28 @@ struct f_owner_ex {
#define F_LINUX_SPECIFIC_BASE 1024
#ifndef HAVE_ARCH_STRUCT_FLOCK
-#ifndef __ARCH_FLOCK_PAD
-#define __ARCH_FLOCK_PAD
-#endif
-
struct flock {
short l_type;
short l_whence;
__kernel_off_t l_start;
__kernel_off_t l_len;
__kernel_pid_t l_pid;
+#ifdef __ARCH_FLOCK_PAD
__ARCH_FLOCK_PAD
-};
#endif
-
-#ifndef HAVE_ARCH_STRUCT_FLOCK64
-#ifndef __ARCH_FLOCK64_PAD
-#define __ARCH_FLOCK64_PAD
+}
#endif
+#ifndef HAVE_ARCH_STRUCT_FLOCK64
struct flock64 {
short l_type;
short l_whence;
__kernel_loff_t l_start;
__kernel_loff_t l_len;
__kernel_pid_t l_pid;
+#ifdef __ARCH_FLOCK64_PAD
__ARCH_FLOCK64_PAD
+#endif
};
Right?
Seems you've based on an old tree, right?
On Mon, Jan 31, 2022 at 2:49 PM Christoph Hellwig wrote:
>
> Signed-off-by: Christoph Hellwig
> ---
> include/uapi/asm-generic/fcntl.h | 2 --
> tools/include/uapi/asm-generic/fcntl.h | 2 --
> 2 files changed, 4 deletions(-)
>
> diff --git a/include/uapi/asm-generic/fcntl.h
> b/include/uapi/asm-generic/fcntl.h
> index ecd0f5bdfc1d6..caa482e3b01af 100644
> --- a/include/uapi/asm-generic/fcntl.h
> +++ b/include/uapi/asm-generic/fcntl.h
> @@ -207,7 +207,6 @@ struct flock {
> };
> #endif
>
> -#ifndef HAVE_ARCH_STRUCT_FLOCK64
> #ifndef __ARCH_FLOCK64_PAD
> #define __ARCH_FLOCK64_PAD
> #endif
> @@ -220,6 +219,5 @@ struct flock64 {
> __kernel_pid_t l_pid;
> __ARCH_FLOCK64_PAD
> };
> -#endif
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> diff --git a/tools/include/uapi/asm-generic/fcntl.h
> b/tools/include/uapi/asm-generic/fcntl.h
> index ac190958c9814..4a49d33ca4d55 100644
> --- a/tools/include/uapi/asm-generic/fcntl.h
> +++ b/tools/include/uapi/asm-generic/fcntl.h
> @@ -202,7 +202,6 @@ struct flock {
> };
> #endif
>
> -#ifndef HAVE_ARCH_STRUCT_FLOCK64
> #ifndef __ARCH_FLOCK64_PAD
> #define __ARCH_FLOCK64_PAD
> #endif
> @@ -215,6 +214,5 @@ struct flock64 {
> __kernel_pid_t l_pid;
> __ARCH_FLOCK64_PAD
> };
> -#endif
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> --
> 2.30.2
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: consolidate the compat fcntl definitions v2
On Tue, Feb 1, 2022 at 6:19 AM Arnd Bergmann wrote: > > On Mon, Jan 31, 2022 at 7:49 AM Christoph Hellwig wrote: > > > > Hi all, > > > > currenty the compat fcnt definitions are duplicate for all compat > > architectures, and the native fcntl64 definitions aren't even usable > > from userspace due to a bogus CONFIG_64BIT ifdef. This series tries > > to sort out all that. > > > > Changes since v1: > > - only make the F*64 defines uapi visible for 32-bit architectures > > Looks all good to me, > > Reviewed-by: Arnd Bergmann > > I think it would be best to merge this through the risc-v tree along > with the coming compat support > that depends on it. Okay, I would include it in my next version series. > Alternatively, I can put it into my asm-generic > tree for 5.18. > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 03/17] asm-generic: compat: Cleanup duplicate definitions
On Mon, Jan 31, 2022 at 8:21 PM Christoph Hellwig wrote: > > On Sat, Jan 29, 2022 at 08:17:14PM +0800, guo...@kernel.org wrote: > > From: Guo Ren > > > > There are 7 64bit architectures that support Linux COMPAT mode to > > run 32bit applications. A lot of definitions are duplicate: > > - COMPAT_USER_HZ > > - COMPAT_RLIM_INFINITY > > - COMPAT_OFF_T_MAX > > - __compat_uid_t, __compat_uid_t > > - compat_dev_t > > - compat_ipc_pid_t > > - struct compat_flock > > - struct compat_flock64 > > - struct compat_statfs > > - struct compat_ipc64_perm, compat_semid64_ds, > > compat_msqid64_ds, compat_shmid64_ds > > > > Cleanup duplicate definitions and merge them into asm-generic. > > The flock part seems to clash with the general compat_flock > consolidation. Otherwise this looks like a good idea. Okay, In the next version, I would rebase on general compat_flock consolidation v4. -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 16/17] riscv: compat: Add COMPAT Kbuild skeletal support
On Mon, Jan 31, 2022 at 8:26 PM Christoph Hellwig wrote: > > Given that most rv64 implementations can't run in rv32 mode, what is the > failure mode if someone tries it with the compat mode enabled? A static linked simple hello_world could still run on a non-compat support hardware. But most rv32 apps would meet different userspace segment faults. Current code would let the machine try the rv32 apps without detecting whether hw support or not. -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/5] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h
Acked-by: Guo Ren
On Mon, Jan 31, 2022 at 2:49 PM Christoph Hellwig wrote:
>
> The F_GETLK64/F_SETLK64/F_SETLKW64 fcntl opcodes are only implemented
> for the 32-bit syscall APIs, but are also needed for compat handling
> on 64-bit kernels.
>
> Consolidate them in unistd.h instead of definining the internal compat
> definitions in compat.h, which is rather errror prone (e.g. parisc
> gets the values wrong currently).
>
> Note that before this change they were never visible to userspace due
> to the fact that CONFIG_64BIT is only set for kernel builds.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/arm64/include/asm/compat.h| 4
> arch/mips/include/asm/compat.h | 4
> arch/mips/include/uapi/asm/fcntl.h | 4 ++--
> arch/powerpc/include/asm/compat.h | 4
> arch/s390/include/asm/compat.h | 4
> arch/sparc/include/asm/compat.h| 4
> arch/x86/include/asm/compat.h | 4
> include/uapi/asm-generic/fcntl.h | 4 ++--
> tools/include/uapi/asm-generic/fcntl.h | 2 --
> 9 files changed, 4 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/include/asm/compat.h b/arch/arm64/include/asm/compat.h
> index eaa6ca062d89b..2763287654081 100644
> --- a/arch/arm64/include/asm/compat.h
> +++ b/arch/arm64/include/asm/compat.h
> @@ -73,10 +73,6 @@ struct compat_flock {
> compat_pid_tl_pid;
> };
>
> -#define F_GETLK64 12 /* using 'struct flock64' */
> -#define F_SETLK64 13
> -#define F_SETLKW64 14
> -
> struct compat_flock64 {
> short l_type;
> short l_whence;
> diff --git a/arch/mips/include/asm/compat.h b/arch/mips/include/asm/compat.h
> index bbb3bc5a42fd8..6a350c1f70d7e 100644
> --- a/arch/mips/include/asm/compat.h
> +++ b/arch/mips/include/asm/compat.h
> @@ -65,10 +65,6 @@ struct compat_flock {
> s32 pad[4];
> };
>
> -#define F_GETLK64 33
> -#define F_SETLK64 34
> -#define F_SETLKW64 35
> -
> struct compat_flock64 {
> short l_type;
> short l_whence;
> diff --git a/arch/mips/include/uapi/asm/fcntl.h
> b/arch/mips/include/uapi/asm/fcntl.h
> index 9e44ac810db94..0369a38e3d4f2 100644
> --- a/arch/mips/include/uapi/asm/fcntl.h
> +++ b/arch/mips/include/uapi/asm/fcntl.h
> @@ -44,11 +44,11 @@
> #define F_SETOWN 24 /* for sockets. */
> #define F_GETOWN 23 /* for sockets. */
>
> -#ifndef __mips64
> +#if __BITS_PER_LONG == 32 || defined(__KERNEL__)
> #define F_GETLK64 33 /* using 'struct flock64' */
> #define F_SETLK64 34
> #define F_SETLKW64 35
> -#endif
> +#endif /* __BITS_PER_LONG == 32 || defined(__KERNEL__) */
>
> #if _MIPS_SIM != _MIPS_SIM_ABI64
> #define __ARCH_FLOCK_EXTRA_SYSID long l_sysid;
> diff --git a/arch/powerpc/include/asm/compat.h
> b/arch/powerpc/include/asm/compat.h
> index 7afc96fb6524b..83d8f70779cbc 100644
> --- a/arch/powerpc/include/asm/compat.h
> +++ b/arch/powerpc/include/asm/compat.h
> @@ -52,10 +52,6 @@ struct compat_flock {
> compat_pid_tl_pid;
> };
>
> -#define F_GETLK64 12 /* using 'struct flock64' */
> -#define F_SETLK64 13
> -#define F_SETLKW64 14
> -
> struct compat_flock64 {
> short l_type;
> short l_whence;
> diff --git a/arch/s390/include/asm/compat.h b/arch/s390/include/asm/compat.h
> index cdc7ae72529d8..0f14b3188b1bb 100644
> --- a/arch/s390/include/asm/compat.h
> +++ b/arch/s390/include/asm/compat.h
> @@ -110,10 +110,6 @@ struct compat_flock {
> compat_pid_tl_pid;
> };
>
> -#define F_GETLK64 12
> -#define F_SETLK64 13
> -#define F_SETLKW64 14
> -
> struct compat_flock64 {
> short l_type;
> short l_whence;
> diff --git a/arch/sparc/include/asm/compat.h b/arch/sparc/include/asm/compat.h
> index bd949fcf9d63b..108078751bb5a 100644
> --- a/arch/sparc/include/asm/compat.h
> +++ b/arch/sparc/include/asm/compat.h
> @@ -84,10 +84,6 @@ struct compat_flock {
> short __unused;
> };
>
> -#define F_GETLK64 12
> -#define F_SETLK64 13
> -#define F_SETLKW64 14
> -
> struct compat_flock64 {
> short l_type;
> short l_whence;
> diff --git a/arch/x86/include/asm/compat.h b/arch/x86/include/asm/compat.h
> index 7516e4199b3c6..8d19a212f4f26 100644
> --- a/arch/x86/include/asm/compat.h
> +++ b/arch/x86/include/asm/compat.h
> @@ -58,10 +58,6 @@ struct compat_flock {
> compat_pid_tl_pid;
> };
>
> -#define F_GETLK64 12
Re: [PATCH 2/5] uapi: simplify __ARCH_FLOCK{,64}_PAD a little
On Mon, Jan 31, 2022 at 2:49 PM Christoph Hellwig wrote:
>
> Don't bother to define the symbols empty, just don't use them. That
> makes the intent a little more clear.
>
> Signed-off-by: Christoph Hellwig
> ---
> include/uapi/asm-generic/fcntl.h | 12
> tools/include/uapi/asm-generic/fcntl.h | 12
> 2 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/include/uapi/asm-generic/fcntl.h
> b/include/uapi/asm-generic/fcntl.h
> index caa482e3b01af..c53897ca5d402 100644
> --- a/include/uapi/asm-generic/fcntl.h
> +++ b/include/uapi/asm-generic/fcntl.h
> @@ -193,22 +193,16 @@ struct f_owner_ex {
> #define F_LINUX_SPECIFIC_BASE 1024
>
> #ifndef HAVE_ARCH_STRUCT_FLOCK
> -#ifndef __ARCH_FLOCK_PAD
> -#define __ARCH_FLOCK_PAD
> -#endif
> -
> struct flock {
> short l_type;
> short l_whence;
> __kernel_off_t l_start;
> __kernel_off_t l_len;
> __kernel_pid_t l_pid;
> +#ifdef __ARCH_FLOCK_PAD
> __ARCH_FLOCK_PAD
> -};
> #endif
> -
> -#ifndef __ARCH_FLOCK64_PAD
> -#define __ARCH_FLOCK64_PAD
> +};
> #endif
>
> struct flock64 {
> @@ -217,7 +211,9 @@ struct flock64 {
> __kernel_loff_t l_start;
> __kernel_loff_t l_len;
> __kernel_pid_t l_pid;
> +#ifdef __ARCH_FLOCK64_PAD
> __ARCH_FLOCK64_PAD
> +#endif
> };
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> diff --git a/tools/include/uapi/asm-generic/fcntl.h
> b/tools/include/uapi/asm-generic/fcntl.h
> index 4a49d33ca4d55..82054502b9748 100644
> --- a/tools/include/uapi/asm-generic/fcntl.h
> +++ b/tools/include/uapi/asm-generic/fcntl.h
> @@ -188,22 +188,16 @@ struct f_owner_ex {
> #define F_LINUX_SPECIFIC_BASE 1024
>
> #ifndef HAVE_ARCH_STRUCT_FLOCK
> -#ifndef __ARCH_FLOCK_PAD
> -#define __ARCH_FLOCK_PAD
> -#endif
> -
> struct flock {
> short l_type;
> short l_whence;
> __kernel_off_t l_start;
> __kernel_off_t l_len;
> __kernel_pid_t l_pid;
> +#ifdef __ARCH_FLOCK_PAD
> __ARCH_FLOCK_PAD
> -};
> #endif
> -
> -#ifndef __ARCH_FLOCK64_PAD
> -#define __ARCH_FLOCK64_PAD
> +};
> #endif
>
> struct flock64 {
> @@ -212,7 +206,9 @@ struct flock64 {
> __kernel_loff_t l_start;
> __kernel_loff_t l_len;
> __kernel_pid_t l_pid;
> +#ifdef __ARCH_FLOCK64_PAD
> __ARCH_FLOCK64_PAD
> +#endif
> };
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> --
> 2.30.2
>
Reviewed-by: Guo Ren
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 1/5] uapi: remove the unused HAVE_ARCH_STRUCT_FLOCK64 define
Reviewed-by: Guo Ren
On Mon, Jan 31, 2022 at 2:49 PM Christoph Hellwig wrote:
>
> Signed-off-by: Christoph Hellwig
> ---
> include/uapi/asm-generic/fcntl.h | 2 --
> tools/include/uapi/asm-generic/fcntl.h | 2 --
> 2 files changed, 4 deletions(-)
>
> diff --git a/include/uapi/asm-generic/fcntl.h
> b/include/uapi/asm-generic/fcntl.h
> index ecd0f5bdfc1d6..caa482e3b01af 100644
> --- a/include/uapi/asm-generic/fcntl.h
> +++ b/include/uapi/asm-generic/fcntl.h
> @@ -207,7 +207,6 @@ struct flock {
> };
> #endif
>
> -#ifndef HAVE_ARCH_STRUCT_FLOCK64
> #ifndef __ARCH_FLOCK64_PAD
> #define __ARCH_FLOCK64_PAD
> #endif
> @@ -220,6 +219,5 @@ struct flock64 {
> __kernel_pid_t l_pid;
> __ARCH_FLOCK64_PAD
> };
> -#endif
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> diff --git a/tools/include/uapi/asm-generic/fcntl.h
> b/tools/include/uapi/asm-generic/fcntl.h
> index ac190958c9814..4a49d33ca4d55 100644
> --- a/tools/include/uapi/asm-generic/fcntl.h
> +++ b/tools/include/uapi/asm-generic/fcntl.h
> @@ -202,7 +202,6 @@ struct flock {
> };
> #endif
>
> -#ifndef HAVE_ARCH_STRUCT_FLOCK64
> #ifndef __ARCH_FLOCK64_PAD
> #define __ARCH_FLOCK64_PAD
> #endif
> @@ -215,6 +214,5 @@ struct flock64 {
> __kernel_pid_t l_pid;
> __ARCH_FLOCK64_PAD
> };
> -#endif
>
> #endif /* _ASM_GENERIC_FCNTL_H */
> --
> 2.30.2
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 08/17] riscv: compat: syscall: Add compat_sys_call_table implementation
On Sun, Jan 30, 2022 at 7:32 PM Arnd Bergmann wrote: > > On Sun, Jan 30, 2022 at 6:54 AM Guo Ren wrote: > > On Sun, Jan 30, 2022 at 6:41 AM Arnd Bergmann wrote: > > > > > > I would make these endian-specific, and reverse them on big-endian > > > architectures. That way it > > > should be possible to share them across all compat architectures > > > without needing the override > > > option. > > I hope it could be another patch. Because it's not clear to > > _LITTLE_ENDIAN definition in archs. > > > > eg: Names could be __ORDER_LITTLE_ENDIAN__ CPU_LITTLE_ENDIAN > > SYS_SUPPORTS_LITTLE_ENDIAN __LITTLE_ENDIAN > > > > riscv is little-endian, but no any LITTLE_ENDIAN definition. > > > > So let's keep them in the patch, first, Thx > > The correct way to do it is to check for CONFIG_CPU_BIG_ENDIAN, > which works on all architectures. Since nothing else selects the > __ARCH_WANT_COMPAT_* symbols, there is also no risk for > regressions, so just use this and leave the #ifndef compat_arg_u64 > check in place. Okay, got it. > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 08/17] riscv: compat: syscall: Add compat_sys_call_table implementation
On Sun, Jan 30, 2022 at 6:41 AM Arnd Bergmann wrote: > > > Implement compat sys_call_table and some system call functions: > > truncate64, ftruncate64, fallocate, pread64, pwrite64, > > sync_file_range, readahead, fadvise64_64 which need argument > > translation. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > This all looks really good, but I would change one detail: > > > +#ifndef compat_arg_u64 > > +#define compat_arg_u64(name) u32 name##_lo, u32 name##_hi > > +#define compat_arg_u64_dual(name) u32, name##_lo, u32, name##_hi > > +#define compat_arg_u64_glue(name) (((u64)name##_hi << 32) | \ > > +((u64)name##_lo & 0xUL)) > > +#endif > > I would make these endian-specific, and reverse them on big-endian > architectures. That way it > should be possible to share them across all compat architectures > without needing the override > option. I hope it could be another patch. Because it's not clear to _LITTLE_ENDIAN definition in archs. eg: Names could be __ORDER_LITTLE_ENDIAN__ CPU_LITTLE_ENDIAN SYS_SUPPORTS_LITTLE_ENDIAN __LITTLE_ENDIAN riscv is little-endian, but no any LITTLE_ENDIAN definition. So let's keep them in the patch, first, Thx > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V4 06/17] riscv: compat: Add basic compat date type implementation
On Sun, Jan 30, 2022 at 5:56 AM Arnd Bergmann wrote: > > On Sat, Jan 29, 2022 at 1:17 PM wrote: > > + > > +#define COMPAT_RLIM_INFINITY 0x7fff > > > > +#define F_GETLK64 12 > > +#define F_SETLK64 13 > > +#define F_SETLKW64 14 > > These now come from the generic definitions I think. The flock definitions > are just the normal ones, Yes, it could be removed after Christoph Hellwig's patch merged. > and AFAICT the RLIM_INIFINITY definition here > is actually wrong and should be the default 0xu to match the > native (~0UL) definition. Yes, native rv32 used ~0UL, although its task_size is only 2.4GB. I would remove #define COMPAT_RLIM_INFINITY 0x7fff > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 03/17] asm-generic: compat: Cleanup duplicate definitions
On Thu, Jan 20, 2022 at 9:02 PM Arnd Bergmann wrote:
>
> On Thu, Jan 20, 2022 at 8:38 AM wrote:
> >
> > From: Guo Ren
> >
> > There are 7 64bit architectures that support Linux COMPAT mode to
> > run 32bit applications. A lot of definitions are duplicate:
> > - COMPAT_USER_HZ
> > - COMPAT_RLIM_INFINITY
> > - COMPAT_OFF_T_MAX
> > - __compat_uid_t, __compat_uid_t
> > - compat_dev_t
> > - compat_ipc_pid_t
> > - struct compat_flock
> > - struct compat_flock64
> > - struct compat_statfs
> > - struct compat_ipc64_perm, compat_semid64_ds,
> > compat_msqid64_ds, compat_shmid64_ds
> >
> > Cleanup duplicate definitions and merge them into asm-generic.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
>
> > ---
> > arch/arm64/include/asm/compat.h | 108 +++---
> > arch/mips/include/asm/compat.h| 24 ++
> > arch/parisc/include/asm/compat.h | 47 ++--
> > arch/powerpc/include/asm/compat.h | 47 ++--
> > arch/s390/include/asm/compat.h| 109 +++---
> > arch/sparc/include/asm/compat.h | 39 --
> > arch/x86/include/asm/compat.h | 114 +++-
> > include/asm-generic/compat.h | 122 ++
> > 8 files changed, 191 insertions(+), 419 deletions(-)
> >
> > diff --git a/arch/arm64/include/asm/compat.h
> > b/arch/arm64/include/asm/compat.h
> > index eaa6ca062d89..f54f295efae3 100644
> > --- a/arch/arm64/include/asm/compat.h
> > +++ b/arch/arm64/include/asm/compat.h
> > @@ -5,9 +5,18 @@
> > #ifndef __ASM_COMPAT_H
> > #define __ASM_COMPAT_H
> >
> > +#define COMPAT_RLIM_INFINITY 0x
> ...
> > +#ifndef COMPAT_RLIM_INFINITY
> > +#define COMPAT_RLIM_INFINITY 0x7fff
> > +#endif
>
> While this is a correct conversion, I think the default should
> be 0x, to match the asm-generic RLIM_INFINITY
> definition, with only mips and sparc getting the exception
Okay
>
> > -struct compat_flock {
> > - short l_type;
> > - short l_whence;
> > - compat_off_tl_start;
> > - compat_off_tl_len;
> > - compat_pid_tl_pid;
> > -};
> ...
> > +#ifndef compat_flock
> > +struct compat_flock {
> > + compat_short_t l_type;
> > + compat_short_t l_whence;
> > + compat_off_tl_start;
> > + compat_off_tl_len;
> > + compat_pid_tl_pid;
> > +} __attribute__((packed));
> > +#endif
>
> You are adding __attribute__((packed)) here, which I think has
> no effect on the layout on the structure on any of the architectures
> but it does change the alignment requirements needlessly.
>
> Better leave it without the attribute.
Okay
>
> > -struct compat_flock64 {
> > - short l_type;
> > - short l_whence;
> > - compat_loff_t l_start;
> > - compat_loff_t l_len;
> > - compat_pid_tl_pid;
> > -};
> ...
> > +#ifndef compat_flock64
> > +struct compat_flock64 {
> > + compat_short_t l_type;
> > + compat_short_t l_whence;
> > + compat_loff_t l_start;
> > + compat_loff_t l_len;
> > + compat_pid_tl_pid;
> > +} __attribute__((packed));
> > +#endif
>
> This one is different: on all architectures other than x86,
> the added packed attribute changes the size of the
> structure by removing the four padding bytes at the
> end. x86 originally added the attribute here to work around
> the weirdness of the x86-32 ABI that aligns 64-bit values
> on a 4-byte boundary.
>
> The easiest workaround would be to have x86 keep its
> custom definition. A slightly nicer version would drop the
> attribute on x86 as well but instead change the compat_loff_t
> definition to use compat_s64 instead of s64, giving it the
> correct alignment.
Okay, I would leave x86 origin first.
>
> > -struct compat_statfs {
> > - int f_type;
> > - int f_bsize;
> > - int f_blocks;
> > - int f_bfree;
> > - int f_bavail;
> > - int f_files;
> > - int f_ffree;
> > - compat_fsid_t f_fsid;
> > - int f_namelen; /* SunOS ignores this field. */
> > - int f_frsize;
> > - int f_flags;
> > -
Re: [PATCH V3 08/17] riscv: compat: syscall: Add compat_sys_call_table implementation
On Fri, Jan 21, 2022 at 4:57 PM Arnd Bergmann wrote: > > On Fri, Jan 21, 2022 at 7:25 AM Guo Ren wrote: > > On Thu, Jan 20, 2022 at 10:43 PM Arnd Bergmann wrote: > > > On Thu, Jan 20, 2022 at 8:39 AM wrote: > > > > Are you sure these are the right calling conventions? According to [1], > > > I think the 64-bit argument should be in an aligned pair of registers, > > > which means you need an extra pad argument as in the arm64 version > > > of these functions. Same for ftruncate64, pread64, pwrite64, and > > > readahead. > > > > [1] has abandoned. > > > > See: > > https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc > > Ok, thanks for the reference, I picked the first one that came up in > a google search and didn't expect this to ever have changed. > > > > I still feel like these should be the common implementations next to the > > > native handlers inside of an #ifdef CONFIG_COMPAT. > > > > > > The names clash with the custom versions defined for powerpc and sparc, > > > but the duplicates look compatible if you can account for the padded > > > argument and the lo/hi order of the pairs, so could just be removed here > > > (all other architectures use custom function names instead). > > I would try it later. > > This becomes easier then, as powerpc and sparc already have the non-padded > calling conventions, so you could just generalize those without looking at > the other architectures or adding the padding. The powerpc version already > has the dual-endian version, so using that will work on big-endian sparc and > on little-endian riscv as well, though we may need to come up with a better > name > for the arg_u32/arg_u64/merge_64 macros in order to put that into a global > header without namespace collisions. Sounds good, thanks! > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 13/17] riscv: compat: signal: Add rt_frame implementation
On Thu, Jan 20, 2022 at 6:31 PM Arnd Bergmann wrote: > > On Thu, Jan 20, 2022 at 8:39 AM wrote: > > > > From: Guo Ren > > > > Implement compat_setup_rt_frame for sigcontext save & restore. The > > main process is the same with signal, but the rv32 pt_regs' size > > is different from rv64's, so we needs convert them. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > I hope someone else can properly review this part, it's not my area > but it looks complex enough that it could bring subtle bugs. Here are ltp signal test results: sigaction01PASS 0 sigaction02PASS 0 sigaltstack01 PASS 0 sigaltstack02 PASS 0 sighold02 PASS 0 signal01 PASS 0 signal02 PASS 0 signal03 PASS 0 signal04 PASS 0 signal05 PASS 0 signal06 CONF 32 signalfd01 PASS 0 signalfd4_01 PASS 0 signalfd4_02 PASS 0 sigpending02 PASS 0 sigprocmask01 PASS 0 sigrelse01 PASS 0 sigsuspend01 PASS 0 sigtimedwait01 PASS 0 sigwait01 PASS 0 sigwaitinfo01 CONF 32 > >Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 06/17] riscv: compat: Add basic compat date type implementation
On Thu, Jan 20, 2022 at 5:35 PM Arnd Bergmann wrote: > > On Thu, Jan 20, 2022 at 8:38 AM wrote: > > > @@ -0,0 +1,136 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > +#ifndef __ASM_COMPAT_H > > +#define __ASM_COMPAT_H > > + > > +#define compat_mode_t compat_mode_t > > +typedef u16compat_mode_t; > > I think this one is wrong, as rv32 should get the native definition from > > include/uapi/asm-generic/posix_types.h:typedef unsigned int > __kernel_mode_t; > > I think it works if you just remove those two lines. The rest looks good to > me. Yes, you are right. compat_mode_t should be unsigned int. > >Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 17/17] KVM: compat: riscv: Prevent KVM_COMPAT from being selected
On Thu, Jan 20, 2022 at 6:32 PM Arnd Bergmann wrote: > > On Thu, Jan 20, 2022 at 8:39 AM wrote: > > > > From: Guo Ren > > > > Current riscv doesn't support the 32bit KVM/arm API. Let's make it > > clear by not selecting KVM_COMPAT. > > > > Signed-off-by: Guo Ren > > --- > > virt/kvm/Kconfig | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/virt/kvm/Kconfig b/virt/kvm/Kconfig > > index f4834c20e4a6..a8c5c9f06b3c 100644 > > --- a/virt/kvm/Kconfig > > +++ b/virt/kvm/Kconfig > > @@ -53,7 +53,7 @@ config KVM_GENERIC_DIRTYLOG_READ_PROTECT > > > > config KVM_COMPAT > > def_bool y > > - depends on KVM && COMPAT && !(S390 || ARM64) > > + depends on KVM && COMPAT && !(S390 || ARM64 || RISCV) > > Maybe this should be flipped around into a positive list now? I think it's another patch to do that. Not in this series. > The remaining architectures would be mips, powerpc and x86, but it's unclear > if this actually meant to work on all of them, or any potential ones > added in the Yes, it's unclear and arch maintainers need to confirm that. > future. > >Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 08/17] riscv: compat: syscall: Add compat_sys_call_table implementation
On Thu, Jan 20, 2022 at 10:43 PM Arnd Bergmann wrote:
>
> On Thu, Jan 20, 2022 at 8:39 AM wrote:
> >
> > /* The array of function pointers for syscalls. */
> > extern void * const sys_call_table[];
> > +#ifdef CONFIG_COMPAT
> > +extern void * const compat_sys_call_table[];
> > +#endif
>
> No need for the #ifdef, the normal convention is to just define the
> extern declaration unconditionally for symbols that may or may not be defined.
Okay
>
> > +COMPAT_SYSCALL_DEFINE3(truncate64, const char __user *, pathname,
> > + arg_u32p(length))
> > +{
> > + return ksys_truncate(pathname, arg_u64(length));
> > +}
>
> Are you sure these are the right calling conventions? According to [1],
> I think the 64-bit argument should be in an aligned pair of registers,
> which means you need an extra pad argument as in the arm64 version
> of these functions. Same for ftruncate64, pread64, pwrite64, and
> readahead.
[1] has abandoned.
See:
https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc
Ltp test results:
ftruncate01PASS 0
ftruncate01_64 PASS 0
ftruncate03PASS 0
ftruncate03_64 PASS 0
ftruncate04CONF 32
ftruncate04_64 CONF 32
truncate02 PASS 0
truncate02_64 PASS 0
truncate03 PASS 0
truncate03_64 PASS 0
pread01PASS 0
pread01_64 PASS 0
pread02PASS 0
pread02_64 PASS 0
pread03PASS 0
pread03_64 PASS 0
pwrite01_64PASS 0
pwrite02_64PASS 0
pwrite03_64PASS 0
pwrite04_64PASS 0
readahead01PASS 0
readahead02CONF 32
>
> > +COMPAT_SYSCALL_DEFINE3(ftruncate64, unsigned int, fd, arg_u32p(length))
> > +{
> > + return ksys_ftruncate(fd, arg_u64(length));
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE6(fallocate, int, fd, int, mode,
> > + arg_u32p(offset), arg_u32p(len))
> > +{
> > + return ksys_fallocate(fd, mode, arg_u64(offset), arg_u64(len));
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE5(pread64, unsigned int, fd, char __user *, buf,
> > + size_t, count, arg_u32p(pos))
> > +{
> > + return ksys_pread64(fd, buf, count, arg_u64(pos));
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE5(pwrite64, unsigned int, fd,
> > + const char __user *, buf, size_t, count,
> > arg_u32p(pos))
> > +{
> > + return ksys_pwrite64(fd, buf, count, arg_u64(pos));
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE6(sync_file_range, int, fd, arg_u32p(offset),
> > + arg_u32p(nbytes), unsigned int, flags)
> > +{
> > + return ksys_sync_file_range(fd, arg_u64(offset), arg_u64(nbytes),
> > + flags);
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE4(readahead, int, fd, arg_u32p(offset),
> > + size_t, count)
> > +{
> > + return ksys_readahead(fd, arg_u64(offset), count);
> > +}
> > +
> > +COMPAT_SYSCALL_DEFINE6(fadvise64_64, int, fd, int, advice,
> > arg_u32p(offset),
> > + arg_u32p(len))
> > +{
> > + return ksys_fadvise64_64(fd, arg_u64(offset), arg_u64(len), advice);
> > +}
>
> I still feel like these should be the common implementations next to the
> native handlers inside of an #ifdef CONFIG_COMPAT.
>
> The names clash with the custom versions defined for powerpc and sparc,
> but the duplicates look compatible if you can account for the padded
> argument and the lo/hi order of the pairs, so could just be removed here
> (all other architectures use custom function names instead).
I would try it later.
>
> Arnd
>
> [1] https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 15/17] riscv: compat: Add UXL_32 support in start_thread
On Thu, Jan 20, 2022 at 9:39 PM Arnd Bergmann wrote: > > On Thu, Jan 20, 2022 at 8:39 AM wrote: > > + > > +#ifdef CONFIG_COMPAT > > + if (is_compat_task()) > > + regs->status |= SR_UXL_32; > > +#endif > > > You should not need that #ifdef, as the is_compat_task() definition is > meant to drop the code at compile time, unless the SR_UXL_32 > definition is not visible here. I almost put CONFIG_COMPAT in every compat related code, because I hope the next arch that wants to support COMPAT could easily find where to be modified. > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 10/17] riscv: compat: Add elf.h implementation
On Thu, Jan 20, 2022 at 9:33 PM Arnd Bergmann wrote:
>
> On Thu, Jan 20, 2022 at 8:39 AM wrote:
> > From: Guo Ren
> >
> > Implement necessary type and macro for compat elf. See the code
> > comment for detail.
> >
> > Signed-off-by: Guo Ren
>
> Reviewed-by: Arnd Bergmann
>
> > +
> > +/*
> > + * FIXME: not sure SET_PERSONALITY for compat process is right!
> > + */
> > +#define SET_PERSONALITY(ex)\
> > +do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
> > + set_thread_flag(TIF_32BIT); \
> > + else\
> > + clear_thread_flag(TIF_32BIT); \
> > + if (personality(current->personality) != PER_LINUX32) \
> > + set_personality(PER_LINUX | \
> > + (current->personality & (~PER_MASK))); \
> > +} while (0)
> > +
>
> The implementation looks good to me now, you can remove that comment above
> it.
Thx for pointing it out. I forgot.
>
> Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V3 07/17] riscv: compat: Re-implement TASK_SIZE for COMPAT_32BIT
On Thu, Jan 20, 2022 at 8:53 PM David Laight wrote: > > > > Limit 32-bit compatible process in 0-2GB virtual address range > > > (which is enough for real scenarios), because it could avoid > > > address sign extend problem when 32-bit enter 64-bit and ease > > > software design. > > Eh? > I thought nearly all the other 32bit unix ports (of any flavour) > put the user-kernel boundary at 3GB. No, riscv32 is about 2.4G, csky is 2G/2.5G. > (Apart from some very old sparc ones that use 3.5GB.) > > 2GB is used by Windows. > > I think the x86-64 32bit compat code even puts the boundary at 4GB. Yes, we could give rv32 compat for 4GB with some effort. But it's unnecessary. There are no history issues for rv32, we use compat mode to reduce memory footprint. eg: only 64MB memory available. At end compat for 4GB is another topic, let's give the initial compat for 2GB support to riscv. > > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 > 1PT, UK > Registration No: 1397386 (Wales) -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/5] uapi: always define F_GETLK64/F_SETLK64/F_SETLKW64 in fcntl.h
On Tue, Jan 11, 2022 at 11:33 PM Arnd Bergmann wrote: > > On Tue, Jan 11, 2022 at 9:35 AM Christoph Hellwig wrote: > > > > The fcntl F_GETLK64/F_SETLK64/F_SETLKW64 are only implemented for the > > 32-bit syscall APIs, but we also need them for compat handling on 64-bit > > builds. Redefining them is error prone (as shown by the example that > > parisc gets it wrong currently), so we should use the same defines for > > both case. In theory we could try to hide them from userspace, but > > given that only MIPS actually gets that right, while the asm-generic > > version used by most architectures relies on a Kconfig symbol that can't > > be relied on to be set properly by userspace is a clear indicator to not > > bother. > > > > Signed-off-by: Christoph Hellwig > > --- > > > diff --git a/include/uapi/asm-generic/fcntl.h > > b/include/uapi/asm-generic/fcntl.h > > index 98f4ff165b776..43d7c44031be0 100644 > > --- a/include/uapi/asm-generic/fcntl.h > > +++ b/include/uapi/asm-generic/fcntl.h > > @@ -116,13 +116,11 @@ > > #define F_GETSIG 11 /* for sockets. */ > > #endif > > > > -#ifndef CONFIG_64BIT > > #ifndef F_GETLK64 > > #define F_GETLK64 12 /* using 'struct flock64' */ > > #define F_SETLK64 13 > > #define F_SETLKW64 14 > > #endif > > -#endif > > > > #ifndef F_SETOWN_EX > > #define F_SETOWN_EX15 > > This is a very subtle change to the exported UAPI header contents: > On 64-bit architectures, the three unusable numbers are now always > shown, rather than depending on a user-controlled symbol. > > This is probably what we want here for compatibility reasons, but I think > it should be explained in the changelog text, and I'd like Jeff or Bruce > to comment on it as well: the alternative here would be to make the > uapi definition depend on __BITS_PER_LONG==32, which is __BITS_PER_LONG==32 || __KERNEL__ just for kernel use in compat. > technically the right thing to do but more a of a change. > >Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V2 03/17] asm-generic: fcntl: compat: Remove duplicate definitions
On Mon, Jan 10, 2022 at 9:35 PM Arnd Bergmann wrote: > > On Tue, Dec 28, 2021 at 3:39 PM wrote: > > > > From: Guo Ren > > > > Remove duplicate F_GETLK64,F_SETLK64,F_SETLKW64 definitions in > > arch/*/include/asm/compat.h. > > > > Signed-off-by: Guo Ren > > Signed-off-by: Guo Ren > > Cc: Arnd Bergmann > > Unfortunately, this one does not look correct to me: > > > @@ -116,7 +116,7 @@ > > #define F_GETSIG 11 /* for sockets. */ > > #endif > > > > -#ifndef CONFIG_64BIT > > +#if !defined(CONFIG_64BIT) || defined(CONFIG_COMPAT) > > #ifndef F_GETLK64 > > #define F_GETLK64 12 /* using 'struct flock64' */ > > #define F_SETLK64 13 > > The problem here is that include/uapi/ headers cannot contain checks for > CONFIG_* symbols because those may have different meanings in user space > compared to kernel. > > This is a preexisting problem in the header, but I think the change > makes it worse. > > With the current behavior, user space will always see the definitions, > unless it happens to have its own definition for CONFIG_64BIT already. > On 64-bit parisc, this has the effect of defining the macros to the > same values as F_SETOWN/F_SETSIG/F_GETSIG, which is potentially > harmful. On MIPS, it uses values that are different from the 32-bit numbers > but are otherwise unused. Everywhere else, we get the definition from > the 32-bit architecture in user space, which will do nothing in the kernel. > > The correct check for a uapi header would be to test for > __BITS_PER_LONG==32. We should probably do that here, but > this won't help you move the definitions, and it is a user-visible change > as the incorrect definition will no longer be visible. [Adding Jeff and Bruce > (the flock mainainers) to Cc for additional feedback on this] > > For your series, I would suggest just moving the macro definitions to > include/linux/compat.h along with the 'struct compat_flock64' > definition, and leaving the duplicate one in the uapi header unchanged > until we have decided on a solution. Okay. > > Arnd -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V2 11/17] riscv: compat: Add elf.h implementation
On Mon, Jan 10, 2022 at 10:29 PM Arnd Bergmann wrote:
>
> On Tue, Dec 28, 2021 at 3:39 PM wrote:
> >
> > From: Guo Ren
> >
> > Implement necessary type and macro for compat elf. See the code
> > comment for detail.
> >
> > Signed-off-by: Guo Ren
> > Signed-off-by: Guo Ren
> > Cc: Arnd Bergmann
>
> This looks mostly correct,
>
> > +/*
> > + * FIXME: not sure SET_PERSONALITY for compat process is right!
> > + */
> > +#define SET_PERSONALITY(ex) \
> > +do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
> > + set_thread_flag(TIF_32BIT);\
> > + else \
> > + clear_thread_flag(TIF_32BIT); \
> > + set_personality(PER_LINUX | (current->personality & (~PER_MASK))); \
> > +} while (0)
>
> This means the personality after exec is always set to PER_LINUX, not
> PER_LINUX32, which I think is wrong: you want the PER_LINUX32
> setting to stick, just like the upper bits do in the default implementation.
>
> What the other ones do is:
>
> | arch/parisc/include/asm/elf.h-
> set_personality((current->personality & ~PER_MASK) | PER_LINUX); \
>
> This looks like the same problem you introduce here: always forcing PER_LINUX
> instead of PER_LINUX32 makes it impossible to use PER_LINUX32.
>
> | arch/alpha/include/asm/elf.h:#define SET_PERSONALITY(EX)
>\
> | arch/alpha/include/asm/elf.h- set_personality(((EX).e_flags &
> EF_ALPHA_32BIT) \
> | arch/alpha/include/asm/elf.h- ? PER_LINUX_32BIT : PER_LINUX)
> | arch/csky/include/asm/elf.h:#define SET_PERSONALITY(ex)
> set_personality(PER_LINUX)
> | arch/nds32/include/asm/elf.h:#define SET_PERSONALITY(ex)
> set_personality(PER_LINUX)
>
> These look even worse: instead of forcing the lower bits to
> PER_LINUX/PER_LINUX32 and
> leaving the upper bits untouched, these also clear the upper bits
> unconditionally.
>
> | arch/arm64/include/asm/elf.h:#define SET_PERSONALITY(ex)
>\
> | arch/arm64/include/asm/elf.h- current->personality &=
> ~READ_IMPLIES_EXEC; \
> | arch/x86/um/asm/elf.h:#define SET_PERSONALITY(ex) do {} while(0)
> | arch/x86/include/asm/elf.h:#define set_personality_64bit() do {
> } while (0)
> | arch/x86/kernel/process_64.c:static void __set_personality_ia32(void)
> | current->personality |= force_personality32;
>
> Inconsistent: does not enforce PER_LINUX/PER_LINUX32 as the default
> implementation
> does, but just leaves the value untouched (other than (re)setting
> READ_IMPLIES_EXEC).
> I think this is harmless otherwise, as we generally ignore the lower
> bits, except for the
> bit of code that checks for PER_LINUX32 in override_architecture() to mangle
> the
> output of sys_newuname() or in /proc/cpuinfo.
>
> | arch/s390/include/asm/elf.h-if
> (personality(current->personality) != PER_LINUX32) \
> | arch/s390/include/asm/elf.h-set_personality(PER_LINUX |
>\
> | arch/s390/include/asm/elf.h-
> (current->personality & ~PER_MASK));\
> | arch/powerpc/include/asm/elf.h- if
> (personality(current->personality) != PER_LINUX32) \
> | arch/powerpc/include/asm/elf.h- set_personality(PER_LINUX |
>\
> | arch/powerpc/include/asm/elf.h-
> (current->personality & (~PER_MASK))); \
> | arch/sparc/include/asm/elf_64.h-if
> (personality(current->personality) != PER_LINUX32) \
> | arch/sparc/include/asm/elf_64.h-
> set_personality(PER_LINUX | \
> | arch/sparc/include/asm/elf_64.h-
> (current->personality & (~PER_MASK))); \
>
> This is probably the behavior you want to copy.
Thank you very much for your detailed explanation. Here is my modification.
+#define SET_PERSONALITY(ex)\
+do {if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
+ set_thread_flag(TIF_32BIT); \
+ else\
+ clear_thread_flag(TIF_32BIT); \
+ if (personality(current->personality) != PER_LINUX32) \
+ set_personality(PER_LINUX | \
+ (current->personality & (~PER_MASK))); \
+} while (0)
>
> Arnd
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH V2 5/8] sched: s390: Remove unused TASK_SIZE_OF
On Sun, Dec 26, 2021 at 12:26 AM Heiko Carstens wrote: > > On Sat, Dec 25, 2021 at 12:54:27PM +0800, guo...@kernel.org wrote: > > From: Guo Ren > > > > This macro isn't used in Linux sched, now. Delete in > > include/linux/sched.h and arch's include/asm. > > > > Signed-off-by: Guo Ren > > Reviewed-by: Arnd Bergmann > > --- > > arch/s390/include/asm/processor.h | 3 +-- > > 1 file changed, 1 insertion(+), 2 deletions(-) > > I could pick this up for s390, however sender (From: field) of this patch > series does not match From: and Signed-off-by: fields above. Thx. > > In general I don't pick up such patches, since this doesn't match the > "Developer's Certificate of Origin" requirements. > -> Documentation/process/submitting-patches.rst I've updated .mailmap with: Guo Ren Guo Ren -- If you are still concerned, how about: From: Guo Ren This macro isn't used in Linux sched, now. Delete in include/linux/sched.h and arch's include/asm. Signed-off-by: Guo Ren Signed-off-by: Guo Ren Reviewed-by: Arnd Bergmann -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/8] sched: powerpc: Remove unused TASK_SIZE_OF
Got it. Thx On Wed, Dec 22, 2021 at 3:27 PM Christophe Leroy wrote: > > > > Le 22/12/2021 à 04:02, Guo Ren a écrit : > > On Wed, Dec 22, 2021 at 2:43 AM Christophe Leroy > > wrote: > >> > >> > >> > >> Le 21/12/2021 à 18:00, guo...@kernel.org a écrit : > >>> From: Guo Ren > >>> > >>> This macro isn't used in Linux sched, now. Delete in > >>> include/linux/sched.h and arch's include/asm. > >>> > >>> Signed-off-by: Guo Ren > >>> --- > >>>arch/powerpc/include/asm/task_size_64.h | 6 ++ > >>>1 file changed, 2 insertions(+), 4 deletions(-) > >>> > >>> diff --git a/arch/powerpc/include/asm/task_size_64.h > >>> b/arch/powerpc/include/asm/task_size_64.h > >>> index c993482237ed..7e2eca4fac4d 100644 > >>> --- a/arch/powerpc/include/asm/task_size_64.h > >>> +++ b/arch/powerpc/include/asm/task_size_64.h > >>> @@ -44,12 +44,10 @@ > >>> */ > >>>#define TASK_SIZE_USER32 (0x0001UL - (1 * PAGE_SIZE)) > >>> > >>> -#define TASK_SIZE_OF(tsk)\ > >>> - (test_tsk_thread_flag(tsk, TIF_32BIT) ? TASK_SIZE_USER32 : \ > >>> +#define TASK_SIZE\ > >>> + (test_tsk_thread_flag(current, TIF_32BIT) ? TASK_SIZE_USER32 : \ > >>>TASK_SIZE_USER64) > >> > >> I think you should use test_thread_flag() instead. > >> > >> Or even better: use is_32bit_task() and bring back this macro as a > >> single line, something like: > >> > >> #define TASK_SIZE (is_32bit_task() ? TASK_SIZE_USER32 : TASK_SIZE_USER64) > > Okay, looks better. I would fix it in the next version. > > Note that is_32bit_task() exists on powerpc, parisc and sparc. > > For other ones you can still use test_thread_flag() instead of > test_tsk_thread_flag(current) -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 4/8] sched: powerpc: Remove unused TASK_SIZE_OF
On Wed, Dec 22, 2021 at 2:43 AM Christophe Leroy wrote: > > > > Le 21/12/2021 à 18:00, guo...@kernel.org a écrit : > > From: Guo Ren > > > > This macro isn't used in Linux sched, now. Delete in > > include/linux/sched.h and arch's include/asm. > > > > Signed-off-by: Guo Ren > > --- > > arch/powerpc/include/asm/task_size_64.h | 6 ++ > > 1 file changed, 2 insertions(+), 4 deletions(-) > > > > diff --git a/arch/powerpc/include/asm/task_size_64.h > > b/arch/powerpc/include/asm/task_size_64.h > > index c993482237ed..7e2eca4fac4d 100644 > > --- a/arch/powerpc/include/asm/task_size_64.h > > +++ b/arch/powerpc/include/asm/task_size_64.h > > @@ -44,12 +44,10 @@ > >*/ > > #define TASK_SIZE_USER32 (0x0001UL - (1 * PAGE_SIZE)) > > > > -#define TASK_SIZE_OF(tsk)\ > > - (test_tsk_thread_flag(tsk, TIF_32BIT) ? TASK_SIZE_USER32 : \ > > +#define TASK_SIZE\ > > + (test_tsk_thread_flag(current, TIF_32BIT) ? TASK_SIZE_USER32 : \ > > TASK_SIZE_USER64) > > I think you should use test_thread_flag() instead. > > Or even better: use is_32bit_task() and bring back this macro as a > single line, something like: > > #define TASK_SIZE (is_32bit_task() ? TASK_SIZE_USER32 : TASK_SIZE_USER64) Okay, looks better. I would fix it in the next version. > > > > > -#define TASK_SIZE TASK_SIZE_OF(current) > > - > > #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4)) > > #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(DEFAULT_MAP_WINDOW_USER64 / > > 4)) > > > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [PATCH v2 12/45] csky: Use do_kernel_power_off()
Only for this patch, Acked-by: Guo Ren
On Thu, Oct 28, 2021 at 5:18 AM Dmitry Osipenko wrote:
>
> Kernel now supports chained power-off handlers. Use do_kernel_power_off()
> that invokes chained power-off handlers. It also invokes legacy
> pm_power_off() for now, which will be removed once all drivers will
> be converted to the new power-off API.
>
> Signed-off-by: Dmitry Osipenko
> ---
> arch/csky/kernel/power.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/csky/kernel/power.c b/arch/csky/kernel/power.c
> index 923ee4e381b8..86ee202906f8 100644
> --- a/arch/csky/kernel/power.c
> +++ b/arch/csky/kernel/power.c
> @@ -9,16 +9,14 @@ EXPORT_SYMBOL(pm_power_off);
> void machine_power_off(void)
> {
> local_irq_disable();
> - if (pm_power_off)
> - pm_power_off();
> + do_kernel_power_off();
> asm volatile ("bkpt");
> }
>
> void machine_halt(void)
> {
> local_irq_disable();
> - if (pm_power_off)
> - pm_power_off();
> + do_kernel_power_off();
> asm volatile ("bkpt");
> }
>
> --
> 2.33.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH v6 3/9] riscv: locks: Introduce ticket-based spinlock implementation
On Mon, Apr 12, 2021 at 12:02 AM Guo Ren wrote:
>
> On Wed, Mar 31, 2021 at 10:32 PM wrote:
> >
> > From: Guo Ren
> >
> > This patch introduces a ticket lock implementation for riscv, along the
> > same lines as the implementation for arch/arm & arch/csky.
> >
> > We still use qspinlock as default.
> >
> > Signed-off-by: Guo Ren
> > Cc: Peter Zijlstra
> > Cc: Anup Patel
> > Cc: Arnd Bergmann
> > ---
> > arch/riscv/Kconfig | 7 ++-
> > arch/riscv/include/asm/spinlock.h | 84 +
> > arch/riscv/include/asm/spinlock_types.h | 17 +
> > 3 files changed, 107 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> > index 67cc65ba1ea1..34d0276f01d5 100644
> > --- a/arch/riscv/Kconfig
> > +++ b/arch/riscv/Kconfig
> > @@ -34,7 +34,7 @@ config RISCV
> > select ARCH_WANT_FRAME_POINTERS
> > select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
> > select ARCH_USE_QUEUED_RWLOCKS
> > - select ARCH_USE_QUEUED_SPINLOCKS
> > + select ARCH_USE_QUEUED_SPINLOCKSif !RISCV_TICKET_LOCK
> > select ARCH_USE_QUEUED_SPINLOCKS_XCHG32
> > select CLONE_BACKWARDS
> > select CLINT_TIMER if !MMU
> > @@ -344,6 +344,11 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
> > def_bool y
> > depends on NUMA
> >
> > +config RISCV_TICKET_LOCK
> > + bool "Ticket-based spin-locking"
> > + help
> > + Say Y here to use ticket-based spin-locking.
> > +
> > config RISCV_ISA_C
> > bool "Emit compressed instructions when building Linux"
> > default y
> > diff --git a/arch/riscv/include/asm/spinlock.h
> > b/arch/riscv/include/asm/spinlock.h
> > index a557de67a425..90b7eaa950cf 100644
> > --- a/arch/riscv/include/asm/spinlock.h
> > +++ b/arch/riscv/include/asm/spinlock.h
> > @@ -7,7 +7,91 @@
> > #ifndef _ASM_RISCV_SPINLOCK_H
> > #define _ASM_RISCV_SPINLOCK_H
> >
> > +#ifdef CONFIG_RISCV_TICKET_LOCK
> > +#ifdef CONFIG_32BIT
> > +#define __ASM_SLLIW "slli\t"
> > +#define __ASM_SRLIW "srli\t"
> > +#else
> > +#define __ASM_SLLIW "slliw\t"
> > +#define __ASM_SRLIW "srliw\t"
> > +#endif
> > +
> > +/*
> > + * Ticket-based spin-locking.
> > + */
> > +static inline void arch_spin_lock(arch_spinlock_t *lock)
> > +{
> > + arch_spinlock_t lockval;
> > + u32 tmp;
> > +
> > + asm volatile (
> > + "1: lr.w%0, %2 \n"
> > + " mv %1, %0 \n"
> > + " addw%0, %0, %3 \n"
> > + " sc.w%0, %0, %2 \n"
> > + " bnez%0, 1b \n"
> > + : "=" (tmp), "=" (lockval), "+A" (lock->lock)
> > + : "r" (1 << TICKET_NEXT)
> > + : "memory");
> > +
> > + smp_cond_load_acquire(>tickets.owner,
> > + VAL == lockval.tickets.next);
> It's wrong, blew is fixup:
>
> diff --git a/arch/csky/include/asm/spinlock.h
> b/arch/csky/include/asm/spinlock.h
> index fe98ad8ece51..2be627ceb9df 100644
> --- a/arch/csky/include/asm/spinlock.h
> +++ b/arch/csky/include/asm/spinlock.h
> @@ -27,7 +27,8 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
> : "r"(p), "r"(ticket_next)
> : "cc");
>
> - smp_cond_load_acquire(>tickets.owner,
> + if (lockval.owner != lockval.tickets.next)
> + smp_cond_load_acquire(>tickets.owner,
> VAL == lockval.tickets.next);
eh... plus __smp_acquire_fence:
if (lockval.owner != lockval.tickets.next)
smp_cond_load_acquire(>tickets.owner,
VAL == lockval.tickets.next);
else
__smp_acquire_fence();
> > +}
> > +
> > +static inline int arch_spin_trylock(arch_spinlock_t *lock)
> > +{
> > + u32 tmp, contended, res;
> > +
> > + do {
> > + asm volatile (
> > + " lr.w%0, %3 \n"
> > + __ASM_SRLIW"%1, %0, %5 \n"
> > + __ASM_S
Re: [PATCH v6 3/9] riscv: locks: Introduce ticket-based spinlock implementation
On Wed, Mar 31, 2021 at 10:32 PM wrote:
>
> From: Guo Ren
>
> This patch introduces a ticket lock implementation for riscv, along the
> same lines as the implementation for arch/arm & arch/csky.
>
> We still use qspinlock as default.
>
> Signed-off-by: Guo Ren
> Cc: Peter Zijlstra
> Cc: Anup Patel
> Cc: Arnd Bergmann
> ---
> arch/riscv/Kconfig | 7 ++-
> arch/riscv/include/asm/spinlock.h | 84 +
> arch/riscv/include/asm/spinlock_types.h | 17 +
> 3 files changed, 107 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 67cc65ba1ea1..34d0276f01d5 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -34,7 +34,7 @@ config RISCV
> select ARCH_WANT_FRAME_POINTERS
> select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
> select ARCH_USE_QUEUED_RWLOCKS
> - select ARCH_USE_QUEUED_SPINLOCKS
> + select ARCH_USE_QUEUED_SPINLOCKSif !RISCV_TICKET_LOCK
> select ARCH_USE_QUEUED_SPINLOCKS_XCHG32
> select CLONE_BACKWARDS
> select CLINT_TIMER if !MMU
> @@ -344,6 +344,11 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
> def_bool y
> depends on NUMA
>
> +config RISCV_TICKET_LOCK
> + bool "Ticket-based spin-locking"
> + help
> + Say Y here to use ticket-based spin-locking.
> +
> config RISCV_ISA_C
> bool "Emit compressed instructions when building Linux"
> default y
> diff --git a/arch/riscv/include/asm/spinlock.h
> b/arch/riscv/include/asm/spinlock.h
> index a557de67a425..90b7eaa950cf 100644
> --- a/arch/riscv/include/asm/spinlock.h
> +++ b/arch/riscv/include/asm/spinlock.h
> @@ -7,7 +7,91 @@
> #ifndef _ASM_RISCV_SPINLOCK_H
> #define _ASM_RISCV_SPINLOCK_H
>
> +#ifdef CONFIG_RISCV_TICKET_LOCK
> +#ifdef CONFIG_32BIT
> +#define __ASM_SLLIW "slli\t"
> +#define __ASM_SRLIW "srli\t"
> +#else
> +#define __ASM_SLLIW "slliw\t"
> +#define __ASM_SRLIW "srliw\t"
> +#endif
> +
> +/*
> + * Ticket-based spin-locking.
> + */
> +static inline void arch_spin_lock(arch_spinlock_t *lock)
> +{
> + arch_spinlock_t lockval;
> + u32 tmp;
> +
> + asm volatile (
> + "1: lr.w%0, %2 \n"
> + " mv %1, %0 \n"
> + " addw%0, %0, %3 \n"
> + " sc.w%0, %0, %2 \n"
> + " bnez%0, 1b \n"
> + : "=" (tmp), "=" (lockval), "+A" (lock->lock)
> + : "r" (1 << TICKET_NEXT)
> + : "memory");
> +
> + smp_cond_load_acquire(>tickets.owner,
> + VAL == lockval.tickets.next);
It's wrong, blew is fixup:
diff --git a/arch/csky/include/asm/spinlock.h b/arch/csky/include/asm/spinlock.h
index fe98ad8ece51..2be627ceb9df 100644
--- a/arch/csky/include/asm/spinlock.h
+++ b/arch/csky/include/asm/spinlock.h
@@ -27,7 +27,8 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
: "r"(p), "r"(ticket_next)
: "cc");
- smp_cond_load_acquire(>tickets.owner,
+ if (lockval.owner != lockval.tickets.next)
+ smp_cond_load_acquire(>tickets.owner,
VAL == lockval.tickets.next);
> +}
> +
> +static inline int arch_spin_trylock(arch_spinlock_t *lock)
> +{
> + u32 tmp, contended, res;
> +
> + do {
> + asm volatile (
> + " lr.w%0, %3 \n"
> + __ASM_SRLIW"%1, %0, %5 \n"
> + __ASM_SLLIW"%2, %0, %5 \n"
> + " or %1, %2, %1 \n"
> + " li %2, 0 \n"
> + " sub %1, %1, %0 \n"
> + " bnez%1, 1f \n"
> + " addw%0, %0, %4 \n"
> + " sc.w%2, %0, %3 \n"
> + "1: \n"
> + : "=" (tmp), "=" (contended), "=" (res),
> + "+A" (lock->lock)
> + : "r" (1 << TICKET_NEXT), "I" (TICKET_NEXT)
> + : "memory");
> + } while (res);
> +
> + if (!contended)
> +
Re: [PATCH v6 4/9] csky: locks: Optimize coding convention
On Wed, Mar 31, 2021 at 10:32 PM wrote:
>
> From: Guo Ren
>
> - Using smp_cond_load_acquire in arch_spin_lock by Peter's
>advice.
> - Using __smp_acquire_fence in arch_spin_trylock
> - Using smp_store_release in arch_spin_unlock
>
> All above are just coding conventions and won't affect the
> function.
>
> TODO in smp_cond_load_acquire for architecture:
> - current csky only has:
>lr.w val,
>sc.w . val2
>(Any other stores to p0 will let sc.w failed)
>
> - But smp_cond_load_acquire need:
>lr.w val,
>wfe
>(Any stores to p0 will send the event to let wfe retired)
>
> Signed-off-by: Guo Ren
> Link:
> https://lore.kernel.org/linux-riscv/caahsdy1jhlufwu7rucaq+ruwrbks2ksdva7eprt8--4zfof...@mail.gmail.com/T/#m13adac285b7f51f4f879a5d6b65753ecb1a7524e
> Cc: Peter Zijlstra
> Cc: Arnd Bergmann
> ---
> arch/csky/include/asm/spinlock.h | 11 ---
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/arch/csky/include/asm/spinlock.h
> b/arch/csky/include/asm/spinlock.h
> index 69f5aa249c5f..69677167977a 100644
> --- a/arch/csky/include/asm/spinlock.h
> +++ b/arch/csky/include/asm/spinlock.h
> @@ -26,10 +26,8 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
> : "r"(p), "r"(ticket_next)
> : "cc");
>
> - while (lockval.tickets.next != lockval.tickets.owner)
> - lockval.tickets.owner = READ_ONCE(lock->tickets.owner);
> -
> - smp_mb();
> + smp_cond_load_acquire(>tickets.owner,
> + VAL == lockval.tickets.next);
It's wrong, we should determine lockval before next read.
Fixup:
diff --git a/arch/csky/include/asm/spinlock.h b/arch/csky/include/asm/spinlock.h
index fe98ad8ece51..2be627ceb9df 100644
--- a/arch/csky/include/asm/spinlock.h
+++ b/arch/csky/include/asm/spinlock.h
@@ -27,7 +27,8 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
: "r"(p), "r"(ticket_next)
: "cc");
- smp_cond_load_acquire(>tickets.owner,
+ if (lockval.owner != lockval.tickets.next)
+ smp_cond_load_acquire(>tickets.owner,
VAL == lockval.tickets.next);
> }
>
> static inline int arch_spin_trylock(arch_spinlock_t *lock)
> @@ -55,15 +53,14 @@ static inline int arch_spin_trylock(arch_spinlock_t *lock)
> } while (!res);
>
> if (!contended)
> - smp_mb();
> + __smp_acquire_fence();
>
> return !contended;
> }
>
> static inline void arch_spin_unlock(arch_spinlock_t *lock)
> {
> - smp_mb();
> - WRITE_ONCE(lock->tickets.owner, lock->tickets.owner + 1);
> + smp_store_release(>tickets.owner, lock->tickets.owner + 1);
> }
>
> static inline int arch_spin_value_unlocked(arch_spinlock_t lock)
> --
> 2.17.1
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH v6 3/9] riscv: locks: Introduce ticket-based spinlock implementation
On Wed, Mar 31, 2021 at 10:32 PM wrote:
>
> From: Guo Ren
>
> This patch introduces a ticket lock implementation for riscv, along the
> same lines as the implementation for arch/arm & arch/csky.
>
> We still use qspinlock as default.
>
> Signed-off-by: Guo Ren
> Cc: Peter Zijlstra
> Cc: Anup Patel
> Cc: Arnd Bergmann
> ---
> arch/riscv/Kconfig | 7 ++-
> arch/riscv/include/asm/spinlock.h | 84 +
> arch/riscv/include/asm/spinlock_types.h | 17 +
> 3 files changed, 107 insertions(+), 1 deletion(-)
>
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index 67cc65ba1ea1..34d0276f01d5 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -34,7 +34,7 @@ config RISCV
> select ARCH_WANT_FRAME_POINTERS
> select ARCH_WANT_HUGE_PMD_SHARE if 64BIT
> select ARCH_USE_QUEUED_RWLOCKS
> - select ARCH_USE_QUEUED_SPINLOCKS
> + select ARCH_USE_QUEUED_SPINLOCKSif !RISCV_TICKET_LOCK
> select ARCH_USE_QUEUED_SPINLOCKS_XCHG32
> select CLONE_BACKWARDS
> select CLINT_TIMER if !MMU
> @@ -344,6 +344,11 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
> def_bool y
> depends on NUMA
>
> +config RISCV_TICKET_LOCK
> + bool "Ticket-based spin-locking"
> + help
> + Say Y here to use ticket-based spin-locking.
> +
> config RISCV_ISA_C
> bool "Emit compressed instructions when building Linux"
> default y
> diff --git a/arch/riscv/include/asm/spinlock.h
> b/arch/riscv/include/asm/spinlock.h
> index a557de67a425..90b7eaa950cf 100644
> --- a/arch/riscv/include/asm/spinlock.h
> +++ b/arch/riscv/include/asm/spinlock.h
> @@ -7,7 +7,91 @@
> #ifndef _ASM_RISCV_SPINLOCK_H
> #define _ASM_RISCV_SPINLOCK_H
>
> +#ifdef CONFIG_RISCV_TICKET_LOCK
> +#ifdef CONFIG_32BIT
> +#define __ASM_SLLIW "slli\t"
> +#define __ASM_SRLIW "srli\t"
> +#else
> +#define __ASM_SLLIW "slliw\t"
> +#define __ASM_SRLIW "srliw\t"
> +#endif
> +
> +/*
> + * Ticket-based spin-locking.
> + */
> +static inline void arch_spin_lock(arch_spinlock_t *lock)
> +{
> + arch_spinlock_t lockval;
> + u32 tmp;
> +
> + asm volatile (
> + "1: lr.w%0, %2 \n"
> + " mv %1, %0 \n"
> + " addw%0, %0, %3 \n"
> + " sc.w%0, %0, %2 \n"
> + " bnez%0, 1b \n"
> + : "=" (tmp), "=" (lockval), "+A" (lock->lock)
> + : "r" (1 << TICKET_NEXT)
> + : "memory");
It's could be optimized by amoadd.w with Anup advice, and I'll update
it in the next patchset version:
diff --git a/arch/riscv/include/asm/spinlock.h
b/arch/riscv/include/asm/spinlock.h
index 90b7eaa950cf..435286ad342b 100644
--- a/arch/riscv/include/asm/spinlock.h
+++ b/arch/riscv/include/asm/spinlock.h
@@ -22,15 +22,10 @@
static inline void arch_spin_lock(arch_spinlock_t *lock)
{
arch_spinlock_t lockval;
- u32 tmp;
asm volatile (
- "1: lr.w%0, %2 \n"
- " mv %1, %0 \n"
- " addw%0, %0, %3 \n"
- " sc.w%0, %0, %2 \n"
- " bnez%0, 1b \n"
- : "=" (tmp), "=" (lockval), "+A" (lock->lock)
+ " amoadd.w%0, %2, %1 \n"
+ : "=" (lockval), "+A" (lock->lock)
: "r" (1 << TICKET_NEXT)
: "memory");
> +
> + smp_cond_load_acquire(>tickets.owner,
> + VAL == lockval.tickets.next);
> +}
> +
> +static inline int arch_spin_trylock(arch_spinlock_t *lock)
> +{
> + u32 tmp, contended, res;
> +
> + do {
> + asm volatile (
> + " lr.w%0, %3 \n"
> + __ASM_SRLIW"%1, %0, %5 \n"
> + __ASM_SLLIW"%2, %0, %5 \n"
> + " or %1, %2, %1 \n"
> + " li %2, 0 \n"
> + " sub %1, %1, %0 \n"
> + " bnez%1, 1f \n"
> + " addw%0, %0, %4 \n"
> + &quo
Re: [PATCH v5 4/7] powerpc/qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32
On Sun, Mar 28, 2021 at 7:14 PM Christophe Leroy wrote: > > > > Le 28/03/2021 à 08:30, guo...@kernel.org a écrit : > > From: Guo Ren > > > > We don't have native hw xchg16 instruction, so let qspinlock > > generic code to deal with it. > > We have lharx/sthcx pair on some versions of powerpc. > > See > https://patchwork.ozlabs.org/project/linuxppc-dev/patch/20201107032328.2454582-1-npig...@gmail.com/ Got it, thx for the information. > > Christophe > > > > > Using the full-word atomic xchg instructions implement xchg16 has > > the semantic risk for atomic operations. > > > > This patch cancels the dependency of on qspinlock generic code on > > architecture's xchg16. > > > > Signed-off-by: Guo Ren > > Cc: Michael Ellerman > > Cc: Benjamin Herrenschmidt > > Cc: Paul Mackerras > > --- > > arch/powerpc/Kconfig | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig > > index 386ae12d8523..69ec4ade6521 100644 > > --- a/arch/powerpc/Kconfig > > +++ b/arch/powerpc/Kconfig > > @@ -151,6 +151,7 @@ config PPC > > select ARCH_USE_CMPXCHG_LOCKREF if PPC64 > > select ARCH_USE_QUEUED_RWLOCKS if PPC_QUEUED_SPINLOCKS > > select ARCH_USE_QUEUED_SPINLOCKSif PPC_QUEUED_SPINLOCKS > > + select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 if PPC_QUEUED_SPINLOCKS > > select ARCH_WANT_IPC_PARSE_VERSION > > select ARCH_WANT_IRQS_OFF_ACTIVATE_MM > > select ARCH_WANT_LD_ORPHAN_WARN > > -- Best Regards Guo Ren ML: https://lore.kernel.org/linux-csky/
Re: [patch RFC 06/15] csky/mm/highmem: Switch to generic kmap atomic
Acked-by: Guo Ren
On Sat, Sep 19, 2020 at 5:50 PM Thomas Gleixner wrote:
>
> Signed-off-by: Thomas Gleixner
> Cc: Guo Ren
> Cc: linux-c...@vger.kernel.org
> ---
> Note: Completely untested
> ---
> arch/csky/Kconfig |1
> arch/csky/include/asm/highmem.h |4 +-
> arch/csky/mm/highmem.c | 75
>
> 3 files changed, 5 insertions(+), 75 deletions(-)
>
> --- a/arch/csky/Kconfig
> +++ b/arch/csky/Kconfig
> @@ -285,6 +285,7 @@ config NR_CPUS
> config HIGHMEM
> bool "High Memory Support"
> depends on !CPU_CK610
> + select KMAP_ATOMIC_GENERIC
> default y
>
> config FORCE_MAX_ZONEORDER
> --- a/arch/csky/include/asm/highmem.h
> +++ b/arch/csky/include/asm/highmem.h
> @@ -32,10 +32,12 @@ extern pte_t *pkmap_page_table;
>
> #define ARCH_HAS_KMAP_FLUSH_TLB
> extern void kmap_flush_tlb(unsigned long addr);
> -extern void *kmap_atomic_pfn(unsigned long pfn);
>
> #define flush_cache_kmaps() do {} while (0)
>
> +#define arch_kmap_temp_post_map(vaddr, pteval) kmap_flush_tlb(vaddr)
> +#define arch_kmap_temp_post_unmap(vaddr) kmap_flush_tlb(vaddr)
> +
> extern void kmap_init(void);
>
> #endif /* __KERNEL__ */
> --- a/arch/csky/mm/highmem.c
> +++ b/arch/csky/mm/highmem.c
> @@ -9,8 +9,6 @@
> #include
> #include
>
> -static pte_t *kmap_pte;
> -
> unsigned long highstart_pfn, highend_pfn;
>
> void kmap_flush_tlb(unsigned long addr)
> @@ -19,67 +17,7 @@ void kmap_flush_tlb(unsigned long addr)
> }
> EXPORT_SYMBOL(kmap_flush_tlb);
>
> -void *kmap_atomic_high_prot(struct page *page, pgprot_t prot)
> -{
> - unsigned long vaddr;
> - int idx, type;
> -
> - type = kmap_atomic_idx_push();
> - idx = type + KM_TYPE_NR*smp_processor_id();
> - vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
> -#ifdef CONFIG_DEBUG_HIGHMEM
> - BUG_ON(!pte_none(*(kmap_pte - idx)));
> -#endif
> - set_pte(kmap_pte-idx, mk_pte(page, prot));
> - flush_tlb_one((unsigned long)vaddr);
> -
> - return (void *)vaddr;
> -}
> -EXPORT_SYMBOL(kmap_atomic_high_prot);
> -
> -void kunmap_atomic_high(void *kvaddr)
> -{
> - unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
> - int idx;
> -
> - if (vaddr < FIXADDR_START)
> - return;
> -
> -#ifdef CONFIG_DEBUG_HIGHMEM
> - idx = KM_TYPE_NR*smp_processor_id() + kmap_atomic_idx();
> -
> - BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
> -
> - pte_clear(_mm, vaddr, kmap_pte - idx);
> - flush_tlb_one(vaddr);
> -#else
> - (void) idx; /* to kill a warning */
> -#endif
> - kmap_atomic_idx_pop();
> -}
> -EXPORT_SYMBOL(kunmap_atomic_high);
> -
> -/*
> - * This is the same as kmap_atomic() but can map memory that doesn't
> - * have a struct page associated with it.
> - */
> -void *kmap_atomic_pfn(unsigned long pfn)
> -{
> - unsigned long vaddr;
> - int idx, type;
> -
> - pagefault_disable();
> -
> - type = kmap_atomic_idx_push();
> - idx = type + KM_TYPE_NR*smp_processor_id();
> - vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
> - set_pte(kmap_pte-idx, pfn_pte(pfn, PAGE_KERNEL));
> - flush_tlb_one(vaddr);
> -
> - return (void *) vaddr;
> -}
> -
> -static void __init kmap_pages_init(void)
> +void __init kmap_init(void)
> {
> unsigned long vaddr;
> pgd_t *pgd;
> @@ -96,14 +34,3 @@ static void __init kmap_pages_init(void)
> pte = pte_offset_kernel(pmd, vaddr);
> pkmap_page_table = pte;
> }
> -
> -void __init kmap_init(void)
> -{
> - unsigned long vaddr;
> -
> - kmap_pages_init();
> -
> - vaddr = __fix_to_virt(FIX_KMAP_BEGIN);
> -
> - kmap_pte = pte_offset_kernel((pmd_t *)pgd_offset_k(vaddr), vaddr);
> -}
>
--
Best Regards
Guo Ren
ML: https://lore.kernel.org/linux-csky/
Re: [PATCH 2/5] csky: Remove mm.h from asm/uaccess.h
On Sat, Mar 21, 2020 at 8:08 PM Thomas Gleixner wrote: > > Guo Ren writes: > > > Tested and Acked by me. > > > > Queued for next pull request, thx > > Can we please route that with the rcuwait changes to avoid breakage > unless you ship it to Linus right away? Ok, I won't queue it.
