CF card access using promise pdc20275

2008-09-03 Thread Richard Whitlock
I'm having a bit of bother with mounting a CF card using a promise 
pdc20275 with an 8347.
I've finally got my address mapping sorted out, and it all seems to work 
in principle.
I wait until a CF card is inserted, then load the pdc2027x.ko module, 
then mount the card.
The module load, however, takes approximately 2 minutes to complete. 
Mounting takes several seconds, and accesses to the card once mounted 
are similarly slow.
I've turned on debug output in the pdc2027x.ko module (and in a few 
other places as well) and 'insmod pata_pdc2027x.ko' gives the following 
output.
There is an exception at the end of each attempt, and each attempt takes 
several tens of seconds. The device seems to ignore everything until the 
speed is throttled right back.


pata_pdc2027x :00:0b.0: version 1.0
pdc_detect_pll_input_clock: scr[140E00]
pdc_read_counter: bccrh [7FFF] bccrl [7FEB]
pdc_read_counter: bccrhv[7FFF] bccrlv[7FD7]
pdc_read_counter: bccrh [7FC1] bccrl [5B28]
pdc_read_counter: bccrhv[7FC1] bccrlv[5B14]
pdc_detect_pll_input_clock: scr[144E00]
pdc_detect_pll_input_clock: start[1073741803] end[1071700776]
pdc_detect_pll_input_clock: PLL input clock[16491280]Hz
pata_pdc2027x :00:0b.0: PLL input clock 16491 kHz
pdc_adjust_pll: pout_required is 1
pdc_adjust_pll: pll_ctl[4D58]
pdc_adjust_pll: F[119] R[13] ratio*1000[8085]
pdc_adjust_pll: Writing pll_ctl[D77]
pdc_adjust_pll: pll_ctl[D77]
scsi0 : pata_pdc2027x
scsi1 : pata_pdc2027x
ata1: PATA max UDMA/133 mmio [EMAIL PROTECTED] cmd 0xc01017c0 irq 16
ata2: PATA max UDMA/133 mmio [EMAIL PROTECTED] cmd 0xc01015c0 irq 16
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
pdc2027x_cable_detect: No cable or 80-conductor cable on port 0
ata1.00: CFA: LEXAR ATA FLASH CARD, 20070228, max UDMA/100
ata1.00: 7831152 sectors, multi 0: LBA
pdc2027x_set_piomode: adev-pio_mode[C]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[4]
pdc2027x_set_dmamode: Set udma regs...
pdc2027x_set_dmamode: Set udma regs done
pdc2027x_set_dmamode: Set to udma mode[5]
ata1.00: configured for UDMA/100
pdc2027x_set_piomode: adev-pio_mode[C]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[4]
pdc2027x_set_dmamode: Set udma regs...
pdc2027x_set_dmamode: Set udma regs done
pdc2027x_set_dmamode: Set to udma mode[5]
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
pdc2027x_cable_detect: No cable or 80-conductor cable on port 1
scsi 0:0:0:0: Direct-Access ATA  LEXAR ATA FLASH  2007 PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 7831152 512-byte hardware sectors (4010 MB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't 
support DPO or FUA

sd 0:0:0:0: [sda] 7831152 512-byte hardware sectors (4010 MB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: disabled, read cache: enabled, doesn't 
support DPO or FUA

sda:3ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x6 frozen
ata1.00: cmd c8/00:08:00:00:00/00:00:00:00:00/e0 tag 0 dma 4096 in
res 40/00:00:00:00:00/00:00:00:00:00/00 Emask 0x4 (timeout)
ata1.00: status: { DRDY }
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
pdc2027x_set_piomode: adev-pio_mode[8]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[0]
ata1: soft resetting link
pdc2027x_cable_detect: No cable or 80-conductor cable on port 0
pdc2027x_set_piomode: adev-pio_mode[C]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[4]
pdc2027x_set_dmamode: Set udma regs...
pdc2027x_set_dmamode: Set udma regs done
pdc2027x_set_dmamode: Set to udma mode[5]
ata1.00: configured for UDMA/100
pdc2027x_set_piomode: adev-pio_mode[C]
pdc2027x_set_piomode: Set pio regs...
pdc2027x_set_piomode: Set pio regs done
pdc2027x_set_piomode: Set to pio mode[4]
pdc2027x_set_dmamode: Set udma regs...
pdc2027x_set_dmamode: Set udma regs done
pdc2027x_set_dmamode: Set to udma mode[5]
ata1: EH complete
ata1.00: limiting speed to UDMA/66:PIO4
ata1.00: exception Emask 0x0 SAct 0x0 SErr 0x0 action 0x6 frozen
ata1.00: cmd c8/00:08:00:00:00/00:00:00:00:00/e0 

8347 PCI IDE with Promise 20275 problems

2008-08-19 Thread Richard Whitlock

Hi,

We have a board closely based on the AM asp8347 with the addition of a 
promise technologies 20275 ATA controller.

Starting with the ASP dts file I have added the following:

 pci0: [EMAIL PROTECTED] {
   cell-index = 1;
   interrupt-map-mask = 0xf800 0x0 0x0 0x7;
   interrupt-map = 

   /* IDSEL 0x11 */
0x8800 0x0 0x0 0x1 ipic 19 0x8
0x8800 0x0 0x0 0x2 ipic 19 0x8
0x8800 0x0 0x0 0x3 ipic 19 0x8
0x8800 0x0 0x0 0x4 ipic 19 0x8;

   interrupt-parent = ipic;
   interrupts = 0x42 0x8;
   bus-range = 0 0;
   ranges = 0x0200 0x0 0xc000 0xc000 0x0 0x1000
 0x4200 0x0 0xb000 0xb000 0x0 0x0010
 0x0100 0x0 0x 0xb800 0x0 0x0010;
   clock-frequency = ;
   #interrupt-cells = 1;
   #size-cells = 2;
   #address-cells = 3;
   reg = 0xff008500 0x100;
   compatible = fsl,mpc8349-pci;
   device_type = pci;
   };

I have based the numbers around what I found in our original 2.6.20 ppc 
port which works fine.

The following is from the ppc tree platform specific header for our board:

--
#define _IRQ1 MPC83xx_IRQ_EXT3
#define _IRQ2 MPC83xx_IRQ_EXT4
#define PCI_IRQ_INFO()  \
   static char pci_irq_table[][4] =\
   /*  \
*  PCI IDSEL/INTPIN-INTLINE   \
*   A  B  C  D \
*/ \
   {   \
   { _IRQ1, _IRQ1, _IRQ1, _IRQ1 }, /* IDSEL 11 = IDE disk   
*/ \
   { 0, 0, 0, 0 }, /* IDSEL 12  
*/ \
   { _IRQ2, _IRQ2, _IRQ2, _IRQ2 }, /* IDSEL 13 = USB controller 
*/ \

   };  \
   \
   const long min_idsel = 11, max_idsel = 13, irqs_per_slot = 4;

#define EXT_IRQ_SENSES()\
   u8 senses[8] = {\
   0,/* EXT 0 */ \
   0,/* EXT 1 */ \
   0,/* EXT 2 */ \
   IRQ_SENSE_LEVEL,/* EXT 3 = PCI.11 */\
   IRQ_SENSE_LEVEL,/* EXT 4 = PCI.13 */\
   IRQ_SENSE_LEVEL,/* EXT 5 = JCB */   \
   0,/* EXT 6 */ \
   0,/* EXT 7 */ \
   };
#endif


// Note: these need to match how RedBoot has set up the hardware.
// In particular, the PCILAWRn/PCILBAWRn registers (PCI address window)

#define MPC83xx_PCI1_LOWER_IO0x
#define MPC83xx_PCI1_UPPER_IO0x000F
#define MPC83xx_PCI1_IO_BASE0xB800
#define MPC83xx_PCI1_IO_SIZE0x0010

#define MPC83xx_PCI1_LOWER_MEM0xC000
#define MPC83xx_PCI1_UPPER_MEM0xCFFF
#define MPC83xx_PCI1_MEM_OFFSET0x

--

The driver we are using is pata_pdc2027x. Everything seems to work OK, 
except that every time we read from the hardware, we get all f's.
Specifically, pdc_detect_pll_input_clock() fails, since the clock 
frequency appears to be 0Hz.


On boot I get the following:

Found MPC83xx PCI host bridge at 0xff008500. Firmware bus 
number: 0-0

PCI host bridge /[EMAIL PROTECTED] (primary) ranges:
MEM 0xc000..0xcfff - 0xc000
MEM 0xb000..0xb00f - 0xb000 Prefetch
 IO 0xb800..0xb80f - 0x
Top of RAM: 0x800, Total RAM: 0x800
Memory hole size: 0MB
Zone PFN ranges:
 DMA  0x - 0x8000
 Normal   0x8000 - 0x8000
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
   0: 0x - 0x8000
On node 0 totalpages: 32768
free_area_init_node: node 0, pgdat c032f8cc, node_mem_map c040c000
 DMA zone: 32512 pages, LIFO batch:7
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
Kernel command line: root=/dev/nfs 
nfsroot=192.168.111.41:/tftpboot/powerpc_q2_




and on trying to mount a CF card I get this:

Mapping pci region - start: c810, length: 16384
pata_pdc2027x :00:0b.0: PLL input clock 0 kHz
pata_pdc2027x: Invalid PLL input clock 0kHz, give up!
scsi0 : pata_pdc2027x
scsi1 : pata_pdc2027x
ata1: PATA max UDMA/133 mmio [EMAIL PROTECTED] cmd 0xc81017c0 irq 16
ata2: PATA max UDMA/133 mmio [EMAIL PROTECTED] cmd 0xc81015c0 irq 16
pata_pdc2027x: 40-conductor cable detected on port 0
pata_pdc2027x: 40-conductor cable detected on port 1
Could not mount CF card - 

Re: Clock / Timebase / Bus Frequencies Help

2008-08-19 Thread Richard Whitlock

Hi,

Is it really hanging?
Or is it just sending console output somewhere else?
Try pinging the board after you think its hung. Can you ssh in and dmesg 
to find out what went wrong?
I've had two problems similar to this recently. The first was that the 
serial clock frequency was wrong in the dts file.
The second was schoolboy error when the console was handed over to ttyS1 
when I was plugged in to ttyS0.
If that all fails - put a scope on your serial port and see what its 
really doing.

Good luck,




Richard.

[EMAIL PROTECTED] wrote:

Hi,

  I have a similar problem with custom MPC8360 board.
I am able to boot Linux with the mpc836x_dts.dtb provided by freescale.
but when use dtb customised for my  board i am unable to boot Linux.
It is hanging after the console handover to real console from boot console.

I am filling all the frequencies properly, can someone help me to fix this
Where to set the baud rate in dts file.

Here is the log:


= tftp $loadaddr /nfk684/vpm_test/uImage
Using FSL UEC0 device
TFTP from server 192.168.0.2; our IP address is 192.168.0.100
Filename '/nfk684/vpm_test/uImage'.
Load address: 0x20
Loading: #
 ##
done
Bytes transferred = 1095689 (10b809 hex)
= tftp $fdtaddr /nfk684/vpm_test/mpc8360_vpm.dtb
Using FSL UEC0 device
TFTP from server 192.168.0.2; our IP address is 192.168.0.100
Filename '/nfk684/vpm_test/mpc8360_vpm.dtb'.
Load address: 0x40
Loading: #
done
Bytes transferred = 12288 (3000 hex)
= bootm $loadaddr - $fdtaddr
## Booting image at 0020 ...
   Image Name:   Linux-2.6.22
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:1095625 Bytes =  1 MB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
   Booting using the fdt at 0x40
 Probing machine type
Using MPC8360 VPM machine description
Linux version 2.6.22 ([EMAIL PROTECTED]) (gcc version 4.0.0 (DENX ELDK 4.1
4.0.0))
 #17 Fri Aug 15 16:13:41 CDT 2008
setup_arch: bootmem
mpc8360_vpm_setup_arch()
Bad clock source for time stamp 1
Bad clock source for time stamp 2
arch: exit
Zone PFN ranges:
  DMA 0 -65536
  Normal  65536 -65536
early_node_map[1] active PFN ranges
0:0 -65536
Built 1 zonelists.  Total pages: 65024
Kernel command line: root=/dev/ram rw console=ttyS1,115200
IPIC (128 IRQ sources) at fdefc700
QEIC (64 IRQ sources) at fdefb080
PID hash table entries: 1024 (order: 10, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 257280k/262144k available (2152k kernel code, 4624k reserved, 96k
data,
80k bss, 128k init)
Mount-cache hash table entries: 512
NET: Registered protocol family 16

Generic PHY: Registered new driver
SCSI subsystem initialized
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
io scheduler noop registered
io scheduler anticipatory registered (default)
io scheduler deadline registered
io scheduler cfq registered
Generic RTC Driver v1.07
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0xe0004500 (irq = 16) is a 16550A
serial8250.0: ttyS1 at MMIO 0xe0004600 (irq = 17) is a 16550A
console handover: boot [udbg0] - real [ttyS1]

Regards
Surendra


  

On Mon, Aug 18, 2008 at 07:52:12AM -0400, [EMAIL PROTECTED] wrote:


We've got an 8347 based board very similar to the AM asp8347. Core
clock
is 400MHz. Bus clock is 2Hz.
According to the data sheet for the 8347, the decrementer clock runs at
a
quarter of the rate of the bus clock. I have two questions:
In arch/powerpc/boot/redboot-83xx.c, the timebase clock is passed to
dt_fixup_cpu_clocks() as bi_busfreq / 16. If I leave it like this, my
system clock runs approximately 4 times too fast.
Can anyone point me in the direction of an explanation for the div by 16
rather than 4?
  

It's a bug, which I pointed out here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-June/058704.html



If I change the call to dt_fixup_cpu_clocks so that bi_busfreq/4 is
passed
in, then the clock runs more accurately. However, its still not correct.
This gives a decrementer frequency of Hz, but if I hard code the
value to 6600Hz, the clock runs accurately.
Can anyone shed any light on why the value passed in by the boot loader
(redboot) seems to be inaccurate.
  

Redboot probably has the wrong crystal frequency hardcoded.

-Scott
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Re: Clock / Timebase / Bus Frequencies Help

2008-08-19 Thread Richard Whitlock

Scott,
Thanks for that - you're right - redboot has the wrong crystal frequency 
in the cdl for our board.


Cheers,


Richard.

Scott Wood wrote:

On Mon, Aug 18, 2008 at 07:52:12AM -0400, [EMAIL PROTECTED] wrote:
  

We've got an 8347 based board very similar to the AM asp8347. Core clock
is 400MHz. Bus clock is 2Hz.
According to the data sheet for the 8347, the decrementer clock runs at a
quarter of the rate of the bus clock. I have two questions:
In arch/powerpc/boot/redboot-83xx.c, the timebase clock is passed to
dt_fixup_cpu_clocks() as bi_busfreq / 16. If I leave it like this, my
system clock runs approximately 4 times too fast. 
Can anyone point me in the direction of an explanation for the div by 16

rather than 4?



It's a bug, which I pointed out here:
http://ozlabs.org/pipermail/linuxppc-dev/2008-June/058704.html

  

If I change the call to dt_fixup_cpu_clocks so that bi_busfreq/4 is passed
in, then the clock runs more accurately. However, its still not correct.
This gives a decrementer frequency of Hz, but if I hard code the
value to 6600Hz, the clock runs accurately.
Can anyone shed any light on why the value passed in by the boot loader
(redboot) seems to be inaccurate.



Redboot probably has the wrong crystal frequency hardcoded.

-Scott
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DTS configuration of external interrupts on 8347

2008-07-23 Thread Richard Whitlock

I have a small problem with a port of linux 2.6.26 to a custom board.
Our board is almost identical to the Analogue  Micro asp 8347 board, so 
I'm using Kumar Gala's excellent fsl tree (thank you Kumar) as it 
already has a defconfig for the asp.
Thanks also to Bryan O'Donoghue for pointing us in the direction of the 
asp port in the first place.


The problem we have is I am unable to request an external interrupt. We 
have an FPGA which has an interrupt line - HW IRQ_0, so thats linux IRQ 48.

I have added the following to the dts file:

[EMAIL PROTECTED] {
   interrupts = 48 8;
   interrupt-parent = ipic;
}

but whenever I call request_irq() it returns -ENOSYS.

The driver loads fine, and the open function does very little - a call 
to ioremap() - which works, and a call to request_irq() which does not.

Is there anything else I have to do to configure this interrupt?

Regards,

Richard.




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