Re: [RFC PATCH 2/2] dt-bindings: memory: fsl: replace maintainer

[Shawn Guo]

On Tue, Jun 11, 2024 at 10:49:36AM +0200, Krzysztof Kozlowski wrote:
> On 04/06/2024 16:22, Michael Walle wrote:
> > Li Yang's mail address is bouncing, replace it with Shawn Guo's one.
> > 
> > Signed-off-by: Michael Walle 
> > ---
> > This is marked as an RFC because it is more of a question for Shawn if
> > he is willing to take over the maintainership.
> > ---
> 
> I suppose this could go via IMX SoC tree, so:
> Acked-by: Krzysztof Kozlowski 

A second thought on this one.

Hi Krzysztof,

Since you are the maintainer for drivers/memory, would it be more
reasonable to put you instead of me in there?

Patch dropped for now.

Shawn

Re: [PATCH 1/2] dt-bindings: Drop Li Yang as maintainer for all bindings

[Shawn Guo]

On Tue, Jun 04, 2024 at 04:22:48PM +0200, Michael Walle wrote:
> Remove Li Yang from all device tree bindings because mails to this
> address are bouncing.
> 
> Commit fbdd90334a62 ("MAINTAINERS: Drop Li Yang as their email address
> stopped working") already removed the entry from the MAINTAINERS but
> didn't address all the in-file entries of the device tree bindings.
> 
> Signed-off-by: Michael Walle 

Applied both, thanks!

Re: [PATCH v11 09/13] arm64: dts: ls1046a: Add serdes nodes

[Shawn Guo]

On Mon, Mar 13, 2023 at 12:11:33PM -0400, Sean Anderson wrote:
> This adds nodes for the SerDes devices. They are disabled by default
> to prevent any breakage on existing boards.
> 
> Signed-off-by: Sean Anderson 

The DTS patches look good to me.  Let me know if they are ready to be
applied.

Shawn

Re: [PATCH v9 06/10] arm64: dts: ls1046a: Add serdes bindings

[Shawn Guo]

On Thu, Jan 26, 2023 at 11:43:26AM -0500, Sean Anderson wrote:
> On 1/25/23 18:46, Shawn Guo wrote:
> > On Thu, Dec 29, 2022 at 07:01:35PM -0500, Sean Anderson wrote:
> >> This adds bindings for the SerDes devices. They are disabled by default
> > 
> > s/bindings/descriptions?
> > 
> > The term "bindings" generally means the schema/doc in
> > Documentation/devicetree/bindings/.
> 
> How about "nodes"?

Yeah, or device nodes.

Shawn

Re: [PATCH v9 07/10] arm64: dts: ls1046ardb: Add serdes bindings

[Shawn Guo]

On Thu, Jan 26, 2023 at 11:48:53AM -0500, Sean Anderson wrote:
> On 1/25/23 18:43, Shawn Guo wrote:
> > On Thu, Dec 29, 2022 at 07:01:36PM -0500, Sean Anderson wrote:
> >> This adds appropriate bindings for the macs which use the SerDes. The
> >> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> >> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> >> no driver for this device (and as far as I know all you can do with the
> >> 100MHz clocks is gate them), so I have chosen to model it as a single
> >> fixed clock.
> >> 
> >> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> >> This means that Lane A (what the driver thinks is lane 0) uses pins
> >> SD1_TX3_P/N.
> >> 
> >> Because this will break ethernet if the serdes is not enabled, enable
> >> the serdes driver by default on Layerscape.
> >> 
> >> Signed-off-by: Sean Anderson 
> >> ---
> >> This depends on [1].
> >> 
> >> [1] 
> >> https://lore.kernel.org/netdev/20220804194705.459670-4-sean.ander...@seco.com/
> >> 
> >> Changes in v9:
> >> - Fix name of phy mode node
> >> - phy-type -> fsl,phy
> >> 
> >> Changes in v8:
> >> - Rename serdes phy handles to use _A, _B, etc. instead of _0, _1, etc.
> >>   This should help remind readers that the numbering corresponds to the
> >>   physical layout of the registers, and not the lane (pin) number.
> >> 
> >> Changes in v6:
> >> - XGI.9 -> XFI.9
> >> 
> >> Changes in v4:
> >> - Convert to new bindings
> >> 
> >>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts| 112 ++
> >>  drivers/phy/freescale/Kconfig |   1 +
> > 
> > The phy driver Kconfig change shouldn't be part of this patch.
> 
> I put it here for bisectability, since this is the point where we need
> to enable it. But I can do this in a separate patch if you want.

>From DT ABI perspective, it's already broken anyway if you need to change
kernel and DT atomically.

Shawn

Re: [PATCH v2 02/10] ARM: dts: ls1021a: add TQ-Systems MBLS102xA device tree

[Shawn Guo]

On Fri, Jan 20, 2023 at 02:34:47PM +0100, Alexander Stein wrote:
> Add device tree for the MBLS102xA mainboard with TQMLS1021A SoM.
> 
> Signed-off-by: Alexander Stein 
> ---
> Changes in v2:
> * Remove unnecessary status = "okay"
> * Remove underscore from node names
> * Move reg direct below compatiblefor i2c devices
> * Remove i2c device nodes without software support
>   Add a comment about existance for the device though
> 
>  arch/arm/boot/dts/Makefile|   1 +
>  .../boot/dts/ls1021a-tqmls1021a-mbls1021a.dts | 406 ++
>  arch/arm/boot/dts/ls1021a-tqmls1021a.dtsi |  81 
>  3 files changed, 488 insertions(+)
>  create mode 100644 arch/arm/boot/dts/ls1021a-tqmls1021a-mbls1021a.dts
>  create mode 100644 arch/arm/boot/dts/ls1021a-tqmls1021a.dtsi
> 
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index d0c07867aeabe..44b5ed44b13d6 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -802,6 +802,7 @@ dtb-$(CONFIG_SOC_LS1021A) += \
>   ls1021a-iot.dtb \
>   ls1021a-moxa-uc-8410a.dtb \
>   ls1021a-qds.dtb \
> + ls1021a-tqmls1021a-mbls1021a.dtb \
>   ls1021a-tsn.dtb \
>   ls1021a-twr.dtb
>  dtb-$(CONFIG_SOC_VF610) += \
> diff --git a/arch/arm/boot/dts/ls1021a-tqmls1021a-mbls1021a.dts 
> b/arch/arm/boot/dts/ls1021a-tqmls1021a-mbls1021a.dts
> new file mode 100644
> index 0..aa8b605344655
> --- /dev/null
> +++ b/arch/arm/boot/dts/ls1021a-tqmls1021a-mbls1021a.dts
> @@ -0,0 +1,406 @@
> +// SPDX-License-Identifier: (GPL-2.0-or-later OR X11)
> +/*
> + * Copyright 2013-2014 Freescale Semiconductor, Inc.
> + * Copyright 2018-2023 TQ-Systems GmbH ,
> + * D-82229 Seefeld, Germany.
> + * Author: Alexander Stein
> + */
> +
> +/dts-v1/;
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include "ls1021a-tqmls1021a.dtsi"
> +
> +/ {
> + model = "TQMLS102xA SOM on MBLS102xA";
> + compatible = "tq,ls1021a-tqmls1021a-mbls102xa", 
> "tq,ls1021a-tqmls1021a", "fsl,ls1021a";
> +
> + audio_mclk: audio-clock {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <2500>;
> + };
> +
> + backlight_dcu: backlight {
> + compatible = "gpio-backlight";
> + gpios = < 0 GPIO_ACTIVE_LOW>;
> + status = "disabled";
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> + autorepeat;
> +
> + switch-1 {
> + label = "S6";
> + linux,code = ;
> + gpios = <_0 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + btn2: switch-2 {
> + label = "S7";
> + linux,code = ;
> + gpios = <_0 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + switch-3 {
> + label = "S8";
> + linux,code = ;
> + gpios = <_0 2 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + gpio_leds: gpio-leds {
> + compatible = "gpio-leds";
> +
> + led-0 {
> + color = ;
> + function = LED_FUNCTION_STATUS;
> + function-enumerator = <0>;
> + gpios = <_2 4 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "default-on";
> + };
> +
> + led-1 {
> + color = ;
> + function = LED_FUNCTION_STATUS;
> + function-enumerator = <1>;
> + gpios = <_2 5 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "default-on";
> + };
> +
> + led-2 {
> + color = ;
> + function = LED_FUNCTION_STATUS;
> + function-enumerator = <2>;
> + gpios = <_2 6 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "default-on";
> + };
> +
> + led-3 {
> + color = ;
> + function = LED_FUNCTION_HEARTBEAT;
> + function-enumerator = <0>;
> + gpios = <_2 7 GPIO_ACTIVE_LOW>;
> + linux,default-trigger = "heartbeat";
> + };
> + };
> +
> + lvds_encoder: lvds-encoder {
> + compatible = "ti,sn75lvds83", "lvds-encoder";
> + power-supply = <_3p3v>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + lvds_encoder_in: endpoint {};
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + lvds_encoder_out: endpoint {};
> +   

Re: [PATCH v9 08/10] arm64: dts: ls1088a: Add serdes bindings

[Shawn Guo]

On Thu, Dec 29, 2022 at 07:01:37PM -0500, Sean Anderson wrote:
> This adds bindings for the SerDes devices. They are disabled by default
> to prevent any breakage on existing boards.
> 
> Signed-off-by: Sean Anderson 
> ---
> 
> (no changes since v4)
> 
> Changes in v4:
> - Convert to new bindings
> 
> Changes in v3:
> - New
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 18 ++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index 260d045dbd9a..ecf9d830e36f 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -238,6 +238,24 @@ reset: syscon@1e6 {
>   reg = <0x0 0x1e6 0x0 0x1>;
>   };
>  
> + serdes1: serdes@1ea {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
> + reg = <0x0 0x1ea 0x0 0x2000>;

Can we start the properties with compatible (and reg) like most of other
device nodes?

Shawn

> + status = "disabled";
> + };
> +
> + serdes2: serdes@1eb {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + compatible = "fsl,ls1088a-serdes", "fsl,lynx-10g";
> + reg = <0x0 0x1eb 0x0 0x2000>;
> + status = "disabled";
> + };
> +
>   isc: syscon@1f7 {
>   compatible = "fsl,ls1088a-isc", "syscon";
>   reg = <0x0 0x1f7 0x0 0x1>;
> -- 
> 2.35.1.1320.gc452695387.dirty
> 

Re: [PATCH v9 06/10] arm64: dts: ls1046a: Add serdes bindings

[Shawn Guo]

On Thu, Dec 29, 2022 at 07:01:35PM -0500, Sean Anderson wrote:
> This adds bindings for the SerDes devices. They are disabled by default

s/bindings/descriptions?

The term "bindings" generally means the schema/doc in
Documentation/devicetree/bindings/.

Shawn

> to prevent any breakage on existing boards.
> 
> Signed-off-by: Sean Anderson 
> ---
> 
> (no changes since v4)
> 
> Changes in v4:
> - Convert to new bindings
> 
> Changes in v3:
> - Describe modes in device tree
> 
> Changes in v2:
> - Use one phy cell for SerDes1, since no lanes can be grouped
> - Disable SerDes by default to prevent breaking boards inadvertently.
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 ++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index a01e3cfec77f..12adccd5caae 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -424,6 +424,24 @@ sfp: efuse@1e8 {
>   clock-names = "sfp";
>   };
>  
> + serdes1: serdes@1ea {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
> + reg = <0x0 0x1ea 0x0 0x2000>;
> + status = "disabled";
> + };
> +
> + serdes2: serdes@1eb {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + #clock-cells = <1>;
> + compatible = "fsl,ls1046a-serdes", "fsl,lynx-10g";
> + reg = <0x0 0x1eb 0x0 0x2000>;
> + status = "disabled";
> + };
> +
>   dcfg: dcfg@1ee {
>   compatible = "fsl,ls1046a-dcfg", "syscon";
>   reg = <0x0 0x1ee 0x0 0x1000>;
> -- 
> 2.35.1.1320.gc452695387.dirty
> 

Re: [PATCH v9 07/10] arm64: dts: ls1046ardb: Add serdes bindings

[Shawn Guo]

On Thu, Dec 29, 2022 at 07:01:36PM -0500, Sean Anderson wrote:
> This adds appropriate bindings for the macs which use the SerDes. The
> 156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
> actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
> no driver for this device (and as far as I know all you can do with the
> 100MHz clocks is gate them), so I have chosen to model it as a single
> fixed clock.
> 
> Note: the SerDes1 lane numbering for the LS1046A is *reversed*.
> This means that Lane A (what the driver thinks is lane 0) uses pins
> SD1_TX3_P/N.
> 
> Because this will break ethernet if the serdes is not enabled, enable
> the serdes driver by default on Layerscape.
> 
> Signed-off-by: Sean Anderson 
> ---
> This depends on [1].
> 
> [1] 
> https://lore.kernel.org/netdev/20220804194705.459670-4-sean.ander...@seco.com/
> 
> Changes in v9:
> - Fix name of phy mode node
> - phy-type -> fsl,phy
> 
> Changes in v8:
> - Rename serdes phy handles to use _A, _B, etc. instead of _0, _1, etc.
>   This should help remind readers that the numbering corresponds to the
>   physical layout of the registers, and not the lane (pin) number.
> 
> Changes in v6:
> - XGI.9 -> XFI.9
> 
> Changes in v4:
> - Convert to new bindings
> 
>  .../boot/dts/freescale/fsl-ls1046a-rdb.dts| 112 ++
>  drivers/phy/freescale/Kconfig |   1 +

The phy driver Kconfig change shouldn't be part of this patch.

>  2 files changed, 113 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts 
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> index 7025aad8ae89..534f19855b47 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
> @@ -10,6 +10,8 @@
>  
>  /dts-v1/;
>  
> +#include 
> +
>  #include "fsl-ls1046a.dtsi"
>  
>  / {
> @@ -26,8 +28,110 @@ aliases {
>   chosen {
>   stdout-path = "serial0:115200n8";
>   };
> +
> + clocks {

Drop this container node.

Shawn

> + clk_100mhz: clock-100mhz {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <1>;
> + };
> +
> + clk_156mhz: clock-156mhz {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-frequency = <15625>;
> + };
> + };
>  };
>  
> + {
> + clocks = <_100mhz>, <_156mhz>;
> + clock-names = "ref0", "ref1";
> + status = "okay";
> +
> + /*
> +  * XXX: Lane A uses pins SD1_RX3_P/N! That is, the lane numbers and pin
> +  * numbers are _reversed_. In addition, the PCCR documentation is
> +  * _inconsistent_ in its usage of these terms!
> +  *
> +  * PCCR "Lane 0" refers to...
> +  *  =
> +  *0 Lane A
> +  *2 Lane A
> +  *8 Lane A
> +  *9 Lane A
> +  *B Lane D!
> +  */
> + serdes1_A: phy@0 {
> + #phy-cells = <0>;
> + reg = <0>;
> +
> + /* SGMII.6 */
> + sgmii-0 {
> + fsl,pccr = <0x8>;
> + fsl,index = <0>;
> + fsl,cfg = <0x1>;
> + fsl,type = ;
> + };
> + };
> +
> + serdes1_B: phy@1 {
> + #phy-cells = <0>;
> + reg = <1>;
> +
> + /* SGMII.5 */
> + sgmii-1 {
> + fsl,pccr = <0x8>;
> + fsl,index = <1>;
> + fsl,cfg = <0x1>;
> + fsl,type = ;
> + };
> + };
> +
> + serdes1_C: phy@2 {
> + #phy-cells = <0>;
> + reg = <2>;
> +
> + /* SGMII.10 */
> + sgmii-2 {
> + fsl,pccr = <0x8>;
> + fsl,index = <2>;
> + fsl,cfg = <0x1>;
> + fsl,type = ;
> + };
> +
> + /* XFI.10 */
> + xfi-0 {
> + fsl,pccr = <0xb>;
> + fsl,index = <0>;
> + fsl,cfg = <0x2>;
> + fsl,type = ;
> + };
> + };
> +
> + serdes1_D: phy@3 {
> + #phy-cells = <0>;
> + reg = <3>;
> +
> + /* SGMII.9 */
> + sgmii-3 {
> + fsl,pccr = <0x8>;
> + fsl,index = <3>;
> + fsl,cfg = <0x1>;
> + fsl,type = ;
> + };
> +
> + /* XFI.9 */
> + xfi-1 {
> + fsl,pccr = <0xb>;
> + fsl,index = <1>;
> + fsl,cfg = <0x1>;
> + fsl,type = ;
> + };
> + };
> +};
> +
> +
>   {
>   status = "okay";
>  };
> @@ -140,21 +244,29 @@ ethernet@e6000 {
>   

Re: [PATCH 07/11] arm64: dts: freescale: Fix pca954x i2c-mux node names

[Shawn Guo]

On Fri, Dec 02, 2022 at 05:49:22PM +0100, Geert Uytterhoeven wrote:
> "make dtbs_check":
> 
> arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: pca9547@77: 
> $nodename:0: 'pca9547@77' does not match '^(i2c-?)?mux'
>   From schema: 
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dtb: pca9547@77: 
> Unevaluated properties are not allowed ('#address-cells', '#size-cells', 
> 'i2c@4' were unexpected)
>   From schema: 
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> ...
> 
> Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus
> multiplexer/switch DT bindings and the Generic Names Recommendation in
> the Devicetree Specification.
> 
> Signed-off-by: Geert Uytterhoeven 

Applied, thanks!

Re: [PATCH 06/11] ARM: dts: vf610: Fix pca9548 i2c-mux node names

[Shawn Guo]

On Fri, Dec 02, 2022 at 05:49:21PM +0100, Geert Uytterhoeven wrote:
> "make dtbs_check":
> 
> arch/arm/boot/dts/vf610-zii-dev-rev-b.dtb: tca9548@70: $nodename:0: 
> 'tca9548@70' does not match '^(i2c-?)?mux'
>   From schema: 
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> arch/arm/boot/dts/vf610-zii-dev-rev-b.dtb: tca9548@70: Unevaluated 
> properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 
> 'i2c@1', 'i2c@2', 'i2c@3', 'i2c@4' were unexpected)
>   From schema: 
> /scratch/geert/linux/linux-renesas/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> ...
> 
> Fix this by renaming PCA9548 nodes to "i2c-mux", to match the I2C bus
> multiplexer/switch DT bindings and the Generic Names Recommendation in
> the Devicetree Specification.
> 
> Signed-off-by: Geert Uytterhoeven 

Applied, thanks!

Re: [PATCH 03/11] ARM: dts: imx: Fix pca9547 i2c-mux node name

[Shawn Guo]

On Fri, Dec 02, 2022 at 05:49:18PM +0100, Geert Uytterhoeven wrote:
> "make dtbs_check":
> 
> arch/arm/boot/dts/imx53-ppd.dtb: i2c-switch@70: $nodename:0: 
> 'i2c-switch@70' does not match '^(i2c-?)?mux'
>   From schema: 
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> arch/arm/boot/dts/imx53-ppd.dtb: i2c-switch@70: Unevaluated properties 
> are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 
> 'i2c@3', 'i2c@4', 'i2c@5', 'i2c@6', 'i2c@7' were unexpected)
>   From schema: 
> Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
> 
> Fix this by renaming the PCA9547 node to "i2c-mux", to match the I2C bus
> multiplexer/switch DT bindings and the Generic Names Recommendation in
> the Devicetree Specification.
> 
> Signed-off-by: Geert Uytterhoeven 

Applied, thanks!

Re: [PATCH -next 1/2] soc: fsl: guts: fix return value check in fsl_guts_init()

[Shawn Guo]

On Tue, Jun 28, 2022 at 10:02:48PM +0800, Yang Yingliang wrote:
> In case of error, of_iomap() returns NULL pointer not ERR_PTR().
> The IS_ERR() test in the return value check should be replaced
> with NULL test and return -ENOMEM as error value.
> 
> Fixes: ab4988d6a393 ("soc: fsl: guts: embed fsl_guts_get_svr() in probe()")
> Reported-by: Hulk Robot 
> Signed-off-by: Yang Yingliang 

Applied both, thanks!

Re: [PATCH RESEND v2 0/7] soc: fsl: guts: cleanups and serial_number support

[Shawn Guo]

On Wed, Jun 22, 2022 at 01:03:33PM +0200, Michael Walle wrote:
> Am 2022-04-04 11:56, schrieb Michael Walle:
> > [Resend because of new development cycle. Shawn, can this series get
> > through your tree? Sorry you weren't on CC on the former submissions.]
> > 
> > This series converts the guts driver from a platform driver to just an
> > core_initcall. The driver itself cannot (or rather should never) be
> > unloaded because others depends on detecting the current SoC revision
> > to apply chip errata. Other SoC drivers do it the same way. Overall I
> > got rid of all the global static variables.
> > 
> > The last patch finally adds unique id support to the guts driver. DT
> > binding can be found at:
> >   Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
> > 
> > changes since v1:
> >  - call kfree() in error case, thanks Dan
> >  - add missing of_node_put(np), thanks Dan
> > 
> > Michael Walle (7):
> >   soc: fsl: guts: machine variable might be unset
> >   soc: fsl: guts: remove module_exit() and fsl_guts_remove()
> >   soc: fsl: guts: embed fsl_guts_get_svr() in probe()
> >   soc: fsl: guts: allocate soc_dev_attr on the heap
> >   soc: fsl: guts: use of_root instead of own reference
> >   soc: fsl: guts: drop platform driver
> >   soc: fsl: guts: add serial_number support
> > 
> >  drivers/soc/fsl/guts.c | 219 ++---
> >  1 file changed, 118 insertions(+), 101 deletions(-)
> 
> There goes another kernel release without any comments on this
> series :(
> 
> Shawn, can you pick this up and give it some time in linux-next?

Okay, I just picked the series up to IMX tree.

Leo, let me know if you want to drop it from IMX tree.

Shawn

Re: [PATCH v3 2/4] arm64: dts: freescale: reduce the interrup-map-mask

[Shawn Guo]

On Wed, Apr 27, 2022 at 09:53:36AM +0200, Michael Walle wrote:
> Reduce the interrupt-map-mask of the external interrupt controller to
> 0xf to align with the devicetree schema.
> 
> Signed-off-by: Michael Walle 

Applied, thanks!

Re: [PATCH v3 1/4] ARM: dts: ls1021a: reduce the interrupt-map-mask

[Shawn Guo]

On Wed, Apr 27, 2022 at 09:53:35AM +0200, Michael Walle wrote:
> Reduce the interrupt-map-mask of the external interrupt controller to
> 7 to align with the devicetree schema.
> 
> Signed-off-by: Michael Walle 

Applied, thanks!

Re: [PATCH v6 2/3] arm64: dts: ls1028a: Add PCIe controller DT nodes

[Shawn Guo]

On Mon, Feb 24, 2020 at 09:11:05AM +0100, Michael Walle wrote:
> Hi Xiaowei, Hi Shawn,
> 
> > LS1028a implements 2 PCIe 3.0 controllers.
> 
> Patch 1/3 and 3/3 are in Linus' tree but nobody seems to care about this patch
> anymore :(
> 
> This doesn't work well with the IOMMU, because the iommu-map property is
> missing. The bootloader needs the  phandle to fixup the entry. See
> below.
> 
> Shawn, will you add this patch to your tree once its fixed, considering it
> just adds the device tree node for the LS1028A?

The patch/thread is a bit aged.  You may want to send an updated patch
for discussion.

Shawn

> 
> > 
> > Signed-off-by: Xiaowei Bao 
> > Signed-off-by: Hou Zhiqiang 

Re: [PATCH v1 3/4] arm64: dts: ls1028a: fix little-big endian issue for dcfg

[Shawn Guo]

On Tue, Dec 10, 2019 at 02:34:30AM +, Y.b. Lu wrote:
> + Shawn,
> 
> > -Original Message-
> > From: Michael Walle 
> > Sent: Tuesday, December 10, 2019 8:06 AM
> > To: Yinbo Zhu 
> > Cc: Ashish Kumar ; Alexandru Marginean
> > ; Alison Wang ;
> > Amit Jain (aj) ; catalin.horghi...@nxp.com; Claudiu
> > Manoil ; devicet...@vger.kernel.org; Jiafei Pan
> > ; Leo Li ;
> > linux-arm-ker...@lists.infradead.org; linux-ker...@vger.kernel.org;
> > linuxppc-dev@lists.ozlabs.org; mark.rutl...@arm.com;
> > rajat.srivast...@nxp.com; Rajesh Bhagat ;
> > robh...@kernel.org; Vabhav Sharma ; Xiaobo Xie
> > ; Y.b. Lu ; Michael Walle
> > 
> > Subject: Re: [PATCH v1 3/4] arm64: dts: ls1028a: fix little-big endian 
> > issue for
> > dcfg
> > 
> 
> [Y.b. Lu] Acked-by: Yangbo Lu 
> 
> Hi Shawn, could you help to review and merge the two dts patches of this 
> patch-set?
> Thanks.

Please resend them with me on recipients.

Shawn

Re: [PATCH v6 3/3] PCI: layerscape: Add LS1028a support

[Shawn Guo]

On Mon, Sep 02, 2019 at 11:43:19AM +0800, Xiaowei Bao wrote:
> Add support for the LS1028a PCIe controller.
> 
> Signed-off-by: Xiaowei Bao 
> Signed-off-by: Hou Zhiqiang 
> ---
> v2:
>  - No change.
> v3:
>  - Reuse the ls2088 driver data structurt.
> v4:
>  - No change.
> v5:
>  - No change.
> v6:
>  - No change.
> 
>  drivers/pci/controller/dwc/pci-layerscape.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/controller/dwc/pci-layerscape.c 
> b/drivers/pci/controller/dwc/pci-layerscape.c
> index 3a5fa26..f24f79a 100644
> --- a/drivers/pci/controller/dwc/pci-layerscape.c
> +++ b/drivers/pci/controller/dwc/pci-layerscape.c
> @@ -263,6 +263,7 @@ static const struct ls_pcie_drvdata ls2088_drvdata = {
>  static const struct of_device_id ls_pcie_of_match[] = {
>   { .compatible = "fsl,ls1012a-pcie", .data = _drvdata },
>   { .compatible = "fsl,ls1021a-pcie", .data = _drvdata },
> + { .compatible = "fsl,ls1028a-pcie", .data = _drvdata },

I think you can save this driver change by using "fsl,ls2088a-pcie" as
compatible fallback like below.

  compatible = "fsl,ls1028a-pcie", "fsl,ls2088a-pcie";

Shawn

>   { .compatible = "fsl,ls1043a-pcie", .data = _drvdata },
>   { .compatible = "fsl,ls1046a-pcie", .data = _drvdata },
>   { .compatible = "fsl,ls2080a-pcie", .data = _drvdata },
> -- 
> 2.9.5
> 

Re: [PATCH v2 18/34] dt-bindings: arm: Convert FSL board/soc bindings to json-schema

[Shawn Guo]

On Thu, Jan 10, 2019 at 10:44:03AM +, Vokáč Michal wrote:
...
> > What happened to this?  It seems the patch did not hit v5.0-rc1.
> 
> Hi Shawn,
> Rob actually asked you a similar question two days ago..
> 
> https://lkml.org/lkml/2019/1/8/754

Oops, it seems there were some miscommunication between Rob and me.  Let
me fix this by queuing this patch on my tree now.

Shawn

Re: [PATCH v2 18/34] dt-bindings: arm: Convert FSL board/soc bindings to json-schema

[Shawn Guo]

On Sat, Dec 08, 2018 at 09:58:37AM +0800, Shawn Guo wrote:
> On Thu, Dec 06, 2018 at 05:33:13PM -0600, Rob Herring wrote:
> > On Wed, Dec 5, 2018 at 8:32 PM Shawn Guo  wrote:
> > >
> > > On Mon, Dec 03, 2018 at 03:32:07PM -0600, Rob Herring wrote:
> > > > Convert Freescale SoC bindings to DT schema format using json-schema.
> > > >
> > > > Cc: Shawn Guo 
> > > > Cc: Mark Rutland 
> > > > Cc: devicet...@vger.kernel.org
> > > > Signed-off-by: Rob Herring 
> > > > ---
> > > >  .../devicetree/bindings/arm/armadeus.txt  |   6 -
> > > >  Documentation/devicetree/bindings/arm/bhf.txt |   6 -
> > > >  .../bindings/arm/compulab-boards.txt  |  25 --
> > > >  Documentation/devicetree/bindings/arm/fsl.txt | 229 --
> > > >  .../devicetree/bindings/arm/fsl.yaml  | 214 
> > >
> > > Rob,
> > >
> > > I do have any changes on bindings/arm/fsl.txt queued for 4.21 on my
> > > tree, so please send it via your tree.
> > 
> > What about:
> > 
> > c386f362957b dt-bindings: Add compatible string for LS1028A-QDS
> > 3671cd57de06 dt-bindings: ls1012a: Add FRWY-LS1012A device tree binding
> 
> Ah, sorry, I only checked on imx/dt branch and forgot imx/dt64.  I will
> drop the changes on fsl.txt and update fsl.yaml after it hits mainline.

What happened to this?  It seems the patch did not hit v5.0-rc1.

Shawn

Re: [PATCH v3 06/12] arm: perf/core: use PERF_PMU_CAP_NO_EXCLUDE for exclude incapable PMUs

[Shawn Guo]

On Thu, Dec 06, 2018 at 04:47:23PM +, Andrew Murray wrote:
> For drivers that do not support context exclusion let's advertise the
> PERF_PMU_CAP_NO_EXCLUDE capability. This ensures that perf will
> prevent us from handling events where any exclusion flags are set.
> Let's also remove the now unnecessary check for exclusion flags.
> 
> Signed-off-by: Andrew Murray 
> ---
>  arch/arm/mach-imx/mmdc.c | 9 ++---

For imx mmdc changes:

Acked-by: Shawn Guo 

Re: [PATCH v2 18/34] dt-bindings: arm: Convert FSL board/soc bindings to json-schema

[Shawn Guo]

On Thu, Dec 06, 2018 at 05:33:13PM -0600, Rob Herring wrote:
> On Wed, Dec 5, 2018 at 8:32 PM Shawn Guo  wrote:
> >
> > On Mon, Dec 03, 2018 at 03:32:07PM -0600, Rob Herring wrote:
> > > Convert Freescale SoC bindings to DT schema format using json-schema.
> > >
> > > Cc: Shawn Guo 
> > > Cc: Mark Rutland 
> > > Cc: devicet...@vger.kernel.org
> > > Signed-off-by: Rob Herring 
> > > ---
> > >  .../devicetree/bindings/arm/armadeus.txt  |   6 -
> > >  Documentation/devicetree/bindings/arm/bhf.txt |   6 -
> > >  .../bindings/arm/compulab-boards.txt  |  25 --
> > >  Documentation/devicetree/bindings/arm/fsl.txt | 229 --
> > >  .../devicetree/bindings/arm/fsl.yaml  | 214 
> >
> > Rob,
> >
> > I do have any changes on bindings/arm/fsl.txt queued for 4.21 on my
> > tree, so please send it via your tree.
> 
> What about:
> 
> c386f362957b dt-bindings: Add compatible string for LS1028A-QDS
> 3671cd57de06 dt-bindings: ls1012a: Add FRWY-LS1012A device tree binding

Ah, sorry, I only checked on imx/dt branch and forgot imx/dt64.  I will
drop the changes on fsl.txt and update fsl.yaml after it hits mainline.

Shawn

Re: [PATCH v2 34/34] dt-bindings: arm: Convert ZTE board/soc bindings to json-schema

[Shawn Guo]

On Mon, Dec 03, 2018 at 03:32:23PM -0600, Rob Herring wrote:
> Convert ZTE SoC bindings to DT schema format using json-schema.
> 
> Cc: Jun Nie 
> Cc: Mark Rutland 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Acked-by: Shawn Guo 
> Signed-off-by: Rob Herring 
> ---
>  Documentation/devicetree/bindings/arm/zte.txt | 14 --
>  .../devicetree/bindings/arm/zte.yaml  | 26 +++

I do not have any changes on bindings/arm/zte.txt in my queue, so please
you take it.

Shawn

Re: [PATCH v2 18/34] dt-bindings: arm: Convert FSL board/soc bindings to json-schema

[Shawn Guo]

On Mon, Dec 03, 2018 at 03:32:07PM -0600, Rob Herring wrote:
> Convert Freescale SoC bindings to DT schema format using json-schema.
> 
> Cc: Shawn Guo 
> Cc: Mark Rutland 
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring 
> ---
>  .../devicetree/bindings/arm/armadeus.txt  |   6 -
>  Documentation/devicetree/bindings/arm/bhf.txt |   6 -
>  .../bindings/arm/compulab-boards.txt  |  25 --
>  Documentation/devicetree/bindings/arm/fsl.txt | 229 --
>  .../devicetree/bindings/arm/fsl.yaml  | 214 

Rob,

I do have any changes on bindings/arm/fsl.txt queued for 4.21 on my
tree, so please send it via your tree.

Acked-by: Shawn Guo 

Re: [v11 6/7] arm64: dts: ls1046a: add qdma device tree nodes

[Shawn Guo]

On Tue, Oct 30, 2018 at 10:36:03AM +0800, Peng Ma wrote:
> add the qDMA device tree nodes for LS1046A devices.
> 
> Signed-off-by: Wen He 
> Signed-off-by: Peng Ma 
> ---
> change in v11:
>   - no
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi |   21 +
>  1 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> index ef83786..dc65318 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> @@ -704,6 +704,27 @@
>   < 0 0 4  GIC_SPI 154 
> IRQ_TYPE_LEVEL_HIGH>;
>   };
>  
> + qdma: dma-controller@838 {
> + compatible = "fsl,ls1046a-qdma", "fsl,ls1021a-qdma";
> + reg = <0x0 0x838 0x0 0x1000>, /* Controller regs */
> +   <0x0 0x839 0x0 0x1>, /* Status regs */
> +   <0x0 0x83a 0x0 0x4>; /* Block regs */
> + interrupts = <0 153 0x4>,
> +  <0 39 0x4>,
> +  <0 40 0x4>,
> +  <0 41 0x4>,
> +  <0 42 0x4>;

Use GIC_SPI and IRQ_TYPE_xxx defines.

Shawn

> + interrupt-names = "qdma-error", "qdma-queue0",
> + "qdma-queue1", "qdma-queue2", "qdma-queue3";
> + dma-channels = <8>;
> + block-number = <1>;
> + block-offset = <0x1>;
> + fsl,dma-queues = <2>;
> + status-sizes = <64>;
> + queue-sizes = <64 64>;
> + big-endian;
> + };
> +
>   };
>  
>   reserved-memory {
> -- 
> 1.7.1
> 

Re: [v11 5/7] arm64: dts: ls1043a: add qdma device tree nodes

[Shawn Guo]

On Tue, Oct 30, 2018 at 10:36:02AM +0800, Peng Ma wrote:
> add the qDMA device tree nodes for LS1043A devices.
> 
> Signed-off-by: Wen He 
> Signed-off-by: Peng Ma 
> ---
> change in v11:
>   - no
> 
>  arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi |   22 ++
>  1 files changed, 22 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> index 7881e3d..d560141 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
> @@ -734,6 +734,28 @@
>   < 0 0 3  0 156 0x4>,
>   < 0 0 4  0 157 0x4>;
>   };
> +
> + qdma: dma-controller@838 {
> + compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
> + reg = <0x0 0x838 0x0 0x1000>, /* Controller regs */
> +   <0x0 0x839 0x0 0x1>, /* Status regs */
> +   <0x0 0x83a 0x0 0x4>; /* Block regs */
> + interrupts = <0 153 0x4>,
> +  <0 39 0x4>,
> +  <0 40 0x4>,
> +  <0 41 0x4>,
> +  <0 42 0x4>;

I know this dts file did not use GIC_SPI and IRQ_TYPE_xxx defines from
the beginning.  But please use them for new additions.

Shawn

> + interrupt-names = "qdma-error", "qdma-queue0",
> + "qdma-queue1", "qdma-queue2", "qdma-queue3";
> + dma-channels = <8>;
> + block-number = <1>;
> + block-offset = <0x1>;
> + fsl,dma-queues = <2>;
> + status-sizes = <64>;
> + queue-sizes = <64 64>;
> + big-endian;
> + };
> +
>   };
>  
>   firmware {
> -- 
> 1.7.1
> 

Re: [v11 4/7] arm: dts: ls1021a: add qdma device tree nodes

[Shawn Guo]

On Tue, Oct 30, 2018 at 10:36:01AM +0800, Peng Ma wrote:
> add the qDMA device tree nodes for LS1021A devices.
> 
> Signed-off-by: Wen He 
> Signed-off-by: Peng Ma 

Applied, thanks.

Re: [PATCHv2 2/6] ARM: dts: ls1021a: Add the status property disable PCIe

[Shawn Guo]

On Mon, Nov 05, 2018 at 04:46:49PM +0800, Xiaowei Bao wrote:
> Add the status property disable the PCIe, the property will be enable
> by bootloader.
> 
> Signed-off-by: Xiaowei Bao 

Applied, thanks.

Re: [PATCHv2 1/6] arm64: dts: Add the status property disable PCIe

[Shawn Guo]

On Mon, Nov 05, 2018 at 04:46:48PM +0800, Xiaowei Bao wrote:
> From: Bao Xiaowei 
> 
> Add the status property disable the PCIe, the property will be enable
> by bootloader.
> 
> Signed-off-by: Bao Xiaowei 

Changed prefix to 'arm64: dts: fsl: ...' and applied the patch.

Shawn

Re: [PATCH v7 6/6] arm64: dts: add LX2160ARDB board support

[Shawn Guo]

On Mon, Oct 29, 2018 at 08:58:01AM +, Vabhav Sharma wrote:
> LX2160A reference design board (RDB) is a high-performance
> computing, evaluation, and development platform with LX2160A
> SoC.
> 
> Signed-off-by: Priyanka Jain 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Vabhav Sharma 
> Signed-off-by: Horia Geanta 
> Signed-off-by: Ran Wang 
> Signed-off-by: Zhang Ying-22455 
> Signed-off-by: Yinbo Zhu 
> Acked-by: Li Yang 

Applied, thanks.

Re: [PATCH v7 5/6] arm64: dts: add QorIQ LX2160A SoC support

[Shawn Guo]

On Mon, Oct 29, 2018 at 08:57:54AM +, Vabhav Sharma wrote:
> LX2160A SoC is based on Layerscape Chassis Generation 3.2 Architecture.
> 
> LX2160A features an advanced 16 64-bit ARM v8 CortexA72 processor cores
> in 8 cluster, CCN508, GICv3,two 64-bit DDR4 memory controller, 8 I2C
> controllers, 3 dspi, 2 esdhc,2 USB 3.0, mmu 500, 3 SATA, 4 PL011 SBSA
> UARTs etc.
> 
> Signed-off-by: Ramneek Mehresh 
> Signed-off-by: Zhang Ying-22455 
> Signed-off-by: Nipun Gupta 
> Signed-off-by: Priyanka Jain 
> Signed-off-by: Yogesh Gaur 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Vabhav Sharma 
> Signed-off-by: Horia Geanta 
> Signed-off-by: Ran Wang 
> Signed-off-by: Yinbo Zhu 

Applied, thanks.

Re: [PATCH 36/36] dt-bindings: arm: Convert ZTE board/soc bindings to json-schema

[Shawn Guo]

On Fri, Oct 05, 2018 at 11:58:48AM -0500, Rob Herring wrote:
> Convert ZTE SoC bindings to DT schema format using json-schema.
> 
> Cc: Jun Nie 
> Cc: Baoyou Xie 
> Cc: Shawn Guo 
> Cc: Mark Rutland 
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring 

Acked-by: Shawn Guo 

Re: [PATCH 22/36] dt-bindings: arm: Convert FSL board/soc bindings to json-schema

[Shawn Guo]

On Fri, Oct 05, 2018 at 11:58:34AM -0500, Rob Herring wrote:
> Convert Freescale SoC bindings to DT schema format using json-schema.
> 
> Cc: Shawn Guo 
> Cc: Mark Rutland 
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring 
> ---
>  .../devicetree/bindings/arm/armadeus.txt  |   6 -
>  Documentation/devicetree/bindings/arm/bhf.txt |   6 -
>  .../bindings/arm/compulab-boards.txt  |  25 ---
>  Documentation/devicetree/bindings/arm/fsl.txt | 185 --
>  .../devicetree/bindings/arm/fsl.yaml  | 166 
>  .../devicetree/bindings/arm/i2se.txt  |  22 ---
>  .../devicetree/bindings/arm/olimex.txt|  10 -
>  .../devicetree/bindings/arm/technologic.txt   |  23 ---
>  8 files changed, 166 insertions(+), 277 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/arm/armadeus.txt
>  delete mode 100644 Documentation/devicetree/bindings/arm/bhf.txt
>  delete mode 100644 Documentation/devicetree/bindings/arm/compulab-boards.txt
>  delete mode 100644 Documentation/devicetree/bindings/arm/fsl.txt
>  create mode 100644 Documentation/devicetree/bindings/arm/fsl.yaml
>  delete mode 100644 Documentation/devicetree/bindings/arm/i2se.txt
>  delete mode 100644 Documentation/devicetree/bindings/arm/olimex.txt
>  delete mode 100644 Documentation/devicetree/bindings/arm/technologic.txt
> 
> diff --git a/Documentation/devicetree/bindings/arm/armadeus.txt 
> b/Documentation/devicetree/bindings/arm/armadeus.txt
> deleted file mode 100644
> index 9821283ff516..
> --- a/Documentation/devicetree/bindings/arm/armadeus.txt
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -Armadeus i.MX Platforms Device Tree Bindings
> 
> -
> -APF51: i.MX51 based module.
> -Required root node properties:
> -- compatible = "armadeus,imx51-apf51", "fsl,imx51";
> diff --git a/Documentation/devicetree/bindings/arm/bhf.txt 
> b/Documentation/devicetree/bindings/arm/bhf.txt
> deleted file mode 100644
> index 886b503caf9c..
> --- a/Documentation/devicetree/bindings/arm/bhf.txt
> +++ /dev/null
> @@ -1,6 +0,0 @@
> -Beckhoff Automation Platforms Device Tree Bindings
> ---
> -
> -CX9020 Embedded PC
> -Required root node properties:
> -- compatible = "bhf,cx9020", "fsl,imx53";
> diff --git a/Documentation/devicetree/bindings/arm/compulab-boards.txt 
> b/Documentation/devicetree/bindings/arm/compulab-boards.txt
> deleted file mode 100644
> index 42a10285af9c..
> --- a/Documentation/devicetree/bindings/arm/compulab-boards.txt
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -CompuLab SB-SOM is a multi-module baseboard capable of carrying:
> - - CM-T43
> - - CM-T54
> - - CM-QS600
> - - CL-SOM-AM57x
> - - CL-SOM-iMX7
> -modules with minor modifications to the SB-SOM assembly.
> -
> -Required root node properties:
> -- compatible = should be "compulab,sb-som"
> -
> -Compulab CL-SOM-iMX7 is a miniature System-on-Module (SoM) based on
> -Freescale i.MX7 ARM Cortex-A7 System-on-Chip.
> -
> -Required root node properties:
> -- compatible = "compulab,cl-som-imx7", "fsl,imx7d";
> -
> -Compulab SBC-iMX7 is a single board computer based on the
> -Freescale i.MX7 system-on-chip. SBC-iMX7 is implemented with
> -the CL-SOM-iMX7 System-on-Module providing most of the functions,
> -and SB-SOM-iMX7 carrier board providing additional peripheral
> -functions and connectors.
> -
> -Required root node properties:
> -- compatible = "compulab,sbc-imx7", "compulab,cl-som-imx7", "fsl,imx7d";
> diff --git a/Documentation/devicetree/bindings/arm/fsl.txt 
> b/Documentation/devicetree/bindings/arm/fsl.txt
> deleted file mode 100644
> index 1e775aaa5c5b..
> --- a/Documentation/devicetree/bindings/arm/fsl.txt
> +++ /dev/null
> @@ -1,185 +0,0 @@
> -Freescale i.MX Platforms Device Tree Bindings
> 
> -
> -i.MX23 Evaluation Kit
> -Required root node properties:
> -- compatible = "fsl,imx23-evk", "fsl,imx23";
> -
> -i.MX25 Product Development Kit
> -Required root node properties:
> -- compatible = "fsl,imx25-pdk", "fsl,imx25";
> -
> -i.MX27 Product Development Kit
> -Required root node properties:
> -- compatible = "fsl,imx27-pdk", "fsl,imx27";
> -
> -i.MX28 Evaluation Kit
> -Required root node properties:
> -- compatible = "fsl,imx28-evk", "fsl,imx28";
> -
> -i.MX51 Babbage Board
> -Required root node prop

Re: [PATCH 06/36] dt-bindings: arm: zte: Move sysctrl bindings to their own doc

[Shawn Guo]

On Fri, Oct 05, 2018 at 11:58:18AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
> 
> Cc: Mark Rutland 
> Cc: Jun Nie 
> Cc: Baoyou Xie 
> Cc: Shawn Guo 
> Cc: devicet...@vger.kernel.org
> Cc: linux-arm-ker...@lists.infradead.org
> Signed-off-by: Rob Herring 
> ---
>  .../devicetree/bindings/arm/zte-sysctrl.txt   | 30 +++

zte,sysctrl.txt to be consistent with other files like
fsl,layerscape-dcfg.txt?  I'm fine with either way, but just want to
see more consistent naming convention?  Other than that,

Acked-by: Shawn Guo 

Re: [PATCH 04/36] dt-bindings: arm: fsl: Move DCFG and SCFG bindings to their own docs

[Shawn Guo]

On Fri, Oct 05, 2018 at 11:58:16AM -0500, Rob Herring wrote:
> In preparation to convert board-level bindings to json-schema, move
> various misc SoC bindings out to their own file.
> 
> Cc: Shawn Guo 
> Cc: Mark Rutland 
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Rob Herring 

Acked-by: Shawn Guo 

Re: [PATCH v4 6/6] arm64: dts: add LX2160ARDB board support

[Shawn Guo]

On Thu, Oct 04, 2018 at 06:33:51AM +0530, Vabhav Sharma wrote:
> LX2160A reference design board (RDB) is a high-performance
> computing, evaluation, and development platform with LX2160A
> SoC.
> 
> Signed-off-by: Priyanka Jain 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Vabhav Sharma 
> ---
>  arch/arm64/boot/dts/freescale/Makefile|   1 +
>  arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 100 
> ++
>  2 files changed, 101 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> 
> diff --git a/arch/arm64/boot/dts/freescale/Makefile 
> b/arch/arm64/boot/dts/freescale/Makefile
> index 86e18ad..445b72b 100644
> --- a/arch/arm64/boot/dts/freescale/Makefile
> +++ b/arch/arm64/boot/dts/freescale/Makefile
> @@ -13,3 +13,4 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb
>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb
>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb
>  dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb
> +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts 
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> new file mode 100644
> index 000..1483071
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +//
> +// Device Tree file for LX2160ARDB
> +//
> +// Copyright 2018 NXP
> +
> +/dts-v1/;
> +
> +#include "fsl-lx2160a.dtsi"
> +
> +/ {
> + model = "NXP Layerscape LX2160ARDB";
> + compatible = "fsl,lx2160a-rdb", "fsl,lx2160a";
> +
> + chosen {
> + stdout-path = "serial0:115200n8";
> + };
> +
> + sb_3v3: regulator-fixed {

The node name should probably be named like regulator-sb3v3 or
something, so that the pattern can be followed when we have another
fixed regulator to be added.

> + compatible = "regulator-fixed";
> + regulator-name = "fixed-3.3V";

The name should be something we can find on board schematics.

> + regulator-min-microvolt = <330>;
> + regulator-max-microvolt = <330>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {

Please keep these labeled nodes sorted alphabetically.

> + status = "okay";

Have a newline between properties and child node.

> + i2c-mux@77 {
> + compatible = "nxp,pca9547";
> + reg = <0x77>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x2>;
> +
> + power-monitor@40 {
> + compatible = "ti,ina220";
> + reg = <0x40>;
> + shunt-resistor = <1000>;
> + };
> + };
> +
> + i2c@3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x3>;
> +
> + temperature-sensor@4c {
> + compatible = "nxp,sa56004";
> + reg = <0x4c>;
> + vcc-supply = <_3v3>;
> + };
> +
> + temperature-sensor@4d {
> + compatible = "nxp,sa56004";
> + reg = <0x4d>;
> + vcc-supply = <_3v3>;
> + };
> + };
> + };
> +};
> +
> + {
> + status = "okay";
> +
> + rtc@51 {
> + compatible = "nxp,pcf2129";
> + reg = <0x51>;
> + // IRQ10_B
> + interrupts = <0 150 0x4>;
> + };

Bad indentation.

Shawn

> +
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> +
> + {
> + status = "okay";
> +};
> -- 
> 2.7.4
> 

Re: [PATCH v4 5/6] arm64: dts: add QorIQ LX2160A SoC support

[Shawn Guo]

On Thu, Oct 04, 2018 at 06:33:50AM +0530, Vabhav Sharma wrote:
> LX2160A SoC is based on Layerscape Chassis Generation 3.2 Architecture.
> 
> LX2160A features an advanced 16 64-bit ARM v8 CortexA72 processor cores
> in 8 cluster, CCN508, GICv3,two 64-bit DDR4 memory controller, 8 I2C
> controllers, 3 dspi, 2 esdhc,2 USB 3.0, mmu 500, 3 SATA, 4 PL011 SBSA
> UARTs etc.
> 
> Signed-off-by: Ramneek Mehresh 
> Signed-off-by: Zhang Ying-22455 
> Signed-off-by: Nipun Gupta 
> Signed-off-by: Priyanka Jain 
> Signed-off-by: Yogesh Gaur 
> Signed-off-by: Sriram Dash 
> Signed-off-by: Vabhav Sharma 
> ---
>  arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 702 
> +
>  1 file changed, 702 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi 
> b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> new file mode 100644
> index 000..c758268
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -0,0 +1,702 @@
> +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> +//
> +// Device Tree Include file for Layerscape-LX2160A family SoC.
> +//
> +// Copyright 2018 NXP
> +
> +#include 
> +
> +/memreserve/ 0x8000 0x0001;
> +
> +/ {
> + compatible = "fsl,lx2160a";
> + interrupt-parent = <>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + // 8 clusters having 2 Cortex-A72 cores each
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x0>;
> + clocks = < 1 0>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <192>;
> + next-level-cache = <_l2>;
> + };
> +
> + cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x1>;
> + clocks = < 1 0>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <192>;
> + next-level-cache = <_l2>;
> + };
> +
> + cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x100>;
> + clocks = < 1 1>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <192>;
> + next-level-cache = <_l2>;
> + };
> +
> + cpu@101 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x101>;
> + clocks = < 1 1>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <192>;
> + next-level-cache = <_l2>;
> + };
> +
> + cpu@200 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x200>;
> + clocks = < 1 2>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> + d-cache-sets = <128>;
> + i-cache-size = <0xC000>;
> + i-cache-line-size = <64>;
> + i-cache-sets = <192>;
> + next-level-cache = <_l2>;
> + };
> +
> + cpu@201 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a72";
> + enable-method = "psci";
> + reg = <0x201>;
> + clocks = < 1 2>;
> + d-cache-size = <0x8000>;
> + d-cache-line-size = <64>;
> +  

Re: [PATCH] fix double ;;s in code

[Shawn Guo]

On Sat, Feb 24, 2018 at 09:52:27AM +0100, Pavel Machek wrote:
> Hi!
> 
> > > diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> > > index 53f7275..cfb42f5 100644
> > > --- a/drivers/soc/imx/gpc.c
> > > +++ b/drivers/soc/imx/gpc.c
> > > @@ -348,7 +348,7 @@ static int imx_gpc_old_dt_init(struct device *dev, 
> > > struct regmap *regmap,
> > >   if (i == 1) {
> > >   domain->supply = devm_regulator_get(dev, "pu");
> > >   if (IS_ERR(domain->supply))
> > > - return PTR_ERR(domain->supply);;
> > > + return PTR_ERR(domain->supply);
> > >  
> > >   ret = imx_pgc_get_clocks(dev, domain);
> > >   if (ret)
> > > 
> > 
> > Considering the controversy how the changes should be merged, I'm going
> > to send a separate patch just for IMX GPC driver with a reported-by-you
> > tag.  Thanks for catching this.
> 
> That works for me.
> 
> Alternatively... Andrew Morton merged the patch to his -mm tree
> (thanks!), so you don't need to take any action, and it will be
> eventually fixed.

Okay, I'm dropping my patch from IMX tree.

Shawn

Re: [PATCH] fix double ;;s in code

[Shawn Guo]

Hi Pavel,

On Sat, Feb 17, 2018 at 10:19:55PM +0100, Pavel Machek wrote:
...
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> index 53f7275..cfb42f5 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -348,7 +348,7 @@ static int imx_gpc_old_dt_init(struct device *dev, struct 
> regmap *regmap,
>   if (i == 1) {
>   domain->supply = devm_regulator_get(dev, "pu");
>   if (IS_ERR(domain->supply))
> - return PTR_ERR(domain->supply);;
> + return PTR_ERR(domain->supply);
>  
>   ret = imx_pgc_get_clocks(dev, domain);
>   if (ret)
> 

Considering the controversy how the changes should be merged, I'm going
to send a separate patch just for IMX GPC driver with a reported-by-you
tag.  Thanks for catching this.

Shawn

Re: [PATCH] mtd: nand: Rename nand.h into rawnand.h

[Shawn Guo]

On Fri, Aug 04, 2017 at 05:29:10PM +0200, Boris Brezillon wrote:
> We are planning to share more code between different NAND based
> devices (SPI NAND, OneNAND and raw NANDs), but before doing that
> we need to move the existing include/linux/mtd/nand.h file into
> include/linux/mtd/rawnand.h so we can later create a nand.h header
> containing all common structure and function prototypes.
> 
> Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
> Signed-off-by: Peter Pan <peterpand...@micron.com>
...
>  arch/arm/mach-imx/mach-qong.c       | 2 +-

Acked-by: Shawn Guo <shawn...@kernel.org>

Re: [PATCH V2 3/5] arm:dt:ls1021a: Add TMU device tree support for LS1021A

[Shawn Guo]

On Sun, Oct 09, 2016 at 02:47:04PM +0800, Jia Hongtao wrote:
> From: Hongtao Jia 
> 
> Also add nodes and properties for thermal management support.
> 
> Signed-off-by: Jia Hongtao 

For patch #3 ~ #5, I updated the subject prefix a bit and applied.

Shawn

Re: [PATCH V2 1/5] powerpc/mpc85xx: Update TMU device tree node for T1040/T1042

[Shawn Guo]

On Sun, Oct 09, 2016 at 02:47:02PM +0800, Jia Hongtao wrote:
> From: Hongtao Jia 
> 
> SoC compatible string and endianness property are added according to the
> new bindings.

The commit log doesn't seem to match the actual changes.  Same for patch
2/5.

Shawn

> 
> Signed-off-by: Jia Hongtao 
> ---
> Changes for V2:
> * Rebase on latest linux-next tree (next-20161006).
> 
>  arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi 
> b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> index 44e399b..145c7f4 100644
> --- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
> @@ -526,7 +526,7 @@
>  
>  0x0003 0x0012
>  0x00030001 0x001d>;
> - #thermal-sensor-cells = <0>;
> + #thermal-sensor-cells = <1>;
>   };
>  
>   thermal-zones {
> @@ -534,7 +534,7 @@
>   polling-delay-passive = <1000>;
>   polling-delay = <5000>;
>  
> - thermal-sensors = <>;
> + thermal-sensors = < 2>;
>  
>   trips {
>   cpu_alert: cpu-alert {
> -- 
> 2.1.0.27.g96db324
> 
> 
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Re: [PATCH 0/2] clk: imx6: add kpp clock for i.MX6UL

[Shawn Guo]

On Thu, Feb 25, 2016 at 03:56:55PM -0800, Stephen Boyd wrote:
> On 01/12, Lothar Waßmann wrote:
> > This patchset adds the clock which is necessary to operate the KPP
> > unit on i.MX6UL.
> > The first patch removes bogus whitespace before TABs in indentation.
> > The second patch adds the clock definition.
> > 
> 
> Both look fine. Shawn?

Oops, the patches were overlooked.  Applied now.  Thanks for reminding.

Shawn
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Re: [PATCH v3 1/2] fsl: Add binding for RCPM

[Shawn Guo]

On Thu, Sep 24, 2015 at 04:29:13PM +0800, Dongsheng Wang wrote:
> From: Wang Dongsheng 
> 
> RCPM is the Run Control and Power Management module performs all
> device-level tasks associated with device run control and power
> management.
> 
> Add this for freescale powerpc platform and layerscape platform.
> 
> Signed-off-by: Chenhui Zhao 
> Signed-off-by: Tang Yuantian 
> Signed-off-by: Wang Dongsheng 
> ---
> *v3*
> - Add "fsl,#rcpm-wakeup-cells" for rcpm node. The number of cells
>   correspond rcpm-wakeup property.
> - Modify rcpm-wakeup property description.
> 
> *v2*
> - Remove P4080 example.
> - Modify rcpm-wakeup property description.
> 
> diff --git a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt 
> b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> new file mode 100644
> index 000..52110ec
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt
> @@ -0,0 +1,63 @@
> +* Run Control and Power Management
> +---
> +The RCPM performs all device-level tasks associated with device run control
> +and power management.
> +
> +Required properites:
> +  - reg : Offset and length of the register set of RCPM block.
> +  - fsl,#rcpm-wakeup-cells : The number of cells in rcpm-wakeup property.
> +  - compatible : Sould contain a chip-specific RCPM block compatible string
> + and (if applicable) may contain a chassis-version RCPM compatible
> + string. Chip-specific strings are of the form "fsl,-rcpm",
> + such as:
> + * "fsl,p2041-rcpm"
> + * "fsl,p3041-rcpm"
> + * "fsl,p4080-rcpm"
> + * "fsl,p5020-rcpm"
> + * "fsl,p5040-rcpm"
> + * "fsl,t4240-rcpm"
> + * "fsl,b4420-rcpm"
> + * "fsl,b4860-rcpm"
> +
> + Chassis-version strings are of the form "fsl,qoriq-rcpm-",
> + such as:
> + * "fsl,qoriq-rcpm-1.0": for chassis 1.0 rcpm
> + * "fsl,qoriq-rcpm-2.0": for chassis 2.0 rcpm
> + * "fsl,qoriq-rcpm-2.1": for chassis 2.1 rcpm
> +
> +All references to "1.0" and "2.0" refer to the QorIQ chassis version to
> +which the chip complies.
> +Chassis Version  Example Chips
> +---  ---
> +1.0  p4080, p5020, p5040, p2041, p3041
> +2.0  t4240, b4860, b4420
> +2.1  t1040, ls1021
> +
> +Example:
> +The RCPM node for T4240:
> + rcpm: global-utilities@e2000 {
> + compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
> + reg = <0xe2000 0x1000>;
> + fsl,#rcpm-wakeup-cells = <2>;
> + };
> +
> +* Freescale RCPM Wakeup Source Device Tree Bindings
> +---
> +Required rcpm-wakeup property should be added to a device node if the device
> +can be used as a wakeup source.
> +
> +  - rcpm-wakeup: The value of the property consists of cells, the number of

Shouldn't this vendor specific property be prefixed with 'fsl,' as well?

> + cells defined in "fsl,#rcpm-wakeup-cells". The first cell is a pointer
> + to the rcpm node, the second cell is the bit mask that should be set
> + in IPPDEXPCR0, and the third cell is for IPPDEXPCR1, and so on.

I guess that IPPDEXPCR0 and IPPDEXPCR1 need some documentation too, or a
pointer to hardware documents containing more detailed info about them.

Shawn

> +
> +Example:
> + lpuart0: serial@295 {
> + compatible = "fsl,ls1021a-lpuart";
> + reg = <0x0 0x295 0x0 0x1000>;
> + interrupts = ;
> + clocks = <>;
> + clock-names = "ipg";
> + rcpm-wakeup = < 0x0 0x4000>;
> + status = "disabled";
> + };
> -- 
> 2.1.0.27.g96db324
> 
> 
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Re: [PATCH] ASoC: fsl_spdif: don't change the root clock rate of spdif in driver

[Shawn Guo]

On Tue, Sep 16, 2014 at 07:24:40PM -0700, Nicolin Chen wrote:
 It's not supported in the clock API or just not implemented in our
 code? Can we just register a clock without CLK_SET_RATE_PARENT to
 achieve the purpose? (We are just trying to fix those PRED and PODF
 dividers when the driver calls set_rate to their GATE clock.)

It seems I misunderstood your question.  Yes, if we drop flag
CLK_SET_RATE_PARENT for the gate clock in question, the rate change
request will not be propagated to upstream dividers.

Shawn
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Re: [PATCH] ASoC: fsl_spdif: don't change the root clock rate of spdif in driver

[Shawn Guo]

On Tue, Sep 16, 2014 at 11:19:28AM -0700, Nicolin Chen wrote:
 On Tue, Sep 16, 2014 at 07:46:34PM +0800, Shengjiu Wang wrote:
  The spdif root clock may be used by other module or defined with
  CLK_SET_RATE_GATE, so we can't change the clock rate in driver.
  In this patch remove the clk_set_rate and clk_round_rate to protect the
  clock.
 
 It's a quite convenient and conservative way to remove the clock
 dealing code in the driver, however, it may result less flexible
 functionalities.
 
 The reason why I left the clk_set_rate() in the driver is to hope
 we may find a better way to tackle those tough situations. For IP
 itself, it doesn't matter if the clock the SoC provides to it is
 being shared by other modules or not.
 
 So I think, if it's a shared clock, we should not define it as a
 rate-changeable one in the SoC level, as we might still have some
 SoCs provide a dedicated clock to S/PDIF so as to get the maximum
 range of clock support for users.
 
 @Shawn
 Sorry to involve you in this topic. I'm not so sure if we can do
 this in the clock driver so that the clock rate would be fixed
 even if the driver is trying to change it. If we can, I think we
 may use a better solution here instead.

No, we do not have anything like that today.

Shawn
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Re: [PATCH v2 1/2] ARM: imx: Add the secondary request into the structure for imx-sdma

[Shawn Guo]

On Thu, Jul 24, 2014 at 04:35:28PM +0800, Nicolin Chen wrote:
 SDMA supports device to device (per_2_per) scripts to handle DMA transfering
 between two peripheral devices. The per_2_per script, however, needs two dma
 requests from two sides while the current structure only defined one request.
 
 So this patch just simply adds the secondary request so as to let SDMA and
 its user to add its implementation later.
 
 [ Both change in the SDMA driver and its users like Freescale ASRC ASoC driver
   should be taken along with this change in order to truly support per_2_per
   sciprts. However, we here make an expediency by adding this first so that
   we can add either side later since this patch won't break any function and
   meanwhile it can make merge window more smoothly: we don't need to apply the
   change inside dmaengine branch via ASoC tree any more. -- Nicolin ]
 
 Signed-off-by: Nicolin Chen nicoleots...@gmail.com

Acked-by: Shawn Guo shawn@linaro.org
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Re: [PATCH v5] ASoC: fsl_sai: Add clock controls for SAI

[Shawn Guo]

On Thu, Apr 10, 2014 at 07:23:12PM +0800, Nicolin Chen wrote:
 The SAI mainly has the following clocks:
   bus clock
 control and configure registers and to generate synchronous
 interrupts and DMA requests.
 
   mclk1, mclk2, mclk3
 to generate the bit clock when the receiver or transmitter is
 configured for an internally generated bit clock.
 
 So this patch adds these clocks and their clock controls to the driver,
 meanwhile, corrects the existing DTS accordingly so those platforms can
 benifit from the further feature with different clock sources.
 
 [ To concern the old DTB cases, I've added a bit of extra code to make
   the driver compatible with them. And by marking clock NULL if failed
   to get, the clk_prepare() or clk_get_rate() would easily return 0
   so no further path should be broken. -- by Nicolin ]

In this case, the arch/arm/boot/dts/vf610.dtsi can just go via IMX tree,
since nothing should be broken on sound tree even without dts change?

Shawn

 
 Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
 Acked-by: Xiubo Li li.xi...@freescale.com
 Acked-by: Shawn Guo shawn@linaro.org
 ---
 
 Changelog
 v5:
  * Dropped mclk preparing and enabling since we are not using them currecntly.
  * Made the change compatible to the old DTB.
  * Added returned error value print.
 v4:
  * Merged into single patch.
  * Fixed bus clock ID on vf610.
 v3:
  * Use int type for ret instead of u32.
  * Added Acked-by and Tested-by from Xiubo Li.
 v2:
  * Appended two extra mclks to the driver since SAI actually has three.
  * Renamed clock name to 'bus' and 'mclk' according to the reference manual.
 
  .../devicetree/bindings/sound/fsl-sai.txt  |  9 +++--
  arch/arm/boot/dts/vf610.dtsi   |  6 ++--
  sound/soc/fsl/fsl_sai.c| 38 
 --
  sound/soc/fsl/fsl_sai.h|  4 +++
  4 files changed, 50 insertions(+), 7 deletions(-)
 
 diff --git a/Documentation/devicetree/bindings/sound/fsl-sai.txt 
 b/Documentation/devicetree/bindings/sound/fsl-sai.txt
 index 35c09fe..0f4e238 100644
 --- a/Documentation/devicetree/bindings/sound/fsl-sai.txt
 +++ b/Documentation/devicetree/bindings/sound/fsl-sai.txt
 @@ -10,7 +10,8 @@ Required properties:
  - compatible: Compatible list, contains fsl,vf610-sai or fsl,imx6sx-sai.
  - reg: Offset and length of the register set for the device.
  - clocks: Must contain an entry for each entry in clock-names.
 -- clock-names : Must include the sai entry.
 +- clock-names : Must include the bus for register access and mclk1 
 mclk2
 +  mclk3 for bit clock and frame clock providing.
  - dmas : Generic dma devicetree binding as described in
Documentation/devicetree/bindings/dma/dma.txt.
  - dma-names : Two dmas have to be defined, tx and rx.
 @@ -30,8 +31,10 @@ sai2: sai@40031000 {
 reg = 0x40031000 0x1000;
 pinctrl-names = default;
 pinctrl-0 = pinctrl_sai2_1;
 -   clocks = clks VF610_CLK_SAI2;
 -   clock-names = sai;
 +   clocks = clks VF610_CLK_PLATFORM_BUS,
 +  clks VF610_CLK_SAI2,
 +  clks 0, clks 0;
 +   clock-names = bus, mclk1, mclk2, mclk3;
 dma-names = tx, rx;
 dmas = edma0 0 VF610_EDMA_MUXID0_SAI2_TX,
  edma0 0 VF610_EDMA_MUXID0_SAI2_RX;
 diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
 index d31ce1b..4c3cd59 100644
 --- a/arch/arm/boot/dts/vf610.dtsi
 +++ b/arch/arm/boot/dts/vf610.dtsi
 @@ -139,8 +139,10 @@
   compatible = fsl,vf610-sai;
   reg = 0x40031000 0x1000;
   interrupts = 0 86 0x04;
 - clocks = clks VF610_CLK_SAI2;
 - clock-names = sai;
 + clocks = clks VF610_CLK_PLATFORM_BUS,
 +clks VF610_CLK_SAI2,
 +clks 0, clks 0;
 + clock-names = bus, mclk1, mclk2, mclk3;
   status = disabled;
   };
  
 diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
 index db9f75e..5fff2e1 100644
 --- a/sound/soc/fsl/fsl_sai.c
 +++ b/sound/soc/fsl/fsl_sai.c
 @@ -401,7 +401,15 @@ static int fsl_sai_startup(struct snd_pcm_substream 
 *substream,
   struct snd_soc_dai *cpu_dai)
  {
   struct fsl_sai *sai = snd_soc_dai_get_drvdata(cpu_dai);
 + struct device *dev = sai-pdev-dev;
   u32 reg;
 + int ret;
 +
 + ret = clk_prepare_enable(sai-bus_clk);
 + if (ret) {
 + dev_err(dev, failed to enable bus clock: %d\n, ret);
 + return ret;
 + }
  
   if (substream-stream == SNDRV_PCM_STREAM_PLAYBACK)
   reg = FSL_SAI_TCR3;
 @@ -427,6 +435,8 @@ static void fsl_sai_shutdown(struct snd_pcm_substream 
 *substream

Re: [PATCH v3 2/2] ARM: dts: Append clock bindings for sai2 on VF610 platform

[Shawn Guo]

On Fri, Apr 04, 2014 at 06:08:13PM +0800, Nicolin Chen wrote:
 Since we added fours clock to the DT binding, we should update the current
 SAI dts/dtsi so as not to break their functions.

If so, shouldn't the change be in the same patch as driver change?

Shawn

 
 Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
 Tested-by: Xiubo Li li.xi...@freescale.com
 ---
  arch/arm/boot/dts/vf610.dtsi | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
 index d31ce1b..9fd0007 100644
 --- a/arch/arm/boot/dts/vf610.dtsi
 +++ b/arch/arm/boot/dts/vf610.dtsi
 @@ -139,8 +139,10 @@
   compatible = fsl,vf610-sai;
   reg = 0x40031000 0x1000;
   interrupts = 0 86 0x04;
 - clocks = clks VF610_CLK_SAI2;
 - clock-names = sai;
 + clocks = clks VF610_CLK_SAI2,
 +clks VF610_CLK_SAI2,
 +clks 0, clks 0;
 + clock-names = bus, mclk1, mclk2, mclk3;
   status = disabled;
   };
  
 -- 
 1.8.4
 
 

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Re: [PATCH v3 2/2] ARM: dts: Append clock bindings for sai2 on VF610 platform

[Shawn Guo]

On Fri, Apr 04, 2014 at 06:08:13PM +0800, Nicolin Chen wrote:
 Since we added fours clock to the DT binding, we should update the current
 SAI dts/dtsi so as not to break their functions.

For the record, you're asking my ACK to have the dts change go via sound
tree for not breaking vf610 function on the sound branch,  while
ignoring the fact that the existing DTB will break with the new kernel
anyway.

I'm not completely happy with the approach, but considering that the
existing binding is incorrect, I'm fine with it as long as people agree
to go this way.

Shawn

 
 Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
 Tested-by: Xiubo Li li.xi...@freescale.com
 ---
  arch/arm/boot/dts/vf610.dtsi | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
 index d31ce1b..9fd0007 100644
 --- a/arch/arm/boot/dts/vf610.dtsi
 +++ b/arch/arm/boot/dts/vf610.dtsi
 @@ -139,8 +139,10 @@
   compatible = fsl,vf610-sai;
   reg = 0x40031000 0x1000;
   interrupts = 0 86 0x04;
 - clocks = clks VF610_CLK_SAI2;
 - clock-names = sai;
 + clocks = clks VF610_CLK_SAI2,
 +clks VF610_CLK_SAI2,
 +clks 0, clks 0;
 + clock-names = bus, mclk1, mclk2, mclk3;
   status = disabled;
   };
  
 -- 
 1.8.4
 
 

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Re: [PATCH v2 2/2] ARM: dts: Append clock bindings for sai2 on VF610 platform

[Shawn Guo]

On Wed, Apr 02, 2014 at 06:10:20PM +0800, Nicolin Chen wrote:
 Since we added fours clock to the DT binding, we should update the current
 SAI dts/dtsi so as not to break their functions.
 
 Signed-off-by: Nicolin Chen guangyu.c...@freescale.com
 ---
  arch/arm/boot/dts/vf610.dtsi | 6 --
  1 file changed, 4 insertions(+), 2 deletions(-)
 
 diff --git a/arch/arm/boot/dts/vf610.dtsi b/arch/arm/boot/dts/vf610.dtsi
 index d31ce1b..9fd0007 100644
 --- a/arch/arm/boot/dts/vf610.dtsi
 +++ b/arch/arm/boot/dts/vf610.dtsi
 @@ -139,8 +139,10 @@
   compatible = fsl,vf610-sai;
   reg = 0x40031000 0x1000;
   interrupts = 0 86 0x04;
 - clocks = clks VF610_CLK_SAI2;
 - clock-names = sai;
 + clocks = clks VF610_CLK_SAI2,
 +clks VF610_CLK_SAI2,
 +clks 0, clks 0;

So it seems that SAI on vf610 does work with only one clock.  So the
driver change will break old DTB for vf610?  If that's case, we will
have to need a new compatible for cases where 4 clocks are needed.

Shawn

 + clock-names = bus, mclk1, mclk2, mclk3;
   status = disabled;
   };
  
 -- 
 1.8.4
 
 

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Re: [PATCH 2/3] dts: mpc512x: adjust clock specs for FEC nodes

[Shawn Guo]

On Mon, Mar 03, 2014 at 10:22:31AM +0100, Gerhard Sittig wrote:
 On Mon, Feb 24, 2014 at 11:25 +0100, Gerhard Sittig wrote:
  
  a recent FEC binding document update that was motivated by i.MX
  development revealed that ARM and PowerPC implementations in Linux
  did not agree on the clock names to use for the FEC nodes
  
  change clock names from per to ipg in the FEC nodes of the
  mpc5121.dtsi include file such that the .dts specs comply with
  the common FEC binding
  
  this incompatible change does not break operation, because
  - COMMON_CLK support for MPC5121/23/25 and adjusted .dts files
were only introduced in Linux v3.14-rc1, no mainline release
provided these specs before
  - if this change won't make it for v3.14, the MPC512x CCF support
provides full backwards compability, and keeps operating with
device trees which lack clock specs or don't match in the names
  
  Signed-off-by: Gerhard Sittig g...@denx.de
 
 ping
 
 Are there opinions about making PowerPC users of FEC use the same
 clock names as ARM users do, to re-use (actually: keep sharing)
 the FEC binding?  The alternative would be to fragment the FEC
 binding into several bindings for ARM and PowerPC, which I feel
 would be undesirable, and is not necessary.

As I already said, Documentation/devicetree/bindings/net/fsl-fec.txt
was created specifically for i.MX FEC controller from day one.  And even
as of today, it doesn't serve PowerPC, because for example the property
'phy-mode' documented as required one is not required by PowerPC FEC.
My opinion would be to patch fsl-fec.txt a little bit to make it clear
that it's a binding doc for i.MX FEC, and create the other one for
PowerPC FEC.  This is the way less confusing to people and easier for
binding maintenance.

Shawn

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Re: [PATCH v7 0/4] Add dual-fifo mode support of i.MX ssi

[Shawn Guo]

On Sat, Nov 23, 2013 at 12:31:32AM +0800, Nicolin Chen wrote:
 Hi all,
 
I'm sorry to push this. But this series has been an orphan for a while.
Could any one please receive and foster it?

Vinod,

I expect you will pick up the series.  But otherwise, I can apply it via
IMX tree with your ACKs on the first two patches.

Shawn

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Re: [PATCH 0/2] Add monaural audio support for fsl_ssi.c

[Shawn Guo]

On Thu, Nov 14, 2013 at 07:07:08PM +0800, Nicolin Chen wrote:
 This series of patches need to be applied into one single tree because
 the second patch depends on the first one. Without it, SSI would playback
 constant noise to the right channel when playback monaural audio files on
 i.MX6 Series board.

Let me try to understand if the dependency is true.

Saying I apply the DTS patch on IMX tree while Mark apply the fsl_ssi
patch on his tree, will there be any regression on either IMX tree or
Mark's tree?  The monaural playback on imx6qdl never worked, so it's not
a regression.  If there is no regression on either tree, there is no
dependency to maintain.

Shawn

 
 We might also need to apply the iomux change to the other i.MX platforms,
 just currently I don't have those boards so I drop their changes for now.
 
 Nicolin Chen (2):
   ARM: dts: imx: specify the value of audmux pinctrl instead of
 0x8000
   ASoC: fsl_ssi: Add monaural audio support for non-ac97 interface
 
  arch/arm/boot/dts/imx6qdl.dtsi | 22 +++---
  sound/soc/fsl/fsl_ssi.c| 22 +++---
  2 files changed, 30 insertions(+), 14 deletions(-)
 
 -- 
 1.8.4
 
 

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Re: [PATCH 0/2] Add monaural audio support for fsl_ssi.c

[Shawn Guo]

On Fri, Nov 15, 2013 at 10:59:57AM +0800, Nicolin Chen wrote:
 Hi Shawn,

 On Fri, Nov 15, 2013 at 11:02:49AM +0800, Shawn Guo wrote:
  On Thu, Nov 14, 2013 at 07:07:08PM +0800, Nicolin Chen wrote:
   This series of patches need to be applied into one single tree because
   the second patch depends on the first one. Without it, SSI would playback
   constant noise to the right channel when playback monaural audio files on
   i.MX6 Series board.
  
  Let me try to understand if the dependency is true.
  
  Saying I apply the DTS patch on IMX tree while Mark apply the fsl_ssi
  patch on his tree, will there be any regression on either IMX tree or
  Mark's tree?  The monaural playback on imx6qdl never worked, so it's not
  a regression.  If there is no regression on either tree, there is no
  dependency to maintain.
 
 It's fair enough to understand in this way. It looks like I misunderstood
 the dependency here.
 
 Do I need to resend them separately?

No, I will just pick up the DTS patch with some testing.

Shawn

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Re: [PATCH 1/2] ARM: dts: imx: specify the value of audmux pinctrl instead of 0x80000000

[Shawn Guo]

On Thu, Nov 14, 2013 at 07:07:09PM +0800, Nicolin Chen wrote:
 We must specify the value of audmux pinctrl if we want to use pinctrl_pm().
 Thus change bypass value 0x8000 to what we exactly need.
 
 This patch also seperately unset PUE bit for TXD so that IOMUX won't pull
 up/down the pin after turning into tristate. When we use SSI normal mode to
 playback monaural audio via I2S signal, there'd be a pulled curve occur to
 its signal at the second slot if setting PUE bit for TXD. And it will make
 the second channel to play a constant noise. So by keeping the signal level
 in the second slot, we can get a constant high level signal (-1) or a low
 level one (0).
 
 Signed-off-by: Nicolin Chen b42...@freescale.com
 ---
  arch/arm/boot/dts/imx6qdl.dtsi | 22 +++---
  1 file changed, 11 insertions(+), 11 deletions(-)

We have moved all pin groups settings into
arch/arm/boot/dts/imx6qdl-pingrp.h.  I just rebased and applied the
patch.  Please check my imx/dt branch and ensure I applied the changes
correctly.

Shawn

 
 diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
 index 6e096ca..6b76e55 100644
 --- a/arch/arm/boot/dts/imx6qdl.dtsi
 +++ b/arch/arm/boot/dts/imx6qdl.dtsi
 @@ -601,27 +601,27 @@
   audmux {
   pinctrl_audmux_1: audmux-1 {
   fsl,pins = 
 - 
 MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x8000
 - 
 MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x8000
 - 
 MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x8000
 - 
 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x8000
 + 
 MX6QDL_PAD_SD2_DAT0__AUD4_RXD  0x130b0
 + 
 MX6QDL_PAD_SD2_DAT3__AUD4_TXC  0x130b0
 + 
 MX6QDL_PAD_SD2_DAT2__AUD4_TXD  0x110b0
 + 
 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0
   ;
   };
  
   pinctrl_audmux_2: audmux-2 {
   fsl,pins = 
 - 
 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x8000
 - 
 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x8000
 - 
 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x8000
 - 
 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x8000
 + 
 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD  0x130b0
 + 
 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC  0x130b0
 + 
 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD  0x110b0
 + 
 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
   ;
   };
  
   pinctrl_audmux_3: audmux-3 {
   fsl,pins = 
 - 
 MX6QDL_PAD_DISP0_DAT16__AUD5_TXC  0x8000
 - 
 MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x8000
 - 
 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x8000
 + 
 MX6QDL_PAD_DISP0_DAT16__AUD5_TXC  0x130b0
 + 
 MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0
 + 
 MX6QDL_PAD_DISP0_DAT19__AUD5_RXD  0x130b0
   ;
   };
   };
 -- 
 1.8.4
 
 

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Re: [PATCHv2 1/8] ALSA: Add SAI SoC Digital Audio Interface driver.

[Shawn Guo]

On Wed, Nov 06, 2013 at 03:53:24AM +, Li Xiubo wrote:
   If there are any comments that say PPC but are not PPC-specific, that
   should be fixed.
   Yes, find it.
  
   The comments is in sound/soc/fsl/Makefile :
   +++
   # Freescale PowerPC SSI/DMA Platform Support
   ---
  
   But fsl-spdif.o is also under it.
   And this is also support ARM and PowerPC platforms at the same time ?
   If so, the comments should be modified to :
   +++
   # Freescale PowerPC and ARM SSI/DMA Platform Support
   ---
  
  Yes, this should be changed.
  
 
 How about :
 +
 # Freescale PowerPC and ARM SSI/DMA/SAI/SPDIF Platform Support  
 -
  ?

Or we can just drop 'PowerPC and ARM'?

Shawn

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Re: [PATCH v4 0/4] Add dual-fifo mode support of i.MX ssi

[Shawn Guo]

Nicolin,

The dmaengine maintainer Vinod Koul should be copied on the series.
(Just added).

On Thu, Oct 31, 2013 at 09:44:12PM +0800, Nicolin Chen wrote:
 Nicolin Chen (4):
   dma: imx-sdma: Add sdma firmware version 2 support
   dma: imx-sdma: Add new dma type for ssi dual fifo script
   ASoC: fsl_ssi: Add dual fifo mode support
   ARM: dts: imx: use dual-fifo sdma script for ssi

Vinod,

To keep git bisect, the series has to be merged through single tree.
Since Mark has ACK-ed patch #3, I think it's easier to merge the series
through your tree, so for patch #4:

Acked-by: Shawn Guo shawn@linaro.org

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Re: [PATCHv2 6/8] ASoC: fsl: add SGTL5000 based audio machine driver.

[Shawn Guo]

On Fri, Nov 01, 2013 at 06:28:05PM +0800, Nicolin Chen wrote:
   sound/soc/fsl/fsl-sgtl5000-vf610.c | 208 
  +
 
 I just doubt if this file naming is appropriate. Even if we might not have
 rigor rule for the file names, according to existing ones, they are all in
 a same pattern: [SoC name]-[codec name].c
 
 imx-sgtl5000.c for example
 
 I think it would make user less confused about what this file exactly is if
 this machine driver also follow the pattern: vf610-sgtl5000.c
 
 
 @Shawn
 
 What do you think about the file name?

Yeah, it would be better to name the file following the existing the
pattern.

Shawn

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Re: [PATCH v4 12/19] cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes

[Shawn Guo]

On Tue, Sep 10, 2013 at 11:56:17AM +0100, Sudeep KarkadaNagesha wrote:
  So we only need to change all clkdev registration to use cpu0 as
  dev_id intstead of cpufreq-cpu0.0, something like below.
  
  And for imx, it should work even without the changes, because we have
  device tree lookup ready there, and those clk_register_clkdev() calls
  can just be removed now.  But I prefer to include the change and leave
  the cleanup to another patch for keeping the change log clear.
  
 Ok makes sense, do you want me to include this patch also as fix.
 I can send a series to fix this if you OK:
 1. Fix in cpufreq-cpu0
 2. Fix in i.MX driver and platform file
 3. Patch below

Yes, please.  Thanks.

Shawn

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Re: [PATCH v4 12/19] cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes

[Shawn Guo]

Hi Sudeep,

On Mon, Sep 09, 2013 at 10:24:39AM +0100, Sudeep KarkadaNagesha wrote:
 Hi Shawn,
 
 Can you please clarify ? The fix would be as below but I would like to
 know if setting cpu_dev to get_cpu_device(0) instead of pdev-dev has
 any impact on other parts of code using cpu_dev ?

I'm sorry.  I should have given it a test on hardware before ACKing the
changes.

The fix below should not have other impact except the prefix of dev_err
[info, dbg] message output ('cpufreq-cpu0:' to 'cpu cpu0:'), which
shouldn't be a problem.

 
 diff --git a/drivers/cpufreq/cpufreq-cpu0.c b/drivers/cpufreq/cpufreq-cpu0.c
 index cbfffa9..871c336 100644
 --- a/drivers/cpufreq/cpufreq-cpu0.c
 +++ b/drivers/cpufreq/cpufreq-cpu0.c
 @@ -177,7 +177,7 @@ static int cpu0_cpufreq_probe(struct platform_device
 *pdev)
 struct device_node *np;
 int ret;
 
 -   cpu_dev = pdev-dev;
 +   cpu_dev = get_cpu_device(0);
 
 np = of_node_get(cpu_dev-of_node);
 if (!np) {
 

The imx6q-cpufreq driver needs a similar fixing.  Please include the
following changes into your fixing patches.  Thanks.

Shawn

---8-

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 85a1b51..69fd4b6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -233,9 +233,10 @@ put_node:
of_node_put(np);
 }
 
-static void __init imx6q_opp_init(struct device *cpu_dev)
+static void __init imx6q_opp_init(void)
 {
struct device_node *np;
+   struct device *cpu_dev = get_cpu_device(0);
 
np = of_node_get(cpu_dev-of_node);
if (!np) {
@@ -268,7 +269,7 @@ static void __init imx6q_init_late(void)
imx6q_cpuidle_init();
 
if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) {
-   imx6q_opp_init(imx6q_cpufreq_pdev.dev);
+   imx6q_opp_init();
platform_device_register(imx6q_cpufreq_pdev);
}
 }
diff --git a/drivers/cpufreq/imx6q-cpufreq.c b/drivers/cpufreq/imx6q-cpufreq.c
index 3e39654..d7ebd91 100644
--- a/drivers/cpufreq/imx6q-cpufreq.c
+++ b/drivers/cpufreq/imx6q-cpufreq.c
@@ -7,6 +7,7 @@
  */
 
 #include linux/clk.h
+#include linux/cpu.h
 #include linux/cpufreq.h
 #include linux/delay.h
 #include linux/err.h
@@ -202,7 +203,7 @@ static int imx6q_cpufreq_probe(struct platform_device *pdev)
unsigned long min_volt, max_volt;
int num, ret;
 
-   cpu_dev = pdev-dev;
+   cpu_dev = get_cpu_device(0);
 
np = of_node_get(cpu_dev-of_node);
if (!np) {

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Re: [PATCH v4 12/19] cpufreq: cpufreq-cpu0: remove device tree parsing for cpu nodes

[Shawn Guo]

On Mon, Sep 09, 2013 at 04:24:18PM +0100, Sudeep KarkadaNagesha wrote:
 Hi Shawn,
 
 Ok. But I am bit suspicious about devm_clk_get(cpu_dev, NULL).
 I don't understand completely as how the clock are registered(whether
 with dev_id or with connection_id).

As the connection_id of devm_clk_get() call here is NULL, the clock
lookup should be registered with a proper dev_id in clk_register_clkdev()
call.  And that's what you have seen with imx and shmobile code.


 A quick grep revealed that i.mx and shmobile is using conection id while
 registering.

They are using dev_id.

 If the clock is registered with connection id and retrieved
 with cpu_dev(now dev_id is cpu0 and not cpufreq-cpu0), IIUC that would
 break. If we pass pdev-dev for clk_get, it should be fine but again
 IIUC it breaks highbank which gets all the information from DT.

If the clock lookup is from DT, we should be just fine, since it will
work as long as the DT node with 'clocks' property (/cpus/cpu@0 in this
case) is attached to the struct device pointer of devm_clk_get() call.

 So only solution I can think of is to continue to have the code
 assigning (pdev-dev)-of_node with cpu device node which is not clean
 and arguable as incorrect since there is no DT node for cpufreq-cpu0.
 I don't have a strong opinion though.
 
 Let me know how would you like to fix this.

So we only need to change all clkdev registration to use cpu0 as
dev_id intstead of cpufreq-cpu0.0, something like below.

And for imx, it should work even without the changes, because we have
device tree lookup ready there, and those clk_register_clkdev() calls
can just be removed now.  But I prefer to include the change and leave
the cleanup to another patch for keeping the change log clear.

Shawn

---8--

diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index c3cfa41..c6b40f3 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -285,7 +285,7 @@ int __init mx27_clocks_init(unsigned long fref)
clk_register_clkdev(clk[ata_ahb_gate], ata, NULL);
clk_register_clkdev(clk[rtc_ipg_gate], NULL, imx21-rtc);
clk_register_clkdev(clk[scc_ipg_gate], scc, NULL);
-   clk_register_clkdev(clk[cpu_div], NULL, cpufreq-cpu0.0);
+   clk_register_clkdev(clk[cpu_div], NULL, cpu0);
clk_register_clkdev(clk[emi_ahb_gate], emi_ahb , NULL);
 
mxc_timer_init(MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1);
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c 
b/arch/arm/mach-imx/clk-imx51-imx53.c
index 1a56a33..de1964c 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -328,7 +328,7 @@ static void __init mx5_clocks_common_init(unsigned long 
rate_ckil,
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, imx-ssi.1);
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, imx-ssi.2);
clk_register_clkdev(clk[sdma_gate], NULL, imx35-sdma);
-   clk_register_clkdev(clk[cpu_podf], NULL, cpufreq-cpu0.0);
+   clk_register_clkdev(clk[cpu_podf], NULL, cpu0);
clk_register_clkdev(clk[iim_gate], iim, NULL);
clk_register_clkdev(clk[dummy], NULL, imx2-wdt.0);
clk_register_clkdev(clk[dummy], NULL, imx2-wdt.1);
diff --git a/arch/arm/mach-shmobile/clock-r8a73a4.c 
b/arch/arm/mach-shmobile/clock-r8a73a4.c
index 8ea5ef6..5bd2e85 100644
--- a/arch/arm/mach-shmobile/clock-r8a73a4.c
+++ b/arch/arm/mach-shmobile/clock-r8a73a4.c
@@ -555,7 +555,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID(pll2h,  pll2h_clk),
 
/* CPU clock */
-   CLKDEV_DEV_ID(cpufreq-cpu0,   z_clk),
+   CLKDEV_DEV_ID(cpu0,   z_clk),
 
/* DIV6 */
CLKDEV_CON_ID(zb, div6_clks[DIV6_ZB]),
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c 
b/arch/arm/mach-shmobile/clock-sh73a0.c
index 1942eae..c92c023 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -616,7 +616,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID(smp_twd, twd_clk), /* smp_twd */
 
/* DIV4 clocks */
-   CLKDEV_DEV_ID(cpufreq-cpu0, div4_clks[DIV4_Z]),
+   CLKDEV_DEV_ID(cpu0, div4_clks[DIV4_Z]),
 
/* DIV6 clocks */
CLKDEV_CON_ID(vck1_clk, div6_clks[DIV6_VCK1]),

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Re: [PATCH v7 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Shawn Guo]

On Mon, Aug 19, 2013 at 10:54:33AM +0100, Mark Rutland wrote:
  I guess it's better to drop the 'imx6q-spdif' here?
 
 That depends:
 
 * If the two IP blocks are identical, only the imx35-spdif name is
   necessary, and we can forget about fsl,imx6q-spdif.
 
 * If fsl,imx6q-spdif is a strict superset of fsl,imx35-spdif, having
   both names documented and in a compatible list for a fsl,imx6q-spdif
   device makes sense.

Practically, I found it's very useful to have fsl,soc-ip in the
device compatible property in soc.dtsi, even when device driver does
not match it right now.  For this example, I still prefer to have the
following line for spdif device in imx6q.dtsi.

compatible = fsl,imx6q-spdif, fsl,imx35-spdif;

The reason for that is we usually do not see all the differences of an
IP block from one SoC to another when we firstly define the bindings
for the device by looking at hardware reference manual.  Some
programming model differences are only identified when we're actually
programming.  That said, if some day we find there is difference between
imx6q-spdif and imx35-spdif to be handled when we add something new to
the driver, we only need to add fsl,imx6q-spdif as a new compatible
into device driver and bindings document.  The existing device tree
would need no update to work with the new kernel driver.

Shawn

 
 * If fsl,imx6q-spdif is a variation of fsl,imx35-spdif, and the
   fsl,imx6q-spdif cannot always be treated identically to a
   fsl,imx35-spdif, then it makes sense to have separate compatible
   strings, with a device being listed as either fsl,imx6q-spdif or
   fsl,imx35-spdif.

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Re: [alsa-devel] [PATCH v4 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Shawn Guo]

On Thu, Aug 15, 2013 at 10:18:23AM +0800, Nicolin Chen wrote:
 Hi Stephen,
 
 On Wed, Aug 14, 2013 at 09:47:19AM -0600, Stephen Warren wrote:
  If the clock source name list is different, then it needs a different
  compatible value, so that each compatible value can specify which clock
  names are required.
  
  Also, the compatible value itself should always include the exact HW
  that's present (most specific HW version), as well as any other HW it's
  compatible with.
  
 Thank you for the comments. Yes, I did so in v1-v3, but after rethinking
 about the situation (Actually both the HW version and the clock mux itself
 are same, just the clock sources connecting to the mux might be different),
 so I decided to do this by abstracting the driver from those source info
 and letting DT binding to pass such information. Because I think putting 
 the clock sources into the driver differed by compatible value would make
 the driver more like SoC-specified, not the ideal way -- SoC-independent,
 since the clock sources are based on SoC design, not on itself.

+1

It's pretty much the differences at SoC integration level not the IP
itself, and it just happens to be handled in a register of the IP.

Shawn

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Re: [alsa-devel] [PATCH v4 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Shawn Guo]

On Wed, Aug 14, 2013 at 01:30:17PM +0800, Nicolin Chen wrote:
 Hi Shwan,
 
 On Wed, Aug 14, 2013 at 11:27:00AM +0800, Shawn Guo wrote:
  I do not think we need this general compatible string.  Device tree
  compatible should be specific.
 
 So I should just use 'fsl,chip-spdif and list all chip-spdif
 in compatible list?
 
 I added 'fsl,fsl-spdif' just for those not-in-list chips, Vybrid
 for example. So you think I should add all the possible chips to 
 the list? But what if some chip I don't know right now that also
 uses this spdif controller? Add them to the list later?

We only need to maintain those versions that require different
programming model in the list.  For example, if S/PDIF on Vybrid
is completely compatible with imx6q one and uses the exactly same
programming model, we do not need to maintain a compatible string
for Vybrid S/PDIF at all.  Instead, we only need to have something
like below in Vybrid dts file, and S/PDIF driver will just work for it.

compatible = fsl,vf600-spdif, fsl,imx6q-spdif;

Shawn

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Re: [alsa-devel] [PATCH v4 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Shawn Guo]

On Wed, Aug 14, 2013 at 02:34:45PM +0800, Nicolin Chen wrote:
 On Wed, Aug 14, 2013 at 02:39:33PM +0800, Shawn Guo wrote:
  We only need to maintain those versions that require different
  programming model in the list.  For example, if S/PDIF on Vybrid
  is completely compatible with imx6q one and uses the exactly same
  programming model, we do not need to maintain a compatible string
  for Vybrid S/PDIF at all.  Instead, we only need to have something
  like below in Vybrid dts file, and S/PDIF driver will just work for it.
  
  compatible = fsl,vf600-spdif, fsl,imx6q-spdif;
  
  Shawn
 
 Clear. Thank you for the explain.
 
 Then I think I can merely remain fsl,imx6q-spdif here,
 because all other cases should be completely compatible
 with this one. They are only different in the clock source
 names list, which's already being specified in dts file.
 
 Please correct me if you think this still isn't proper.

And we generally prefer to use the soc that firstly integrates the IP to
name the compatible.  For IMX series, I think imx35 is the one, so we
would name it fsl,imx35-spdif.

Shawn

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Re: [alsa-devel] [PATCH v4 1/2] ASoC: fsl: Add S/PDIF CPU DAI driver

[Shawn Guo]

On Tue, Aug 13, 2013 at 02:58:26PM -0300, Fabio Estevam wrote:
 On Mon, Aug 12, 2013 at 9:01 AM, Nicolin Chen b42...@freescale.com wrote:
  +Required properties:
  +
  +  - compatible : Compatible list, contains fsl,chip-spdif. Using 
  general
 
 Can't we just use fsl,fsl-spdif instead?
 
  +  fsl,fsl-spdif will get the default SoC type -- imx6q-spdif.

I do not think we need this general compatible string.  Device tree
compatible should be specific.

Shawn

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Re: [PATCH] ASoC: fsl: Set sdma peripheral type directly

[Shawn Guo]

On Thu, Jul 25, 2013 at 05:41:41PM +0800, Nicolin Chen wrote:
 Let CPU DAI drivers set SDMA periperal type directly to support more
 dma types(SPDIF, ESAI) other than only two for SSI.
 This will easily allow some non-SSI drivers to use the imx-pcm-dma
 as well.
 
 Signed-off-by: Nicolin Chen b42...@freescale.com

Acked-by: Shawn Guo shawn@linaro.org

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Re: [alsa-devel] [PATCH] ASoC: fsl: Disable SSI in trigger() if RE/TE are both cleared

[Shawn Guo]

On Fri, Jul 12, 2013 at 07:11:35AM -0500, Timur Tabi wrote:
 Mark Brown wrote:
 Yes, that's why I just went ahead - you'd said recently that you'd be
 out of action for a while and not able to test anything.
 
 Yeah, I'd rather you waited until I at least made sure it compiled.
 Is there any way you can at least install the Freescale PowerPC SDK
 and do compile tests?  At least that way you won't have to wait for
 me for every little thing.

I just compile-tested it with mpc85xx_defconfig.  It compiles good.

Shawn

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Re: [PATCH] ASoC: fsl: Disable SSI in trigger() if RE/TE are both cleared

[Shawn Guo]

On Wed, Jul 10, 2013 at 06:43:54PM +0800, Nicolin Chen wrote:
 The code enabled SSIEN when triggered by SNDRV_PCM_TRIGGER_START,
 so move the disable code to SNDRV_PCM_TRIGGER_STOP for symmetric.
 
 This also allows us to use the SSI driver more flexible so that
 it can support some use cases like aplay S16_LE.wav S24_LE.wav
 which would call the driver in sequence like:
  startup()-hw_params(S16_LE)-trigger(START)-tirgger(STOP)-
  hw_params(S24_LE)-trigger(START)-tirgger(STOP)-shutdown()
 
 If we disable SSIEN in shutdown(), the second hw_params() would
 bypass the sample bits setting while using symmetric_rate.
 
 Signed-off-by: Nicolin Chen b42...@freescale.com

Acked-by: Shawn Guo shawn@linaro.org

 ---
  sound/soc/fsl/fsl_ssi.c |   12 +++-
  1 files changed, 3 insertions(+), 9 deletions(-)
 
 diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
 index 2f2d837..b6ab341 100644
 --- a/sound/soc/fsl/fsl_ssi.c
 +++ b/sound/soc/fsl/fsl_ssi.c
 @@ -510,6 +510,9 @@ static int fsl_ssi_trigger(struct snd_pcm_substream 
 *substream, int cmd,
   write_ssi_mask(ssi-scr, CCSR_SSI_SCR_TE, 0);
   else
   write_ssi_mask(ssi-scr, CCSR_SSI_SCR_RE, 0);
 +
 + if ((read_ssi(ssi-scr)  (CCSR_SSI_SCR_TE | CCSR_SSI_SCR_RE)) 
 == 0)
 + write_ssi_mask(ssi-scr, CCSR_SSI_SCR_SSIEN, 0);
   break;
  
   default:
 @@ -534,15 +537,6 @@ static void fsl_ssi_shutdown(struct snd_pcm_substream 
 *substream,
   ssi_private-first_stream = ssi_private-second_stream;
  
   ssi_private-second_stream = NULL;
 -
 - /*
 -  * If this is the last active substream, disable the SSI.
 -  */
 - if (!ssi_private-first_stream) {
 - struct ccsr_ssi __iomem *ssi = ssi_private-ssi;
 -
 - write_ssi_mask(ssi-scr, CCSR_SSI_SCR_SSIEN, 0);
 - }
  }
  
  static int fsl_ssi_dai_probe(struct snd_soc_dai *dai)
 -- 
 1.7.1
 
 

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Re: [PATCH v2] can: flexcan: remove HAVE_CAN_FLEXCAN Kconfig symbol

[Shawn Guo]

On Fri, May 17, 2013 at 10:59:17AM +0200, Marc Kleine-Budde wrote:
 This patch removes the Kconfig symbol HAVE_CAN_FLEXCAN from arch/{arm,powerpc}
 and allowing compilation unconditionally on all arm and powerpc platforms.
 
 This brings a bigger compile time coverage and removes the following 
 dependency
 warning found by Arnd Bergmann:
 
 warning: (SOC_IMX28  SOC_IMX25  SOC_IMX35  
 IMX_HAVE_PLATFORM_FLEXCAN 
 SOC_IMX53  SOC_IMX6Q) selects HAVE_CAN_FLEXCAN
 which has unmet direct dependencies (NET  CAN  CAN_DEV)
 
 Cc: Arnd Bergmann a...@arndb.de
 Cc: Shawn Guo shawn@linaro.org

Acked-by: Shawn Guo shawn@linaro.org

 Cc: Sascha Hauer s.ha...@pengutronix.de
 Cc: Kumar Gala ga...@kernel.crashing.org
 Cc: U Bhaskar-B22300 b22...@freescale.com
 Cc: linux-arm-ker...@lists.infradead.org
 Cc: linuxppc-dev@lists.ozlabs.org
 Signed-off-by: Marc Kleine-Budde m...@pengutronix.de

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Re: [PATCH] can: flexcan: allow compilation on arm and powerpc

[Shawn Guo]

Hi Marc,

On Thu, May 16, 2013 at 03:42:36PM +0200, Marc Kleine-Budde wrote:
 This patch removes the Kconfig symbols HAVE_CAN_FLEXCAN and
 IMX_HAVE_PLATFORM_FLEXCAN from arch/{arm,powerpc} and allowing compilation on
 all arm and powerpc platforms.

I'm generally fine with the approach.  But with Kconfig symbol
IMX_HAVE_PLATFORM_FLEXCAN removed, how does the build of
platform-flexcan.o work?

arch/arm/mach-imx/devices/Makefile:obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += 
platform-flexcan.o

Shawn

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Re: [PATCH 2/2] of: use platform_device_add

[Shawn Guo]

On Fri, Jan 18, 2013 at 01:40:00AM +, Grant Likely wrote:
 This allows platform_device_add a chance to call insert_resource on all
 of the resources from OF. At a minimum this fills in proc/iomem and
 presumably makes resource tracking and conflict detection work better.
 However, it has the side effect of moving all OF generated platform
 devices from /sys/devices to /sys/devices/platform/. It /shouldn't/
 break userspace because userspace is not supposed to depend on the full
 path (because userspace always does what it is supposed to, right?).
 
 This may cause breakage if either:
 1) any two nodes in a given device tree have overlapping  staggered
regions (ie. 0x80..0xbf and 0xa0..0xdf; where one is not contained
within the other). In this case one of the devices will fail to
register and an exception will be needed in platform_device_add() to
complain but not fail.

Grant,

The patch introduce a regression on imx6q boot.  The IOMUXC block on
imx6q is special.  It acts not only a pin controller but also a system
controller with a bunch of system level registers in there.  That's why
we currently have the following two nodes in imx6q device tree with the
same start reg address, which work with drivers/mfd/syscon.c and
drivers/pinctrl/pinctrl-imx6q.c respectively.

gpr: iomuxc-gpr@020e {
compatible = fsl,imx6q-iomuxc-gpr, syscon;
reg = 0x020e 0x38;
};

iomuxc: iomuxc@020e {
compatible = fsl,imx6q-iomuxc;
reg = 0x020e 0x4000;
};

With the patch in place, pinctrl-imx6q fails to register like below.

syscon 20e.iomuxc: syscon regmap start 0x20e end 0x20e3fff registered
imx6q-pinctrl 20e.iomuxc: can't request region for resource [mem 
0x020e-0x020e3fff]
imx6q-pinctrl: probe of 20e.iomuxc failed with error -16

Shawn

 2) any device calls request_mem_region() on a region larger than
specified in the device tree. In this case the device node may be
wrong, or the driver is overreaching. In either case I'd like to know
about any problems and fix them.

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Re: [PATCH 2/2] of: use platform_device_add

[Shawn Guo]

On Sun, Feb 17, 2013 at 11:03:35AM +0800, Shawn Guo wrote:
 On Fri, Jan 18, 2013 at 01:40:00AM +, Grant Likely wrote:
  This allows platform_device_add a chance to call insert_resource on all
  of the resources from OF. At a minimum this fills in proc/iomem and
  presumably makes resource tracking and conflict detection work better.
  However, it has the side effect of moving all OF generated platform
  devices from /sys/devices to /sys/devices/platform/. It /shouldn't/
  break userspace because userspace is not supposed to depend on the full
  path (because userspace always does what it is supposed to, right?).
  
  This may cause breakage if either:
  1) any two nodes in a given device tree have overlapping  staggered
 regions (ie. 0x80..0xbf and 0xa0..0xdf; where one is not contained
 within the other). In this case one of the devices will fail to
 register and an exception will be needed in platform_device_add() to
 complain but not fail.
 
 Grant,
 
 The patch introduce a regression on imx6q boot.

It also breaks all of_amba_device users.

of_amba_device_create() -- amba_device_add() -- request_resource()
and fails.

Shawn

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Re: [PATCH v6 3/3] ARM: i.MX clock: Change the connection-id for fsl-usb2-udc

[Shawn Guo]

On Thu, Jan 17, 2013 at 12:58:33PM +0200, Felipe Balbi wrote:
 On Thu, Jan 17, 2013 at 06:03:17PM +0800, Peter Chen wrote:
  As we use platform_device_id for fsl-usb2-udc driver, it needs to
  change clk connection-id, or the related devm_clk_get will be failed.
  
  Signed-off-by: Peter Chen peter.c...@freescale.com
 
 do I get Acked-by for this one ?

Acked-by: Shawn Guo shawn@linaro.org

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Re: [PATCH v7 3/3] ARM: i.MX clock: Change the connection-id for fsl-usb2-udc

[Shawn Guo]

Peter,

On Fri, Jan 18, 2013 at 10:15:49AM +0800, Peter Chen wrote:
 As we use platform_device_id for fsl-usb2-udc driver, it needs to
 change clk connection-id, or the related devm_clk_get will be failed.
 
 Signed-off-by: Peter Chen peter.c...@freescale.com

You should have my ACK put after your SoB, since I have provided it
on v6 of this patch.  It will make balbi's life a little bit easier
when he applies the patch.

So again,

Acked-by: Shawn Guo shawn@linaro.org

Shawn

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Re: [PATCH v5 1/3] usb: fsl-mxc-udc: replace cpu_is_xxx() with platform_device_id

[Shawn Guo]

On Tue, Jan 15, 2013 at 10:29:33AM +0800, Peter Chen wrote:
 As mach/hardware.h is deleted, we need to use platform_device_id to
 differentiate SoCs. Besides, one cpu_is_mx35 is useless as it has
 already used pdata to differentiate runtime
 
 Meanwhile we update the platform code accordingly.
 
 Signed-off-by: Peter Chen peter.c...@freescale.com
 ---
  arch/arm/mach-imx/devices/devices-common.h|1 +
  arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c |   15 ---
  drivers/usb/gadget/fsl_mxc_udc.c  |   24 +---
  drivers/usb/gadget/fsl_udc_core.c |   42 
 +
  4 files changed, 45 insertions(+), 37 deletions(-)

Since we are splitting the original patch anyway, it's a bit strange
to me that you are mixing arch/arm/mach-imx and drivers/usb/gadget
in this patch.  I'm fine with it, since I assume all the patches to
go via USB tree anyway.

 
 diff --git a/arch/arm/mach-imx/devices/devices-common.h 
 b/arch/arm/mach-imx/devices/devices-common.h
 index 6277baf..9bd5777 100644
 --- a/arch/arm/mach-imx/devices/devices-common.h
 +++ b/arch/arm/mach-imx/devices/devices-common.h
 @@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
  
  #include linux/fsl_devices.h
  struct imx_fsl_usb2_udc_data {
 + const char *devid;
   resource_size_t iobase;
   resource_size_t irq;
  };
 diff --git a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c 
 b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
 index 37e4439..fb527c7 100644
 --- a/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
 +++ b/arch/arm/mach-imx/devices/platform-fsl-usb2-udc.c
 @@ -11,35 +11,36 @@
  #include ../hardware.h
  #include devices-common.h
  
 -#define imx_fsl_usb2_udc_data_entry_single(soc)  
 \
 +#define imx_fsl_usb2_udc_data_entry_single(soc, _devid)  
 \
   {   \
 + .devid = _devid,\
   .iobase = soc ## _USB_OTG_BASE_ADDR,\
   .irq = soc ## _INT_USB_OTG, \
   }
  
  #ifdef CONFIG_SOC_IMX25
  const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
 - imx_fsl_usb2_udc_data_entry_single(MX25);
 + imx_fsl_usb2_udc_data_entry_single(MX25, imx-udc-mx25);
  #endif /* ifdef CONFIG_SOC_IMX25 */
  
  #ifdef CONFIG_SOC_IMX27
  const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
 - imx_fsl_usb2_udc_data_entry_single(MX27);
 + imx_fsl_usb2_udc_data_entry_single(MX27, imx-udc-mx27);
  #endif /* ifdef CONFIG_SOC_IMX27 */
  
  #ifdef CONFIG_SOC_IMX31
  const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
 - imx_fsl_usb2_udc_data_entry_single(MX31);
 + imx_fsl_usb2_udc_data_entry_single(MX31, imx-udc-mx31);
  #endif /* ifdef CONFIG_SOC_IMX31 */
  
  #ifdef CONFIG_SOC_IMX35
  const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
 - imx_fsl_usb2_udc_data_entry_single(MX35);
 + imx_fsl_usb2_udc_data_entry_single(MX35, imx-udc-mx35);
  #endif /* ifdef CONFIG_SOC_IMX35 */
  
  #ifdef CONFIG_SOC_IMX51
  const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
 - imx_fsl_usb2_udc_data_entry_single(MX51);
 + imx_fsl_usb2_udc_data_entry_single(MX51, imx-udc-mx51);
  #endif
  
  struct platform_device *__init imx_add_fsl_usb2_udc(
 @@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
   .flags = IORESOURCE_IRQ,
   },
   };
 - return imx_add_platform_device_dmamask(fsl-usb2-udc, -1,
 + return imx_add_platform_device_dmamask(data-devid, -1,
   res, ARRAY_SIZE(res),
   pdata, sizeof(*pdata), DMA_BIT_MASK(32));
  }

snip

 +static const struct platform_device_id fsl_udc_devtype[] = {
 + {
 + .name = imx-udc-mx25,
 + }, {
 + .name = imx-udc-mx27,
 + }, {
 + .name = imx-udc-mx31,
 + }, {
 + .name = imx-udc-mx35,
 + }, {
 + .name = imx-udc-mx51,
 + }
 +};

From what I understand balbi's comment, he dislikes this full list of
device id.  Instead, he prefers to something like below.

static const struct platform_device_id fsl_udc_devtype[] = {
{
.name = imx-udc-mx27,
}, {
.name = imx-udc-mx51,
}
};

It basically tells that we are handling two type of devices here, one
is imx-udc-mx27 type and the other is imx-udc-mx51 type, with mx25/31/35
completely compatible with mx27 type.  We choose mx27 instead of mx25
to define the type because mx27 Si came out earlier than mx25.  That
said, we generally choose the earlies SoC name to define a particular
version of IP block, since hardware version is mostly unavailable or
unreliable.

But that also means in platform code which create the 

Re: [PATCH 1/1] usb: fsl-mxc-udc: fix build error due to mach/hardware.h

[Shawn Guo]

Balbi,

On Fri, Jan 11, 2013 at 02:50:59PM +0200, Felipe Balbi wrote:
 As I said before, this patch is too big for -rc and is unnecessary
 considering patch I wrote above. Note that there is no problems in
 checking if ULPI PHY clk is 60MHz on all arches and, for the workaround,
 you already have a runtime check.
 
Ok, I did not have these facts on my mind.  If these are true, the
cpu_is_xxx() shouldn't be necessary there from the beginning, and we
can simply remove them then.

 Shawn, it can be broken down into smaller pieces because you can *FIX
 THE COMPILE BREAKAGE* with a very small patch as above (only issue now
 is usage of MX32_IO_ADDRESS()).
 
The MX35_IO_ADDRESS() also seems unnecessary, since as Peter's patch
suggested that pdata-regs can be used instead.

Shawn

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Re: [PATCH 1/1] usb: fsl-mxc-udc: fix build error due to mach/hardware.h

[Shawn Guo]

On Fri, Jan 11, 2013 at 12:56:51PM +0200, Felipe Balbi wrote:
 Hi,
 
 On Fri, Jan 11, 2013 at 05:56:28PM +0800, Peter Chen wrote:
  It changes the driver to use platform_device_id rather than cpu_is_xxx
  to determine the SoC type, and updates the platform code accordingly.
  
  Compile ok at imx_v6_v7_defconfig with CONFIG_USB_FSL_USB2 enable.
  Tested at mx51 bbg board, it works ok after enable phy clock
  (Need another patch to fix this problem)
  
  Signed-off-by: Peter Chen peter.c...@freescale.com
 
 this is too big for -rc, can you break it down into smaller pieces ?
 
This is a patch missed from my series that enables multiplatform
support for IMX (because the driver is not enabled in defconfig,
sorry).  To me, it's logically one patch to convert the driver over
to use platform_device_id.  It does not make much sense to split it.

Shawn

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Re: [PATCH] powerpc: select PPC_CLOCK unconditionally for FSL_SOC

[Shawn Guo]

Kumar,

Gentle ping ...

Regards,
Shawn

On Fri, Mar 30, 2012 at 01:38:56PM +0800, Shawn Guo wrote:
 Freescale PowerPC SoCs share a number of IP blocks with Freescale
 ARM/IMX SoCs, FlexCAN, SSI, FEC, eSDHC, USB, etc.  There are some
 effort consolidating those drivers to make them work for both
 architectures.
 
 One outstanding difference between two architectures is ARM/IMX will
 turn off module clocks during platform initialization for power saving
 and expects drivers manage clocks using clk API, while PowerPC
 mostly does not do that, and thus does not always build in clk API.
 
 Listing all those driver Kconfig options in select PPC_CLOCK if seems
 not scalable for long term maintenance, and could easily introduce
 Kconfig recursive dependency.  This patch chooses to select PPC_CLOCK
 unconditionally for FSL_SOC to always build clk API for PowerPC in.
 
 Signed-off-by: Shawn Guo shawn@linaro.org
 ---
  arch/powerpc/Kconfig |2 +-
  1 files changed, 1 insertions(+), 1 deletions(-)
 
 diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
 index feab3ba..63fa7fb 100644
 --- a/arch/powerpc/Kconfig
 +++ b/arch/powerpc/Kconfig
 @@ -661,7 +661,7 @@ config SBUS
  config FSL_SOC
   bool
   select HAVE_CAN_FLEXCAN if NET  CAN
 - select PPC_CLOCK if CAN_FLEXCAN
 + select PPC_CLOCK
  
  config FSL_PCI
   bool
 -- 
 1.7.5.4
 
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Re: [alsa-devel] [PATCH] powerpc: select PPC_CLOCK unconditionally for FSL_SOC

[Shawn Guo]

On 4 April 2012 23:00, Kumar Gala ga...@kernel.crashing.org wrote:
...
 What timeframe are you looking for this to go in? 3.4 or 3.5?

3.5

Thanks,
Shawn
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Re: [PATCH v2 0/9] DMA engine cookie handling cleanups

[Shawn Guo]

On Tue, Mar 06, 2012 at 10:33:21PM +, Russell King - ARM Linux wrote:
...
  drivers/dma/imx-sdma.c   |   23 ++--
...
  drivers/dma/mxs-dma.c|   23 ++--

Tested-by: Shawn Guo shawn@linaro.org
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Re: [PATCH v3 24/25] irq_domain: remove hint when allocating irq numbers

[Shawn Guo]

On Wed, Feb 15, 2012 at 01:21:45PM -0700, Grant Likely wrote:
 On Wed, Feb 15, 2012 at 04:04:28PM +0100, Nicolas Ferre wrote:
  On 02/07/2012 07:07 PM, Nicolas Ferre :
   On 01/27/2012 10:36 PM, Grant Likely :
   The 'hint' used to try and line up irq numbers with hw irq numbers is
   rather a hack and not very useful.  Now that /proc/interrupts also 
   outputs
   the hwirq number, it is even less useful to keep around the 'hint' 
   heuristic.
  
   This patch removes it.
   
   Grant,
   
   While trying your patch series in conjunction with Rob one, I do not
   find this patch in your irqdomain/next branch (and a couple of others).
   Can you tell me if this v3 series is available as a git tree?
  
  I am still interested by patch 24-25 of this series but still cannot
  find them in your irqdomain/next branch:
  Are they also expected to join the 3.4 merge window material?
 
 I've held off on putting them in irqdomain/next because they are a bit more
 risky than the other patches, and I want an explicit ack from Ben for patches
 24  25.  However, that shouldn't really cause any issues since the changes
 in 24  25 don't impact the irq_domain functionality or API.  They are just
 optimizations.
 
I'm seeing that patch 24 does impact on irq_domain functionality
a little bit.  On next tree which has no this patch yet,
irq_create_mapping can reasonably create virq in range 1..15, while
irq_find_mapping will only try to find the virq from 16
(NUM_ISA_INTERRUPTS).  This will result in that any hwirq that is  16
gets multiple entries in the mapping table with different virq numbers
mapped to the same one hwirq.

That's why I have to apply patch #24 (with one line change below) on
top of next tree to get my imx irqdomain series work properly.

@@ -371,7 +371,7 @@ unsigned int irq_create_mapping(struct irq_domain *domain,
return irq_domain_legacy_revmap(domain, hwirq);
 
/* Allocate a virtual interrupt number */
-   virq = irq_alloc_desc(0);
+   virq = irq_alloc_desc_from(1, 0);
if (!virq) {
pr_debug(irq: - virq allocation failed\n);
return 0;

I need this line of change, because the first call on irq_alloc_desc
will always return 0 to virq and in turn irq_create_mapping fails.
On imx, that's the mapping for timer irq.  Hence, the system will hang
there due to irq mapping failure.

-- 
Regards,
Shawn
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Re: [PATCH v3 24/25] irq_domain: remove hint when allocating irq numbers

[Shawn Guo]

On Wed, Feb 15, 2012 at 10:32:43PM -0700, Grant Likely wrote:
...
 That's a bug then.  The implementation should work without patch 24.  Does
 this patch fix it?
 
Yes, it fixes the problem for me.

Regards,
Shawn

 ---
 
 diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c
 index 2c1d6f8..2d3dfff 100644
 --- a/kernel/irq/irqdomain.c
 +++ b/kernel/irq/irqdomain.c
 @@ -516,8 +516,8 @@ unsigned int irq_find_mapping(struct irq_domain *domain,
   return irq_domain_legacy_revmap(domain, hwirq);
  
   /* Slow path does a linear search of the map */
 - if (hint  NUM_ISA_INTERRUPTS)
 - hint = NUM_ISA_INTERRUPTS;
 + if (hint == 0)
 + hint = 1;
   i = hint;
   do {
   struct irq_data *data = irq_get_irq_data(i);
 @@ -525,7 +525,7 @@ unsigned int irq_find_mapping(struct irq_domain *domain,
   return i;
   i++;
   if (i = irq_virq_count)
 - i = NUM_ISA_INTERRUPTS;
 + i = 1
   } while(i != hint);
   return 0;
  }
 
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Re: [PATCH v3 14/25] irq_domain: Remove irq_domain_add_simple()

[Shawn Guo]

On Fri, Jan 27, 2012 at 02:36:08PM -0700, Grant Likely wrote:
 irq_domain_add_simple() was a stop-gap measure until complete irq_domain
 support was complete.  This patch removes the irq_domain_add_simple()
 interface.
 
 v2: Updated to pass in host_data pointer on irq_domain allocation.
 
 Signed-off-by: Grant Likely grant.lik...@secretlab.ca
 Cc: Rob Herring rob.herr...@calxeda.com
 Cc: Thomas Gleixner t...@linutronix.de
 Cc: Milton Miller milt...@bga.com
 ---
  arch/arm/mach-imx/mach-imx6q.c  |3 ++-
  arch/arm/mach-msm/board-msm8x60.c   |8 ++--
  arch/arm/mach-mx5/imx51-dt.c|4 ++--
  arch/arm/mach-mx5/imx53-dt.c|4 ++--
  arch/arm/mach-omap2/board-generic.c |2 +-
  arch/arm/mach-prima2/irq.c  |2 +-
  drivers/mfd/twl-core.c  |2 +-
  include/linux/irqdomain.h   |1 -
  kernel/irq/irqdomain.c  |   10 ++
  9 files changed, 13 insertions(+), 23 deletions(-)
 
...
 --- a/arch/arm/mach-mx5/imx51-dt.c
 +++ b/arch/arm/mach-mx5/imx51-dt.c
 @@ -47,7 +47,7 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] 
 __initconst = {
  static int __init imx51_tzic_add_irq_domain(struct device_node *np,
   struct device_node *interrupt_parent)
  {
 - irq_domain_add_simple(np, 0);
 + irq_domain_add_legacy(np, 32, 0, 0, irq_domain_simple_ops, NULL);
   return 0;
  }
  
 @@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct 
 device_node *np,
   static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
  
   gpio_irq_base -= 32;
 - irq_domain_add_simple(np, gpio_irq_base);
 + irq_domain_add_legacy(np, 32, gpio_irq_base, 0, irq_domain_simple_ops, 
 NULL);

The tzic on imx5 gets 128 irq lines rather than 32 here.  The current
code will make any hwirq that is  32 hit the WARN_ON below in
irq_domain_legacy_revmap().

WARN_ON(hwirq  first_hwirq || hwirq = first_hwirq + size)

The first_hwirq is 0 and size is 32 in this case.

Changing 32 to 128 seems fixing the problem.

  
   return 0;
  }
 diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
 index 05ebb3e..89de5d4 100644
 --- a/arch/arm/mach-mx5/imx53-dt.c
 +++ b/arch/arm/mach-mx5/imx53-dt.c
 @@ -51,7 +51,7 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] 
 __initconst = {
  static int __init imx53_tzic_add_irq_domain(struct device_node *np,
   struct device_node *interrupt_parent)
  {
 - irq_domain_add_simple(np, 0);
 + irq_domain_add_legacy(np, 32, 0, 0, irq_domain_simple_ops, NULL);

Ditto

Regards,
Shawn

   return 0;
  }
  
 @@ -61,7 +61,7 @@ static int __init imx53_gpio_add_irq_domain(struct 
 device_node *np,
   static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
  
   gpio_irq_base -= 32;
 - irq_domain_add_simple(np, gpio_irq_base);
 + irq_domain_add_legacy(np, 32, gpio_irq_base, 0, irq_domain_simple_ops, 
 NULL);
  
   return 0;
  }
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Re: [PATCH v3 14/25] irq_domain: Remove irq_domain_add_simple()

[Shawn Guo]

On Tue, Jan 31, 2012 at 07:15:26AM -0600, Rob Herring wrote:
...
  --- a/arch/arm/mach-mx5/imx51-dt.c
  +++ b/arch/arm/mach-mx5/imx51-dt.c
  @@ -47,7 +47,7 @@ static const struct of_dev_auxdata 
  imx51_auxdata_lookup[] __initconst = {
   static int __init imx51_tzic_add_irq_domain(struct device_node *np,
 struct device_node *interrupt_parent)
   {
  -  irq_domain_add_simple(np, 0);
  +  irq_domain_add_legacy(np, 32, 0, 0, irq_domain_simple_ops, NULL);
 return 0;
   }
   
  @@ -57,7 +57,7 @@ static int __init imx51_gpio_add_irq_domain(struct 
  device_node *np,
 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
   
 gpio_irq_base -= 32;
  -  irq_domain_add_simple(np, gpio_irq_base);
  +  irq_domain_add_legacy(np, 32, gpio_irq_base, 0, irq_domain_simple_ops, 
  NULL);
  
  The tzic on imx5 gets 128 irq lines rather than 32 here.  The current
  code will make any hwirq that is  32 hit the WARN_ON below in
  irq_domain_legacy_revmap().
 
 But this is the gpio controller code? Really this should be 4 domains,
 but this temp fix is probably fine until you use my generic irq chip
 support.
 
Sorry.  The comment was put at the wrong place.  It should be against
imx51_tzic_add_irq_domain() just above.

-- 
Regards,
Shawn

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Re: [PATCH 2/2] Kbuild: Use dtc's -d (dependency) option

[Shawn Guo]

On Mon, Jan 09, 2012 at 11:38:15AM -0700, Stephen Warren wrote:
 This hooks dtc into Kbuild's dependency system.
 
 Thus, for example, make dtbs will rebuild tegra-harmony.dtb if only
 tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
 lack of this feature recently caused me to have very confusing git
 bisect results.
 
 For ARM, it's obvious what to add to $(targets). I'm not familiar enough
 with other architectures to know what to add there. Powerpc appears to
 already add various .dtb files into $(targets), but the other archs may
 need something added to $(targets) to work.
 
 Signed-off-by: Stephen Warren swar...@nvidia.com

Though I did not look into the patches deeply, I know the problem very
well and it annoys me a lot.  It's great that we have patches to fix
it, so

Acked-by: Shawn Guo shawn@linaro.org

-- 
Regards,
Shawn
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Re: [PATCH v3 0/4] Consolidate sdhci pltfm OF drivers and get them self registered

[Shawn Guo]

On Fri, May 27, 2011 at 10:06:50AM +0200, Wolfram Sang wrote:
 
  Any chance we can get this series into $NEXT_KERNEL?
 
 From the looks, I think it still has problems being a module. Will try
 to test it today.
 
Sorry.  I forgot testing module build.  I'm fixing it.

-- 
Regards,
Shawn

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[PATCH v4 0/4] Consolidate sdhci pltfm OF drivers and get them self registered

[Shawn Guo]

Changes since v3:
 * Update Kconfig and Makefile to fix module build failure

Changes since v2:
 * Drop imx mpc esdhc consolidation
 * Fix checkpatch errors
 * Add sdhci-of-core.c copyright into sdhci-pltfm.c

Changes since v1:
 * Rebase on cjb's mmc-next tree
 * Introduce helper function pair sdhci_pltfm_register and
   sdhci_pltfm_unregister
 * Eliminate variable 'scratch' in .remove hook to make the code
   look simple
 * Return ERR_PTR in sdhci_pltfm_init and use IS_ERR/PTR_ERR to check
   return value in .probe hooks
 * Correct MODULE_AUTHOR statement
 * Split esdhc conlidation patch to ease reviewing

Shawn Guo (4):
  mmc: sdhci: make sdhci-pltfm device drivers self registered
  mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
  mmc: sdhci: make sdhci-of device drivers self registered
  mmc: sdhci: merge two sdhci-pltfm.h into one

 drivers/mmc/host/Kconfig   |   42 ++
 drivers/mmc/host/Makefile  |   23 ++--
 drivers/mmc/host/sdhci-cns3xxx.c   |   43 ++-
 drivers/mmc/host/sdhci-dove.c  |   42 ++-
 drivers/mmc/host/sdhci-esdhc-imx.c |  114 +++-
 drivers/mmc/host/sdhci-of-core.c   |  250 -
 drivers/mmc/host/sdhci-of-esdhc.c  |   85 +---
 drivers/mmc/host/sdhci-of-hlwd.c   |   66 --
 drivers/mmc/host/sdhci-of.h|   42 --
 drivers/mmc/host/sdhci-pltfm.c |  266 
 drivers/mmc/host/sdhci-pltfm.h |   39 +-
 drivers/mmc/host/sdhci-tegra.c |  116 +++-
 include/linux/mmc/sdhci-pltfm.h|   35 -
 13 files changed, 574 insertions(+), 589 deletions(-)
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[PATCH v4 1/4] mmc: sdhci: make sdhci-pltfm device drivers self registered

[Shawn Guo]

The patch turns the common stuff in sdhci-pltfm.c into functions, and
add device drivers their own .probe and .remove which in turn call
into the common functions, so that those sdhci-pltfm device drivers
register itself and keep all device specific things away from common
sdhci-pltfm file.

Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
---
 drivers/mmc/host/Kconfig   |   29 +++-
 drivers/mmc/host/Makefile  |   14 ++--
 drivers/mmc/host/sdhci-cns3xxx.c   |   42 +-
 drivers/mmc/host/sdhci-dove.c  |   42 +-
 drivers/mmc/host/sdhci-esdhc-imx.c |  113 +++---
 drivers/mmc/host/sdhci-pltfm.c |  157 +---
 drivers/mmc/host/sdhci-pltfm.h |   17 +++-
 drivers/mmc/host/sdhci-tegra.c |  116 ++
 include/linux/mmc/sdhci-pltfm.h|6 --
 9 files changed, 313 insertions(+), 223 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 56dbf3f..d9ca262 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -112,29 +112,19 @@ config MMC_SDHCI_OF_HLWD
 
  If unsure, say N.
 
-config MMC_SDHCI_PLTFM
-   tristate SDHCI support on the platform specific bus
-   depends on MMC_SDHCI
-   help
- This selects the platform specific bus support for Secure Digital Host
- Controller Interface.
-
- If you have a controller with this interface, say Y or M here.
-
- If unsure, say N.
-
 config MMC_SDHCI_CNS3XXX
-   bool SDHCI support on the Cavium Networks CNS3xxx SoC
+   tristate SDHCI support on the Cavium Networks CNS3xxx SoC
depends on ARCH_CNS3XXX
-   depends on MMC_SDHCI_PLTFM
+   depends on MMC_SDHCI
help
  This selects the SDHCI support for CNS3xxx System-on-Chip devices.
 
  If unsure, say N.
 
 config MMC_SDHCI_ESDHC_IMX
-   bool SDHCI platform support for the Freescale eSDHC i.MX controller
-   depends on MMC_SDHCI_PLTFM  (ARCH_MX25 || ARCH_MX35 || ARCH_MX5)
+   tristate SDHCI platform support for the Freescale eSDHC i.MX 
controller
+   depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5
+   depends on MMC_SDHCI
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Freescale eSDHC controller support on the platform
@@ -143,9 +133,9 @@ config MMC_SDHCI_ESDHC_IMX
  If unsure, say N.
 
 config MMC_SDHCI_DOVE
-   bool SDHCI support on Marvell's Dove SoC
+   tristate SDHCI support on Marvell's Dove SoC
depends on ARCH_DOVE
-   depends on MMC_SDHCI_PLTFM
+   depends on MMC_SDHCI
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Secure Digital Host Controller Interface in
@@ -154,8 +144,9 @@ config MMC_SDHCI_DOVE
  If unsure, say N.
 
 config MMC_SDHCI_TEGRA
-   bool SDHCI platform support for the Tegra SD/MMC Controller
-   depends on MMC_SDHCI_PLTFM  ARCH_TEGRA
+   tristate SDHCI platform support for the Tegra SD/MMC Controller
+   depends on ARCH_TEGRA
+   depends on MMC_SDHCI
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Tegra SD/MMC controller. If you have a Tegra
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 58a5cf7..732ec1e 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -44,12 +44,14 @@ obj-$(CONFIG_MMC_JZ4740)+= jz4740_mmc.o
 obj-$(CONFIG_MMC_VUB300)   += vub300.o
 obj-$(CONFIG_MMC_USHC) += ushc.o
 
-obj-$(CONFIG_MMC_SDHCI_PLTFM)  += sdhci-platform.o
-sdhci-platform-y   := sdhci-pltfm.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_ESDHC_IMX)   += sdhci-esdhc-imx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_DOVE)+= sdhci-dove.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_TEGRA)   += sdhci-tegra.o
+obj-$(CONFIG_MMC_SDHCI_CNS3XXX)+= sdhci-cns3xxx.o
+sdhci-cns3xxx-objs := sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)  += sdhci-esdhc-imx.o
+sdhci-esdhc-imx-objs   := sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_DOVE)   += sdhci-dove.o
+sdhci-dove-objs:= sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_TEGRA)  += sdhci-tegra.o
+sdhci-tegra-objs   := sdhci-pltfm.o
 
 obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
 sdhci-of-y := sdhci-of-core.o
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index 9ebd1d7..ac4b26f 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -86,7 +86,7 @@ static struct sdhci_ops sdhci_cns3xxx_ops = {
.set_clock  = sdhci_cns3xxx_set_clock,
 };
 
-struct

[PATCH v4 2/4] mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data

[Shawn Guo]

The patch migrates the use of sdhci_of_host and sdhci_of_data to
sdhci_pltfm_host and sdhci_pltfm_data, so that the former pair can
be eliminated.

Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
---
 drivers/mmc/host/sdhci-of-core.c  |   31 ---
 drivers/mmc/host/sdhci-of-esdhc.c |   36 +++-
 drivers/mmc/host/sdhci-of-hlwd.c  |   20 +++-
 drivers/mmc/host/sdhci-of.h   |   15 +++
 drivers/mmc/host/sdhci-pltfm.h|4 
 5 files changed, 53 insertions(+), 53 deletions(-)

diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
index f9b611f..bca7062 100644
--- a/drivers/mmc/host/sdhci-of-core.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -59,7 +59,7 @@ void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, 
int reg)
 
 void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
 {
-   struct sdhci_of_host *of_host = sdhci_priv(host);
+   struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
int base = reg  ~0x3;
int shift = (reg  0x2) * 8;
 
@@ -69,10 +69,11 @@ void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, 
int reg)
 * Postpone this write, we must do it together with a
 * command write that is down below.
 */
-   of_host-xfer_mode_shadow = val;
+   pltfm_host-xfer_mode_shadow = val;
return;
case SDHCI_COMMAND:
-   sdhci_be32bs_writel(host, val  16 | of_host-xfer_mode_shadow,
+   sdhci_be32bs_writel(host,
+   val  16 | pltfm_host-xfer_mode_shadow,
SDHCI_TRANSFER_MODE);
return;
}
@@ -127,7 +128,7 @@ static bool __devinit sdhci_of_wp_inverted(struct 
device_node *np)
 static int __devinit sdhci_of_probe(struct platform_device *ofdev)
 {
struct device_node *np = ofdev-dev.of_node;
-   struct sdhci_of_data *sdhci_of_data;
+   struct sdhci_pltfm_data *pdata;
struct sdhci_host *host;
struct sdhci_of_host *of_host;
const __be32 *clk;
@@ -136,16 +137,16 @@ static int __devinit sdhci_of_probe(struct 
platform_device *ofdev)
 
if (!ofdev-dev.of_match)
return -EINVAL;
-   sdhci_of_data = ofdev-dev.of_match-data;
+   pdata = ofdev-dev.of_match-data;
 
if (!of_device_is_available(np))
return -ENODEV;
 
-   host = sdhci_alloc_host(ofdev-dev, sizeof(*of_host));
+   host = sdhci_alloc_host(ofdev-dev, sizeof(*pltfm_host));
if (IS_ERR(host))
return -ENOMEM;
 
-   of_host = sdhci_priv(host);
+   pltfm_host = sdhci_priv(host);
dev_set_drvdata(ofdev-dev, host);
 
host-ioaddr = of_iomap(np, 0);
@@ -161,9 +162,9 @@ static int __devinit sdhci_of_probe(struct platform_device 
*ofdev)
}
 
host-hw_name = dev_name(ofdev-dev);
-   if (sdhci_of_data) {
-   host-quirks = sdhci_of_data-quirks;
-   host-ops = sdhci_of_data-ops;
+   if (pdata) {
+   host-quirks = pdata-quirks;
+   host-ops = pdata-ops;
}
 
if (of_get_property(np, sdhci,auto-cmd12, NULL))
@@ -178,7 +179,7 @@ static int __devinit sdhci_of_probe(struct platform_device 
*ofdev)
 
clk = of_get_property(np, clock-frequency, size);
if (clk  size == sizeof(*clk)  *clk)
-   of_host-clock = be32_to_cpup(clk);
+   pltfm_host-clock = be32_to_cpup(clk);
 
ret = sdhci_add_host(host);
if (ret)
@@ -208,12 +209,12 @@ static int __devexit sdhci_of_remove(struct 
platform_device *ofdev)
 
 static const struct of_device_id sdhci_of_match[] = {
 #ifdef CONFIG_MMC_SDHCI_OF_ESDHC
-   { .compatible = fsl,mpc8379-esdhc, .data = sdhci_esdhc, },
-   { .compatible = fsl,mpc8536-esdhc, .data = sdhci_esdhc, },
-   { .compatible = fsl,esdhc, .data = sdhci_esdhc, },
+   { .compatible = fsl,mpc8379-esdhc, .data = sdhci_esdhc_pdata, },
+   { .compatible = fsl,mpc8536-esdhc, .data = sdhci_esdhc_pdata, },
+   { .compatible = fsl,esdhc, .data = sdhci_esdhc_pdata, },
 #endif
 #ifdef CONFIG_MMC_SDHCI_OF_HLWD
-   { .compatible = nintendo,hollywood-sdhci, .data = sdhci_hlwd, },
+   { .compatible = nintendo,hollywood-sdhci, .data = sdhci_hlwd_pdata, 
},
 #endif
{ .compatible = generic-sdhci, },
{},
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c 
b/drivers/mmc/host/sdhci-of-esdhc.c
index ba40d6d..492bcd7 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -60,32 +60,34 @@ static int esdhc_of_enable_dma(struct sdhci_host *host)
 
 static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
 {
-   struct

[PATCH v4 3/4] mmc: sdhci: make sdhci-of device drivers self registered

[Shawn Guo]

The patch turns the sdhci-of-core common stuff into helper functions
added into sdhci-pltfm.c, and makes sdhci-of device drviers self
registered using the same pair of .probe and .remove used by
sdhci-pltfm device drivers.

As a result, sdhci-of-core.c and sdhci-of.h can be eliminated with
those common things merged into sdhci-pltfm.c and sdhci-pltfm.h
respectively.

Signed-off-by: Shawn Guo shawn@linaro.org
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/mmc/host/Kconfig  |   13 +--
 drivers/mmc/host/Makefile |9 +-
 drivers/mmc/host/sdhci-of-core.c  |  251 -
 drivers/mmc/host/sdhci-of-esdhc.c |   53 -
 drivers/mmc/host/sdhci-of-hlwd.c  |   50 +++-
 drivers/mmc/host/sdhci-of.h   |   33 -
 drivers/mmc/host/sdhci-pltfm.c|  111 -
 drivers/mmc/host/sdhci-pltfm.h|   12 ++
 8 files changed, 227 insertions(+), 305 deletions(-)
 delete mode 100644 drivers/mmc/host/sdhci-of-core.c
 delete mode 100644 drivers/mmc/host/sdhci-of.h

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index d9ca262..ee4ac77 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -81,18 +81,9 @@ config MMC_RICOH_MMC
 
  If unsure, say Y.
 
-config MMC_SDHCI_OF
-   tristate SDHCI support on OpenFirmware platforms
-   depends on MMC_SDHCI  OF
-   help
- This selects the OF support for Secure Digital Host Controller
- Interfaces.
-
- If unsure, say N.
-
 config MMC_SDHCI_OF_ESDHC
bool SDHCI OF support for the Freescale eSDHC controller
-   depends on MMC_SDHCI_OF
+   depends on MMC_SDHCI
depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
@@ -102,7 +93,7 @@ config MMC_SDHCI_OF_ESDHC
 
 config MMC_SDHCI_OF_HLWD
bool SDHCI OF support for the Nintendo Wii SDHCI controllers
-   depends on MMC_SDHCI_OF
+   depends on MMC_SDHCI
depends on PPC_OF
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 732ec1e..cbd89c3 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -52,11 +52,10 @@ obj-$(CONFIG_MMC_SDHCI_DOVE)+= sdhci-dove.o
 sdhci-dove-objs:= sdhci-pltfm.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)  += sdhci-tegra.o
 sdhci-tegra-objs   := sdhci-pltfm.o
-
-obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
-sdhci-of-y := sdhci-of-core.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC)  += sdhci-of-esdhc.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD)   += sdhci-of-hlwd.o
+obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)   += sdhci-of-esdhc.o
+sdhci-of-esdhc-objs:= sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_OF_HLWD)+= sdhci-of-hlwd.o
+sdhci-of-hlwd-objs := sdhci-pltfm.o
 
 ifeq ($(CONFIG_CB710_DEBUG),y)
CFLAGS-cb710-mmc+= -DDEBUG
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
deleted file mode 100644
index bca7062..000
--- a/drivers/mmc/host/sdhci-of-core.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/*
- * OpenFirmware bindings for Secure Digital Host Controller Interface.
- *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#include linux/err.h
-#include linux/module.h
-#include linux/init.h
-#include linux/io.h
-#include linux/interrupt.h
-#include linux/delay.h
-#include linux/of.h
-#include linux/of_platform.h
-#include linux/of_address.h
-#include linux/of_irq.h
-#include linux/mmc/host.h
-#ifdef CONFIG_PPC
-#include asm/machdep.h
-#endif
-#include sdhci-of.h
-#include sdhci.h
-
-#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-
-/*
- * These accessors are designed for big endian hosts doing I/O to
- * little endian controllers incorporating a 32-bit hardware byte swapper.
- */
-
-u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-{
-   return in_be32(host-ioaddr + reg);
-}
-
-u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
-{
-   return in_be16(host-ioaddr + (reg ^ 0x2));
-}
-
-u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
-{
-   return in_8(host-ioaddr + (reg ^ 0x3));
-}
-
-void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
-{
-   out_be32(host-ioaddr + reg, val);
-}
-
-void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
-{
-   struct sdhci_pltfm_host *pltfm_host

[PATCH v4 4/4] mmc: sdhci: merge two sdhci-pltfm.h into one

[Shawn Guo]

The structure sdhci_pltfm_data is not necessarily to be in a public
header like include/linux/mmc/sdhci-pltfm.h, so the patch moves it
into drivers/mmc/host/sdhci-pltfm.h and eliminates the former one.

Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/mmc/host/sdhci-cns3xxx.c   |1 -
 drivers/mmc/host/sdhci-esdhc-imx.c |1 -
 drivers/mmc/host/sdhci-pltfm.h |6 +-
 include/linux/mmc/sdhci-pltfm.h|   29 -
 4 files changed, 5 insertions(+), 32 deletions(-)
 delete mode 100644 include/linux/mmc/sdhci-pltfm.h

diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index ac4b26f..025d1a5 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -15,7 +15,6 @@
 #include linux/delay.h
 #include linux/device.h
 #include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
 #include mach/cns3xxx.h
 #include sdhci.h
 #include sdhci-pltfm.h
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c 
b/drivers/mmc/host/sdhci-esdhc-imx.c
index e27ccbb..977f142 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -18,7 +18,6 @@
 #include linux/gpio.h
 #include linux/slab.h
 #include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
 #include linux/mmc/mmc.h
 #include linux/mmc/sdio.h
 #include mach/hardware.h
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index fe27b83..fd72694 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -14,9 +14,13 @@
 #include linux/clk.h
 #include linux/types.h
 #include linux/platform_device.h
-#include linux/mmc/sdhci-pltfm.h
 #include linux/mmc/sdhci.h
 
+struct sdhci_pltfm_data {
+   struct sdhci_ops *ops;
+   unsigned int quirks;
+};
+
 struct sdhci_pltfm_host {
struct clk *clk;
void *priv; /* to handle quirks across io-accessor calls */
diff --git a/include/linux/mmc/sdhci-pltfm.h b/include/linux/mmc/sdhci-pltfm.h
deleted file mode 100644
index f1c2ac3..000
--- a/include/linux/mmc/sdhci-pltfm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Platform data declarations for the sdhci-pltfm driver.
- *
- * Copyright (c) 2010 MontaVista Software, LLC.
- *
- * Author: Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#ifndef _SDHCI_PLTFM_H
-#define _SDHCI_PLTFM_H
-
-struct sdhci_ops;
-
-/**
- * struct sdhci_pltfm_data - SDHCI platform-specific information  hooks
- * @ops: optional pointer to the platform-provided SDHCI ops
- * @quirks: optional SDHCI quirks
- */
-struct sdhci_pltfm_data {
-   struct sdhci_ops *ops;
-   unsigned int quirks;
-};
-
-#endif /* _SDHCI_PLTFM_H */
-- 
1.7.4.1

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Re: [PATCH v2 5/7] mmc: sdhci: consolidate sdhci-of-esdhc and sdhci-esdhc-imx

[Shawn Guo]

On Tue, May 24, 2011 at 09:40:54PM +0200, Wolfram Sang wrote:
 On Thu, May 05, 2011 at 09:22:56PM +0800, Shawn Guo wrote:
  This patch is to consolidate SDHCI driver for Freescale eSDHC
  controller found on both MPCxxx and i.MX platforms.  It merges
  sdhci-of-esdhc.c into sdhci-esdhc.c, so that the same pair of
  .probe/.remove hook works with eSDHC for two platforms.
  
  As the results, sdhci-of-esdhc.c and sdhci-esdhc.h are removed, and
  header esdhc.h containing the definition of esdhc_platform_data is
  put into the public folder.
  
  Signed-off-by: Shawn Guo shawn@linaro.org
 
 I agree with Anton about not merging the two...
 
  +#ifndef CONFIG_MMC_SDHCI_ESDHC_IMX
  +#define cpu_is_mx25()  (0)
  +#define cpu_is_mx35()  (0)
  +#define cpu_is_mx51()  (0)
  +#define cpu_is_imx()   (0)
  +#else
  +#define cpu_is_imx()   (1)
  +#endif
 
 ... e.g. that looks a bit frightening.
 
Agree.

The use of cpu_is_mx..() in the driver itself seems a churn to me
even without this consolidation patch.  Is it possible for us to
eliminate them by using pdata, and eventually device tree?  When we
are there, I might want to revisit the consolidation again.

-- 
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Shawn

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Re: [PATCH v2 5/7] mmc: sdhci: consolidate sdhci-of-esdhc and sdhci-esdhc-imx

[Shawn Guo]

Hi Uwe,

On Wed, May 25, 2011 at 08:46:19AM +0200, Uwe Kleine-König wrote:
 Hello Shawn,
 
+#ifndef CONFIG_MMC_SDHCI_ESDHC_IMX
+#define cpu_is_mx25()  (0)
+#define cpu_is_mx35()  (0)
+#define cpu_is_mx51()  (0)
+#define cpu_is_imx()   (0)
+#else
+#define cpu_is_imx()   (1)
+#endif
   
   ... e.g. that looks a bit frightening.
   
  Agree.
  
  The use of cpu_is_mx..() in the driver itself seems a churn to me
  even without this consolidation patch.  Is it possible for us to
  eliminate them by using pdata, and eventually device tree?  When we
  are there, I might want to revisit the consolidation again.
 An alternative that allows letting the logic in the driver and still
 getting rid of the cpu_is_ stuff is using platform ids. See
 drivers/spi/spi_imx.c for an example. Instead of an index into an array
 (as it's for the imx-spi driver) driver_data can hold flags, too, which
 should be enough most of the time.
 
Yeah, this is definitely a solution I can try later.  But for now, I
would drop the esdhc consolidation patch.

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[PATCH v3 0/4] Consolidate sdhci pltfm OF drivers and get them self registered

[Shawn Guo]

Here are what the patch set does.

* Remove .probe and .remove hooks from sdhci-pltfm.c and make it be
  a pure common helper function providers.
* Add .probe and .remove hooks for sdhci pltfm drivers sdhci-cns3xxx,
  sdhci-dove, sdhci-tegra, and sdhci-esdhc-imx to make them self
  registered with calling helper functions created above.
* Migrate the use of sdhci_of_host and sdhci_of_data to
  sdhci_pltfm_host and sdhci_pltfm_data, so that OF version host and
  data structure works can be saved, and pltfm version works for both
  cases.
* Add OF common helper stuff into sdhci-pltfm.c, and make OF version
  sdhci drivers sdhci-of-esdhc and sdhci-of-hlwd become self
  registered as well, so that sdhci-of-core.c and sdhci-of.h can be
  removed.
* Eliminate include/linux/mmc/sdhci-pltfm.h with moving stuff into
  drivers/mmc/host/sdhci-pltfm.h.

And the benefits we gain from the changes are:

* Get the sdhci device driver follow the Linux trend that driver
  makes the registration by its own.
* sdhci-pltfm.c becomes simple and clean as it only has common helper
  stuff there now.
* All sdhci device specific things are going back its own driver.
* The dt and non-dt drivers are consolidated to use the same pair of
  .probe and .remove hooks.

Changes since v2:
* Drop imx mpc esdhc consolidation
* Fix checkpatch errors
* Add sdhci-of-core.c copyright into sdhci-pltfm.c

Changes since v1:
* Rebase on cjb's mmc-next tree
* Introduce helper function pair sdhci_pltfm_register and
  sdhci_pltfm_unregister
* Eliminate variable 'scratch' in .remove hook to make the code
  look simple
* Return ERR_PTR in sdhci_pltfm_init and use IS_ERR/PTR_ERR to check
  return value in .probe hooks
* Correct MODULE_AUTHOR statement
* Split esdhc conlidation patch to ease reviewing

Shawn Guo (4):
  mmc: sdhci: make sdhci-pltfm device drivers self registered
  mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
  mmc: sdhci: make sdhci-of device drivers self registered
  mmc: sdhci: merge two sdhci-pltfm.h into one

 drivers/mmc/host/Kconfig   |   47 +++
 drivers/mmc/host/Makefile  |   18 +--
 drivers/mmc/host/sdhci-cns3xxx.c   |   43 ++-
 drivers/mmc/host/sdhci-dove.c  |   42 ++-
 drivers/mmc/host/sdhci-esdhc-imx.c |  114 +++-
 drivers/mmc/host/sdhci-of-core.c   |  250 -
 drivers/mmc/host/sdhci-of-esdhc.c  |   85 +---
 drivers/mmc/host/sdhci-of-hlwd.c   |   66 --
 drivers/mmc/host/sdhci-of.h|   42 --
 drivers/mmc/host/sdhci-pltfm.c |  266 
 drivers/mmc/host/sdhci-pltfm.h |   39 +-
 drivers/mmc/host/sdhci-tegra.c |  116 +++-
 include/linux/mmc/sdhci-pltfm.h|   35 -
 13 files changed, 578 insertions(+), 585 deletions(-)

Regards,
Shawn

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[PATCH v3 1/4] mmc: sdhci: make sdhci-pltfm device drivers self registered

[Shawn Guo]

The patch turns the common stuff in sdhci-pltfm.c into functions, and
add device drivers their own .probe and .remove which in turn call
into the common functions, so that those sdhci-pltfm device drivers
register itself and keep all device specific things away from common
sdhci-pltfm file.

Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Acked-by: Arnd Bergmann a...@arndb.de
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
---
 drivers/mmc/host/Kconfig   |   32 
 drivers/mmc/host/Makefile  |   11 +--
 drivers/mmc/host/sdhci-cns3xxx.c   |   42 +-
 drivers/mmc/host/sdhci-dove.c  |   42 +-
 drivers/mmc/host/sdhci-esdhc-imx.c |  113 +++---
 drivers/mmc/host/sdhci-pltfm.c |  157 +---
 drivers/mmc/host/sdhci-pltfm.h |   17 +++-
 drivers/mmc/host/sdhci-tegra.c |  116 ++
 include/linux/mmc/sdhci-pltfm.h|6 --
 9 files changed, 317 insertions(+), 219 deletions(-)

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index b981715..799e935 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -113,28 +113,27 @@ config MMC_SDHCI_OF_HLWD
  If unsure, say N.
 
 config MMC_SDHCI_PLTFM
-   tristate SDHCI support on the platform specific bus
+   bool
depends on MMC_SDHCI
help
- This selects the platform specific bus support for Secure Digital Host
- Controller Interface.
-
- If you have a controller with this interface, say Y or M here.
-
- If unsure, say N.
+ This selects the platform common function support for Secure Digital
+ Host Controller Interface.
 
 config MMC_SDHCI_CNS3XXX
-   bool SDHCI support on the Cavium Networks CNS3xxx SoC
+   tristate SDHCI support on the Cavium Networks CNS3xxx SoC
depends on ARCH_CNS3XXX
-   depends on MMC_SDHCI_PLTFM
+   depends on MMC_SDHCI
+   select MMC_SDHCI_PLTFM
help
  This selects the SDHCI support for CNS3xxx System-on-Chip devices.
 
  If unsure, say N.
 
 config MMC_SDHCI_ESDHC_IMX
-   bool SDHCI platform support for the Freescale eSDHC i.MX controller
-   depends on MMC_SDHCI_PLTFM  (ARCH_MX25 || ARCH_MX35 || ARCH_MX5)
+   tristate SDHCI platform support for the Freescale eSDHC i.MX 
controller
+   depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5
+   depends on MMC_SDHCI
+   select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Freescale eSDHC controller support on the platform
@@ -143,9 +142,10 @@ config MMC_SDHCI_ESDHC_IMX
  If unsure, say N.
 
 config MMC_SDHCI_DOVE
-   bool SDHCI support on Marvell's Dove SoC
+   tristate SDHCI support on Marvell's Dove SoC
depends on ARCH_DOVE
-   depends on MMC_SDHCI_PLTFM
+   depends on MMC_SDHCI
+   select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Secure Digital Host Controller Interface in
@@ -154,8 +154,10 @@ config MMC_SDHCI_DOVE
  If unsure, say N.
 
 config MMC_SDHCI_TEGRA
-   bool SDHCI platform support for the Tegra SD/MMC Controller
-   depends on MMC_SDHCI_PLTFM  ARCH_TEGRA
+   tristate SDHCI platform support for the Tegra SD/MMC Controller
+   depends on ARCH_TEGRA
+   depends on MMC_SDHCI
+   select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
  This selects the Tegra SD/MMC controller. If you have a Tegra
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 4f1df0a..95fddb8 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -43,12 +43,11 @@ obj-$(CONFIG_MMC_SH_MMCIF)  += sh_mmcif.o
 obj-$(CONFIG_MMC_JZ4740)   += jz4740_mmc.o
 obj-$(CONFIG_MMC_USHC) += ushc.o
 
-obj-$(CONFIG_MMC_SDHCI_PLTFM)  += sdhci-platform.o
-sdhci-platform-y   := sdhci-pltfm.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_ESDHC_IMX)   += sdhci-esdhc-imx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_DOVE)+= sdhci-dove.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_TEGRA)   += sdhci-tegra.o
+obj-$(CONFIG_MMC_SDHCI_PLTFM)  += sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_CNS3XXX)+= sdhci-cns3xxx.o
+obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)  += sdhci-esdhc-imx.o
+obj-$(CONFIG_MMC_SDHCI_DOVE)   += sdhci-dove.o
+obj-$(CONFIG_MMC_SDHCI_TEGRA)  += sdhci-tegra.o
 
 obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
 sdhci-of-y := sdhci-of-core.o
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index 9ebd1d7..ac4b26f 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -86,7 +86,7 @@ static struct sdhci_ops sdhci_cns3xxx_ops

[PATCH v3 3/4] mmc: sdhci: make sdhci-of device drivers self registered

[Shawn Guo]

The patch turns the sdhci-of-core common stuff into helper functions
added into sdhci-pltfm.c, and makes sdhci-of device drviers self
registered using the same pair of .probe and .remove used by
sdhci-pltfm device drivers.

As a result, sdhci-of-core.c and sdhci-of.h can be eliminated with
those common things merged into sdhci-pltfm.c and sdhci-pltfm.h
respectively.

Signed-off-by: Shawn Guo shawn@linaro.org
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/mmc/host/Kconfig  |   15 +--
 drivers/mmc/host/Makefile |7 +-
 drivers/mmc/host/sdhci-of-core.c  |  251 -
 drivers/mmc/host/sdhci-of-esdhc.c |   53 -
 drivers/mmc/host/sdhci-of-hlwd.c  |   50 +++-
 drivers/mmc/host/sdhci-of.h   |   33 -
 drivers/mmc/host/sdhci-pltfm.c|  111 -
 drivers/mmc/host/sdhci-pltfm.h|   12 ++
 8 files changed, 227 insertions(+), 305 deletions(-)
 delete mode 100644 drivers/mmc/host/sdhci-of-core.c
 delete mode 100644 drivers/mmc/host/sdhci-of.h

diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 799e935..fdd20ad 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -81,19 +81,11 @@ config MMC_RICOH_MMC
 
  If unsure, say Y.
 
-config MMC_SDHCI_OF
-   tristate SDHCI support on OpenFirmware platforms
-   depends on MMC_SDHCI  OF
-   help
- This selects the OF support for Secure Digital Host Controller
- Interfaces.
-
- If unsure, say N.
-
 config MMC_SDHCI_OF_ESDHC
bool SDHCI OF support for the Freescale eSDHC controller
-   depends on MMC_SDHCI_OF
+   depends on MMC_SDHCI
depends on PPC_OF
+   select MMC_SDHCI_PLTFM
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
  This selects the Freescale eSDHC controller support.
@@ -102,8 +94,9 @@ config MMC_SDHCI_OF_ESDHC
 
 config MMC_SDHCI_OF_HLWD
bool SDHCI OF support for the Nintendo Wii SDHCI controllers
-   depends on MMC_SDHCI_OF
+   depends on MMC_SDHCI
depends on PPC_OF
+   select MMC_SDHCI_PLTFM
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
  This selects the Secure Digital Host Controller Interface (SDHCI)
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 95fddb8..01d38a1 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -48,11 +48,8 @@ obj-$(CONFIG_MMC_SDHCI_CNS3XXX)  += 
sdhci-cns3xxx.o
 obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX)  += sdhci-esdhc-imx.o
 obj-$(CONFIG_MMC_SDHCI_DOVE)   += sdhci-dove.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)  += sdhci-tegra.o
-
-obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
-sdhci-of-y := sdhci-of-core.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC)  += sdhci-of-esdhc.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD)   += sdhci-of-hlwd.o
+obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)   += sdhci-of-esdhc.o
+obj-$(CONFIG_MMC_SDHCI_OF_HLWD)+= sdhci-of-hlwd.o
 
 ifeq ($(CONFIG_CB710_DEBUG),y)
CFLAGS-cb710-mmc+= -DDEBUG
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
deleted file mode 100644
index bca7062..000
--- a/drivers/mmc/host/sdhci-of-core.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/*
- * OpenFirmware bindings for Secure Digital Host Controller Interface.
- *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#include linux/err.h
-#include linux/module.h
-#include linux/init.h
-#include linux/io.h
-#include linux/interrupt.h
-#include linux/delay.h
-#include linux/of.h
-#include linux/of_platform.h
-#include linux/of_address.h
-#include linux/of_irq.h
-#include linux/mmc/host.h
-#ifdef CONFIG_PPC
-#include asm/machdep.h
-#endif
-#include sdhci-of.h
-#include sdhci.h
-
-#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-
-/*
- * These accessors are designed for big endian hosts doing I/O to
- * little endian controllers incorporating a 32-bit hardware byte swapper.
- */
-
-u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-{
-   return in_be32(host-ioaddr + reg);
-}
-
-u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
-{
-   return in_be16(host-ioaddr + (reg ^ 0x2));
-}
-
-u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
-{
-   return in_8(host-ioaddr + (reg ^ 0x3));
-}
-
-void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
-{
-   out_be32(host-ioaddr + reg, val);
-}
-
-void sdhci_be32bs_writew(struct

[PATCH v3 4/4] mmc: sdhci: merge two sdhci-pltfm.h into one

[Shawn Guo]

The structure sdhci_pltfm_data is not necessarily to be in a public
header like include/linux/mmc/sdhci-pltfm.h, so the patch moves it
into drivers/mmc/host/sdhci-pltfm.h and eliminates the former one.

Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
 drivers/mmc/host/sdhci-cns3xxx.c   |1 -
 drivers/mmc/host/sdhci-esdhc-imx.c |1 -
 drivers/mmc/host/sdhci-pltfm.h |6 +-
 include/linux/mmc/sdhci-pltfm.h|   29 -
 4 files changed, 5 insertions(+), 32 deletions(-)
 delete mode 100644 include/linux/mmc/sdhci-pltfm.h

diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index ac4b26f..025d1a5 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -15,7 +15,6 @@
 #include linux/delay.h
 #include linux/device.h
 #include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
 #include mach/cns3xxx.h
 #include sdhci.h
 #include sdhci-pltfm.h
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c 
b/drivers/mmc/host/sdhci-esdhc-imx.c
index e27ccbb..977f142 100644
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c
@@ -18,7 +18,6 @@
 #include linux/gpio.h
 #include linux/slab.h
 #include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
 #include linux/mmc/mmc.h
 #include linux/mmc/sdio.h
 #include mach/hardware.h
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index fe27b83..fd72694 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -14,9 +14,13 @@
 #include linux/clk.h
 #include linux/types.h
 #include linux/platform_device.h
-#include linux/mmc/sdhci-pltfm.h
 #include linux/mmc/sdhci.h
 
+struct sdhci_pltfm_data {
+   struct sdhci_ops *ops;
+   unsigned int quirks;
+};
+
 struct sdhci_pltfm_host {
struct clk *clk;
void *priv; /* to handle quirks across io-accessor calls */
diff --git a/include/linux/mmc/sdhci-pltfm.h b/include/linux/mmc/sdhci-pltfm.h
deleted file mode 100644
index f1c2ac3..000
--- a/include/linux/mmc/sdhci-pltfm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Platform data declarations for the sdhci-pltfm driver.
- *
- * Copyright (c) 2010 MontaVista Software, LLC.
- *
- * Author: Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#ifndef _SDHCI_PLTFM_H
-#define _SDHCI_PLTFM_H
-
-struct sdhci_ops;
-
-/**
- * struct sdhci_pltfm_data - SDHCI platform-specific information  hooks
- * @ops: optional pointer to the platform-provided SDHCI ops
- * @quirks: optional SDHCI quirks
- */
-struct sdhci_pltfm_data {
-   struct sdhci_ops *ops;
-   unsigned int quirks;
-};
-
-#endif /* _SDHCI_PLTFM_H */
-- 
1.7.4.1


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