: [PATCH] Add_460SX_Initial_Framework

2008-12-11 Thread Tirumala Reddy Marri
Josh,
  I will be handling this patch from now on. I will modify the patch and
answer your queries soon.
Thanks,
Marri


Message: 2
Date: Mon, 1 Dec 2008 20:32:56 -0500
From: Josh Boyer jwbo...@linux.vnet.ibm.com
Subject: Re: [PATCH] Add_460SX_Initial_Framework
To: mmadishe...@amcc.com
Cc: linuxppc-dev@ozlabs.org
Message-ID: 20081202013256.gb25...@zod.rchland.ibm.com
Content-Type: text/plain; charset=us-ascii

On Mon, Dec 01, 2008 at 03:37:15PM -0800, mmadishe...@amcc.com wrote:
From: Madhulika Madishetty mmadishe...@amcc.com

This patch contains the initial framework for AMCC Redwood board.

Signed-off-by: Madhulika Madishetty mmadishe...@amcc.com, Tirumala
Reddy 
Marri tma...@amcc.com,
Feng Kan f...@amcc.com, Vidhyananth Venkatasamy
vvenkatas...@amcc.com, 
Preetesh Parekh ppar...@amcc.com
Acked-by: Loc Ho l...@amcc.com, Feng Kan f...@amcc.com

One Signed-off-by: per person, per line please.  Don't use a single
with multiple names.

---
 arch/powerpc/boot/dts/redwood_amcc.dts |  247 +++
 arch/powerpc/configs/44x/redwood_defconfig | 1082 


Parts of your patch are word-wrapped.

diff --git a/arch/powerpc/boot/dts/redwood_amcc.dts 
b/arch/powerpc/boot/dts/redwood_amcc.dts
new file mode 100644
index 000..e4f5efd
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood_amcc.dts

Any particular reason you chose to call this redwood_amcc.dts?  None
of the other boards do that.

Also, what possessed AMCC to create an entirely new board called
Redwood when there is already a 4xx board called Redwood?  I realize
this isn't really something you can control, and the old board isn't
supported any longer, but still...  yell at your marketing people or
something :).

@@ -0,0 +1,247 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC tma...@amcc.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;

If this is really a dts-v1, I would expect all the values here to
look differently.  See below.

+
+/ {
+  #address-cells = 2;
+  #size-cells = 1;
+  model = amcc,redwood;
+  compatible = amcc,redwood;
+  dcr-parent = /cpus/c...@0;
+
+  aliases {
+  ethernet0 = EMAC0;
+  serial0 = UART0;
+  };
+
+  cpus {
+  #address-cells = 1;
+  #size-cells = 0;
+
+  c...@0 {
+  device_type = cpu;
+  model = PowerPC,460SX;
+  reg = 0;
+  clock-frequency = 0; /* Filled in by U-Boot */
+  timebase-frequency = 0; /* Filled in by U-Boot
*/
+  i-cache-line-size = 20;
+  d-cache-line-size = 20;

Here.  You have a i/d-cache line size of 20 bytes?  That's odd...

+  i-cache-size = 8000;
+  d-cache-size = 8000;

And you have a cache size of 8000 bytes?  Also odd.  I would expect
these
lines to look like:

i-cache-line-size = 0x20;
i-cache-size = 0x8000;

or
i-cache-line-size = 32;
i-cache-size = 32768;

Please go through and verify all the values are properly filled out.
I'm
not even sure how this works with newer dtc versions.

+  dcr-controller;
+  dcr-access-method = native;
+  };
+  };
+
+  memory {
+  device_type = memory;
+  reg = 0 0 0; /* Filled in by U-Boot */
+  };
+
+  UIC0: interrupt-controller0 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 0;
+  dcr-reg = 0c0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  };
+
+  UIC1: interrupt-controller1 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 1;
+  dcr-reg = 0d0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  interrupts = 1e 4 1f 4; /* cascade */
+  interrupt-parent = UIC0;
+  };
+
+  UIC2: interrupt-controller2 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 2;
+  dcr-reg = 0e0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  interrupts = a 4 b 4; /* cascade */
+  interrupt-parent = UIC0;
+  };
+
+  UIC3: interrupt-controller3 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 3;
+  dcr-reg = 0f0 009;
+  #address-cells = 0

[PATCH] Add_460SX_Initial_Framework

2008-12-01 Thread mmadishetty
From: Madhulika Madishetty [EMAIL PROTECTED]

This patch contains the initial framework for AMCC Redwood board.

Signed-off-by: Madhulika Madishetty [EMAIL PROTECTED], Tirumala Reddy 
Marri [EMAIL PROTECTED],
Feng Kan [EMAIL PROTECTED], Vidhyananth Venkatasamy [EMAIL PROTECTED], 
Preetesh Parekh [EMAIL PROTECTED]
Acked-by: Loc Ho [EMAIL PROTECTED], Feng Kan [EMAIL PROTECTED]
---
 arch/powerpc/boot/dts/redwood_amcc.dts |  247 +++
 arch/powerpc/configs/44x/redwood_defconfig | 1082 

 arch/powerpc/kernel/cpu_setup_44x.S|2 +
 arch/powerpc/kernel/cputable.c |   13 +
 arch/powerpc/platforms/44x/Kconfig |   22 +-
 arch/powerpc/platforms/44x/Makefile|1 +
 arch/powerpc/platforms/44x/ppc44x_simple.c |2 +
 arch/powerpc/platforms/44x/redwood.c   |  103 +++
 8 files changed, 1470 insertions(+), 2 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/redwood_amcc.dts
 create mode 100644 arch/powerpc/configs/44x/redwood_defconfig
 create mode 100644 arch/powerpc/platforms/44x/redwood.c

diff --git a/arch/powerpc/boot/dts/redwood_amcc.dts 
b/arch/powerpc/boot/dts/redwood_amcc.dts
new file mode 100644
index 000..e4f5efd
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood_amcc.dts
@@ -0,0 +1,247 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/ {
+   #address-cells = 2;
+   #size-cells = 1;
+   model = amcc,redwood;
+   compatible = amcc,redwood;
+   dcr-parent = /cpus/[EMAIL PROTECTED];
+
+   aliases {
+   ethernet0 = EMAC0;
+   serial0 = UART0;
+   };
+
+   cpus {
+   #address-cells = 1;
+   #size-cells = 0;
+
+   [EMAIL PROTECTED] {
+   device_type = cpu;
+   model = PowerPC,460SX;
+   reg = 0;
+   clock-frequency = 0; /* Filled in by U-Boot */
+   timebase-frequency = 0; /* Filled in by U-Boot */
+   i-cache-line-size = 20;
+   d-cache-line-size = 20;
+   i-cache-size = 8000;
+   d-cache-size = 8000;
+   dcr-controller;
+   dcr-access-method = native;
+   };
+   };
+
+   memory {
+   device_type = memory;
+   reg = 0 0 0; /* Filled in by U-Boot */
+   };
+
+   UIC0: interrupt-controller0 {
+   compatible = ibm,uic-460sx,ibm,uic;
+   interrupt-controller;
+   cell-index = 0;
+   dcr-reg = 0c0 009;
+   #address-cells = 0;
+   #size-cells = 0;
+   #interrupt-cells = 2;
+   };
+
+   UIC1: interrupt-controller1 {
+   compatible = ibm,uic-460sx,ibm,uic;
+   interrupt-controller;
+   cell-index = 1;
+   dcr-reg = 0d0 009;
+   #address-cells = 0;
+   #size-cells = 0;
+   #interrupt-cells = 2;
+   interrupts = 1e 4 1f 4; /* cascade */
+   interrupt-parent = UIC0;
+   };
+
+   UIC2: interrupt-controller2 {
+   compatible = ibm,uic-460sx,ibm,uic;
+   interrupt-controller;
+   cell-index = 2;
+   dcr-reg = 0e0 009;
+   #address-cells = 0;
+   #size-cells = 0;
+   #interrupt-cells = 2;
+   interrupts = a 4 b 4; /* cascade */
+   interrupt-parent = UIC0;
+   };
+
+   UIC3: interrupt-controller3 {
+   compatible = ibm,uic-460sx,ibm,uic;
+   interrupt-controller;
+   cell-index = 3;
+   dcr-reg = 0f0 009;
+   #address-cells = 0;
+   #size-cells = 0;
+   #interrupt-cells = 2;
+   interrupts = 10 4 11 4; /* cascade */
+   interrupt-parent = UIC0;
+   };
+
+   SDR0: sdr {
+   compatible = ibm,sdr-460sx;
+   dcr-reg = 00e 002;
+   };
+
+   CPR0: cpr {
+   compatible = ibm,cpr-460sx;
+   dcr-reg = 00c 002;
+   };
+   plb {
+   compatible = ibm,plb-460sx, ibm,plb4;
+   #address-cells = 2;
+   #size-cells = 1;
+   ranges;
+   clock-frequency = 0; /* Filled in by U-Boot */
+
+   SDRAM0: sdram {
+   compatible = ibm,sdram-460sx, ibm,sdram-405gp;
+   dcr-reg = 010 2;
+   };
+
+   MAL0: mcmal {
+   compatible = ibm,mcmal-460sx, ibm,mcmal2;
+   dcr-reg = 180 62;
+  

Re: [PATCH] Add_460SX_Initial_Framework

2008-12-01 Thread Josh Boyer
On Mon, Dec 01, 2008 at 03:37:15PM -0800, [EMAIL PROTECTED] wrote:
From: Madhulika Madishetty [EMAIL PROTECTED]

This patch contains the initial framework for AMCC Redwood board.

Signed-off-by: Madhulika Madishetty [EMAIL PROTECTED], Tirumala Reddy 
Marri [EMAIL PROTECTED],
Feng Kan [EMAIL PROTECTED], Vidhyananth Venkatasamy [EMAIL PROTECTED], 
Preetesh Parekh [EMAIL PROTECTED]
Acked-by: Loc Ho [EMAIL PROTECTED], Feng Kan [EMAIL PROTECTED]

One Signed-off-by: per person, per line please.  Don't use a single
with multiple names.

---
 arch/powerpc/boot/dts/redwood_amcc.dts |  247 +++
 arch/powerpc/configs/44x/redwood_defconfig | 1082 


Parts of your patch are word-wrapped.

diff --git a/arch/powerpc/boot/dts/redwood_amcc.dts 
b/arch/powerpc/boot/dts/redwood_amcc.dts
new file mode 100644
index 000..e4f5efd
--- /dev/null
+++ b/arch/powerpc/boot/dts/redwood_amcc.dts

Any particular reason you chose to call this redwood_amcc.dts?  None
of the other boards do that.

Also, what possessed AMCC to create an entirely new board called
Redwood when there is already a 4xx board called Redwood?  I realize
this isn't really something you can control, and the old board isn't
supported any longer, but still...  yell at your marketing people or
something :).

@@ -0,0 +1,247 @@
+/*
+ * Device Tree Source for AMCC Redwood(460SX)
+ *
+ * Copyright 2008 AMCC [EMAIL PROTECTED]
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed as is without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;

If this is really a dts-v1, I would expect all the values here to
look differently.  See below.

+
+/ {
+  #address-cells = 2;
+  #size-cells = 1;
+  model = amcc,redwood;
+  compatible = amcc,redwood;
+  dcr-parent = /cpus/[EMAIL PROTECTED];
+
+  aliases {
+  ethernet0 = EMAC0;
+  serial0 = UART0;
+  };
+
+  cpus {
+  #address-cells = 1;
+  #size-cells = 0;
+
+  [EMAIL PROTECTED] {
+  device_type = cpu;
+  model = PowerPC,460SX;
+  reg = 0;
+  clock-frequency = 0; /* Filled in by U-Boot */
+  timebase-frequency = 0; /* Filled in by U-Boot */
+  i-cache-line-size = 20;
+  d-cache-line-size = 20;

Here.  You have a i/d-cache line size of 20 bytes?  That's odd...

+  i-cache-size = 8000;
+  d-cache-size = 8000;

And you have a cache size of 8000 bytes?  Also odd.  I would expect these
lines to look like:

i-cache-line-size = 0x20;
i-cache-size = 0x8000;

or
i-cache-line-size = 32;
i-cache-size = 32768;

Please go through and verify all the values are properly filled out.  I'm
not even sure how this works with newer dtc versions.

+  dcr-controller;
+  dcr-access-method = native;
+  };
+  };
+
+  memory {
+  device_type = memory;
+  reg = 0 0 0; /* Filled in by U-Boot */
+  };
+
+  UIC0: interrupt-controller0 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 0;
+  dcr-reg = 0c0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  };
+
+  UIC1: interrupt-controller1 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 1;
+  dcr-reg = 0d0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  interrupts = 1e 4 1f 4; /* cascade */
+  interrupt-parent = UIC0;
+  };
+
+  UIC2: interrupt-controller2 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 2;
+  dcr-reg = 0e0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  interrupts = a 4 b 4; /* cascade */
+  interrupt-parent = UIC0;
+  };
+
+  UIC3: interrupt-controller3 {
+  compatible = ibm,uic-460sx,ibm,uic;
+  interrupt-controller;
+  cell-index = 3;
+  dcr-reg = 0f0 009;
+  #address-cells = 0;
+  #size-cells = 0;
+  #interrupt-cells = 2;
+  interrupts = 10 4 11 4; /* cascade */
+  interrupt-parent = UIC0;
+  };
+
+  SDR0: sdr {
+  compatible = ibm,sdr-460sx;
+  dcr-reg = 00e 002;
+  };
+
+  CPR0: cpr {
+  compatible = ibm,cpr-460sx;
+  dcr-reg = 00c 002;
+  };
+