[PATCH] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
From: Alastair D'Silva Heads Up: This patch cannot be submitted to Linus's tree, as the affected assembler functions have already been converted to C. When calling flush_(inval_)dcache_range with a size >4GB, we were masking off the upper 32 bits, so we would incorrectly flush a range smaller than intended. This patch replaces the 32 bit shifts with 64 bit ones, so that the full size is accounted for. Signed-off-by: Alastair D'Silva --- arch/powerpc/kernel/misc_64.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S index 1ad4089dd110..d4d096f80f4b 100644 --- a/arch/powerpc/kernel/misc_64.S +++ b/arch/powerpc/kernel/misc_64.S @@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range) subfr8,r6,r4/* compute length */ add r8,r8,r5/* ensure we get enough */ lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */ - srw.r8,r8,r9/* compute line count */ + srd.r8,r8,r9/* compute line count */ beqlr /* nothing to do? */ mtctr r8 0: dcbst 0,r6 @@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range) subfr8,r6,r4/* compute length */ add r8,r8,r5/* ensure we get enough */ lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */ - srw.r8,r8,r9/* compute line count */ + srd.r8,r8,r9/* compute line count */ beqlr /* nothing to do? */ sync isync -- 2.21.0
Re: [PATCH] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
On Thu, Aug 15, 2019 at 02:55:42PM +1000, Alastair D'Silva wrote: > From: Alastair D'Silva > > Heads Up: This patch cannot be submitted to Linus's tree, as the affected > assembler functions have already been converted to C. > > When calling flush_(inval_)dcache_range with a size >4GB, we were masking > off the upper 32 bits, so we would incorrectly flush a range smaller > than intended. > > This patch replaces the 32 bit shifts with 64 bit ones, so that > the full size is accounted for. > > Signed-off-by: Alastair D'Silva > --- > arch/powerpc/kernel/misc_64.S | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) This is not the correct way to submit patches for inclusion in the stable kernel tree. Please read: https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html for how to do this properly.
Re: [PATCH] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
Greg Kroah-Hartman writes:
> On Thu, Aug 15, 2019 at 02:55:42PM +1000, Alastair D'Silva wrote:
>> From: Alastair D'Silva
>>
>> Heads Up: This patch cannot be submitted to Linus's tree, as the affected
>> assembler functions have already been converted to C.
That was done in upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
Which is a larger change that we don't want to backport. This patch is a
minimal fix for stable trees.
>> When calling flush_(inval_)dcache_range with a size >4GB, we were masking
>> off the upper 32 bits, so we would incorrectly flush a range smaller
>> than intended.
>>
>> This patch replaces the 32 bit shifts with 64 bit ones, so that
>> the full size is accounted for.
>>
>> Signed-off-by: Alastair D'Silva
>> ---
>> arch/powerpc/kernel/misc_64.S | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Michael Ellerman
>
>
> This is not the correct way to submit patches for inclusion in the
> stable kernel tree. Please read:
> https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> for how to do this properly.
>
>
Hi Greg,
This is "option 3", submit the patch directly, and the patch "deviates
from the original upstream patch" because the upstream patch was a
wholesale conversion from asm to C.
This patch applies cleanly to v4.14 and v4.19.
The change log should have mentioned which upstream patch it is not a
backport of, is there anything else we should have done differently to
avoid the formletter bot :)
cheers
Re: [PATCH] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
On Fri, Aug 16, 2019 at 11:42:22AM +1000, Michael Ellerman wrote:
> Greg Kroah-Hartman writes:
> > On Thu, Aug 15, 2019 at 02:55:42PM +1000, Alastair D'Silva wrote:
> >> From: Alastair D'Silva
> >>
> >> Heads Up: This patch cannot be submitted to Linus's tree, as the affected
> >> assembler functions have already been converted to C.
>
> That was done in upstream commit:
>
> 22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
>
> Which is a larger change that we don't want to backport. This patch is a
> minimal fix for stable trees.
>
>
> >> When calling flush_(inval_)dcache_range with a size >4GB, we were masking
> >> off the upper 32 bits, so we would incorrectly flush a range smaller
> >> than intended.
> >>
> >> This patch replaces the 32 bit shifts with 64 bit ones, so that
> >> the full size is accounted for.
> >>
> >> Signed-off-by: Alastair D'Silva
> >> ---
> >> arch/powerpc/kernel/misc_64.S | 4 ++--
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> Acked-by: Michael Ellerman
>
> >
> >
> > This is not the correct way to submit patches for inclusion in the
> > stable kernel tree. Please read:
> > https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> > for how to do this properly.
> >
> >
>
> Hi Greg,
>
> This is "option 3", submit the patch directly, and the patch "deviates
> from the original upstream patch" because the upstream patch was a
> wholesale conversion from asm to C.
>
> This patch applies cleanly to v4.14 and v4.19.
>
> The change log should have mentioned which upstream patch it is not a
> backport of, is there anything else we should have done differently to
> avoid the formletter bot :)
That is exactly what you should have done. It needs to be VERY explicit
as to why this is being submitted different from what upstream did, and
to what trees it needs to go to and who is going to be responsible for
when it breaks. And it will break :)
thanks,
greg k-h
Re: [PATCH] powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
On Fri, Aug 16, 2019 at 09:14:12AM +0200, Greg Kroah-Hartman wrote:
> On Fri, Aug 16, 2019 at 11:42:22AM +1000, Michael Ellerman wrote:
> > Greg Kroah-Hartman writes:
> > > On Thu, Aug 15, 2019 at 02:55:42PM +1000, Alastair D'Silva wrote:
> > >> From: Alastair D'Silva
> > >>
> > >> Heads Up: This patch cannot be submitted to Linus's tree, as the affected
> > >> assembler functions have already been converted to C.
> >
> > That was done in upstream commit:
> >
> > 22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
> >
> > Which is a larger change that we don't want to backport. This patch is a
> > minimal fix for stable trees.
> >
> >
> > >> When calling flush_(inval_)dcache_range with a size >4GB, we were masking
> > >> off the upper 32 bits, so we would incorrectly flush a range smaller
> > >> than intended.
> > >>
> > >> This patch replaces the 32 bit shifts with 64 bit ones, so that
> > >> the full size is accounted for.
> > >>
> > >> Signed-off-by: Alastair D'Silva
> > >> ---
> > >> arch/powerpc/kernel/misc_64.S | 4 ++--
> > >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > Acked-by: Michael Ellerman
> >
> > >
> > >
> > > This is not the correct way to submit patches for inclusion in the
> > > stable kernel tree. Please read:
> > >
> > > https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html
> > > for how to do this properly.
> > >
> > >
> >
> > Hi Greg,
> >
> > This is "option 3", submit the patch directly, and the patch "deviates
> > from the original upstream patch" because the upstream patch was a
> > wholesale conversion from asm to C.
> >
> > This patch applies cleanly to v4.14 and v4.19.
> >
> > The change log should have mentioned which upstream patch it is not a
> > backport of, is there anything else we should have done differently to
> > avoid the formletter bot :)
>
> That is exactly what you should have done. It needs to be VERY explicit
> as to why this is being submitted different from what upstream did, and
> to what trees it needs to go to and who is going to be responsible for
> when it breaks. And it will break :)
And it needs to be done before I can apply it, I've dropped this thread
from my queue now.
thanks,
greg k-h
Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.14-stable tree
This is a note to let you know that I've just added the patch titled
powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
to the 4.14-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
and it can be found in the queue-4.14 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From alast...@au1.ibm.com Tue Aug 27 08:18:42 2019
From: "Alastair D'Silva"
Date: Wed, 21 Aug 2019 10:19:27 +1000
Subject: powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
To: alast...@d-silva.org
Cc: sta...@vger.kernel.org, Benjamin Herrenschmidt ,
Paul Mackerras , Michael Ellerman ,
Thomas Gleixner , Greg Kroah-Hartman
, Allison Randal ,
linuxppc-dev@lists.ozlabs.org, linux-ker...@vger.kernel.org
Message-ID: <20190821001929.4253-1-alast...@au1.ibm.com>
From: Alastair D'Silva
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.
This patch applies cleanly to v5.2, v4.19 & v4.14.
When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Signed-off-by: Alastair D'Silva
Acked-by: Michael Ellerman
Signed-off-by: Greg Kroah-Hartman
---
arch/powerpc/kernel/misc_64.S |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -134,7 +134,7 @@ _GLOBAL_TOC(flush_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block
size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
mtctr r8
0: dcbst 0,r6
@@ -190,7 +190,7 @@ _GLOBAL(flush_inval_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
sync
isync
Patches currently in stable-queue which might be from alast...@au1.ibm.com are
queue-4.14/powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 4.19-stable tree
This is a note to let you know that I've just added the patch titled
powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
to the 4.19-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
and it can be found in the queue-4.19 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From alast...@au1.ibm.com Tue Aug 27 08:18:42 2019
From: "Alastair D'Silva"
Date: Wed, 21 Aug 2019 10:19:27 +1000
Subject: powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
To: alast...@d-silva.org
Cc: sta...@vger.kernel.org, Benjamin Herrenschmidt ,
Paul Mackerras , Michael Ellerman ,
Thomas Gleixner , Greg Kroah-Hartman
, Allison Randal ,
linuxppc-dev@lists.ozlabs.org, linux-ker...@vger.kernel.org
Message-ID: <20190821001929.4253-1-alast...@au1.ibm.com>
From: Alastair D'Silva
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.
This patch applies cleanly to v5.2, v4.19 & v4.14.
When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Signed-off-by: Alastair D'Silva
Acked-by: Michael Ellerman
Signed-off-by: Greg Kroah-Hartman
---
arch/powerpc/kernel/misc_64.S |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -135,7 +135,7 @@ _GLOBAL_TOC(flush_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block
size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
mtctr r8
0: dcbst 0,r6
@@ -153,7 +153,7 @@ _GLOBAL(flush_inval_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
sync
isync
Patches currently in stable-queue which might be from alast...@au1.ibm.com are
queue-4.19/powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
Patch "powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB" has been added to the 5.2-stable tree
This is a note to let you know that I've just added the patch titled
powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
to the 5.2-stable tree which can be found at:
http://www.kernel.org/git/?p=linux/kernel/git/stable/stable-queue.git;a=summary
The filename of the patch is:
powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
and it can be found in the queue-5.2 subdirectory.
If you, or anyone else, feels it should not be added to the stable tree,
please let know about it.
>From alast...@au1.ibm.com Tue Aug 27 08:18:42 2019
From: "Alastair D'Silva"
Date: Wed, 21 Aug 2019 10:19:27 +1000
Subject: powerpc: Allow flush_(inval_)dcache_range to work across ranges >4GB
To: alast...@d-silva.org
Cc: sta...@vger.kernel.org, Benjamin Herrenschmidt ,
Paul Mackerras , Michael Ellerman ,
Thomas Gleixner , Greg Kroah-Hartman
, Allison Randal ,
linuxppc-dev@lists.ozlabs.org, linux-ker...@vger.kernel.org
Message-ID: <20190821001929.4253-1-alast...@au1.ibm.com>
From: Alastair D'Silva
The upstream commit:
22e9c88d486a ("powerpc/64: reuse PPC32 static inline flush_dcache_range()")
has a similar effect, but since it is a rewrite of the assembler to C, is
too invasive for stable. This patch is a minimal fix to address the issue in
assembler.
This patch applies cleanly to v5.2, v4.19 & v4.14.
When calling flush_(inval_)dcache_range with a size >4GB, we were masking
off the upper 32 bits, so we would incorrectly flush a range smaller
than intended.
This patch replaces the 32 bit shifts with 64 bit ones, so that
the full size is accounted for.
Signed-off-by: Alastair D'Silva
Acked-by: Michael Ellerman
Signed-off-by: Greg Kroah-Hartman
---
arch/powerpc/kernel/misc_64.S |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -130,7 +130,7 @@ _GLOBAL_TOC(flush_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block
size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
mtctr r8
0: dcbst 0,r6
@@ -148,7 +148,7 @@ _GLOBAL(flush_inval_dcache_range)
subfr8,r6,r4/* compute length */
add r8,r8,r5/* ensure we get enough */
lwz r9,DCACHEL1LOGBLOCKSIZE(r10)/* Get log-2 of dcache block size */
- srw.r8,r8,r9/* compute line count */
+ srd.r8,r8,r9/* compute line count */
beqlr /* nothing to do? */
sync
isync
Patches currently in stable-queue which might be from alast...@au1.ibm.com are
queue-5.2/powerpc-allow-flush_-inval_-dcache_range-to-work-across-ranges-4gb.patch
