Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-27 Thread Simon Guo 
Hi Paul,
On Tue, Jan 23, 2018 at 04:38:32PM +1100, Paul Mackerras wrote:
> On Thu, Jan 11, 2018 at 06:11:13PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo 
> > 
> > In current days, many OS distributions have utilized transaction
> > memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> > does not.
> > 
> > The drive for the transaction memory support of PR KVM is the
> > openstack Continuous Integration testing - They runs a HV(hypervisor)
> > KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> > 
> > This patch set add transaction memory support on PR KVM.
> 
> Thanks for the patch set.  It mostly looks good, though I have some
> comments on the individual patches.
> 
> I don't see where you are implementing support for userspace accessing
> the TM checkpointed register values using the GET_ONE_REG/SET_ONE_REG
> API.  This would mean that you couldn't migrate a guest that was in
> the middle of a transaction.  We will need to have the one_reg API
> access to the TM checkpoint implemented, though there will be a
> difficulty in that kvmppc_get_one_reg() and kvmppc_set_one_reg() are
> called with the vcpu context loaded.  With your scheme of having the
> TM checkpoint stored in the CPU while the vcpu context is loaded, the
> values you want to access in kvmppc_get/set_one_reg are inaccessible
> since they're stored in the CPU.  You would have to arrange for
> kvmppc_get/set_one_reg to be called without the vcpu context loaded
> (recent patches in the kvm next branch probably make that easier) or
> else explicitly unload and reload the vcpu context in those functions.
> (This is easier in HV KVM since the checkpoint is not in the CPU at
> the point of doing kvmppc_get/set_one_reg.)
Thanks for point it out. I didn't think about it before and will 
investigate. 

I plan to work out this PR KVM HTM kvmppc_get/set_one_reg() 
(and the KVM_SET_REGS you mentioned in another mail) with seperate 
patch/patch set, so that the reworked V2 of current patches can be 
sent out in parallel. In case it is not appropriate for you, please 
let me know.

> 
> There is also complexity added because it's possible for the guest to
> have TM, FP, VEC and VSX all enabled from its point of view but to
> have FP/VEC/VSX not actually enabled in the hardware when the guest is
> running.  As you note in your patch descriptions, this means that the
> guest can do tbegin and create a checkpoint with bogus values for the
> FP/VEC/VSX registers.  Rather than trying to detect and fix up this
> situation after the fact, I would suggest that if the guest has TM
> enabled then we make sure that the real FP/VEC/VSX bits in the MSR
> match what the guest thinks it has.  That way we would avoid the bogus
> checkpoint problem.  (There is still the possibility of getting bogus
> checkpointed FP/VEC/VSX registers if the guest does tbegin with the
> FP/VEC/VSX bits clear in the MSR, but that is the guest's problem to
> deal with.)
Good idea. I will look into kvmppc_set_msr_pr() / kvmppc_giveup_ext()
to simplify the solution.

Thanks for your review and time.

BR,
- Simon

Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-22 Thread Paul Mackerras 
On Tue, Jan 23, 2018 at 04:38:32PM +1100, Paul Mackerras wrote:
> On Thu, Jan 11, 2018 at 06:11:13PM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo 
> > 
> > In current days, many OS distributions have utilized transaction
> > memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> > does not.
> > 
> > The drive for the transaction memory support of PR KVM is the
> > openstack Continuous Integration testing - They runs a HV(hypervisor)
> > KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> > 
> > This patch set add transaction memory support on PR KVM.
> 
> Thanks for the patch set.  It mostly looks good, though I have some
> comments on the individual patches.
> 
> I don't see where you are implementing support for userspace accessing
> the TM checkpointed register values using the GET_ONE_REG/SET_ONE_REG
> API.  This would mean that you couldn't migrate a guest that was in
> the middle of a transaction.  We will need to have the one_reg API
> access to the TM checkpoint implemented, though there will be a
> difficulty in that kvmppc_get_one_reg() and kvmppc_set_one_reg() are
> called with the vcpu context loaded.  With your scheme of having the
> TM checkpoint stored in the CPU while the vcpu context is loaded, the
> values you want to access in kvmppc_get/set_one_reg are inaccessible
> since they're stored in the CPU.  You would have to arrange for
> kvmppc_get/set_one_reg to be called without the vcpu context loaded
> (recent patches in the kvm next branch probably make that easier) or
> else explicitly unload and reload the vcpu context in those functions.
> (This is easier in HV KVM since the checkpoint is not in the CPU at
> the point of doing kvmppc_get/set_one_reg.)

Another complexity that hasn't been dealt with as far as I can see is
that if userspace does a KVM_SET_REGS that changes the TS field in the
guest MSR, we don't do anything to make the state of the CPU match.
As with GET/SET_ONE_REG, KVM_SET_REGS is called with the vcpu loaded,
so it needs to make the physical CPU state match what it would have
been had the new state been present at load time, perhaps by unloading
the CPU before changing the state, then reloading it.  But if you do
that and you are using the vcpu->arch.save_msr_tm field that you add,
then you need to modify that when you do kvmppc_set_msr().  (I would
rather that your save/restore TM functions work off kvmppc_get_msr()
rather than having the save_msr_tm field.)

Paul.

Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-22 Thread Paul Mackerras 
On Thu, Jan 11, 2018 at 06:11:13PM +0800, wei.guo.si...@gmail.com wrote:
> From: Simon Guo 
> 
> In current days, many OS distributions have utilized transaction
> memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> does not.
> 
> The drive for the transaction memory support of PR KVM is the
> openstack Continuous Integration testing - They runs a HV(hypervisor)
> KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> 
> This patch set add transaction memory support on PR KVM.

Thanks for the patch set.  It mostly looks good, though I have some
comments on the individual patches.

I don't see where you are implementing support for userspace accessing
the TM checkpointed register values using the GET_ONE_REG/SET_ONE_REG
API.  This would mean that you couldn't migrate a guest that was in
the middle of a transaction.  We will need to have the one_reg API
access to the TM checkpoint implemented, though there will be a
difficulty in that kvmppc_get_one_reg() and kvmppc_set_one_reg() are
called with the vcpu context loaded.  With your scheme of having the
TM checkpoint stored in the CPU while the vcpu context is loaded, the
values you want to access in kvmppc_get/set_one_reg are inaccessible
since they're stored in the CPU.  You would have to arrange for
kvmppc_get/set_one_reg to be called without the vcpu context loaded
(recent patches in the kvm next branch probably make that easier) or
else explicitly unload and reload the vcpu context in those functions.
(This is easier in HV KVM since the checkpoint is not in the CPU at
the point of doing kvmppc_get/set_one_reg.)

There is also complexity added because it's possible for the guest to
have TM, FP, VEC and VSX all enabled from its point of view but to
have FP/VEC/VSX not actually enabled in the hardware when the guest is
running.  As you note in your patch descriptions, this means that the
guest can do tbegin and create a checkpoint with bogus values for the
FP/VEC/VSX registers.  Rather than trying to detect and fix up this
situation after the fact, I would suggest that if the guest has TM
enabled then we make sure that the real FP/VEC/VSX bits in the MSR
match what the guest thinks it has.  That way we would avoid the bogus
checkpoint problem.  (There is still the possibility of getting bogus
checkpointed FP/VEC/VSX registers if the guest does tbegin with the
FP/VEC/VSX bits clear in the MSR, but that is the guest's problem to
deal with.)

Paul.

Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-11 Thread Simon Guo 
Hi Gustavo,
On Thu, Jan 11, 2018 at 11:56:59AM -0200, Gustavo Romero wrote:
> Hi Simon,
> 
> On 01/11/2018 08:11 AM, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo 
> > 
> > In current days, many OS distributions have utilized transaction
> > memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> > does not.
> > 
> > The drive for the transaction memory support of PR KVM is the
> > openstack Continuous Integration testing - They runs a HV(hypervisor)
> > KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> > 
> > This patch set add transaction memory support on PR KVM.
> 
> Is this correct to assume that this emulation mode will just kick in on P9
> with kernel TM workarounds and HV KVM will continue to be used on POWER8
> since HV KVM is supported on POWER8 hosts?

As Ben mentioned, this patch set aims to enhancement PR KVM on Power8
to support transaction memory.

Thanks,
- Simon

> 
> 
> Regards,
> Gustavo
> 
> > Test cases performed:
> > linux/tools/testing/selftests/powerpc/tm/tm-syscall
> > linux/tools/testing/selftests/powerpc/tm/tm-fork
> > linux/tools/testing/selftests/powerpc/tm/tm-vmx-unavail
> > linux/tools/testing/selftests/powerpc/tm/tm-tmspr
> > linux/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv
> > linux/tools/testing/selftests/powerpc/math/vsx_preempt
> > linux/tools/testing/selftests/powerpc/math/fpu_signal
> > linux/tools/testing/selftests/powerpc/math/vmx_preempt
> > linux/tools/testing/selftests/powerpc/math/fpu_syscall
> > linux/tools/testing/selftests/powerpc/math/vmx_syscall
> > linux/tools/testing/selftests/powerpc/math/fpu_preempt
> > linux/tools/testing/selftests/powerpc/math/vmx_signal
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx
> > https://github.com/justdoitqd/publicFiles/blob/master/test_tbegin_pr.c
> > https://github.com/justdoitqd/publicFiles/blob/master/test_tabort.c
> > https://github.com/justdoitqd/publicFiles/blob/master/test_kvm_htm_cap.c
> > 
> > Simon Guo (25):
> >   KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate
> > file
> >   KVM: PPC: Book3S PR: add new parameter (guest MSR) for
> > kvmppc_save_tm()/kvmppc_restore_tm()
> >   KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm()
> >   KVM: PPC: Book3S PR: add C function wrapper for
> > _kvmppc_save/restore_tm()
> >   KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when
> > inject an interrupt.
> >   KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr.
> >   KVM: PPC: Book3S PR: add TEXASR related macros
> >   KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state
> > guest
> >   KVM: PPC: Book3S PR: implement RFID TM behavior to suppress change
> > from S0 to N0
> >   KVM: PPC: Book3S PR: set MSR HV bit accordingly for PPC970 and others.
> >   KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr()
> >   powerpc: export symbol msr_check_and_set().
> >   KVM: PPC: Book3S PR: adds new
> > kvmppc_copyto_vcpu_tm/kvmppc_copyfrom_vcpu_tm API for PR KVM.
> >   KVM: PPC: Book3S PR: export tm_enable()/tm_disable/tm_abort() APIs
> >   KVM: PPC: Book3S PR: add kvmppc_save/restore_tm_sprs() APIs
> >   KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for
> > PR KVM
> >   KVM: PPC: Book3S PR: add math support for PR KVM HTM
> >   KVM: PPC: Book3S PR: make mtspr/mfspr emulation behavior based on
> > active TM SPRs
> >   KVM: PPC: Book3S PR: always fail transaction in guest privilege state
> >   KVM: PPC: Book3S PR: enable NV reg restore for reading TM SPR at guest
> > privilege state
> >   KVM: PPC: Book3S PR: adds emulation for treclaim.
> >   KVM: PPC: Book3S PR: add emulation for trechkpt in PR KVM.
> >   KVM: PPC: Book3S PR: add emulation for tabort. for privilege guest
> >   KVM: PPC: Book3S PR: add guard code to prevent returning to guest with
> > PR=0 and Transactional state
> >   KVM: PPC: Book3S PR: enable HTM for PR KVM for KVM_CHECK_EXTENSION
> > ioctl
> > 
> >  arch/powerpc/include/asm/asm-prototypes.h   |  10 +
> >  arch/powerpc/include/asm/kvm_book3s.h   |   8 +
> >  arch/powerpc/include/asm/kvm_host.h |   3 +
> >  arch/powerpc/include/asm/reg.h  |  25 +-
> >  arch/powerpc/include/asm/tm.h   |   2 -
> >  arch/powerpc/include/uapi/asm/tm.h  |   2 +-
> >  arch/powerpc/kernel/process.c   |   1 +
> >  arch/powerpc/kernel/tm.S|  12 +
> >  arch/powerpc/kvm/Makefile   |   3 +
> >  arch/powerpc/kvm/book3s.h   |   1 +
> >  arch/powerpc/kvm/book3s_64_mmu.c|  11 +-
> >  arch/powerpc/kvm/book3s_emulate.c   |

Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-11 Thread Benjamin Herrenschmidt 
On Thu, 2018-01-11 at 11:56 -0200, Gustavo Romero wrote:
> Hi Simon,
> 
> On 01/11/2018 08:11 AM, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo 
> > 
> > In current days, many OS distributions have utilized transaction
> > memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> > does not.
> > 
> > The drive for the transaction memory support of PR KVM is the
> > openstack Continuous Integration testing - They runs a HV(hypervisor)
> > KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> > 
> > This patch set add transaction memory support on PR KVM.
> 
> Is this correct to assume that this emulation mode will just kick in on P9
> with kernel TM workarounds and HV KVM will continue to be used on POWER8
> since HV KVM is supported on POWER8 hosts?

HV KVM is supported on POWER9. In fact it's PR KVM that isn't (at least
not yet and never will be in Radix mode at least).

Cheers,
Ben.

> 
> 
> Regards,
> Gustavo
> 
> > Test cases performed:
> > linux/tools/testing/selftests/powerpc/tm/tm-syscall
> > linux/tools/testing/selftests/powerpc/tm/tm-fork
> > linux/tools/testing/selftests/powerpc/tm/tm-vmx-unavail
> > linux/tools/testing/selftests/powerpc/tm/tm-tmspr
> > linux/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv
> > linux/tools/testing/selftests/powerpc/math/vsx_preempt
> > linux/tools/testing/selftests/powerpc/math/fpu_signal
> > linux/tools/testing/selftests/powerpc/math/vmx_preempt
> > linux/tools/testing/selftests/powerpc/math/fpu_syscall
> > linux/tools/testing/selftests/powerpc/math/vmx_syscall
> > linux/tools/testing/selftests/powerpc/math/fpu_preempt
> > linux/tools/testing/selftests/powerpc/math/vmx_signal
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr
> > linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx
> > https://github.com/justdoitqd/publicFiles/blob/master/test_tbegin_pr.c
> > https://github.com/justdoitqd/publicFiles/blob/master/test_tabort.c
> > https://github.com/justdoitqd/publicFiles/blob/master/test_kvm_htm_cap.c
> > 
> > Simon Guo (25):
> >   KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate
> > file
> >   KVM: PPC: Book3S PR: add new parameter (guest MSR) for
> > kvmppc_save_tm()/kvmppc_restore_tm()
> >   KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm()
> >   KVM: PPC: Book3S PR: add C function wrapper for
> > _kvmppc_save/restore_tm()
> >   KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when
> > inject an interrupt.
> >   KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr.
> >   KVM: PPC: Book3S PR: add TEXASR related macros
> >   KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state
> > guest
> >   KVM: PPC: Book3S PR: implement RFID TM behavior to suppress change
> > from S0 to N0
> >   KVM: PPC: Book3S PR: set MSR HV bit accordingly for PPC970 and others.
> >   KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr()
> >   powerpc: export symbol msr_check_and_set().
> >   KVM: PPC: Book3S PR: adds new
> > kvmppc_copyto_vcpu_tm/kvmppc_copyfrom_vcpu_tm API for PR KVM.
> >   KVM: PPC: Book3S PR: export tm_enable()/tm_disable/tm_abort() APIs
> >   KVM: PPC: Book3S PR: add kvmppc_save/restore_tm_sprs() APIs
> >   KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for
> > PR KVM
> >   KVM: PPC: Book3S PR: add math support for PR KVM HTM
> >   KVM: PPC: Book3S PR: make mtspr/mfspr emulation behavior based on
> > active TM SPRs
> >   KVM: PPC: Book3S PR: always fail transaction in guest privilege state
> >   KVM: PPC: Book3S PR: enable NV reg restore for reading TM SPR at guest
> > privilege state
> >   KVM: PPC: Book3S PR: adds emulation for treclaim.
> >   KVM: PPC: Book3S PR: add emulation for trechkpt in PR KVM.
> >   KVM: PPC: Book3S PR: add emulation for tabort. for privilege guest
> >   KVM: PPC: Book3S PR: add guard code to prevent returning to guest with
> > PR=0 and Transactional state
> >   KVM: PPC: Book3S PR: enable HTM for PR KVM for KVM_CHECK_EXTENSION
> > ioctl
> > 
> >  arch/powerpc/include/asm/asm-prototypes.h   |  10 +
> >  arch/powerpc/include/asm/kvm_book3s.h   |   8 +
> >  arch/powerpc/include/asm/kvm_host.h |   3 +
> >  arch/powerpc/include/asm/reg.h  |  25 +-
> >  arch/powerpc/include/asm/tm.h   |   2 -
> >  arch/powerpc/include/uapi/asm/tm.h  |   2 +-
> >  arch/powerpc/kernel/process.c   |   1 +
> >  arch/powerpc/kernel/tm.S|  12 +
> >  arch/powerpc/kvm/Makefile   |   3 +
> >  arch/powerpc/kvm/book3s.h   |   1 +
> >  arch/powerpc/kvm/book3s_64_mmu.c|  11 +-
> >  arch/powerpc/kvm/book3s_emulate.c   |

Re: [PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-11 Thread Gustavo Romero 
Hi Simon,

On 01/11/2018 08:11 AM, wei.guo.si...@gmail.com wrote:
> From: Simon Guo 
> 
> In current days, many OS distributions have utilized transaction
> memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
> does not.
> 
> The drive for the transaction memory support of PR KVM is the
> openstack Continuous Integration testing - They runs a HV(hypervisor)
> KVM(as level 1) and then run PR KVM(as level 2) on top of that.
> 
> This patch set add transaction memory support on PR KVM.

Is this correct to assume that this emulation mode will just kick in on P9
with kernel TM workarounds and HV KVM will continue to be used on POWER8
since HV KVM is supported on POWER8 hosts?


Regards,
Gustavo

> Test cases performed:
> linux/tools/testing/selftests/powerpc/tm/tm-syscall
> linux/tools/testing/selftests/powerpc/tm/tm-fork
> linux/tools/testing/selftests/powerpc/tm/tm-vmx-unavail
> linux/tools/testing/selftests/powerpc/tm/tm-tmspr
> linux/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv
> linux/tools/testing/selftests/powerpc/math/vsx_preempt
> linux/tools/testing/selftests/powerpc/math/fpu_signal
> linux/tools/testing/selftests/powerpc/math/vmx_preempt
> linux/tools/testing/selftests/powerpc/math/fpu_syscall
> linux/tools/testing/selftests/powerpc/math/vmx_syscall
> linux/tools/testing/selftests/powerpc/math/fpu_preempt
> linux/tools/testing/selftests/powerpc/math/vmx_signal
> linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr
> linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr
> linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx
> linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr
> linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx
> https://github.com/justdoitqd/publicFiles/blob/master/test_tbegin_pr.c
> https://github.com/justdoitqd/publicFiles/blob/master/test_tabort.c
> https://github.com/justdoitqd/publicFiles/blob/master/test_kvm_htm_cap.c
> 
> Simon Guo (25):
>   KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate
> file
>   KVM: PPC: Book3S PR: add new parameter (guest MSR) for
> kvmppc_save_tm()/kvmppc_restore_tm()
>   KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm()
>   KVM: PPC: Book3S PR: add C function wrapper for
> _kvmppc_save/restore_tm()
>   KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when
> inject an interrupt.
>   KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr.
>   KVM: PPC: Book3S PR: add TEXASR related macros
>   KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state
> guest
>   KVM: PPC: Book3S PR: implement RFID TM behavior to suppress change
> from S0 to N0
>   KVM: PPC: Book3S PR: set MSR HV bit accordingly for PPC970 and others.
>   KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr()
>   powerpc: export symbol msr_check_and_set().
>   KVM: PPC: Book3S PR: adds new
> kvmppc_copyto_vcpu_tm/kvmppc_copyfrom_vcpu_tm API for PR KVM.
>   KVM: PPC: Book3S PR: export tm_enable()/tm_disable/tm_abort() APIs
>   KVM: PPC: Book3S PR: add kvmppc_save/restore_tm_sprs() APIs
>   KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for
> PR KVM
>   KVM: PPC: Book3S PR: add math support for PR KVM HTM
>   KVM: PPC: Book3S PR: make mtspr/mfspr emulation behavior based on
> active TM SPRs
>   KVM: PPC: Book3S PR: always fail transaction in guest privilege state
>   KVM: PPC: Book3S PR: enable NV reg restore for reading TM SPR at guest
> privilege state
>   KVM: PPC: Book3S PR: adds emulation for treclaim.
>   KVM: PPC: Book3S PR: add emulation for trechkpt in PR KVM.
>   KVM: PPC: Book3S PR: add emulation for tabort. for privilege guest
>   KVM: PPC: Book3S PR: add guard code to prevent returning to guest with
> PR=0 and Transactional state
>   KVM: PPC: Book3S PR: enable HTM for PR KVM for KVM_CHECK_EXTENSION
> ioctl
> 
>  arch/powerpc/include/asm/asm-prototypes.h   |  10 +
>  arch/powerpc/include/asm/kvm_book3s.h   |   8 +
>  arch/powerpc/include/asm/kvm_host.h |   3 +
>  arch/powerpc/include/asm/reg.h  |  25 +-
>  arch/powerpc/include/asm/tm.h   |   2 -
>  arch/powerpc/include/uapi/asm/tm.h  |   2 +-
>  arch/powerpc/kernel/process.c   |   1 +
>  arch/powerpc/kernel/tm.S|  12 +
>  arch/powerpc/kvm/Makefile   |   3 +
>  arch/powerpc/kvm/book3s.h   |   1 +
>  arch/powerpc/kvm/book3s_64_mmu.c|  11 +-
>  arch/powerpc/kvm/book3s_emulate.c   | 279 +++-
>  arch/powerpc/kvm/book3s_hv_rmhandlers.S | 259 ++-
>  arch/powerpc/kvm/book3s_pr.c| 256 +--
>  arch/powerpc/kvm/book3s_segment.S   |  13 +
>  arch/powerpc/kvm/powerpc.c  |   3 +-
>  arch/powerpc/kvm/tm.S   | 379 
> 
>

[PATCH 00/26] KVM: PPC: Book3S PR: Transaction memory support on PR KVM

2018-01-11 Thread wei . guo . simon 
From: Simon Guo 

In current days, many OS distributions have utilized transaction
memory functionality. In PowerPC, HV KVM supports TM. But PR KVM
does not.

The drive for the transaction memory support of PR KVM is the
openstack Continuous Integration testing - They runs a HV(hypervisor)
KVM(as level 1) and then run PR KVM(as level 2) on top of that.

This patch set add transaction memory support on PR KVM.

Test cases performed:
linux/tools/testing/selftests/powerpc/tm/tm-syscall
linux/tools/testing/selftests/powerpc/tm/tm-fork
linux/tools/testing/selftests/powerpc/tm/tm-vmx-unavail
linux/tools/testing/selftests/powerpc/tm/tm-tmspr
linux/tools/testing/selftests/powerpc/tm/tm-signal-msr-resv
linux/tools/testing/selftests/powerpc/math/vsx_preempt
linux/tools/testing/selftests/powerpc/math/fpu_signal
linux/tools/testing/selftests/powerpc/math/vmx_preempt
linux/tools/testing/selftests/powerpc/math/fpu_syscall
linux/tools/testing/selftests/powerpc/math/vmx_syscall
linux/tools/testing/selftests/powerpc/math/fpu_preempt
linux/tools/testing/selftests/powerpc/math/vmx_signal
linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr
linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-gpr
linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx
linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-spr
linux/tools/testing/selftests/powerpc/ptrace/ptrace-tm-vsx
https://github.com/justdoitqd/publicFiles/blob/master/test_tbegin_pr.c
https://github.com/justdoitqd/publicFiles/blob/master/test_tabort.c
https://github.com/justdoitqd/publicFiles/blob/master/test_kvm_htm_cap.c

Simon Guo (25):
  KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate
file
  KVM: PPC: Book3S PR: add new parameter (guest MSR) for
kvmppc_save_tm()/kvmppc_restore_tm()
  KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR bits in kvmppc_save_tm()
  KVM: PPC: Book3S PR: add C function wrapper for
_kvmppc_save/restore_tm()
  KVM: PPC: Book3S PR: In PR KVM suspends Transactional state when
inject an interrupt.
  KVM: PPC: Book3S PR: PR KVM pass through MSR TM/TS bits to shadow_msr.
  KVM: PPC: Book3S PR: add TEXASR related macros
  KVM: PPC: Book3S PR: Sync TM bits to shadow msr for problem state
guest
  KVM: PPC: Book3S PR: implement RFID TM behavior to suppress change
from S0 to N0
  KVM: PPC: Book3S PR: set MSR HV bit accordingly for PPC970 and others.
  KVM: PPC: Book3S PR: prevent TS bits change in kvmppc_interrupt_pr()
  powerpc: export symbol msr_check_and_set().
  KVM: PPC: Book3S PR: adds new
kvmppc_copyto_vcpu_tm/kvmppc_copyfrom_vcpu_tm API for PR KVM.
  KVM: PPC: Book3S PR: export tm_enable()/tm_disable/tm_abort() APIs
  KVM: PPC: Book3S PR: add kvmppc_save/restore_tm_sprs() APIs
  KVM: PPC: Book3S PR: add transaction memory save/restore skeleton for
PR KVM
  KVM: PPC: Book3S PR: add math support for PR KVM HTM
  KVM: PPC: Book3S PR: make mtspr/mfspr emulation behavior based on
active TM SPRs
  KVM: PPC: Book3S PR: always fail transaction in guest privilege state
  KVM: PPC: Book3S PR: enable NV reg restore for reading TM SPR at guest
privilege state
  KVM: PPC: Book3S PR: adds emulation for treclaim.
  KVM: PPC: Book3S PR: add emulation for trechkpt in PR KVM.
  KVM: PPC: Book3S PR: add emulation for tabort. for privilege guest
  KVM: PPC: Book3S PR: add guard code to prevent returning to guest with
PR=0 and Transactional state
  KVM: PPC: Book3S PR: enable HTM for PR KVM for KVM_CHECK_EXTENSION
ioctl

 arch/powerpc/include/asm/asm-prototypes.h   |  10 +
 arch/powerpc/include/asm/kvm_book3s.h   |   8 +
 arch/powerpc/include/asm/kvm_host.h |   3 +
 arch/powerpc/include/asm/reg.h  |  25 +-
 arch/powerpc/include/asm/tm.h   |   2 -
 arch/powerpc/include/uapi/asm/tm.h  |   2 +-
 arch/powerpc/kernel/process.c   |   1 +
 arch/powerpc/kernel/tm.S|  12 +
 arch/powerpc/kvm/Makefile   |   3 +
 arch/powerpc/kvm/book3s.h   |   1 +
 arch/powerpc/kvm/book3s_64_mmu.c|  11 +-
 arch/powerpc/kvm/book3s_emulate.c   | 279 +++-
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 259 ++-
 arch/powerpc/kvm/book3s_pr.c| 256 +--
 arch/powerpc/kvm/book3s_segment.S   |  13 +
 arch/powerpc/kvm/powerpc.c  |   3 +-
 arch/powerpc/kvm/tm.S   | 379 
 arch/powerpc/mm/hash_utils_64.c |   1 +
 arch/powerpc/platforms/powernv/copy-paste.h |   3 +-
 19 files changed, 982 insertions(+), 289 deletions(-)
 create mode 100644 arch/powerpc/kvm/tm.S

-- 
1.8.3.1

*** BLURB HERE ***

Simon Guo (26):
  KVM: PPC: Book3S PR: Move kvmppc_save_tm/kvmppc_restore_tm to separate
file
  KVM: PPC: Book3S PR: add new parameter (guest MSR) for
kvmppc_save_tm()/kvmppc_restore_tm()
  KVM: PPC: Book3S PR: turn on FP/VSX/VMX MSR