From: Janani <janan...@linux.vnet.ibm.com>
Code cleanup/fix in perf_event_print_debug(). Performance
Monitoring Unit (PMU) registers in the server side
are 64bit long.
Signed-off-by: Janani <janan...@linux.vnet.ibm.com>
Signed-off-by: Madhavan Srinivasan <ma...@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 4b27caf..36dc23b 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -758,7 +758,7 @@ static void write_pmc(int idx, unsigned long val)
void perf_event_print_debug(void)
{
unsigned long sdar, sier, flags;
- u32 pmcs[MAX_HWEVENTS];
+ unsigned long pmcs[MAX_HWEVENTS];
int i;
if (!ppmu->n_counter)
@@ -775,11 +775,11 @@ void perf_event_print_debug(void)
for (; i < MAX_HWEVENTS; i++)
pmcs[i] = 0xdeadbeef;
- pr_info("PMC1: %08x PMC2: %08x PMC3: %08x PMC4: %08x\n",
+ pr_info("PMC1: %016lx PMC2: %016lx PMC3: %016lx PMC4: %016lx\n",
pmcs[0], pmcs[1], pmcs[2], pmcs[3]);
if (ppmu->n_counter > 4)
- pr_info("PMC5: %08x PMC6: %08x PMC7: %08x PMC8: %08x\n",
+ pr_info("PMC5: %016lx PMC6: %016lx PMC7: %016lx PMC8:
%016lx\n",
pmcs[4], pmcs[5], pmcs[6], pmcs[7]);
pr_info("MMCR0: %016lx MMCR1: %016lx MMCRA: %016lx\n",
--
1.9.1
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