Re: [PATCH V5 23/31] powerpc/mm: Increase the width of #define

[Anshuman Khandual]

On 11/23/2015 03:52 PM, Aneesh Kumar K.V wrote:
> No real change, only style changes

If there are no real changes and it does not help upcoming
patches in the series, should not it just follow patch 17
after all the header movement has been completed before we
get down to real changes. IMHO the sequence of patches
matters.

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[PATCH V5 23/31] powerpc/mm: Increase the width of #define

[Aneesh Kumar K.V]

No real change, only style changes

Acked-by: Scott Wood 
Signed-off-by: Aneesh Kumar K.V 
---
 arch/powerpc/include/asm/book3s/64/hash.h | 26 +-
 1 file changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/hash.h 
b/arch/powerpc/include/asm/book3s/64/hash.h
index d3ed991bdd63..61466fb9fc94 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -69,22 +69,22 @@
  * We could create separate kernel read-only if we used the 3 PP bits
  * combinations that newer processors provide but we currently don't.
  */
-#define _PAGE_PRESENT  0x0001 /* software: pte contains a translation 
*/
-#define _PAGE_USER 0x0002 /* matches one of the PP bits */
+#define _PAGE_PRESENT  0x1 /* software: pte contains a translation 
*/
+#define _PAGE_USER 0x2 /* matches one of the PP bits */
 #define _PAGE_BIT_SWAP_TYPE2
-#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we 
invert) */
-#define _PAGE_GUARDED  0x0008
+#define _PAGE_EXEC 0x4 /* No execute on POWER4 and newer (we 
invert) */
+#define _PAGE_GUARDED  0x8
 /* We can derive Memory coherence from _PAGE_NO_CACHE */
 #define _PAGE_COHERENT 0x0
-#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
-#define _PAGE_WRITETHRU0x0040 /* W: cache write-through */
-#define _PAGE_DIRTY0x0080 /* C: page changed */
-#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
-#define _PAGE_RW   0x0200 /* software: user write access allowed */
-#define _PAGE_HASHPTE  0x0400 /* software: pte has an associated HPTE 
*/
-#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
-#define _PAGE_F_GIX0x7000 /* full page: hidx bits */
-#define _PAGE_F_SECOND 0x8000 /* Whether to use secondary hash or not 
*/
+#define _PAGE_NO_CACHE 0x00020 /* I: cache inhibit */
+#define _PAGE_WRITETHRU0x00040 /* W: cache write-through */
+#define _PAGE_DIRTY0x00080 /* C: page changed */
+#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
+#define _PAGE_RW   0x00200 /* software: user write access allowed 
*/
+#define _PAGE_HASHPTE  0x00400 /* software: pte has an associated HPTE 
*/
+#define _PAGE_BUSY 0x00800 /* software: PTE & hash are busy */
+#define _PAGE_F_GIX0x07000 /* full page: hidx bits */
+#define _PAGE_F_SECOND 0x08000 /* Whether to use secondary hash or not 
*/
 #define _PAGE_SPECIAL  0x1 /* software: special page */
 
 /* No separate kernel read-only */
-- 
2.5.0

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