Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
Quoting Gerhard Sittig (2013-12-10 05:11:33)
> this series improves the previously introduced common clock support for
> MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
> (MPC5125 turned out to be rather different from MPC5121 than I perceived
> before -- there is much more than "just two FECs and no MBX")
>
> thus this series depends on "add COMMON_CLK support for PowerPC MPC512x"
> (v6 sent in <1385851897-23475-1-git-send-email-...@denx.de>, applicable
> on top of v3.13-rc1 or later, currently applied to mpc5xxx -next,
> available at git://git.denx.de/linux-2.6-agust.git next)
>
> this series does not address the issue of outdated or missing device
> tree binding documentation for MPC512x peripherals -- that's the scope
> of a pending separate series
For the three clock patches:
Acked-by: Mike Turquette
>
> v1 initial submission (2013-12-10)
> - enforce an even divider value for SDHC (on all MPC512x variants)
> - tell 5121/5123/5125 SoC variants apart and only register the
> appropriate set of clock items (i.e. refuse to access unused and
> reserved bits, and support those components which are only found on
> MPC5125)
> - update the MPC5125 "tower" board DTS (although the code still works in
> the absence of device tree clock specs)
>
> the series passes 'checkpatch.pl --strict' except for two warnings which
> cannot get fixed because dictates the data type
> and "fixing" the warning would break the build
>
> WARNING: static const char * array should probably be static const char *
> const
> #256: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:500:
> +static const char *parent_names_mux0_spdif[] = {
>
> WARNING: static const char * array should probably be static const char *
> const
> #260: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:504:
> +static const char *parent_names_mux0_canin[] = {
>
> total: 0 errors, 2 warnings, 0 checks, 495 lines checked
>
> the series was build-tested, and was run-tested on the MPC5121 ADS board
>
> Matteo, can you verify the crystal frequency in the DTS update, please?
> And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
> MPC512x plus this series for MPC5125 operate your peripherals, both with
> an updated device tree as well as with a former device tree that lacks
> clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
> .config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
>
> Gerhard Sittig (4):
> powerpc/512x: clk: minor comment updates
> powerpc/512x: clk: enforce even SDHC divider values
> powerpc/512x: clk: support MPC5121/5123/5125 SoC variants
> powerpc/512x: dts: add MPC5125 clock specs
>
> arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++-
> arch/powerpc/include/asm/mpc5121.h|7 +-
> arch/powerpc/platforms/512x/clock-commonclk.c | 369
> +
> include/dt-bindings/clock/mpc512x-clock.h |9 +-
> 4 files changed, 386 insertions(+), 52 deletions(-)
>
> --
> 1.7.10.4
>
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Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
On Tue, 10 Dec 2013 14:11:33 +0100 Gerhard Sittig wrote: ... > Gerhard Sittig (4): > powerpc/512x: clk: minor comment updates > powerpc/512x: clk: enforce even SDHC divider values > powerpc/512x: clk: support MPC5121/5123/5125 SoC variants > powerpc/512x: dts: add MPC5125 clock specs > > arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++- > arch/powerpc/include/asm/mpc5121.h|7 +- > arch/powerpc/platforms/512x/clock-commonclk.c | 369 > + > include/dt-bindings/clock/mpc512x-clock.h |9 +- > 4 files changed, 386 insertions(+), 52 deletions(-) Applied this series to mpc5xxx next. Thanks! Anatolij ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
Scott Wood wrote: On Thu, 2013-12-12 at 18:46 +0100, Sinan Akman wrote: Matteo Facchinetti wrote: [...] - NFC: one of the biggest unsolved mystery Is this ip-core used in others microcontrollers? Seems to be used only in mpc5125!!! I don't think that IP is used in any other FSL SoC. Scott can probably confirm this for us. That's a different part of Freescale, so I don't know much about it, but it looks pretty similar to MXC NAND. Back when those drivers were submitted I tried to get the authors of each to work together to see if a common driver made sense, but I got little response. OK Scott thanks for your comments. I am somewhat deep in 5125 NFC. I will take a look at mxc nand and see how similar they are. Who is maintaining mxc nand ? I might spend some time and create some common components. But right now I am not familiar with mxc nand. Thanks Sinan Akman ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
On Thu, Dec 12, 2013 at 17:12 +0100, Matteo Facchinetti wrote:
>
> On 10/12/2013 14:11, Gerhard Sittig wrote:
> >this series improves the previously introduced common clock support for
> >MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
> >(MPC5125 turned out to be rather different from MPC5121 than I perceived
> >before -- there is much more than "just two FECs and no MBX")
> Ohhh yesss. welcome to hell! :-)
>
> I report also these differences:
>
> - I/O control module:
>to do integration with linux pin-muxing subsystem
>
> - GPIO module:
>controller is the same of the mpc5121 but with these differences:
>- 64 gpios divided in 2 banks
>- input only gpios are numbers form 0 to 3 of the first bank
>I'm finishing to write the patch... when done I'll post in ML
Yes, I've seen the 2x 32bits thing on MPC5125. Can't tell
whether one can just use two mpc8xxx-gpio nodes in the device
tree and be done.
MPC5121 has just one 32bits GPIO bank. And four of those pins
are "GPI only" as well. This may be identical to one of the two
MPC5125 banks.
> - NFC: one of the biggest unsolved mystery
>Is this ip-core used in others microcontrollers? Seems to be
> used only in mpc5125!!!
>
> >
> >Matteo, can you verify the crystal frequency in the DTS update, please?
> Crystal frequency is ok: 33MHz.
great
> >And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
> >MPC512x plus this series for MPC5125 operate your peripherals, both with
> >an updated device tree as well as with a former device tree that lacks
> >clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
> >.config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
> >
> >
> I tested all on TWR board.
Thank you! I think this qualifies as Tested-by: then. :)
> In DTS, for the moment, have to comment out this block:
> -usb@3000 {
> -compatible = "fsl,mpc5121-usb2-dr";
> -reg = <0x3000 0x400>;
> -#address-cells = <1>;
> -#size-cells = <0>;
> -interrupts = <43 0x8>;
> -dr_mode = "host";
> -phy_type = "ulpi";
> -clocks = <&clks MPC512x_CLK_USB1>;
> -clock-names = "ipg";
> -};
> Because USB controller pinout is not initialized correctly and when
> system boot, causes a kernel panic.
>
> For the rest, kernel works correctly. For MPC5125 the patches are OK.
>
> I also check clk_summary and all clocks values are OK (except for
> NFC clock value).
Since there is no user of the NFC block yet, I did not implement
the driver for the clock item. The list of clocks in debugfs
should completely lack an NFC entry since nothing was registered
with the CCF subsystem.
> I notice that there are missing clock like: gpio1, gpio2, fuse, dma,
> wdt, pmc, rtc.
> Is this OK or should be added?
Are there registers for those clock items? Haven't seen any when
flipping through the RM's clocks chapter. If there's no
(software controllable) gate or divider, then there's no clock
item in need of software support.
virtually yours
Gerhard Sittig
--
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HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
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Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
On Thu, 2013-12-12 at 18:46 +0100, Sinan Akman wrote: > Matteo Facchinetti wrote: > > [...] > > - NFC: one of the biggest unsolved mystery > > Is this ip-core used in others microcontrollers? Seems to be used only > > in mpc5125!!! > I don't think that IP is used in any other FSL SoC. Scott can probably > confirm this for us. That's a different part of Freescale, so I don't know much about it, but it looks pretty similar to MXC NAND. Back when those drivers were submitted I tried to get the authors of each to work together to see if a common driver made sense, but I got little response. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
Matteo Facchinetti wrote: [...] - NFC: one of the biggest unsolved mystery Is this ip-core used in others microcontrollers? Seems to be used only in mpc5125!!! I don't think that IP is used in any other FSL SoC. Scott can probably confirm this for us. I did some digging on this NFC just to put enough things together that I can erase and flash firmware using BDI3000 that is read and executed properly when the boot flag is set. Do you see any other anomalies with MPC5125 NFC ? Thanks Sinan Akman ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
On 10/12/2013 14:11, Gerhard Sittig wrote:
this series improves the previously introduced common clock support for
MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
(MPC5125 turned out to be rather different from MPC5121 than I perceived
before -- there is much more than "just two FECs and no MBX")
Ohhh yesss. welcome to hell! :-)
I report also these differences:
- I/O control module:
to do integration with linux pin-muxing subsystem
- GPIO module:
controller is the same of the mpc5121 but with these differences:
- 64 gpios divided in 2 banks
- input only gpios are numbers form 0 to 3 of the first bank
I'm finishing to write the patch... when done I'll post in ML
- NFC: one of the biggest unsolved mystery
Is this ip-core used in others microcontrollers? Seems to be
used only in mpc5125!!!
Matteo, can you verify the crystal frequency in the DTS update, please?
Crystal frequency is ok: 33MHz.
And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
MPC512x plus this series for MPC5125 operate your peripherals, both with
an updated device tree as well as with a former device tree that lacks
clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
.config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
I tested all on TWR board.
In DTS, for the moment, have to comment out this block:
-usb@3000 {
-compatible = "fsl,mpc5121-usb2-dr";
-reg = <0x3000 0x400>;
-#address-cells = <1>;
-#size-cells = <0>;
-interrupts = <43 0x8>;
-dr_mode = "host";
-phy_type = "ulpi";
-clocks = <&clks MPC512x_CLK_USB1>;
-clock-names = "ipg";
-};
Because USB controller pinout is not initialized correctly and when
system boot, causes a kernel panic.
For the rest, kernel works correctly. For MPC5125 the patches are OK.
I also check clk_summary and all clocks values are OK (except for NFC
clock value).
I notice that there are missing clock like: gpio1, gpio2, fuse, dma,
wdt, pmc, rtc.
Is this OK or should be added?
Regards,
Matteo Facchinetti
Sirius Electronic Systems
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[PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
this series improves the previously introduced common clock support for
MPC512x such that SoC variants 5123 and 5125 get addressed appropriately
(MPC5125 turned out to be rather different from MPC5121 than I perceived
before -- there is much more than "just two FECs and no MBX")
thus this series depends on "add COMMON_CLK support for PowerPC MPC512x"
(v6 sent in <1385851897-23475-1-git-send-email-...@denx.de>, applicable
on top of v3.13-rc1 or later, currently applied to mpc5xxx -next,
available at git://git.denx.de/linux-2.6-agust.git next)
this series does not address the issue of outdated or missing device
tree binding documentation for MPC512x peripherals -- that's the scope
of a pending separate series
v1 initial submission (2013-12-10)
- enforce an even divider value for SDHC (on all MPC512x variants)
- tell 5121/5123/5125 SoC variants apart and only register the
appropriate set of clock items (i.e. refuse to access unused and
reserved bits, and support those components which are only found on
MPC5125)
- update the MPC5125 "tower" board DTS (although the code still works in
the absence of device tree clock specs)
the series passes 'checkpatch.pl --strict' except for two warnings which
cannot get fixed because dictates the data type
and "fixing" the warning would break the build
WARNING: static const char * array should probably be static const char *
const
#256: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:500:
+static const char *parent_names_mux0_spdif[] = {
WARNING: static const char * array should probably be static const char *
const
#260: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:504:
+static const char *parent_names_mux0_canin[] = {
total: 0 errors, 2 warnings, 0 checks, 495 lines checked
the series was build-tested, and was run-tested on the MPC5121 ADS board
Matteo, can you verify the crystal frequency in the DTS update, please?
And that v3.13-rc kernels with v6 of the COMMON_CLK introduction for
MPC512x plus this series for MPC5125 operate your peripherals, both with
an updated device tree as well as with a former device tree that lacks
clock specs? Thank you! Setting CONFIG_COMMON_CLK_DEBUG=y in your
.config and eyeballing /sys/kernel/debug/clk/clk_summary will help you.
Gerhard Sittig (4):
powerpc/512x: clk: minor comment updates
powerpc/512x: clk: enforce even SDHC divider values
powerpc/512x: clk: support MPC5121/5123/5125 SoC variants
powerpc/512x: dts: add MPC5125 clock specs
arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++-
arch/powerpc/include/asm/mpc5121.h|7 +-
arch/powerpc/platforms/512x/clock-commonclk.c | 369 +
include/dt-bindings/clock/mpc512x-clock.h |9 +-
4 files changed, 386 insertions(+), 52 deletions(-)
--
1.7.10.4
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