From: Christophe Lombard
The new flash.c file contains the logic to flash a new image on the
adapter, through a hcall. It is an iterative process, with chunks of
data of 1M at a time. There are also 2 phases: write and verify. The
flash operation itself is driven from a user-land tool.
Once flashing is successful, an rtas call is made to update the device
tree with the new properties values for the adapter and the AFU(s)
Add a new char device for the adapter, so that the flash tool can
access the card, even if there is no valid AFU on it.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Reviewed-by: Manoj Kumar
---
Documentation/powerpc/cxl.txt | 55 +
drivers/misc/cxl/Makefile | 2 +-
drivers/misc/cxl/base.c | 7 +
drivers/misc/cxl/cxl.h| 6 +
drivers/misc/cxl/file.c | 11 +-
drivers/misc/cxl/flash.c | 538 ++
drivers/misc/cxl/guest.c | 15 ++
include/uapi/misc/cxl.h | 24 ++
8 files changed, 653 insertions(+), 5 deletions(-)
create mode 100644 drivers/misc/cxl/flash.c
diff --git a/Documentation/powerpc/cxl.txt b/Documentation/powerpc/cxl.txt
index 205c1b8..d5506ba0 100644
--- a/Documentation/powerpc/cxl.txt
+++ b/Documentation/powerpc/cxl.txt
@@ -116,6 +116,8 @@ Work Element Descriptor (WED)
User API
+1. AFU character devices
+
For AFUs operating in AFU directed mode, two character device
files will be created. /dev/cxl/afu0.0m will correspond to a
master context and /dev/cxl/afu0.0s will correspond to a slave
@@ -362,6 +364,59 @@ read
reserved fields:
For future extensions and padding
+
+2. Card character device (powerVM guest only)
+
+In a powerVM guest, an extra character device is created for the
+card. The device is only used to write (flash) a new image on the
+FPGA accelerator. Once the image is written and verified, the
+device tree is updated and the card is reset to reload the updated
+image.
+
+open
+
+
+Opens the device and allocates a file descriptor to be used with
+the rest of the API. The device can only be opened once.
+
+ioctl
+-
+
+CXL_IOCTL_DOWNLOAD_IMAGE:
+CXL_IOCTL_VALIDATE_IMAGE:
+Starts and controls flashing a new FPGA image. Partial
+reconfiguration is not supported (yet), so the image must contain
+a copy of the PSL and AFU(s). Since an image can be quite large,
+the caller may have to iterate, splitting the image in smaller
+chunks.
+
+Takes a pointer to a struct cxl_adapter_image:
+struct cxl_adapter_image {
+__u64 flags;
+__u64 data;
+__u64 len_data;
+__u64 len_image;
+__u64 reserved1;
+__u64 reserved2;
+__u64 reserved3;
+__u64 reserved4;
+};
+
+flags:
+These flags indicate which optional fields are present in
+this struct. Currently all fields are mandatory.
+
+data:
+Pointer to a buffer with part of the image to write to the
+card.
+
+len_data:
+Size of the buffer pointed to by data.
+
+len_image:
+Full size of the image.
+
+
Sysfs Class
===
diff --git a/drivers/misc/cxl/Makefile b/drivers/misc/cxl/Makefile
index a3d4bef..9ab874f 100644
--- a/drivers/misc/cxl/Makefile
+++ b/drivers/misc/cxl/Makefile
@@ -4,7 +4,7 @@ ccflags-$(CONFIG_PPC_WERROR)+= -Werror
cxl-y += main.o file.o irq.o fault.o native.o
cxl-y += context.o sysfs.o debugfs.o pci.o trace.o
cxl-y += vphb.o api.o
-cxl-y += guest.o of.o hcalls.o
+cxl-y += flash.o guest.o of.o hcalls.o
obj-$(CONFIG_CXL) += cxl.o
obj-$(CONFIG_CXL_BASE) += base.o
diff --git a/drivers/misc/cxl/base.c b/drivers/misc/cxl/base.c
index a9f0dd3..957f4dd 100644
--- a/drivers/misc/cxl/base.c
+++ b/drivers/misc/cxl/base.c
@@ -84,3 +84,10 @@ void unregister_cxl_calls(struct cxl_calls *calls)
synchronize_rcu();
}
EXPORT_SYMBOL_GPL(unregister_cxl_calls);
+
+int cxl_update_properties(struct device_node *dn,
+ struct property *new_prop)
+{
+ return of_update_property(dn, new_prop);
+}
+EXPORT_SYMBOL_GPL(cxl_update_properties);
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index a7e75f1..24bd4ca 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -324,6 +324,10 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
#define CXL_MODE_TIME_SLICED 0x4
#define CXL_SUPPORTED_MODES (CXL_MODE_DEDICATED | CXL_MODE_DIRECTED)
+#define CXL_DEV_MINORS 13 /* 1 control + 4 AFUs * 3
(dedicated/master/shared) */
+#define CXL_CARD_MINOR(adapter) (adapter->adapter_num * CXL_DEV_MINORS)
+#define CXL_DEVT_ADAPTER(dev) (MINOR(dev) / CXL_DEV_MINORS)
+
enum cxl_context_status {
CLOSED,
