Re: [v3 15/15] tools/perf: Add perf tools support for extended regs in power10

2020-07-20 Thread kajoljain 



On 7/17/20 8:08 PM, Athira Rajeev wrote:
> Added support for supported regs which are new in power10
> ( MMCR3, SIER2, SIER3 ) to sample_reg_mask in the tool side
> to use with `-I?` option. Also added PVR check to send extended
> mask for power10 at kernel while capturing extended regs in
> each sample.
> 
> Signed-off-by: Athira Rajeev 
> ---
>  tools/arch/powerpc/include/uapi/asm/perf_regs.h | 6 ++
>  tools/perf/arch/powerpc/include/perf_regs.h | 3 +++
>  tools/perf/arch/powerpc/util/perf_regs.c| 6 ++
>  3 files changed, 15 insertions(+)
> 


Reviewed-by: Kajol Jain 

Thanks,
Kajol Jain

> diff --git a/tools/arch/powerpc/include/uapi/asm/perf_regs.h 
> b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
> index 225c64c..bdf5f10 100644
> --- a/tools/arch/powerpc/include/uapi/asm/perf_regs.h
> +++ b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
> @@ -52,6 +52,9 @@ enum perf_event_powerpc_regs {
>   PERF_REG_POWERPC_MMCR0,
>   PERF_REG_POWERPC_MMCR1,
>   PERF_REG_POWERPC_MMCR2,
> + PERF_REG_POWERPC_MMCR3,
> + PERF_REG_POWERPC_SIER2,
> + PERF_REG_POWERPC_SIER3,
>   /* Max regs without the extended regs */
>   PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
>  };
> @@ -60,6 +63,9 @@ enum perf_event_powerpc_regs {
>  
>  /* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
>  #define PERF_REG_PMU_MASK_300   (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) - 
> 1) - PERF_REG_PMU_MASK)
> +/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31 */
> +#define PERF_REG_PMU_MASK_31   (((1ULL << (PERF_REG_POWERPC_SIER3 + 1)) - 1) 
> - PERF_REG_PMU_MASK)
>  
>  #define PERF_REG_MAX_ISA_300   (PERF_REG_POWERPC_MMCR2 + 1)
> +#define PERF_REG_MAX_ISA_31(PERF_REG_POWERPC_SIER3 + 1)
>  #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
> diff --git a/tools/perf/arch/powerpc/include/perf_regs.h 
> b/tools/perf/arch/powerpc/include/perf_regs.h
> index 46ed00d..63f3ac9 100644
> --- a/tools/perf/arch/powerpc/include/perf_regs.h
> +++ b/tools/perf/arch/powerpc/include/perf_regs.h
> @@ -68,6 +68,9 @@
>   [PERF_REG_POWERPC_MMCR0] = "mmcr0",
>   [PERF_REG_POWERPC_MMCR1] = "mmcr1",
>   [PERF_REG_POWERPC_MMCR2] = "mmcr2",
> + [PERF_REG_POWERPC_MMCR3] = "mmcr3",
> + [PERF_REG_POWERPC_SIER2] = "sier2",
> + [PERF_REG_POWERPC_SIER3] = "sier3",
>  };
>  
>  static inline const char *perf_reg_name(int id)
> diff --git a/tools/perf/arch/powerpc/util/perf_regs.c 
> b/tools/perf/arch/powerpc/util/perf_regs.c
> index d64ba0c..2b6d470 100644
> --- a/tools/perf/arch/powerpc/util/perf_regs.c
> +++ b/tools/perf/arch/powerpc/util/perf_regs.c
> @@ -14,6 +14,7 @@
>  #include 
>  
>  #define PVR_POWER9   0x004E
> +#define PVR_POWER10  0x0080
>  
>  const struct sample_reg sample_reg_masks[] = {
>   SMPL_REG(r0, PERF_REG_POWERPC_R0),
> @@ -64,6 +65,9 @@
>   SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
>   SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
>   SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
> + SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
> + SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
> + SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
>   SMPL_REG_END
>  };
>  
> @@ -194,6 +198,8 @@ uint64_t arch__intr_reg_mask(void)
>   version = (((mfspr(SPRN_PVR)) >>  16) & 0x);
>   if (version == PVR_POWER9)
>   extended_mask = PERF_REG_PMU_MASK_300;
> + else if (version == PVR_POWER10)
> + extended_mask = PERF_REG_PMU_MASK_31;
>   else
>   return mask;
>  
>

[v3 15/15] tools/perf: Add perf tools support for extended regs in power10

2020-07-17 Thread Athira Rajeev 
Added support for supported regs which are new in power10
( MMCR3, SIER2, SIER3 ) to sample_reg_mask in the tool side
to use with `-I?` option. Also added PVR check to send extended
mask for power10 at kernel while capturing extended regs in
each sample.

Signed-off-by: Athira Rajeev 
---
 tools/arch/powerpc/include/uapi/asm/perf_regs.h | 6 ++
 tools/perf/arch/powerpc/include/perf_regs.h | 3 +++
 tools/perf/arch/powerpc/util/perf_regs.c| 6 ++
 3 files changed, 15 insertions(+)

diff --git a/tools/arch/powerpc/include/uapi/asm/perf_regs.h 
b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
index 225c64c..bdf5f10 100644
--- a/tools/arch/powerpc/include/uapi/asm/perf_regs.h
+++ b/tools/arch/powerpc/include/uapi/asm/perf_regs.h
@@ -52,6 +52,9 @@ enum perf_event_powerpc_regs {
PERF_REG_POWERPC_MMCR0,
PERF_REG_POWERPC_MMCR1,
PERF_REG_POWERPC_MMCR2,
+   PERF_REG_POWERPC_MMCR3,
+   PERF_REG_POWERPC_SIER2,
+   PERF_REG_POWERPC_SIER3,
/* Max regs without the extended regs */
PERF_REG_POWERPC_MAX = PERF_REG_POWERPC_MMCRA + 1,
 };
@@ -60,6 +63,9 @@ enum perf_event_powerpc_regs {
 
 /* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_300 */
 #define PERF_REG_PMU_MASK_300   (((1ULL << (PERF_REG_POWERPC_MMCR2 + 1)) - 1) 
- PERF_REG_PMU_MASK)
+/* PERF_REG_EXTENDED_MASK value for CPU_FTR_ARCH_31 */
+#define PERF_REG_PMU_MASK_31   (((1ULL << (PERF_REG_POWERPC_SIER3 + 1)) - 1) - 
PERF_REG_PMU_MASK)
 
 #define PERF_REG_MAX_ISA_300   (PERF_REG_POWERPC_MMCR2 + 1)
+#define PERF_REG_MAX_ISA_31(PERF_REG_POWERPC_SIER3 + 1)
 #endif /* _UAPI_ASM_POWERPC_PERF_REGS_H */
diff --git a/tools/perf/arch/powerpc/include/perf_regs.h 
b/tools/perf/arch/powerpc/include/perf_regs.h
index 46ed00d..63f3ac9 100644
--- a/tools/perf/arch/powerpc/include/perf_regs.h
+++ b/tools/perf/arch/powerpc/include/perf_regs.h
@@ -68,6 +68,9 @@
[PERF_REG_POWERPC_MMCR0] = "mmcr0",
[PERF_REG_POWERPC_MMCR1] = "mmcr1",
[PERF_REG_POWERPC_MMCR2] = "mmcr2",
+   [PERF_REG_POWERPC_MMCR3] = "mmcr3",
+   [PERF_REG_POWERPC_SIER2] = "sier2",
+   [PERF_REG_POWERPC_SIER3] = "sier3",
 };
 
 static inline const char *perf_reg_name(int id)
diff --git a/tools/perf/arch/powerpc/util/perf_regs.c 
b/tools/perf/arch/powerpc/util/perf_regs.c
index d64ba0c..2b6d470 100644
--- a/tools/perf/arch/powerpc/util/perf_regs.c
+++ b/tools/perf/arch/powerpc/util/perf_regs.c
@@ -14,6 +14,7 @@
 #include 
 
 #define PVR_POWER9 0x004E
+#define PVR_POWER100x0080
 
 const struct sample_reg sample_reg_masks[] = {
SMPL_REG(r0, PERF_REG_POWERPC_R0),
@@ -64,6 +65,9 @@
SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
+   SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
+   SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
+   SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
SMPL_REG_END
 };
 
@@ -194,6 +198,8 @@ uint64_t arch__intr_reg_mask(void)
version = (((mfspr(SPRN_PVR)) >>  16) & 0x);
if (version == PVR_POWER9)
extended_mask = PERF_REG_PMU_MASK_300;
+   else if (version == PVR_POWER10)
+   extended_mask = PERF_REG_PMU_MASK_31;
else
return mask;
 
-- 
1.8.3.1