Freescale mpc8315 IRQ0 setup
Dear mailing list,
i found out on our platform with freescale mpc8315 SOC that in
linux kernel code the setup of IRQ0 which we use is not correct.
One should be able to use falling EDGE interrupt capabilities like on
IRQ1-IRQ7. These setups are fixed in "arch/powerpc/sysdev/ipic.c"
The internal interrupt number of IRQ0 is not like IRQ1-IRQ7 in one block
but on number 48. To verify details please consult MPC8315ERM.pdf
developpers manual.
To correct these "EDGE" capabilities of IRQ0 i suggest the following
patch:
please consider integrating it to your patches.
--- arch/powerpc/sysdev/ipic.c (Revision correct)
+++ arch/powerpc/sysdev/ipic.c (Arbeitskopie)
@@ -316,6 +316,7 @@
.prio_mask = 7,
},
[48] = {
+ .ack= IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
Thank you for your attention
--
i. A.
Jürgen Schindele
Softwareentwicklung
PSI Nentec GmbH
Greschbachstraße 12
76229 Karlsruhe
Deutschland
Telefon: +49 721 94249-51
Telefax: +49 721 94249-10
schind...@nentec.de
www.nentec.de
Geschäftsführung: Klaus Becker, Wolfgang Fischer
Sitz der Gesellschaft: Karlsruhe
Handelsregister: Amtsgericht Mannheim HRB 107658
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Re: Freescale mpc8315 IRQ0 setup
On Mon, Apr 10, 2017 at 04:53:18PM +0200, Juergen Schindele wrote:
> Dear mailing list,
> i found out on our platform with freescale mpc8315 SOC that in
> linux kernel code the setup of IRQ0 which we use is not correct.
> One should be able to use falling EDGE interrupt capabilities like on
> IRQ1-IRQ7. These setups are fixed in "arch/powerpc/sysdev/ipic.c"
> The internal interrupt number of IRQ0 is not like IRQ1-IRQ7 in one block
> but on number 48. To verify details please consult MPC8315ERM.pdf
> developpers manual.
>
> To correct these "EDGE" capabilities of IRQ0 i suggest the following
> patch:
> please consider integrating it to your patches.
>
>
> Thank you for your attention
>
> --- arch/powerpc/sysdev/ipic.c (Revision correct)
> +++ arch/powerpc/sysdev/ipic.c (Arbeitskopie)
> @@ -316,6 +316,7 @@
> .prio_mask = 7,
> },
> [48] = {
> + .ack= IPIC_SEPNR,
> .mask = IPIC_SEMSR,
> .prio = IPIC_SMPRR_A,
> .force = IPIC_SEFCR,
Could you send this with a signoff and a commit message intended for
merging?
-Scott
Re: Freescale mpc8315 IRQ0 setup
Dear Scott,
sorry for the delay but i am not very familiar with the formating.
I passed the patch trough checkpatch.pl and there was no more error.
pease find patch in attached file.
Thanks
--
i. A.
Jürgen Schindele
Softwareentwicklung
PSI Nentec GmbH
Greschbachstraße 12
76229 Karlsruhe
Deutschland
Telefon: +49 721 94249-51
Telefax: +49 721 94249-10
schind...@nentec.de
www.nentec.de
Geschäftsführung: Klaus Becker, Wolfgang Fischer
Sitz der Gesellschaft: Karlsruhe
Handelsregister: Amtsgericht Mannheim HRB 107658
Diese E-Mail enthält vertrauliche oder rechtlich geschützte Informationen.
Wenn Sie nicht der vorgesehene Empfänger sind, informieren Sie bitte sofort
den Absender und löschen Sie diese E-Mail. Das unbefugte Kopieren dieser E-
Mail oder die unbefugte Weitergabe der enthaltenen Informationen ist nicht
gestattet.
The information contained in this message is confidential or protected by law.
If you are not the intended recipient, please contact the sender and delete
this message. Any unauthorised copying of this message or unauthorised
distribution of the information contained herein is prohibited. [PATCH] configure "EDGE" capabilities for IRQ0 (like IRQ1-7)
Signed-off-by: Jurgen Schindele
--- linux-a/arch/powerpc/sysdev/ipic.c2017-04-04 15:28:11.201308780 +0200
+++ linux-b/arch/powerpc/sysdev/ipic.c2016-12-11 20:17:54.0 +0100
@@ -315,7 +315,6 @@ static struct ipic_info ipic_info[] = {
.prio_mask = 7,
},
[48] = {
- .ack= IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
@@ -618,7 +617,7 @@ static int ipic_set_irq_type(struct irq_
/* ipic supports only edge mode on external interrupts */
if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !ipic_info[src].ack) {
printk(KERN_ERR "ipic: edge sense not supported on internal "
- "interrupts %d\n", src);
+"interrupts\n");
return -EINVAL;
}
Re: Freescale mpc8315 IRQ0 setup
On Tue, 2017-05-02 at 14:43 +0200, Juergen Schindele wrote: > Dear Scott, > sorry for the delay but i am not very familiar with the formating. > I passed the patch trough checkpatch.pl and there was no more error. > pease find patch in attached file. > Thanks Documentation/process/submitting-patches.rst explains the way to format and submit kernel patches. Also, why the unrelated change to a print statement in ipic_set_irq_type()? -Scott
Re: Freescale mpc8315 IRQ0 setup
Am Dienstag, 2. Mai 2017, 22:29:34 schrieb Scott Wood:
> On Tue, 2017-05-02 at 14:43 +0200, Juergen Schindele wrote:
> > Dear Scott,
> > sorry for the delay but i am not very familiar with the formating.
> > I passed the patch trough checkpatch.pl and there was no more error.
> > pease find patch in attached file.
> > Thanks
>
> Documentation/process/submitting-patches.rst explains the way to format and
> submit kernel patches.
>
> Also, why the unrelated change to a print statement in ipic_set_irq_type()?
>
> -Scott
The second diff is not completely unrelated because when i was investigating
the problem i saw only a message "edge sense not supported" but you dont
know on which interrupt he is complaining about. So i added this to find out
who the suspect is.
Corrected patch
--
i. A.
Jürgen Schindele
Softwareentwicklung
PSI Nentec GmbH
Greschbachstraße 12
76229 Karlsruhe
Deutschland
Telefon: +49 721 94249-51
Telefax: +49 721 94249-10
schind...@nentec.de
www.nentec.de
Geschäftsführung: Klaus Becker, Wolfgang Fischer
Sitz der Gesellschaft: Karlsruhe
Handelsregister: Amtsgericht Mannheim HRB 107658
Diese E-Mail enthält vertrauliche oder rechtlich geschützte Informationen.
Wenn Sie nicht der vorgesehene Empfänger sind, informieren Sie bitte sofort
den Absender und löschen Sie diese E-Mail. Das unbefugte Kopieren dieser E-
Mail oder die unbefugte Weitergabe der enthaltenen Informationen ist nicht
gestattet.
The information contained in this message is confidential or protected by law.
If you are not the intended recipient, please contact the sender and delete
this message. Any unauthorised copying of this message or unauthorised
distribution of the information contained herein is prohibited. [PATCH] configure "EDGE" capabilities for IRQ0 (like IRQ1-7)
Signed-off-by: Jurgen Schindele
--- a/arch/powerpc/sysdev/ipic.c 2016-12-11 20:17:54.0 +0100
+++ b/arch/powerpc/sysdev/ipic.c 2017-04-04 15:28:11.201308780 +0200
@@ -315,6 +315,7 @@ static struct ipic_info ipic_info[] = {
.prio_mask = 7,
},
[48] = {
+ .ack = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
.force = IPIC_SEFCR,
@@ -617,7 +618,7 @@ static int ipic_set_irq_type(struct irq_
/* ipic supports only edge mode on external interrupts */
if ((flow_type & IRQ_TYPE_EDGE_FALLING) && !ipic_info[src].ack) {
printk(KERN_ERR "ipic: edge sense not supported on internal "
-"interrupts\n");
+"interrupts %d\n", src);
return -EINVAL;
}
Re: Freescale mpc8315 IRQ0 setup
On Thu, 2017-05-04 at 17:06 +0200, Juergen Schindele wrote: > Am Dienstag, 2. Mai 2017, 22:29:34 schrieb Scott Wood: > > On Tue, 2017-05-02 at 14:43 +0200, Juergen Schindele wrote: > > > Dear Scott, > > > sorry for the delay but i am not very familiar with the formating. > > > I passed the patch trough checkpatch.pl and there was no more error. > > > pease find patch in attached file. > > > Thanks > > > > Documentation/process/submitting-patches.rst explains the way to format > > and > > submit kernel patches. > > > > Also, why the unrelated change to a print statement in > > ipic_set_irq_type()? > > > > -Scott > > The second diff is not completely unrelated because when i was > investigating > the problem i saw only a message "edge sense not supported" but you dont > know on which interrupt he is complaining about. So i added this to find > out > who the suspect is. That's fine but it's still fixing a different problem than "irq0 setup" and should be a separate patch. > Corrected patch Again, please read Documentation/process/submitting-patches.rst. Patches should be inline, not attached. The subject line should be something like "powerpc/ipic: Configure "EDGE" capabilities for IRQ0 (like IRQ1-7)" and there should be more description in the body of the changelog. -Scott
